1 /*-
2 * SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) AND ISC
3 */
4
5 /* $OpenBSD: if_iwxvar.h,v 1.41 2023/03/06 11:53:24 stsp Exp $ */
6
7 /*
8 * Copyright (c) 2014 genua mbh <info@genua.de>
9 * Copyright (c) 2014 Fixup Software Ltd.
10 *
11 * Permission to use, copy, modify, and distribute this software for any
12 * purpose with or without fee is hereby granted, provided that the above
13 * copyright notice and this permission notice appear in all copies.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 */
23
24 /*-
25 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
26 * which were used as the reference documentation for this implementation.
27 *
28 ******************************************************************************
29 *
30 * This file is provided under a dual BSD/GPLv2 license. When using or
31 * redistributing this file, you may do so under either license.
32 *
33 * GPL LICENSE SUMMARY
34 *
35 * Copyright(c) 2017 Intel Deutschland GmbH
36 * Copyright(c) 2018 - 2019 Intel Corporation
37 *
38 * This program is free software; you can redistribute it and/or modify
39 * it under the terms of version 2 of the GNU General Public License as
40 * published by the Free Software Foundation.
41 *
42 * This program is distributed in the hope that it will be useful, but
43 * WITHOUT ANY WARRANTY; without even the implied warranty of
44 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
45 * General Public License for more details.
46 *
47 * BSD LICENSE
48 *
49 * Copyright(c) 2017 Intel Deutschland GmbH
50 * Copyright(c) 2018 - 2019 Intel Corporation
51 * All rights reserved.
52 *
53 * Redistribution and use in source and binary forms, with or without
54 * modification, are permitted provided that the following conditions
55 * are met:
56 *
57 * * Redistributions of source code must retain the above copyright
58 * notice, this list of conditions and the following disclaimer.
59 * * Redistributions in binary form must reproduce the above copyright
60 * notice, this list of conditions and the following disclaimer in
61 * the documentation and/or other materials provided with the
62 * distribution.
63 * * Neither the name Intel Corporation nor the names of its
64 * contributors may be used to endorse or promote products derived
65 * from this software without specific prior written permission.
66 *
67 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
68 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
69 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
70 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
71 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
72 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
73 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
74 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
75 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
76 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
77 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78 *
79 *****************************************************************************
80 */
81
82 /*-
83 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
84 *
85 * Permission to use, copy, modify, and distribute this software for any
86 * purpose with or without fee is hereby granted, provided that the above
87 * copyright notice and this permission notice appear in all copies.
88 *
89 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
90 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
91 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
92 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
93 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
94 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
95 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
96 */
97
98 struct iwx_rx_radiotap_header {
99 struct ieee80211_radiotap_header wr_ihdr;
100 uint64_t wr_tsft;
101 uint8_t wr_flags;
102 uint8_t wr_rate;
103 uint16_t wr_chan_freq;
104 uint16_t wr_chan_flags;
105 int8_t wr_dbm_antsignal;
106 int8_t wr_dbm_antnoise;
107 } __packed;
108
109 #define IWX_RX_RADIOTAP_PRESENT \
110 ((1 << IEEE80211_RADIOTAP_TSFT) | \
111 (1 << IEEE80211_RADIOTAP_FLAGS) | \
112 (1 << IEEE80211_RADIOTAP_RATE) | \
113 (1 << IEEE80211_RADIOTAP_CHANNEL) | \
114 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
115 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
116
117 struct iwx_tx_radiotap_header {
118 struct ieee80211_radiotap_header wt_ihdr;
119 uint8_t wt_flags;
120 uint8_t wt_rate;
121 uint16_t wt_chan_freq;
122 uint16_t wt_chan_flags;
123 } __packed;
124
125 #define IWX_TX_RADIOTAP_PRESENT \
126 ((1 << IEEE80211_RADIOTAP_FLAGS) | \
127 (1 << IEEE80211_RADIOTAP_RATE) | \
128 (1 << IEEE80211_RADIOTAP_CHANNEL))
129
130 #define IWX_UCODE_SECT_MAX 57
131
132 /*
133 * fw_status is used to determine if we've already parsed the firmware file
134 *
135 * In addition to the following, status < 0 ==> -error
136 */
137 #define IWX_FW_STATUS_NONE 0
138 #define IWX_FW_STATUS_INPROGRESS 1
139 #define IWX_FW_STATUS_DONE 2
140
141 enum iwx_ucode_type {
142 IWX_UCODE_TYPE_REGULAR,
143 IWX_UCODE_TYPE_INIT,
144 IWX_UCODE_TYPE_WOW,
145 IWX_UCODE_TYPE_REGULAR_USNIFFER,
146 IWX_UCODE_TYPE_MAX
147 };
148
149 struct iwx_fw_info {
150 void *fw_rawdata;
151 size_t fw_rawsize;
152 int fw_status;
153
154 struct iwx_fw_sects {
155 struct iwx_fw_onesect {
156 const void *fws_data;
157 uint32_t fws_len;
158 uint32_t fws_devoff;
159 } fw_sect[IWX_UCODE_SECT_MAX];
160 size_t fw_totlen;
161 int fw_count;
162 } fw_sects[IWX_UCODE_TYPE_MAX];
163
164 /* FW debug data parsed for driver usage */
165 int dbg_dest_tlv_init;
166 const uint8_t *dbg_dest_ver;
167 uint8_t n_dest_reg;
168 const struct iwx_fw_dbg_dest_tlv_v1 *dbg_dest_tlv_v1;
169
170 const struct iwx_fw_dbg_conf_tlv *dbg_conf_tlv[IWX_FW_DBG_CONF_MAX];
171 size_t dbg_conf_tlv_len[IWX_FW_DBG_CONF_MAX];
172 struct iwx_fw_dbg_trigger_tlv *dbg_trigger_tlv[IWX_FW_DBG_TRIGGER_MAX];
173 size_t dbg_trigger_tlv_len[IWX_FW_DBG_TRIGGER_MAX];
174 struct iwx_fw_dbg_mem_seg_tlv *dbg_mem_tlv;
175 size_t n_mem_tlv;
176
177 /* Copy of firmware image loader found in file. */
178 uint8_t *iml;
179 size_t iml_len;
180 };
181
182 struct iwx_nvm_data {
183 int n_hw_addrs;
184 uint8_t hw_addr[ETHER_ADDR_LEN];
185
186 int sku_cap_band_24GHz_enable;
187 int sku_cap_band_52GHz_enable;
188 int sku_cap_11n_enable;
189 int sku_cap_11ac_enable;
190 int sku_cap_11ax_enable;
191 int sku_cap_amt_enable;
192 int sku_cap_ipan_enable;
193 int sku_cap_mimo_disable;
194 int lar_enabled;
195
196 uint8_t valid_tx_ant, valid_rx_ant;
197
198 uint16_t nvm_version;
199 };
200
201 /* max bufs per tfd the driver will use */
202 #define IWX_MAX_CMD_TBS_PER_TFD 2
203
204 struct iwx_host_cmd {
205 const void *data[IWX_MAX_CMD_TBS_PER_TFD];
206 struct iwx_rx_packet *resp_pkt;
207 size_t resp_pkt_len;
208 unsigned long _rx_page_addr;
209 uint32_t _rx_page_order;
210 int handler_status;
211
212 uint32_t flags;
213 uint16_t len[IWX_MAX_CMD_TBS_PER_TFD];
214 uint8_t dataflags[IWX_MAX_CMD_TBS_PER_TFD];
215 uint32_t id;
216 };
217
218 /*
219 * DMA glue is from iwn
220 */
221
222 struct iwx_dma_info {
223 bus_dma_tag_t tag;
224 bus_dmamap_t map;
225 bus_dma_segment_t seg;
226 bus_addr_t paddr;
227 void *vaddr;
228 bus_size_t size;
229 };
230
231 #define IWX_TX_RING_COUNT IWX_DEFAULT_QUEUE_SIZE
232 #define IWX_TX_RING_LOMARK 192
233 #define IWX_TX_RING_HIMARK 224
234
235 struct iwx_tx_data {
236 bus_dmamap_t map;
237 bus_addr_t cmd_paddr;
238 struct mbuf *m;
239 struct iwx_node *in;
240 int flags;
241 #define IWX_TXDATA_FLAG_CMD_IS_NARROW 0x01
242 };
243
244 struct iwx_tx_ring {
245 struct iwx_dma_info desc_dma;
246 struct iwx_dma_info cmd_dma;
247 struct iwx_dma_info bc_tbl;
248 struct iwx_tfh_tfd *desc;
249 struct iwx_device_cmd *cmd;
250 struct iwx_tx_data data[IWX_TX_RING_COUNT];
251 int qid;
252 int queued;
253 int cur;
254 int cur_hw;
255 int tail;
256 int tail_hw;
257 int tid;
258 bus_dma_tag_t data_dmat;
259 };
260
261 #define IWX_RX_MQ_RING_COUNT 512
262 /* Linux driver optionally uses 8k buffer */
263 #define IWX_RBUF_SIZE 4096
264
265 struct iwx_rx_data {
266 struct mbuf *m;
267 bus_dmamap_t map;
268 };
269
270 struct iwx_rx_ring {
271 struct iwx_dma_info free_desc_dma;
272 struct iwx_dma_info stat_dma;
273 struct iwx_dma_info used_desc_dma;
274 void *desc;
275 struct iwx_rb_status *stat;
276 struct iwx_rx_data data[IWX_RX_MQ_RING_COUNT];
277 int cur;
278 bus_dma_tag_t data_dmat;
279 };
280
281 #define IWX_FLAG_USE_ICT 0x01 /* using Interrupt Cause Table */
282 #define IWX_FLAG_RFKILL 0x02 /* radio kill switch is set */
283 #define IWX_FLAG_SCANNING 0x04 /* scan in progress */
284 #define IWX_FLAG_MAC_ACTIVE 0x08 /* MAC context added to firmware */
285 #define IWX_FLAG_BINDING_ACTIVE 0x10 /* MAC->PHY binding added to firmware */
286 #define IWX_FLAG_STA_ACTIVE 0x20 /* AP added to firmware station table */
287 #define IWX_FLAG_TE_ACTIVE 0x40 /* time event is scheduled */
288 #define IWX_FLAG_HW_ERR 0x80 /* hardware error occurred */
289 #define IWX_FLAG_SHUTDOWN 0x100 /* shutting down; new tasks forbidden */
290 #define IWX_FLAG_BGSCAN 0x200 /* background scan in progress */
291 #define IWX_FLAG_TXFLUSH 0x400 /* Tx queue flushing in progress */
292 #define IWX_FLAG_HW_INITED 0x800 /* Hardware initialized */
293 #define IWX_FLAG_AMPDUTX 0x1000
294
295 struct iwx_ucode_status {
296 uint32_t uc_lmac_error_event_table[2];
297 uint32_t uc_umac_error_event_table;
298 uint32_t uc_log_event_table;
299 unsigned int error_event_table_tlv_status;
300
301 int uc_ok;
302 int uc_intr;
303 };
304
305 #define IWX_ERROR_EVENT_TABLE_LMAC1 (1 << 0)
306 #define IWX_ERROR_EVENT_TABLE_LMAC2 (1 << 1)
307 #define IWX_ERROR_EVENT_TABLE_UMAC (1 << 2)
308
309 #define IWX_CMD_RESP_MAX PAGE_SIZE
310
311 /* lower blocks contain EEPROM image and calibration data */
312 #define IWX_OTP_LOW_IMAGE_SIZE_FAMILY_7000 16384
313 #define IWX_OTP_LOW_IMAGE_SIZE_FAMILY_8000 32768
314
315 #define IWX_TE_SESSION_PROTECTION_MAX_TIME_MS 1000
316 #define IWX_TE_SESSION_PROTECTION_MIN_TIME_MS 400
317
318 enum IWX_CMD_MODE {
319 IWX_CMD_ASYNC = (1 << 0),
320 IWX_CMD_WANT_RESP = (1 << 1),
321 IWX_CMD_SEND_IN_RFKILL = (1 << 2),
322 };
323 enum iwx_hcmd_dataflag {
324 IWX_HCMD_DFL_NOCOPY = (1 << 0),
325 IWX_HCMD_DFL_DUP = (1 << 1),
326 };
327
328 #define IWX_NUM_PAPD_CH_GROUPS 9
329 #define IWX_NUM_TXP_CH_GROUPS 9
330
331 struct iwx_phy_ctxt {
332 uint16_t id;
333 uint16_t color;
334 uint32_t ref;
335 struct ieee80211_channel *channel;
336 uint8_t sco; /* 40 MHz secondary channel offset */
337 uint8_t vht_chan_width;
338 };
339
340 struct iwx_bf_data {
341 int bf_enabled; /* filtering */
342 int ba_enabled; /* abort */
343 int ave_beacon_signal;
344 int last_cqm_event;
345 };
346
347 /**
348 * struct iwx_self_init_dram - dram data used by self init process
349 * @fw: lmac and umac dram data
350 * @lmac_cnt: number of lmac sections in fw image
351 * @umac_cnt: number of umac sections in fw image
352 * @paging: paging dram data
353 * @paging_cnt: number of paging sections needed by fw image
354 */
355 struct iwx_self_init_dram {
356 struct iwx_dma_info *fw;
357 int lmac_cnt;
358 int umac_cnt;
359 struct iwx_dma_info *paging;
360 int paging_cnt;
361 };
362
363 /**
364 * struct iwx_reorder_buffer - per ra/tid/queue reorder buffer
365 * @head_sn: reorder window head sn
366 * @num_stored: number of mpdus stored in the buffer
367 * @buf_size: the reorder buffer size as set by the last addba request
368 * @queue: queue of this reorder buffer
369 * @last_amsdu: track last ASMDU SN for duplication detection
370 * @last_sub_index: track ASMDU sub frame index for duplication detection
371 * @reorder_timer: timer for frames are in the reorder buffer. For AMSDU
372 * it is the time of last received sub-frame
373 * @removed: prevent timer re-arming
374 * @valid: reordering is valid for this queue
375 * @consec_oldsn_drops: consecutive drops due to old SN
376 * @consec_oldsn_ampdu_gp2: A-MPDU GP2 timestamp to track
377 * when to apply old SN consecutive drop workaround
378 * @consec_oldsn_prev_drop: track whether or not an MPDU
379 * that was single/part of the previous A-MPDU was
380 * dropped due to old SN
381 */
382 struct iwx_reorder_buffer {
383 uint16_t head_sn;
384 uint16_t num_stored;
385 uint16_t buf_size;
386 uint16_t last_amsdu;
387 uint8_t last_sub_index;
388 struct callout reorder_timer;
389 int removed;
390 int valid;
391 unsigned int consec_oldsn_drops;
392 uint32_t consec_oldsn_ampdu_gp2;
393 unsigned int consec_oldsn_prev_drop;
394 #define IWX_AMPDU_CONSEC_DROPS_DELBA 10
395 };
396
397 /**
398 * struct iwx_reorder_buf_entry - reorder buffer entry per frame sequence number
399 * @frames: list of mbufs stored (A-MSDU subframes share a sequence number)
400 * @reorder_time: time the packet was stored in the reorder buffer
401 */
402 struct iwx_reorder_buf_entry {
403 struct mbufq frames;
404 struct timeval reorder_time;
405 uint32_t rx_pkt_status;
406 int chanidx;
407 int is_shortpre;
408 uint32_t rate_n_flags;
409 uint32_t device_timestamp;
410 struct ieee80211_rx_stats rxi;
411 };
412
413 /**
414 * struct iwx_rxba_data - BA session data
415 * @sta_id: station id
416 * @tid: tid of the session
417 * @baid: baid of the session
418 * @timeout: the timeout set in the addba request
419 * @entries_per_queue: # of buffers per queue
420 * @last_rx: last rx timestamp, updated only if timeout passed from last update
421 * @session_timer: timer to check if BA session expired, runs at 2 * timeout
422 * @sc: softc pointer, needed for timer context
423 * @reorder_buf: reorder buffer
424 * @reorder_buf_data: buffered frames, one entry per sequence number
425 */
426 struct iwx_rxba_data {
427 uint8_t sta_id;
428 uint8_t tid;
429 uint8_t baid;
430 uint16_t timeout;
431 uint16_t entries_per_queue;
432 struct timeval last_rx;
433 struct callout session_timer;
434 struct iwx_softc *sc;
435 struct iwx_reorder_buffer reorder_buf;
436 struct iwx_reorder_buf_entry entries[IEEE80211_AGGR_BAWMAX];
437 };
438
439 static inline struct iwx_rxba_data *
iwx_rxba_data_from_reorder_buf(struct iwx_reorder_buffer * buf)440 iwx_rxba_data_from_reorder_buf(struct iwx_reorder_buffer *buf)
441 {
442 return (void *)((uint8_t *)buf -
443 offsetof(struct iwx_rxba_data, reorder_buf));
444 }
445
446 /**
447 * struct iwx_rxq_dup_data - per station per rx queue data
448 * @last_seq: last sequence per tid for duplicate packet detection
449 * @last_sub_frame: last subframe packet
450 */
451 struct iwx_rxq_dup_data {
452 uint16_t last_seq[IWX_MAX_TID_COUNT + 1];
453 uint8_t last_sub_frame[IWX_MAX_TID_COUNT + 1];
454 };
455
456 struct iwx_setkey_task_arg {
457 int sta_id;
458 struct ieee80211_node *ni;
459 struct ieee80211_key *k;
460 };
461
462 struct iwx_ba_task_data {
463 uint32_t start_tidmask;
464 uint32_t stop_tidmask;
465 };
466
467
468 /*
469 * Device configuration parameters which cannot be detected based on
470 * PCI vendor/product ID alone.
471 */
472 struct iwx_device_cfg {
473 const char *fw_name;
474 const char *pnvm_name;
475 int tx_with_siso_diversity;
476 int uhb_supported;
477 int xtal_latency;
478 int low_latency_xtal;
479 };
480
481 /* Firmware listed here must be available in fw_update(8). */
482 #define IWX_CC_A_FW "iwlwifi-cc-a0-77.ucode"
483 #define IWX_TY_A_GF_A_FW "iwlwifi-ty-a0-gf-a0-77.ucode"
484 #define IWX_TY_A_GF_A_PNVM "iwlwifi-ty-a0-gf-a0.pnvm"
485 #define IWX_QU_B_HR_B_FW "iwlwifi-Qu-b0-hr-b0-77.ucode"
486 #define IWX_QU_B_JF_B_FW "iwlwifi-Qu-b0-jf-b0-77.ucode"
487 #define IWX_QU_C_HR_B_FW "iwlwifi-Qu-c0-hr-b0-77.ucode"
488 #define IWX_QU_C_JF_B_FW "iwlwifi-Qu-c0-jf-b0-77.ucode"
489 #define IWX_QUZ_A_HR_B_FW "iwlwifi-QuZ-a0-hr-b0-77.ucode"
490 #define IWX_QUZ_A_JF_B_FW "iwlwifi-QuZ-a0-jf-b0-77.ucode"
491 #define IWX_SO_A_GF_A_FW "iwlwifi-so-a0-gf-a0-77.ucode"
492 #define IWX_SO_A_GF_A_PNVM "iwlwifi-so-a0-gf-a0.pnvm"
493 #define IWX_SO_A_GF4_A_FW "iwlwifi-so-a0-gf4-a0-77.ucode"
494 #define IWX_SO_A_GF4_A_PNVM "iwlwifi-so-a0-gf4-a0.pnvm"
495 #define IWX_SO_A_HR_B_FW "iwlwifi-so-a0-hr-b0-77.ucode"
496 #define IWX_SO_A_JF_B_FW "iwlwifi-so-a0-jf-b0-77.ucode"
497
498 const struct iwx_device_cfg iwx_9560_quz_a0_jf_b0_cfg = {
499 .fw_name = IWX_QUZ_A_JF_B_FW,
500 };
501
502 const struct iwx_device_cfg iwx_9560_qu_c0_jf_b0_cfg = {
503 .fw_name = IWX_QU_C_JF_B_FW,
504 };
505
506 const struct iwx_device_cfg iwx_qu_b0_hr1_b0 = {
507 .fw_name = IWX_QU_B_HR_B_FW,
508 .tx_with_siso_diversity = true,
509 };
510
511 const struct iwx_device_cfg iwx_qu_b0_hr_b0 = {
512 .fw_name = IWX_QU_B_HR_B_FW,
513 };
514
515 const struct iwx_device_cfg iwx_ax201_cfg_qu_hr = {
516 .fw_name = IWX_QU_B_HR_B_FW,
517 };
518
519 const struct iwx_device_cfg iwx_qu_c0_hr1_b0 = {
520 .fw_name = IWX_QU_C_HR_B_FW,
521 .tx_with_siso_diversity = true,
522 };
523
524 const struct iwx_device_cfg iwx_qu_c0_hr_b0 = {
525 .fw_name = IWX_QU_C_HR_B_FW,
526 };
527
528 const struct iwx_device_cfg iwx_ax201_cfg_qu_c0_hr_b0 = {
529 .fw_name = IWX_QU_C_HR_B_FW,
530 };
531
532 const struct iwx_device_cfg iwx_quz_a0_hr1_b0 = {
533 .fw_name = IWX_QUZ_A_HR_B_FW,
534 };
535
536 const struct iwx_device_cfg iwx_ax201_cfg_quz_hr = {
537 .fw_name = IWX_QUZ_A_HR_B_FW,
538 };
539
540 const struct iwx_device_cfg iwx_cfg_so_a0_hr_b0 = {
541 .fw_name = IWX_SO_A_HR_B_FW,
542 };
543
544 const struct iwx_device_cfg iwx_cfg_quz_a0_hr_b0 = {
545 .fw_name = IWX_QUZ_A_HR_B_FW,
546 };
547
548 const struct iwx_device_cfg iwx_2ax_cfg_so_gf_a0 = {
549 .fw_name = IWX_SO_A_GF_A_FW,
550 .pnvm_name = IWX_SO_A_GF_A_PNVM,
551 .uhb_supported = 1,
552 };
553
554 const struct iwx_device_cfg iwx_2ax_cfg_so_gf_a0_long = {
555 .fw_name = IWX_SO_A_GF_A_FW,
556 .pnvm_name = IWX_SO_A_GF_A_PNVM,
557 .uhb_supported = 1,
558 .xtal_latency = 12000,
559 .low_latency_xtal = 1,
560 };
561
562 const struct iwx_device_cfg iwx_2ax_cfg_so_gf4_a0 = {
563 .fw_name = IWX_SO_A_GF4_A_FW,
564 .pnvm_name = IWX_SO_A_GF4_A_PNVM,
565 .uhb_supported = 1,
566 .xtal_latency = 12000,
567 .low_latency_xtal = 1,
568 };
569
570 const struct iwx_device_cfg iwx_2ax_cfg_so_gf4_a0_long = {
571 .fw_name = IWX_SO_A_GF4_A_FW,
572 .pnvm_name = IWX_SO_A_GF4_A_PNVM,
573 .uhb_supported = 1,
574 };
575
576 const struct iwx_device_cfg iwx_2ax_cfg_ty_gf_a0 = {
577 .fw_name = IWX_TY_A_GF_A_FW,
578 .pnvm_name = IWX_TY_A_GF_A_PNVM,
579 };
580
581 const struct iwx_device_cfg iwx_2ax_cfg_so_jf_b0 = {
582 .fw_name = IWX_SO_A_JF_B_FW,
583 };
584
585 #define IWX_CFG_ANY (~0)
586
587 #define IWX_CFG_MAC_TYPE_QU 0x33
588 #define IWX_CFG_MAC_TYPE_QUZ 0x35
589 #define IWX_CFG_MAC_TYPE_QNJ 0x36
590 #define IWX_CFG_MAC_TYPE_SO 0x37
591 #define IWX_CFG_MAC_TYPE_SNJ 0x42
592 #define IWX_CFG_MAC_TYPE_SOF 0x43
593 #define IWX_CFG_MAC_TYPE_MA 0x44
594 #define IWX_CFG_MAC_TYPE_BZ 0x46
595 #define IWX_CFG_MAC_TYPE_GL 0x47
596
597 #define IWX_CFG_RF_TYPE_JF2 0x105
598 #define IWX_CFG_RF_TYPE_JF1 0x108
599 #define IWX_CFG_RF_TYPE_HR2 0x10a
600 #define IWX_CFG_RF_TYPE_HR1 0x10c
601 #define IWX_CFG_RF_TYPE_GF 0x10d
602 #define IWX_CFG_RF_TYPE_MR 0x110
603 #define IWX_CFG_RF_TYPE_MS 0x111
604 #define IWX_CFG_RF_TYPE_FM 0x112
605
606 #define IWX_CFG_RF_ID_JF 0x3
607 #define IWX_CFG_RF_ID_JF1 0x6
608 #define IWX_CFG_RF_ID_JF1_DIV 0xa
609
610 #define IWX_CFG_NO_160 0x1
611 #define IWX_CFG_160 0x0
612
613 #define IWX_CFG_CORES_BT 0x0
614
615 #define IWX_CFG_NO_CDB 0x0
616 #define IWX_CFG_CDB 0x1
617
618 #define IWX_SUBDEVICE_RF_ID(subdevice) ((uint16_t)((subdevice) & 0x00f0) >> 4)
619 #define IWX_SUBDEVICE_NO_160(subdevice) ((uint16_t)((subdevice) & 0x0200) >> 9)
620 #define IWX_SUBDEVICE_CORES(subdevice) ((uint16_t)((subdevice) & 0x1c00) >> 10)
621
622 struct iwx_rx_ba {
623 int ba_timeout_val;
624 u_int16_t ba_params;
625 u_int16_t ba_winstart;
626 u_int16_t ba_winend;
627 u_int16_t ba_winsize;
628 #define IWX_BA_DONE 1
629 int ba_flags;
630 };
631
632 struct iwx_softc {
633 device_t sc_dev;
634 struct ieee80211com sc_ic;
635 int (*sc_newstate)(struct ieee80211com *, enum ieee80211_state, int);
636 int sc_newstate_pending;
637 int attached;
638
639 struct task init_task; /* NB: not reference-counted */
640 struct task newstate_task;
641 enum ieee80211_state ns_nstate;
642 int ns_arg;
643
644 /* Task for firmware BlockAck setup/teardown and its arguments. */
645 struct task ba_rx_task;
646 struct task ba_tx_task;
647 struct iwx_ba_task_data ba_rx;
648 struct iwx_ba_task_data ba_tx;
649
650 /* Task for setting encryption keys and its arguments. */
651 struct task setkey_task;
652 /*
653 * At present we need to process at most two keys at once:
654 * Our pairwise key and a group key.
655 * When hostap mode is implemented this array needs to grow or
656 * it might become a bottleneck for associations that occur at
657 * roughly the same time.
658 */
659 struct iwx_setkey_task_arg setkey_arg[2];
660 int setkey_cur;
661 int setkey_tail;
662 int setkey_nkeys;
663
664 /* Task for ERP/HT prot/slot-time/EDCA updates. */
665 struct task mac_ctxt_task;
666
667 /* Task for HT 20/40 MHz channel width updates. */
668 struct task phy_ctxt_task;
669
670 bus_space_tag_t sc_st;
671 bus_space_handle_t sc_sh;
672 bus_size_t sc_sz;
673 bus_dma_tag_t sc_dmat;
674
675 u_int16_t sc_pid;
676 void *sc_pct;
677 u_int32_t sc_pcitag;
678
679 void *sc_ih;
680 int sc_msix;
681
682 /* TX/RX rings. */
683 struct iwx_tx_ring txq[IWX_NUM_TX_QUEUES];
684 struct iwx_rx_ring rxq;
685 int qfullmsk;
686 int qenablemsk;
687 int first_data_qid;
688 int aggqid[WME_NUM_TID];
689 int max_tfd_queue_size;
690
691 int sc_sf_state;
692
693 /* ICT table. */
694 struct iwx_dma_info ict_dma;
695 int ict_cur;
696
697 int sc_hw_rev;
698 #define IWX_SILICON_A_STEP 0
699 #define IWX_SILICON_B_STEP 1
700 #define IWX_SILICON_C_STEP 2
701 #define IWX_SILICON_Z_STEP 0xf
702 int sc_hw_id;
703 int sc_hw_rf_id;
704 int sc_device_family;
705 #define IWX_DEVICE_FAMILY_22000 1
706 #define IWX_DEVICE_FAMILY_AX210 2
707 uint32_t sc_sku_id[3];
708 uint32_t mac_addr_from_csr;
709
710 struct iwx_dma_info ctxt_info_dma;
711 struct iwx_self_init_dram init_dram;
712 struct iwx_dma_info prph_scratch_dma;
713 struct iwx_dma_info prph_info_dma;
714 struct iwx_dma_info iml_dma;
715 struct iwx_dma_info pnvm_dma;
716 uint32_t sc_pnvm_ver;
717
718 int sc_fw_chunk_done;
719 int sc_init_complete;
720 #define IWX_INIT_COMPLETE 0x01
721 #define IWX_CALIB_COMPLETE 0x02
722 #define IWX_PNVM_COMPLETE 0x04
723
724 struct iwx_ucode_status sc_uc;
725 char sc_fwver[32];
726
727 int sc_capaflags;
728 int sc_capa_max_probe_len;
729 int sc_capa_n_scan_channels;
730 uint8_t sc_ucode_api[howmany(IWX_NUM_UCODE_TLV_API, NBBY)];
731 uint8_t sc_enabled_capa[howmany(IWX_NUM_UCODE_TLV_CAPA, NBBY)];
732 #define IWX_MAX_FW_CMD_VERSIONS 704
733 struct iwx_fw_cmd_version cmd_versions[IWX_MAX_FW_CMD_VERSIONS];
734 int n_cmd_versions;
735 int sc_rate_n_flags_version;
736
737 int sc_intmask;
738 int sc_flags;
739
740 uint32_t sc_fh_init_mask;
741 uint32_t sc_hw_init_mask;
742 uint32_t sc_fh_mask;
743 uint32_t sc_hw_mask;
744
745 int sc_generation;
746
747 struct rwlock ioctl_rwl;
748
749 int sc_cap_off; /* PCIe caps */
750
751 const char *sc_fwname;
752 struct iwx_fw_info sc_fw;
753 struct iwx_dma_info fw_mon;
754 int sc_fw_phy_config;
755 struct iwx_tlv_calib_ctrl sc_default_calib[IWX_UCODE_TYPE_MAX];
756
757 struct iwx_nvm_data sc_nvm;
758 struct iwx_bf_data sc_bf;
759 const char *sc_pnvm_name;
760
761 int sc_tx_timer[IWX_NUM_TX_QUEUES];
762 int sc_rx_ba_sessions;
763
764 struct task bgscan_done_task;
765 struct ieee80211_node_switch_bss_arg *bgscan_unref_arg;
766 size_t bgscan_unref_arg_size;
767
768 int sc_scan_last_antenna;
769
770 int sc_staid;
771 int sc_nodecolor;
772
773 uint8_t *sc_cmd_resp_pkt[IWX_TX_RING_COUNT];
774 size_t sc_cmd_resp_len[IWX_TX_RING_COUNT];
775 int sc_nic_locks;
776
777 struct taskq *sc_nswq;
778
779 struct iwx_rx_phy_info sc_last_phy_info;
780 int sc_ampdu_ref;
781 struct iwx_rxba_data sc_rxba_data[IWX_MAX_BAID];
782
783 uint32_t sc_time_event_uid;
784
785 /* phy contexts. we only use the first one */
786 struct iwx_phy_ctxt sc_phyctxt[IWX_NUM_PHY_CTX];
787
788 struct iwx_notif_statistics sc_stats;
789 int sc_noise;
790
791 int sc_pm_support;
792 int sc_ltr_enabled;
793
794 int sc_integrated;
795 int sc_tx_with_siso_diversity;
796 int sc_max_tfd_queue_size;
797 int sc_ltr_delay;
798 int sc_xtal_latency;
799 int sc_low_latency_xtal;
800 int sc_uhb_supported;
801 int sc_umac_prph_offset;
802 int sc_imr_enabled;
803
804 caddr_t sc_drvbpf;
805
806 union {
807 struct iwx_rx_radiotap_header th;
808 uint8_t pad[IEEE80211_RADIOTAP_HDRLEN];
809 } sc_rxtapu;
810 #define sc_rxtap sc_rxtapu.th
811 int sc_rxtap_len;
812
813 union {
814 struct iwx_tx_radiotap_header th;
815 uint8_t pad[IEEE80211_RADIOTAP_HDRLEN];
816 } sc_txtapu;
817 #define sc_txtap sc_txtapu.th
818 int sc_txtap_len;
819
820 /* XXX: FreeBSD specific */
821 struct mtx sc_mtx;
822 struct resource *sc_mem;
823 struct resource *sc_irq;
824 struct intr_config_hook sc_preinit_hook;
825 struct task sc_es_task;
826 struct mbufq sc_snd;
827 struct iwx_rx_ba ni_rx_ba[WME_NUM_TID];
828 struct taskqueue *sc_tq;
829 int (*sc_ampdu_rx_start)(struct ieee80211_node *,
830 struct ieee80211_rx_ampdu *, int, int, int);
831 void (*sc_ampdu_rx_stop)(struct ieee80211_node *,
832 struct ieee80211_rx_ampdu *);
833 int (*sc_addba_request)(struct ieee80211_node *,
834 struct ieee80211_tx_ampdu *, int, int, int);
835 int (*sc_addba_response)(struct ieee80211_node *,
836 struct ieee80211_tx_ampdu *, int, int, int);
837 struct callout watchdog_to;
838 const struct firmware *sc_fwp;
839 const struct firmware *sc_pnvm;
840
841 struct iwx_scan_req_umac_v14 sc_umac_v14_cmd;
842
843 /* This is needed to support older firmware versions */
844 int sc_rsp_vers;
845 union {
846 struct iwx_nvm_get_info_rsp rsp_v4;
847 struct iwx_nvm_get_info_rsp_v3 rsp_v3;
848
849 } sc_rsp_info;
850 uint32_t sc_debug;
851
852 /* XXX-TODO addba_stop? */
853 };
854
855 #define IWX_LOCK_INIT(_sc) \
856 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
857 MTX_NETWORK_LOCK, MTX_DEF);
858 #define IWX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
859 #define IWX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
860 #define IWX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
861 #define IWX_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
862
863 struct iwx_vap {
864 struct ieee80211vap iv_vap;
865 int is_uploaded;
866 int iv_auth;
867
868 int (*iv_newstate)(struct ieee80211vap *,
869 enum ieee80211_state, int);
870
871 struct iwx_phy_ctxt *phy_ctxt;
872
873 uint16_t id;
874 uint16_t color;
875
876 boolean_t have_wme;
877 /*
878 * QoS data from net80211, need to store this here
879 * as net80211 has a separate callback but we need
880 * to have the data for the MAC context
881 */
882 struct {
883 uint16_t cw_min;
884 uint16_t cw_max;
885 uint16_t edca_txop;
886 uint8_t aifsn;
887 } queue_params[WME_NUM_AC];
888
889 /* indicates that this interface requires PS to be disabled */
890 boolean_t ps_disabled;
891 };
892 #define IWX_VAP(_vap) ((struct iwx_vap *)(_vap))
893
894 struct iwx_node {
895 struct ieee80211_node in_ni;
896 struct iwx_phy_ctxt *in_phyctxt;
897 uint8_t in_macaddr[ETHER_ADDR_LEN];
898
899 uint16_t in_id;
900 uint16_t in_color;
901
902 struct iwx_rxq_dup_data dup_data;
903
904 int in_flags;
905 #define IWX_NODE_FLAG_HAVE_PAIRWISE_KEY 0x01
906 #define IWX_NODE_FLAG_HAVE_GROUP_KEY 0x02
907 };
908
909 #define IWX_NODE(_ni) ((struct iwx_node *)(_ni))
910
911 #define IWX_STATION_ID 0
912 #define IWX_AUX_STA_ID 1
913
914 #define IWX_DEFAULT_MACID 0
915 #define IWX_DEFAULT_COLOR 0
916 #define IWX_DEFAULT_TSFID 0
917
918 #define IWX_STATION_ID 0
919 #define IWX_AUX_STA_ID 1
920 #define IWX_MONITOR_STA_ID 2
921
922 #define IWX_ICT_SIZE 4096
923 #define IWX_ICT_COUNT (IWX_ICT_SIZE / sizeof (uint32_t))
924 #define IWX_ICT_PADDR_SHIFT 12
925