1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2003 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef _DEV_UART_H_
30 #define _DEV_UART_H_
31
32 #include <sys/linker_set.h>
33
34 /*
35 * Bus access structure. This structure holds the minimum information needed
36 * to access the UART. The rclk field, although not important to actually
37 * access the UART, is important for baudrate programming, delay loops and
38 * other timing related computations.
39 */
40 struct uart_bas {
41 bus_space_tag_t bst;
42 bus_space_handle_t bsh;
43 void *driver1;
44 u_int chan;
45 u_int rclk;
46 u_int regshft;
47 u_int regiowidth;
48 u_int busy_detect;
49 u_int rclk_guess;/* if rclk == 0, use baud + divisor to compute rclk */
50 };
51
52 #define uart_regofs(bas, reg) ((reg) << (bas)->regshft)
53 #define uart_regiowidth(bas) ((bas)->regiowidth)
54
55 static inline uint32_t
uart_getreg(struct uart_bas * bas,int reg)56 uart_getreg(struct uart_bas *bas, int reg)
57 {
58 uint32_t ret;
59
60 switch (uart_regiowidth(bas)) {
61 #if !defined(__i386__)
62 case 8:
63 ret = bus_space_read_8(bas->bst, bas->bsh, uart_regofs(bas, reg));
64 break;
65 #endif
66 case 4:
67 ret = bus_space_read_4(bas->bst, bas->bsh, uart_regofs(bas, reg));
68 break;
69 case 2:
70 ret = bus_space_read_2(bas->bst, bas->bsh, uart_regofs(bas, reg));
71 break;
72 default:
73 ret = bus_space_read_1(bas->bst, bas->bsh, uart_regofs(bas, reg));
74 break;
75 }
76
77 return (ret);
78 }
79
80 static inline void
uart_setreg(struct uart_bas * bas,int reg,uint32_t value)81 uart_setreg(struct uart_bas *bas, int reg, uint32_t value)
82 {
83
84 switch (uart_regiowidth(bas)) {
85 #if !defined(__i386__)
86 case 8:
87 bus_space_write_8(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
88 break;
89 #endif
90 case 4:
91 bus_space_write_4(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
92 break;
93 case 2:
94 bus_space_write_2(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
95 break;
96 default:
97 bus_space_write_1(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
98 break;
99 }
100 }
101
102 /*
103 * XXX we don't know the length of the bus space address range in use by
104 * the UART. Since barriers don't use the length field currently, we put
105 * a zero there for now.
106 */
107 #define uart_barrier(bas) \
108 bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0, \
109 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
110
111 /*
112 * UART device classes.
113 */
114 struct uart_class;
115
116 SET_DECLARE(uart_class_set, struct uart_class);
117
118 extern struct uart_class uart_ns8250_class __attribute__((weak));
119 extern struct uart_class uart_quicc_class __attribute__((weak));
120 extern struct uart_class uart_z8530_class __attribute__((weak));
121
122 /*
123 * Device flags.
124 */
125 #define UART_FLAGS_CONSOLE(f) ((f) & 0x10)
126 #define UART_FLAGS_DBGPORT(f) ((f) & 0x80)
127 #define UART_FLAGS_FCR_RX_LOW(f) ((f) & 0x100)
128 #define UART_FLAGS_FCR_RX_MEDL(f) ((f) & 0x200)
129 #define UART_FLAGS_FCR_RX_MEDH(f) ((f) & 0x400)
130 #define UART_FLAGS_FCR_RX_HIGH(f) ((f) & 0x800)
131
132 /*
133 * Data parity values (magical numbers related to ns8250).
134 */
135 #define UART_PARITY_NONE 0
136 #define UART_PARITY_ODD 1
137 #define UART_PARITY_EVEN 3
138 #define UART_PARITY_MARK 5
139 #define UART_PARITY_SPACE 7
140
141 #endif /* _DEV_UART_H_ */
142