1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1990 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 #include "opt_capsicum.h"
35 #include "opt_ktrace.h"
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/capsicum.h>
40 #include <sys/kernel.h>
41 #include <sys/ktrace.h>
42 #include <sys/lock.h>
43 #include <sys/malloc.h>
44 #include <sys/mutex.h>
45 #include <sys/pcpu.h>
46 #include <sys/priv.h>
47 #include <sys/proc.h>
48 #include <sys/smp.h>
49 #include <sys/sysent.h>
50 #include <sys/sysproto.h>
51 #include <sys/uio.h>
52
53 #include <vm/vm.h>
54 #include <vm/pmap.h>
55 #include <vm/vm_kern.h> /* for kernel_map */
56 #include <vm/vm_map.h>
57 #include <vm/vm_extern.h>
58
59 #include <machine/frame.h>
60 #include <machine/md_var.h>
61 #include <machine/pcb.h>
62 #include <machine/specialreg.h>
63 #include <machine/sysarch.h>
64 #include <machine/tss.h>
65 #include <machine/vmparam.h>
66
67 #include <security/audit/audit.h>
68
69 static void user_ldt_deref(struct proc_ldt *pldt);
70 static void user_ldt_derefl(struct proc_ldt *pldt);
71
72 #define MAX_LD 8192
73
74 int max_ldt_segment = 512;
75 SYSCTL_INT(_machdep, OID_AUTO, max_ldt_segment, CTLFLAG_RDTUN,
76 &max_ldt_segment, 0,
77 "Maximum number of allowed LDT segments in the single address space");
78
79 static void
max_ldt_segment_init(void * arg __unused)80 max_ldt_segment_init(void *arg __unused)
81 {
82
83 if (max_ldt_segment <= 0)
84 max_ldt_segment = 1;
85 if (max_ldt_segment > MAX_LD)
86 max_ldt_segment = MAX_LD;
87 }
88 SYSINIT(maxldt, SI_SUB_VM_CONF, SI_ORDER_ANY, max_ldt_segment_init, NULL);
89
90 #ifndef _SYS_SYSPROTO_H_
91 struct sysarch_args {
92 int op;
93 char *parms;
94 };
95 #endif
96
97 int
sysarch_ldt(struct thread * td,struct sysarch_args * uap,int uap_space)98 sysarch_ldt(struct thread *td, struct sysarch_args *uap, int uap_space)
99 {
100 struct i386_ldt_args *largs, la;
101 struct user_segment_descriptor *lp;
102 int error = 0;
103
104 /*
105 * XXXKIB check that the BSM generation code knows to encode
106 * the op argument.
107 */
108 AUDIT_ARG_CMD(uap->op);
109 if (uap_space == UIO_USERSPACE) {
110 error = copyin(uap->parms, &la, sizeof(struct i386_ldt_args));
111 if (error != 0)
112 return (error);
113 largs = &la;
114 } else
115 largs = (struct i386_ldt_args *)uap->parms;
116
117 switch (uap->op) {
118 case I386_GET_LDT:
119 error = amd64_get_ldt(td, largs);
120 break;
121 case I386_SET_LDT:
122 if (largs->descs != NULL && largs->num > max_ldt_segment)
123 return (EINVAL);
124 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
125 if (largs->descs != NULL) {
126 lp = malloc(largs->num * sizeof(struct
127 user_segment_descriptor), M_TEMP, M_WAITOK);
128 error = copyin(largs->descs, lp, largs->num *
129 sizeof(struct user_segment_descriptor));
130 if (error == 0)
131 error = amd64_set_ldt(td, largs, lp);
132 free(lp, M_TEMP);
133 } else {
134 error = amd64_set_ldt(td, largs, NULL);
135 }
136 break;
137 }
138 return (error);
139 }
140
141 void
update_gdt_gsbase(struct thread * td,uint32_t base)142 update_gdt_gsbase(struct thread *td, uint32_t base)
143 {
144 struct user_segment_descriptor *sd;
145
146 if (td != curthread)
147 return;
148 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
149 critical_enter();
150 sd = PCPU_GET(gs32p);
151 sd->sd_lobase = base & 0xffffff;
152 sd->sd_hibase = (base >> 24) & 0xff;
153 critical_exit();
154 }
155
156 void
update_gdt_fsbase(struct thread * td,uint32_t base)157 update_gdt_fsbase(struct thread *td, uint32_t base)
158 {
159 struct user_segment_descriptor *sd;
160
161 if (td != curthread)
162 return;
163 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
164 critical_enter();
165 sd = PCPU_GET(fs32p);
166 sd->sd_lobase = base & 0xffffff;
167 sd->sd_hibase = (base >> 24) & 0xff;
168 critical_exit();
169 }
170
171 int
sysarch(struct thread * td,struct sysarch_args * uap)172 sysarch(struct thread *td, struct sysarch_args *uap)
173 {
174 struct pcb *pcb;
175 struct vm_map *map;
176 uint32_t i386base;
177 uint64_t a64base;
178 struct i386_ioperm_args iargs;
179 struct i386_get_xfpustate i386xfpu;
180 struct i386_set_pkru i386pkru;
181 struct amd64_get_xfpustate a64xfpu;
182 struct amd64_set_pkru a64pkru;
183 int error;
184
185 #ifdef CAPABILITY_MODE
186 /*
187 * When adding new operations, add a new case statement here to
188 * explicitly indicate whether or not the operation is safe to
189 * perform in capability mode.
190 */
191 switch (uap->op) {
192 case I386_GET_LDT:
193 case I386_SET_LDT:
194 case I386_GET_IOPERM:
195 case I386_GET_FSBASE:
196 case I386_SET_FSBASE:
197 case I386_GET_GSBASE:
198 case I386_SET_GSBASE:
199 case I386_GET_XFPUSTATE:
200 case I386_SET_PKRU:
201 case I386_CLEAR_PKRU:
202 case AMD64_GET_FSBASE:
203 case AMD64_SET_FSBASE:
204 case AMD64_GET_GSBASE:
205 case AMD64_SET_GSBASE:
206 case AMD64_GET_XFPUSTATE:
207 case AMD64_SET_PKRU:
208 case AMD64_CLEAR_PKRU:
209 break;
210
211 case I386_SET_IOPERM:
212 default:
213 if (CAP_TRACING(td))
214 ktrcapfail(CAPFAIL_SYSCALL, &uap->op);
215 if (IN_CAPABILITY_MODE(td))
216 return (ECAPMODE);
217 break;
218 }
219 #endif
220
221 if (uap->op == I386_GET_LDT || uap->op == I386_SET_LDT)
222 return (sysarch_ldt(td, uap, UIO_USERSPACE));
223
224 error = 0;
225 pcb = td->td_pcb;
226
227 /*
228 * XXXKIB check that the BSM generation code knows to encode
229 * the op argument.
230 */
231 AUDIT_ARG_CMD(uap->op);
232 switch (uap->op) {
233 case I386_GET_IOPERM:
234 case I386_SET_IOPERM:
235 if ((error = copyin(uap->parms, &iargs,
236 sizeof(struct i386_ioperm_args))) != 0)
237 return (error);
238 break;
239 case I386_GET_XFPUSTATE:
240 if ((error = copyin(uap->parms, &i386xfpu,
241 sizeof(struct i386_get_xfpustate))) != 0)
242 return (error);
243 a64xfpu.addr = (void *)(uintptr_t)i386xfpu.addr;
244 a64xfpu.len = i386xfpu.len;
245 break;
246 case I386_SET_PKRU:
247 case I386_CLEAR_PKRU:
248 if ((error = copyin(uap->parms, &i386pkru,
249 sizeof(struct i386_set_pkru))) != 0)
250 return (error);
251 a64pkru.addr = (void *)(uintptr_t)i386pkru.addr;
252 a64pkru.len = i386pkru.len;
253 a64pkru.keyidx = i386pkru.keyidx;
254 a64pkru.flags = i386pkru.flags;
255 break;
256 case AMD64_GET_XFPUSTATE:
257 if ((error = copyin(uap->parms, &a64xfpu,
258 sizeof(struct amd64_get_xfpustate))) != 0)
259 return (error);
260 break;
261 case AMD64_SET_PKRU:
262 case AMD64_CLEAR_PKRU:
263 if ((error = copyin(uap->parms, &a64pkru,
264 sizeof(struct amd64_set_pkru))) != 0)
265 return (error);
266 break;
267 default:
268 break;
269 }
270
271 switch (uap->op) {
272 case I386_GET_IOPERM:
273 error = amd64_get_ioperm(td, &iargs);
274 if (error == 0)
275 error = copyout(&iargs, uap->parms,
276 sizeof(struct i386_ioperm_args));
277 break;
278 case I386_SET_IOPERM:
279 error = amd64_set_ioperm(td, &iargs);
280 break;
281 case I386_GET_FSBASE:
282 update_pcb_bases(pcb);
283 i386base = pcb->pcb_fsbase;
284 error = copyout(&i386base, uap->parms, sizeof(i386base));
285 break;
286 case I386_SET_FSBASE:
287 error = copyin(uap->parms, &i386base, sizeof(i386base));
288 if (error == 0) {
289 set_pcb_flags(pcb, PCB_FULL_IRET);
290 pcb->pcb_fsbase = i386base;
291 td->td_frame->tf_fs = _ufssel;
292 update_gdt_fsbase(td, i386base);
293 }
294 break;
295 case I386_GET_GSBASE:
296 update_pcb_bases(pcb);
297 i386base = pcb->pcb_gsbase;
298 error = copyout(&i386base, uap->parms, sizeof(i386base));
299 break;
300 case I386_SET_GSBASE:
301 error = copyin(uap->parms, &i386base, sizeof(i386base));
302 if (error == 0) {
303 set_pcb_flags(pcb, PCB_FULL_IRET);
304 pcb->pcb_gsbase = i386base;
305 td->td_frame->tf_gs = _ugssel;
306 update_gdt_gsbase(td, i386base);
307 }
308 break;
309 case AMD64_GET_FSBASE:
310 update_pcb_bases(pcb);
311 error = copyout(&pcb->pcb_fsbase, uap->parms,
312 sizeof(pcb->pcb_fsbase));
313 break;
314
315 case AMD64_SET_FSBASE:
316 error = copyin(uap->parms, &a64base, sizeof(a64base));
317 if (error == 0) {
318 if (a64base < curproc->p_sysent->sv_maxuser) {
319 set_pcb_flags(pcb, PCB_FULL_IRET);
320 pcb->pcb_fsbase = a64base;
321 td->td_frame->tf_fs = _ufssel;
322 } else
323 error = EINVAL;
324 }
325 break;
326
327 case AMD64_GET_GSBASE:
328 update_pcb_bases(pcb);
329 error = copyout(&pcb->pcb_gsbase, uap->parms,
330 sizeof(pcb->pcb_gsbase));
331 break;
332
333 case AMD64_SET_GSBASE:
334 error = copyin(uap->parms, &a64base, sizeof(a64base));
335 if (error == 0) {
336 if (a64base < curproc->p_sysent->sv_maxuser) {
337 set_pcb_flags(pcb, PCB_FULL_IRET);
338 pcb->pcb_gsbase = a64base;
339 td->td_frame->tf_gs = _ugssel;
340 } else
341 error = EINVAL;
342 }
343 break;
344
345 case I386_GET_XFPUSTATE:
346 case AMD64_GET_XFPUSTATE:
347 if (a64xfpu.len > cpu_max_ext_state_size -
348 sizeof(struct savefpu))
349 return (EINVAL);
350 fpugetregs(td);
351 error = copyout((char *)(get_pcb_user_save_td(td) + 1),
352 a64xfpu.addr, a64xfpu.len);
353 break;
354
355 case I386_SET_PKRU:
356 case AMD64_SET_PKRU:
357 /*
358 * Read-lock the map to synchronize with parallel
359 * pmap_vmspace_copy() on fork.
360 */
361 map = &td->td_proc->p_vmspace->vm_map;
362 vm_map_lock_read(map);
363 error = pmap_pkru_set(PCPU_GET(curpmap),
364 (vm_offset_t)a64pkru.addr, (vm_offset_t)a64pkru.addr +
365 a64pkru.len, a64pkru.keyidx, a64pkru.flags);
366 vm_map_unlock_read(map);
367 break;
368
369 case I386_CLEAR_PKRU:
370 case AMD64_CLEAR_PKRU:
371 if (a64pkru.flags != 0 || a64pkru.keyidx != 0) {
372 error = EINVAL;
373 break;
374 }
375 map = &td->td_proc->p_vmspace->vm_map;
376 vm_map_lock_read(map);
377 error = pmap_pkru_clear(PCPU_GET(curpmap),
378 (vm_offset_t)a64pkru.addr,
379 (vm_offset_t)a64pkru.addr + a64pkru.len);
380 vm_map_unlock_read(map);
381 break;
382
383 default:
384 error = EINVAL;
385 break;
386 }
387 return (error);
388 }
389
390 int
amd64_set_ioperm(struct thread * td,struct i386_ioperm_args * uap)391 amd64_set_ioperm(struct thread *td, struct i386_ioperm_args *uap)
392 {
393 char *iomap;
394 struct amd64tss *tssp;
395 struct system_segment_descriptor *tss_sd;
396 struct pcb *pcb;
397 u_int i;
398 int error;
399
400 if ((error = priv_check(td, PRIV_IO)) != 0)
401 return (error);
402 if ((error = securelevel_gt(td->td_ucred, 0)) != 0)
403 return (error);
404 if (uap->start > uap->start + uap->length ||
405 uap->start + uap->length > IOPAGES * PAGE_SIZE * NBBY)
406 return (EINVAL);
407
408 /*
409 * XXX
410 * While this is restricted to root, we should probably figure out
411 * whether any other driver is using this i/o address, as so not to
412 * cause confusion. This probably requires a global 'usage registry'.
413 */
414 pcb = td->td_pcb;
415 if (pcb->pcb_tssp == NULL) {
416 tssp = kmem_malloc(ctob(IOPAGES + 1), M_WAITOK);
417 pmap_pti_add_kva((vm_offset_t)tssp, (vm_offset_t)tssp +
418 ctob(IOPAGES + 1), false);
419 iomap = (char *)&tssp[1];
420 memset(iomap, 0xff, IOPERM_BITMAP_SIZE);
421 critical_enter();
422 /* Takes care of tss_rsp0. */
423 memcpy(tssp, PCPU_PTR(common_tss), sizeof(struct amd64tss));
424 tssp->tss_iobase = sizeof(*tssp);
425 pcb->pcb_tssp = tssp;
426 tss_sd = PCPU_GET(tss);
427 tss_sd->sd_lobase = (u_long)tssp & 0xffffff;
428 tss_sd->sd_hibase = ((u_long)tssp >> 24) & 0xfffffffffful;
429 tss_sd->sd_type = SDT_SYSTSS;
430 ltr(GSEL(GPROC0_SEL, SEL_KPL));
431 PCPU_SET(tssp, tssp);
432 critical_exit();
433 } else
434 iomap = (char *)&pcb->pcb_tssp[1];
435 for (i = uap->start; i < uap->start + uap->length; i++) {
436 if (uap->enable)
437 iomap[i >> 3] &= ~(1 << (i & 7));
438 else
439 iomap[i >> 3] |= (1 << (i & 7));
440 }
441 return (error);
442 }
443
444 int
amd64_get_ioperm(struct thread * td,struct i386_ioperm_args * uap)445 amd64_get_ioperm(struct thread *td, struct i386_ioperm_args *uap)
446 {
447 int i, state;
448 char *iomap;
449
450 if (uap->start >= IOPAGES * PAGE_SIZE * NBBY)
451 return (EINVAL);
452 if (td->td_pcb->pcb_tssp == NULL) {
453 uap->length = 0;
454 goto done;
455 }
456
457 iomap = (char *)&td->td_pcb->pcb_tssp[1];
458
459 i = uap->start;
460 state = (iomap[i >> 3] >> (i & 7)) & 1;
461 uap->enable = !state;
462 uap->length = 1;
463
464 for (i = uap->start + 1; i < IOPAGES * PAGE_SIZE * NBBY; i++) {
465 if (state != ((iomap[i >> 3] >> (i & 7)) & 1))
466 break;
467 uap->length++;
468 }
469
470 done:
471 return (0);
472 }
473
474 /*
475 * Update the GDT entry pointing to the LDT to point to the LDT of the
476 * current process.
477 */
478 static void
set_user_ldt(struct mdproc * mdp)479 set_user_ldt(struct mdproc *mdp)
480 {
481
482 *PCPU_GET(ldt) = mdp->md_ldt_sd;
483 lldt(GSEL(GUSERLDT_SEL, SEL_KPL));
484 }
485
486 static void
set_user_ldt_rv(void * arg)487 set_user_ldt_rv(void *arg)
488 {
489 struct proc *orig, *target;
490 struct proc_ldt *ldt;
491
492 orig = arg;
493 target = curthread->td_proc;
494
495 ldt = (void *)atomic_load_acq_ptr((uintptr_t *)&orig->p_md.md_ldt);
496 if (target->p_md.md_ldt != ldt)
497 return;
498
499 set_user_ldt(&target->p_md);
500 }
501
502 struct proc_ldt *
user_ldt_alloc(struct proc * p,int force)503 user_ldt_alloc(struct proc *p, int force)
504 {
505 struct proc_ldt *pldt, *new_ldt;
506 struct mdproc *mdp;
507 struct soft_segment_descriptor sldt;
508 vm_offset_t sva;
509 vm_size_t sz;
510
511 mtx_assert(&dt_lock, MA_OWNED);
512 mdp = &p->p_md;
513 if (!force && mdp->md_ldt != NULL)
514 return (mdp->md_ldt);
515 mtx_unlock(&dt_lock);
516 new_ldt = malloc(sizeof(struct proc_ldt), M_SUBPROC, M_WAITOK);
517 sz = max_ldt_segment * sizeof(struct user_segment_descriptor);
518 new_ldt->ldt_base = kmem_malloc(sz, M_WAITOK | M_ZERO);
519 sva = (uintptr_t)new_ldt->ldt_base;
520 pmap_pti_add_kva(sva, sva + sz, false);
521 new_ldt->ldt_refcnt = 1;
522 sldt.ssd_base = sva;
523 sldt.ssd_limit = sz - 1;
524 sldt.ssd_type = SDT_SYSLDT;
525 sldt.ssd_dpl = SEL_KPL;
526 sldt.ssd_p = 1;
527 sldt.ssd_long = 0;
528 sldt.ssd_def32 = 0;
529 sldt.ssd_gran = 0;
530 mtx_lock(&dt_lock);
531 pldt = mdp->md_ldt;
532 if (pldt != NULL && !force) {
533 pmap_pti_remove_kva(sva, sva + sz);
534 kmem_free(new_ldt->ldt_base, sz);
535 free(new_ldt, M_SUBPROC);
536 return (pldt);
537 }
538
539 if (pldt != NULL) {
540 bcopy(pldt->ldt_base, new_ldt->ldt_base, max_ldt_segment *
541 sizeof(struct user_segment_descriptor));
542 user_ldt_derefl(pldt);
543 }
544 critical_enter();
545 ssdtosyssd(&sldt, &p->p_md.md_ldt_sd);
546 atomic_thread_fence_rel();
547 mdp->md_ldt = new_ldt;
548 critical_exit();
549 smp_rendezvous(NULL, set_user_ldt_rv, NULL, p);
550
551 return (mdp->md_ldt);
552 }
553
554 void
user_ldt_free(struct thread * td)555 user_ldt_free(struct thread *td)
556 {
557 struct proc *p = td->td_proc;
558 struct mdproc *mdp = &p->p_md;
559 struct proc_ldt *pldt;
560
561 mtx_lock(&dt_lock);
562 if ((pldt = mdp->md_ldt) == NULL) {
563 mtx_unlock(&dt_lock);
564 return;
565 }
566
567 critical_enter();
568 mdp->md_ldt = NULL;
569 atomic_thread_fence_rel();
570 bzero(&mdp->md_ldt_sd, sizeof(mdp->md_ldt_sd));
571 if (td == curthread)
572 lldt(GSEL(GNULL_SEL, SEL_KPL));
573 critical_exit();
574 user_ldt_deref(pldt);
575 }
576
577 static void
user_ldt_derefl(struct proc_ldt * pldt)578 user_ldt_derefl(struct proc_ldt *pldt)
579 {
580 vm_offset_t sva;
581 vm_size_t sz;
582
583 if (--pldt->ldt_refcnt == 0) {
584 sva = (vm_offset_t)pldt->ldt_base;
585 sz = max_ldt_segment * sizeof(struct user_segment_descriptor);
586 pmap_pti_remove_kva(sva, sva + sz);
587 kmem_free(pldt->ldt_base, sz);
588 free(pldt, M_SUBPROC);
589 }
590 }
591
592 static void
user_ldt_deref(struct proc_ldt * pldt)593 user_ldt_deref(struct proc_ldt *pldt)
594 {
595
596 mtx_assert(&dt_lock, MA_OWNED);
597 user_ldt_derefl(pldt);
598 mtx_unlock(&dt_lock);
599 }
600
601 /*
602 * Note for the authors of compat layers (linux, etc): copyout() in
603 * the function below is not a problem since it presents data in
604 * arch-specific format (i.e. i386-specific in this case), not in
605 * the OS-specific one.
606 */
607 int
amd64_get_ldt(struct thread * td,struct i386_ldt_args * uap)608 amd64_get_ldt(struct thread *td, struct i386_ldt_args *uap)
609 {
610 struct proc_ldt *pldt;
611 struct user_segment_descriptor *lp;
612 uint64_t *data;
613 u_int i, num;
614 int error;
615
616 #ifdef DEBUG
617 printf("amd64_get_ldt: start=%u num=%u descs=%p\n",
618 uap->start, uap->num, (void *)uap->descs);
619 #endif
620
621 pldt = td->td_proc->p_md.md_ldt;
622 if (pldt == NULL || uap->start >= max_ldt_segment || uap->num == 0) {
623 td->td_retval[0] = 0;
624 return (0);
625 }
626 num = min(uap->num, max_ldt_segment - uap->start);
627 lp = &((struct user_segment_descriptor *)(pldt->ldt_base))[uap->start];
628 data = malloc(num * sizeof(struct user_segment_descriptor), M_TEMP,
629 M_WAITOK);
630 mtx_lock(&dt_lock);
631 for (i = 0; i < num; i++)
632 data[i] = ((volatile uint64_t *)lp)[i];
633 mtx_unlock(&dt_lock);
634 error = copyout(data, uap->descs, num *
635 sizeof(struct user_segment_descriptor));
636 free(data, M_TEMP);
637 if (error == 0)
638 td->td_retval[0] = num;
639 return (error);
640 }
641
642 int
amd64_set_ldt(struct thread * td,struct i386_ldt_args * uap,struct user_segment_descriptor * descs)643 amd64_set_ldt(struct thread *td, struct i386_ldt_args *uap,
644 struct user_segment_descriptor *descs)
645 {
646 struct mdproc *mdp;
647 struct proc_ldt *pldt;
648 struct user_segment_descriptor *dp;
649 struct proc *p;
650 u_int largest_ld, i;
651 int error;
652
653 #ifdef DEBUG
654 printf("amd64_set_ldt: start=%u num=%u descs=%p\n",
655 uap->start, uap->num, (void *)uap->descs);
656 #endif
657 mdp = &td->td_proc->p_md;
658 error = 0;
659
660 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
661 p = td->td_proc;
662 if (descs == NULL) {
663 /* Free descriptors */
664 if (uap->start == 0 && uap->num == 0)
665 uap->num = max_ldt_segment;
666 if (uap->num == 0)
667 return (EINVAL);
668 if ((pldt = mdp->md_ldt) == NULL ||
669 uap->start >= max_ldt_segment)
670 return (0);
671 largest_ld = uap->start + uap->num;
672 if (largest_ld > max_ldt_segment)
673 largest_ld = max_ldt_segment;
674 if (largest_ld < uap->start)
675 return (EINVAL);
676 mtx_lock(&dt_lock);
677 for (i = uap->start; i < largest_ld; i++)
678 ((volatile uint64_t *)(pldt->ldt_base))[i] = 0;
679 mtx_unlock(&dt_lock);
680 return (0);
681 }
682
683 if (!(uap->start == LDT_AUTO_ALLOC && uap->num == 1)) {
684 /* verify range of descriptors to modify */
685 largest_ld = uap->start + uap->num;
686 if (uap->start >= max_ldt_segment ||
687 largest_ld > max_ldt_segment ||
688 largest_ld < uap->start)
689 return (EINVAL);
690 }
691
692 /* Check descriptors for access violations */
693 for (i = 0; i < uap->num; i++) {
694 dp = &descs[i];
695
696 switch (dp->sd_type) {
697 case SDT_SYSNULL: /* system null */
698 dp->sd_p = 0;
699 break;
700 case SDT_SYS286TSS:
701 case SDT_SYSLDT:
702 case SDT_SYS286BSY:
703 case SDT_SYS286CGT:
704 case SDT_SYSTASKGT:
705 case SDT_SYS286IGT:
706 case SDT_SYS286TGT:
707 case SDT_SYSNULL2:
708 case SDT_SYSTSS:
709 case SDT_SYSNULL3:
710 case SDT_SYSBSY:
711 case SDT_SYSCGT:
712 case SDT_SYSNULL4:
713 case SDT_SYSIGT:
714 case SDT_SYSTGT:
715 return (EACCES);
716
717 /* memory segment types */
718 case SDT_MEMEC: /* memory execute only conforming */
719 case SDT_MEMEAC: /* memory execute only accessed conforming */
720 case SDT_MEMERC: /* memory execute read conforming */
721 case SDT_MEMERAC: /* memory execute read accessed conforming */
722 /* Must be "present" if executable and conforming. */
723 if (dp->sd_p == 0)
724 return (EACCES);
725 break;
726 case SDT_MEMRO: /* memory read only */
727 case SDT_MEMROA: /* memory read only accessed */
728 case SDT_MEMRW: /* memory read write */
729 case SDT_MEMRWA: /* memory read write accessed */
730 case SDT_MEMROD: /* memory read only expand dwn limit */
731 case SDT_MEMRODA: /* memory read only expand dwn lim accessed */
732 case SDT_MEMRWD: /* memory read write expand dwn limit */
733 case SDT_MEMRWDA: /* memory read write expand dwn lim acessed */
734 case SDT_MEME: /* memory execute only */
735 case SDT_MEMEA: /* memory execute only accessed */
736 case SDT_MEMER: /* memory execute read */
737 case SDT_MEMERA: /* memory execute read accessed */
738 break;
739 default:
740 return(EINVAL);
741 }
742
743 /* Only user (ring-3) descriptors may be present. */
744 if ((dp->sd_p != 0) && (dp->sd_dpl != SEL_UPL))
745 return (EACCES);
746 }
747
748 if (uap->start == LDT_AUTO_ALLOC && uap->num == 1) {
749 /* Allocate a free slot */
750 mtx_lock(&dt_lock);
751 pldt = user_ldt_alloc(p, 0);
752 if (pldt == NULL) {
753 mtx_unlock(&dt_lock);
754 return (ENOMEM);
755 }
756
757 /*
758 * start scanning a bit up to leave room for NVidia and
759 * Wine, which still user the "Blat" method of allocation.
760 */
761 i = 16;
762 dp = &((struct user_segment_descriptor *)(pldt->ldt_base))[i];
763 for (; i < max_ldt_segment; ++i, ++dp) {
764 if (dp->sd_type == SDT_SYSNULL)
765 break;
766 }
767 if (i >= max_ldt_segment) {
768 mtx_unlock(&dt_lock);
769 return (ENOSPC);
770 }
771 uap->start = i;
772 error = amd64_set_ldt_data(td, i, 1, descs);
773 mtx_unlock(&dt_lock);
774 } else {
775 largest_ld = uap->start + uap->num;
776 if (largest_ld > max_ldt_segment)
777 return (EINVAL);
778 mtx_lock(&dt_lock);
779 if (user_ldt_alloc(p, 0) != NULL) {
780 error = amd64_set_ldt_data(td, uap->start, uap->num,
781 descs);
782 }
783 mtx_unlock(&dt_lock);
784 }
785 if (error == 0)
786 td->td_retval[0] = uap->start;
787 return (error);
788 }
789
790 int
amd64_set_ldt_data(struct thread * td,int start,int num,struct user_segment_descriptor * descs)791 amd64_set_ldt_data(struct thread *td, int start, int num,
792 struct user_segment_descriptor *descs)
793 {
794 struct mdproc *mdp;
795 struct proc_ldt *pldt;
796 volatile uint64_t *dst, *src;
797 int i;
798
799 mtx_assert(&dt_lock, MA_OWNED);
800
801 mdp = &td->td_proc->p_md;
802 pldt = mdp->md_ldt;
803 dst = (volatile uint64_t *)(pldt->ldt_base);
804 src = (volatile uint64_t *)descs;
805 for (i = 0; i < num; i++)
806 dst[start + i] = src[i];
807 return (0);
808 }
809