1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2019 Mellanox Technologies. */
3
4 #ifndef __MLX5_EN_PARAMS_H__
5 #define __MLX5_EN_PARAMS_H__
6
7 #include "en.h"
8
9 struct mlx5e_xsk_param {
10 u16 headroom;
11 u16 chunk_size;
12 bool unaligned;
13 };
14
15 struct mlx5e_cq_param {
16 u32 cqc[MLX5_ST_SZ_DW(cqc)];
17 struct mlx5_wq_param wq;
18 u16 eq_ix;
19 u8 cq_period_mode;
20 };
21
22 struct mlx5e_rq_param {
23 struct mlx5e_cq_param cqp;
24 u32 rqc[MLX5_ST_SZ_DW(rqc)];
25 struct mlx5_wq_param wq;
26 struct mlx5e_rq_frags_info frags_info;
27 u32 xdp_frag_size;
28 };
29
30 struct mlx5e_sq_param {
31 struct mlx5e_cq_param cqp;
32 u32 sqc[MLX5_ST_SZ_DW(sqc)];
33 struct mlx5_wq_param wq;
34 bool is_mpw;
35 bool is_tls;
36 bool is_xdp_mb;
37 u16 stop_room;
38 };
39
40 struct mlx5e_channel_param {
41 struct mlx5e_rq_param rq;
42 struct mlx5e_sq_param txq_sq;
43 struct mlx5e_sq_param xdp_sq;
44 struct mlx5e_sq_param icosq;
45 struct mlx5e_sq_param async_icosq;
46 };
47
48 struct mlx5e_create_sq_param {
49 struct mlx5_wq_ctrl *wq_ctrl;
50 u32 cqn;
51 u32 ts_cqe_to_dest_cqn;
52 u32 tisn;
53 u8 tis_lst_sz;
54 u8 min_inline_mode;
55 };
56
57 /* Striding RQ dynamic parameters */
58
59 u8 mlx5e_mpwrq_page_shift(struct mlx5_core_dev *mdev, struct mlx5e_xsk_param *xsk);
60 enum mlx5e_mpwrq_umr_mode
61 mlx5e_mpwrq_umr_mode(struct mlx5_core_dev *mdev, struct mlx5e_xsk_param *xsk);
62 u8 mlx5e_mpwrq_umr_entry_size(enum mlx5e_mpwrq_umr_mode mode);
63 u8 mlx5e_mpwrq_log_wqe_sz(struct mlx5_core_dev *mdev, u8 page_shift,
64 enum mlx5e_mpwrq_umr_mode umr_mode);
65 u8 mlx5e_mpwrq_pages_per_wqe(struct mlx5_core_dev *mdev, u8 page_shift,
66 enum mlx5e_mpwrq_umr_mode umr_mode);
67 u16 mlx5e_mpwrq_umr_wqe_sz(struct mlx5_core_dev *mdev, u8 page_shift,
68 enum mlx5e_mpwrq_umr_mode umr_mode);
69 u8 mlx5e_mpwrq_umr_wqebbs(struct mlx5_core_dev *mdev, u8 page_shift,
70 enum mlx5e_mpwrq_umr_mode umr_mode);
71 u8 mlx5e_mpwrq_mtts_per_wqe(struct mlx5_core_dev *mdev, u8 page_shift,
72 enum mlx5e_mpwrq_umr_mode umr_mode);
73 u32 mlx5e_mpwrq_max_num_entries(struct mlx5_core_dev *mdev,
74 enum mlx5e_mpwrq_umr_mode umr_mode);
75 u8 mlx5e_mpwrq_max_log_rq_pkts(struct mlx5_core_dev *mdev, u8 page_shift,
76 enum mlx5e_mpwrq_umr_mode umr_mode);
77
78 /* Parameter calculations */
79
80 bool slow_pci_heuristic(struct mlx5_core_dev *mdev);
81 int mlx5e_mpwrq_validate_regular(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
82 int mlx5e_mpwrq_validate_xsk(struct mlx5_core_dev *mdev, struct mlx5e_params *params,
83 struct mlx5e_xsk_param *xsk);
84 void mlx5e_build_rq_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
85 void mlx5e_set_rq_type(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
86 void mlx5e_init_rq_type_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
87
88 u16 mlx5e_get_linear_rq_headroom(struct mlx5e_params *params,
89 struct mlx5e_xsk_param *xsk);
90 bool mlx5e_rx_is_linear_skb(struct mlx5_core_dev *mdev,
91 struct mlx5e_params *params,
92 struct mlx5e_xsk_param *xsk);
93 bool mlx5e_rx_mpwqe_is_linear_skb(struct mlx5_core_dev *mdev,
94 struct mlx5e_params *params,
95 struct mlx5e_xsk_param *xsk);
96 u8 mlx5e_mpwqe_get_log_rq_size(struct mlx5_core_dev *mdev,
97 struct mlx5e_params *params,
98 struct mlx5e_xsk_param *xsk);
99 u8 mlx5e_shampo_get_log_hd_entry_size(struct mlx5_core_dev *mdev,
100 struct mlx5e_params *params);
101 u8 mlx5e_shampo_get_log_rsrv_size(struct mlx5_core_dev *mdev,
102 struct mlx5e_params *params);
103 u8 mlx5e_shampo_get_log_pkt_per_rsrv(struct mlx5_core_dev *mdev,
104 struct mlx5e_params *params);
105 u32 mlx5e_shampo_hd_per_wqe(struct mlx5_core_dev *mdev,
106 struct mlx5e_params *params,
107 struct mlx5e_rq_param *rq_param);
108 u32 mlx5e_shampo_hd_per_wq(struct mlx5_core_dev *mdev,
109 struct mlx5e_params *params,
110 struct mlx5e_rq_param *rq_param);
111 u32 mlx5e_choose_lro_timeout(struct mlx5_core_dev *mdev, u32 wanted_timeout);
112 u8 mlx5e_mpwqe_get_log_stride_size(struct mlx5_core_dev *mdev,
113 struct mlx5e_params *params,
114 struct mlx5e_xsk_param *xsk);
115 u8 mlx5e_mpwqe_get_log_num_strides(struct mlx5_core_dev *mdev,
116 struct mlx5e_params *params,
117 struct mlx5e_xsk_param *xsk);
118 u8 mlx5e_mpwqe_get_min_wqe_bulk(unsigned int wq_sz);
119 u16 mlx5e_get_rq_headroom(struct mlx5_core_dev *mdev,
120 struct mlx5e_params *params,
121 struct mlx5e_xsk_param *xsk);
122
123 /* Build queue parameters */
124
125 void mlx5e_build_create_cq_param(struct mlx5e_create_cq_param *ccp, struct mlx5e_channel *c);
126 int mlx5e_build_rq_param(struct mlx5_core_dev *mdev,
127 struct mlx5e_params *params,
128 struct mlx5e_xsk_param *xsk,
129 struct mlx5e_rq_param *param);
130 void mlx5e_build_drop_rq_param(struct mlx5_core_dev *mdev,
131 struct mlx5e_rq_param *param);
132 void mlx5e_build_sq_param_common(struct mlx5_core_dev *mdev,
133 struct mlx5e_sq_param *param);
134 void mlx5e_build_sq_param(struct mlx5_core_dev *mdev,
135 struct mlx5e_params *params,
136 struct mlx5e_sq_param *param);
137 void mlx5e_build_tx_cq_param(struct mlx5_core_dev *mdev,
138 struct mlx5e_params *params,
139 struct mlx5e_cq_param *param);
140 void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,
141 struct mlx5e_params *params,
142 struct mlx5e_xsk_param *xsk,
143 struct mlx5e_sq_param *param);
144 int mlx5e_build_channel_param(struct mlx5_core_dev *mdev,
145 struct mlx5e_params *params,
146 struct mlx5e_channel_param *cparam);
147
148 u16 mlx5e_calc_sq_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
149 int mlx5e_validate_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
150 bool mlx5e_verify_params_rx_mpwqe_strides(struct mlx5_core_dev *mdev,
151 struct mlx5e_params *params,
152 struct mlx5e_xsk_param *xsk);
153
mlx5e_params_print_info(struct mlx5_core_dev * mdev,struct mlx5e_params * params)154 static inline void mlx5e_params_print_info(struct mlx5_core_dev *mdev,
155 struct mlx5e_params *params)
156 {
157 mlx5_core_info(mdev, "MLX5E: StrdRq(%d) RqSz(%ld) StrdSz(%ld) RxCqeCmprss(%d %s)\n",
158 params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ,
159 params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ ?
160 BIT(mlx5e_mpwqe_get_log_rq_size(mdev, params, NULL)) :
161 BIT(params->log_rq_mtu_frames),
162 BIT(mlx5e_mpwqe_get_log_stride_size(mdev, params, NULL)),
163 MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_CQE_COMPRESS),
164 MLX5_CAP_GEN(mdev, enhanced_cqe_compression) ?
165 "enhanced" : "basic");
166 };
167
168 #endif /* __MLX5_EN_PARAMS_H__ */
169