xref: /linux/drivers/net/ethernet/wangxun/txgbe/txgbe_main.c (revision 17bbde2e1716e2ee4b997d476b48ae85c5a47671)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
3 
4 #include <linux/types.h>
5 #include <linux/module.h>
6 #include <linux/pci.h>
7 #include <linux/netdevice.h>
8 #include <linux/string.h>
9 #include <linux/etherdevice.h>
10 #include <linux/phylink.h>
11 #include <net/udp_tunnel.h>
12 #include <net/ip.h>
13 #include <linux/if_vlan.h>
14 
15 #include "../libwx/wx_type.h"
16 #include "../libwx/wx_lib.h"
17 #include "../libwx/wx_ptp.h"
18 #include "../libwx/wx_hw.h"
19 #include "../libwx/wx_mbx.h"
20 #include "../libwx/wx_sriov.h"
21 #include "txgbe_type.h"
22 #include "txgbe_hw.h"
23 #include "txgbe_phy.h"
24 #include "txgbe_aml.h"
25 #include "txgbe_irq.h"
26 #include "txgbe_fdir.h"
27 #include "txgbe_ethtool.h"
28 
29 char txgbe_driver_name[] = "txgbe";
30 
31 /* txgbe_pci_tbl - PCI Device ID Table
32  *
33  * Wildcard entries (PCI_ANY_ID) should come last
34  * Last entry must be all 0s
35  *
36  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
37  *   Class, Class Mask, private data (not used) }
38  */
39 static const struct pci_device_id txgbe_pci_tbl[] = {
40 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_SP1000), 0},
41 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_WX1820), 0},
42 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5010), 0},
43 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5110), 0},
44 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5025), 0},
45 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5125), 0},
46 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5040), 0},
47 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5140), 0},
48 	/* required last entry */
49 	{ .device = 0 }
50 };
51 
52 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
53 
txgbe_check_minimum_link(struct wx * wx)54 static void txgbe_check_minimum_link(struct wx *wx)
55 {
56 	struct pci_dev *pdev;
57 
58 	pdev = wx->pdev;
59 	pcie_print_link_status(pdev);
60 }
61 
62 /**
63  * txgbe_enumerate_functions - Get the number of ports this device has
64  * @wx: wx structure
65  *
66  * This function enumerates the phsyical functions co-located on a single slot,
67  * in order to determine how many ports a device has. This is most useful in
68  * determining the required GT/s of PCIe bandwidth necessary for optimal
69  * performance.
70  **/
txgbe_enumerate_functions(struct wx * wx)71 static int txgbe_enumerate_functions(struct wx *wx)
72 {
73 	struct pci_dev *entry, *pdev = wx->pdev;
74 	int physfns = 0;
75 
76 	list_for_each_entry(entry, &pdev->bus->devices, bus_list) {
77 		/* When the devices on the bus don't all match our device ID,
78 		 * we can't reliably determine the correct number of
79 		 * functions. This can occur if a function has been direct
80 		 * attached to a virtual machine using VT-d.
81 		 */
82 		if (entry->vendor != pdev->vendor ||
83 		    entry->device != pdev->device)
84 			return -EINVAL;
85 
86 		physfns++;
87 	}
88 
89 	return physfns;
90 }
91 
txgbe_sfp_detection_subtask(struct wx * wx)92 static void txgbe_sfp_detection_subtask(struct wx *wx)
93 {
94 	int err;
95 
96 	if (!test_bit(WX_FLAG_NEED_SFP_RESET, wx->flags))
97 		return;
98 
99 	/* wait for SFP module ready */
100 	msleep(200);
101 
102 	err = txgbe_identify_sfp(wx);
103 	if (err)
104 		return;
105 
106 	clear_bit(WX_FLAG_NEED_SFP_RESET, wx->flags);
107 }
108 
txgbe_link_config_subtask(struct wx * wx)109 static void txgbe_link_config_subtask(struct wx *wx)
110 {
111 	int err;
112 
113 	if (!test_bit(WX_FLAG_NEED_LINK_CONFIG, wx->flags))
114 		return;
115 
116 	err = txgbe_set_phy_link(wx);
117 	if (err)
118 		return;
119 
120 	clear_bit(WX_FLAG_NEED_LINK_CONFIG, wx->flags);
121 }
122 
123 /**
124  * txgbe_service_task - manages and runs subtasks
125  * @work: pointer to work_struct containing our data
126  **/
txgbe_service_task(struct work_struct * work)127 static void txgbe_service_task(struct work_struct *work)
128 {
129 	struct wx *wx = container_of(work, struct wx, service_task);
130 
131 	txgbe_sfp_detection_subtask(wx);
132 	txgbe_link_config_subtask(wx);
133 
134 	wx_service_event_complete(wx);
135 }
136 
txgbe_init_service(struct wx * wx)137 static void txgbe_init_service(struct wx *wx)
138 {
139 	timer_setup(&wx->service_timer, wx_service_timer, 0);
140 	INIT_WORK(&wx->service_task, txgbe_service_task);
141 	clear_bit(WX_STATE_SERVICE_SCHED, wx->state);
142 }
143 
txgbe_up_complete(struct wx * wx)144 static void txgbe_up_complete(struct wx *wx)
145 {
146 	struct net_device *netdev = wx->netdev;
147 	u32 reg;
148 
149 	wx_control_hw(wx, true);
150 	wx_configure_vectors(wx);
151 
152 	/* make sure to complete pre-operations */
153 	smp_mb__before_atomic();
154 	wx_napi_enable_all(wx);
155 
156 	switch (wx->mac.type) {
157 	case wx_mac_aml40:
158 		reg = rd32(wx, TXGBE_AML_MAC_TX_CFG);
159 		reg &= ~TXGBE_AML_MAC_TX_CFG_SPEED_MASK;
160 		reg |= TXGBE_AML_MAC_TX_CFG_SPEED_40G;
161 		wr32(wx, WX_MAC_TX_CFG, reg);
162 		txgbe_enable_sec_tx_path(wx);
163 		netif_carrier_on(wx->netdev);
164 		break;
165 	case wx_mac_aml:
166 		/* Enable TX laser */
167 		wr32m(wx, WX_GPIO_DR, TXGBE_GPIOBIT_1, 0);
168 		txgbe_setup_link(wx);
169 		phylink_start(wx->phylink);
170 		break;
171 	case wx_mac_sp:
172 		phylink_start(wx->phylink);
173 		break;
174 	default:
175 		break;
176 	}
177 
178 	/* clear any pending interrupts, may auto mask */
179 	rd32(wx, WX_PX_IC(0));
180 	rd32(wx, WX_PX_IC(1));
181 	rd32(wx, WX_PX_MISC_IC);
182 	txgbe_irq_enable(wx, true);
183 
184 	/* enable transmits */
185 	netif_tx_start_all_queues(netdev);
186 	mod_timer(&wx->service_timer, jiffies);
187 
188 	/* Set PF Reset Done bit so PF/VF Mail Ops can work */
189 	wr32m(wx, WX_CFG_PORT_CTL, WX_CFG_PORT_CTL_PFRSTD,
190 	      WX_CFG_PORT_CTL_PFRSTD);
191 	/* update setting rx tx for all active vfs */
192 	wx_set_all_vfs(wx);
193 }
194 
txgbe_reset(struct wx * wx)195 static void txgbe_reset(struct wx *wx)
196 {
197 	struct net_device *netdev = wx->netdev;
198 	u8 old_addr[ETH_ALEN];
199 	int err;
200 
201 	err = txgbe_reset_hw(wx);
202 	if (err != 0)
203 		wx_err(wx, "Hardware Error: %d\n", err);
204 
205 	wx_start_hw(wx);
206 	/* do not flush user set addresses */
207 	memcpy(old_addr, &wx->mac_table[0].addr, netdev->addr_len);
208 	wx_flush_sw_mac_table(wx);
209 	wx_mac_set_default_filter(wx, old_addr);
210 
211 	if (test_bit(WX_STATE_PTP_RUNNING, wx->state))
212 		wx_ptp_reset(wx);
213 }
214 
txgbe_disable_device(struct wx * wx)215 static void txgbe_disable_device(struct wx *wx)
216 {
217 	struct net_device *netdev = wx->netdev;
218 	u32 i;
219 
220 	wx_disable_pcie_master(wx);
221 	/* disable receives */
222 	wx_disable_rx(wx);
223 
224 	/* disable all enabled rx queues */
225 	for (i = 0; i < wx->num_rx_queues; i++)
226 		/* this call also flushes the previous write */
227 		wx_disable_rx_queue(wx, wx->rx_ring[i]);
228 
229 	netif_tx_stop_all_queues(netdev);
230 	netif_tx_disable(netdev);
231 
232 	wx_irq_disable(wx);
233 	wx_napi_disable_all(wx);
234 
235 	timer_delete_sync(&wx->service_timer);
236 
237 	if (wx->bus.func < 2)
238 		wr32m(wx, TXGBE_MIS_PRB_CTL, TXGBE_MIS_PRB_CTL_LAN_UP(wx->bus.func), 0);
239 	else
240 		wx_err(wx, "%s: invalid bus lan id %d\n",
241 		       __func__, wx->bus.func);
242 
243 	if (wx->num_vfs) {
244 		/* Clear EITR Select mapping */
245 		wr32(wx, WX_PX_ITRSEL, 0);
246 		/* Mark all the VFs as inactive */
247 		for (i = 0; i < wx->num_vfs; i++)
248 			wx->vfinfo[i].clear_to_send = 0;
249 		/* update setting rx tx for all active vfs */
250 		wx_set_all_vfs(wx);
251 	}
252 
253 	if (!(((wx->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) ||
254 	      ((wx->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP))) {
255 		/* disable mac transmiter */
256 		wr32m(wx, WX_MAC_TX_CFG, WX_MAC_TX_CFG_TE, 0);
257 	}
258 
259 	/* disable transmits in the hardware now that interrupts are off */
260 	for (i = 0; i < wx->num_tx_queues; i++) {
261 		u8 reg_idx = wx->tx_ring[i]->reg_idx;
262 
263 		wr32(wx, WX_PX_TR_CFG(reg_idx), WX_PX_TR_CFG_SWFLSH);
264 	}
265 
266 	/* Disable the Tx DMA engine */
267 	wr32m(wx, WX_TDM_CTL, WX_TDM_CTL_TE, 0);
268 
269 	wx_update_stats(wx);
270 }
271 
txgbe_down(struct wx * wx)272 void txgbe_down(struct wx *wx)
273 {
274 	txgbe_disable_device(wx);
275 	txgbe_reset(wx);
276 
277 	switch (wx->mac.type) {
278 	case wx_mac_aml40:
279 		netif_carrier_off(wx->netdev);
280 		break;
281 	case wx_mac_aml:
282 		phylink_stop(wx->phylink);
283 		/* Disable TX laser */
284 		wr32m(wx, WX_GPIO_DR, TXGBE_GPIOBIT_1, TXGBE_GPIOBIT_1);
285 		break;
286 	case wx_mac_sp:
287 		phylink_stop(wx->phylink);
288 		break;
289 	default:
290 		break;
291 	}
292 
293 	wx_clean_all_tx_rings(wx);
294 	wx_clean_all_rx_rings(wx);
295 }
296 
txgbe_up(struct wx * wx)297 void txgbe_up(struct wx *wx)
298 {
299 	wx_configure(wx);
300 	wx_ptp_init(wx);
301 	txgbe_up_complete(wx);
302 }
303 
304 /**
305  *  txgbe_init_type_code - Initialize the shared code
306  *  @wx: pointer to hardware structure
307  **/
txgbe_init_type_code(struct wx * wx)308 static void txgbe_init_type_code(struct wx *wx)
309 {
310 	u8 device_type = wx->subsystem_device_id & 0xF0;
311 
312 	switch (wx->device_id) {
313 	case TXGBE_DEV_ID_SP1000:
314 	case TXGBE_DEV_ID_WX1820:
315 		wx->mac.type = wx_mac_sp;
316 		break;
317 	case TXGBE_DEV_ID_AML5010:
318 	case TXGBE_DEV_ID_AML5110:
319 	case TXGBE_DEV_ID_AML5025:
320 	case TXGBE_DEV_ID_AML5125:
321 		wx->mac.type = wx_mac_aml;
322 		break;
323 	case TXGBE_DEV_ID_AML5040:
324 	case TXGBE_DEV_ID_AML5140:
325 		wx->mac.type = wx_mac_aml40;
326 		break;
327 	default:
328 		wx->mac.type = wx_mac_unknown;
329 		break;
330 	}
331 
332 	switch (device_type) {
333 	case TXGBE_ID_SFP:
334 		wx->media_type = wx_media_fiber;
335 		break;
336 	case TXGBE_ID_XAUI:
337 	case TXGBE_ID_SGMII:
338 		wx->media_type = wx_media_copper;
339 		break;
340 	case TXGBE_ID_KR_KX_KX4:
341 	case TXGBE_ID_MAC_XAUI:
342 	case TXGBE_ID_MAC_SGMII:
343 		wx->media_type = wx_media_backplane;
344 		break;
345 	case TXGBE_ID_SFI_XAUI:
346 		if (wx->bus.func == 0)
347 			wx->media_type = wx_media_fiber;
348 		else
349 			wx->media_type = wx_media_copper;
350 		break;
351 	default:
352 		wx->media_type = wx_media_unknown;
353 		break;
354 	}
355 }
356 
357 /**
358  * txgbe_sw_init - Initialize general software structures (struct wx)
359  * @wx: board private structure to initialize
360  **/
txgbe_sw_init(struct wx * wx)361 static int txgbe_sw_init(struct wx *wx)
362 {
363 	u16 msix_count = 0;
364 	int err;
365 
366 	wx->mac.num_rar_entries = TXGBE_RAR_ENTRIES;
367 	wx->mac.max_tx_queues = TXGBE_MAX_TXQ;
368 	wx->mac.max_rx_queues = TXGBE_MAX_RXQ;
369 	wx->mac.mcft_size = TXGBE_MC_TBL_SIZE;
370 	wx->mac.vft_size = TXGBE_VFT_TBL_SIZE;
371 	wx->mac.rx_pb_size = TXGBE_RX_PB_SIZE;
372 	wx->mac.tx_pb_size = TXGBE_TDB_PB_SZ;
373 
374 	/* PCI config space info */
375 	err = wx_sw_init(wx);
376 	if (err < 0)
377 		return err;
378 
379 	txgbe_init_type_code(wx);
380 
381 	/* Set common capability flags and settings */
382 	wx->max_q_vectors = TXGBE_MAX_MSIX_VECTORS;
383 	err = wx_get_pcie_msix_counts(wx, &msix_count, TXGBE_MAX_MSIX_VECTORS);
384 	if (err)
385 		wx_err(wx, "Do not support MSI-X\n");
386 	wx->mac.max_msix_vectors = msix_count;
387 
388 	wx->ring_feature[RING_F_RSS].limit = min_t(int, TXGBE_MAX_RSS_INDICES,
389 						   num_online_cpus());
390 	wx->rss_enabled = true;
391 
392 	wx->ring_feature[RING_F_FDIR].limit = min_t(int, TXGBE_MAX_FDIR_INDICES,
393 						    num_online_cpus());
394 	set_bit(WX_FLAG_FDIR_CAPABLE, wx->flags);
395 	set_bit(WX_FLAG_FDIR_HASH, wx->flags);
396 	wx->atr_sample_rate = TXGBE_DEFAULT_ATR_SAMPLE_RATE;
397 	wx->atr = txgbe_atr;
398 	wx->configure_fdir = txgbe_configure_fdir;
399 
400 	set_bit(WX_FLAG_RSC_CAPABLE, wx->flags);
401 	set_bit(WX_FLAG_MULTI_64_FUNC, wx->flags);
402 
403 	/* enable itr by default in dynamic mode */
404 	wx->rx_itr_setting = 1;
405 	wx->tx_itr_setting = 1;
406 
407 	/* set default ring sizes */
408 	wx->tx_ring_count = TXGBE_DEFAULT_TXD;
409 	wx->rx_ring_count = TXGBE_DEFAULT_RXD;
410 	wx->mbx.size = WX_VXMAILBOX_SIZE;
411 
412 	/* set default work limits */
413 	wx->tx_work_limit = TXGBE_DEFAULT_TX_WORK;
414 	wx->rx_work_limit = TXGBE_DEFAULT_RX_WORK;
415 
416 	wx->setup_tc = txgbe_setup_tc;
417 	wx->do_reset = txgbe_do_reset;
418 	set_bit(0, &wx->fwd_bitmask);
419 
420 	switch (wx->mac.type) {
421 	case wx_mac_sp:
422 		break;
423 	case wx_mac_aml:
424 	case wx_mac_aml40:
425 		set_bit(WX_FLAG_SWFW_RING, wx->flags);
426 		wx->swfw_index = 0;
427 		break;
428 	default:
429 		break;
430 	}
431 
432 	return 0;
433 }
434 
txgbe_init_fdir(struct txgbe * txgbe)435 static void txgbe_init_fdir(struct txgbe *txgbe)
436 {
437 	txgbe->fdir_filter_count = 0;
438 	spin_lock_init(&txgbe->fdir_perfect_lock);
439 }
440 
441 /**
442  * txgbe_open - Called when a network interface is made active
443  * @netdev: network interface device structure
444  *
445  * Returns 0 on success, negative value on failure
446  *
447  * The open entry point is called when a network interface is made
448  * active by the system (IFF_UP).
449  **/
txgbe_open(struct net_device * netdev)450 static int txgbe_open(struct net_device *netdev)
451 {
452 	struct wx *wx = netdev_priv(netdev);
453 	int err;
454 
455 	err = wx_setup_resources(wx);
456 	if (err)
457 		goto err_reset;
458 
459 	wx_configure(wx);
460 
461 	err = txgbe_setup_misc_irq(wx->priv);
462 	if (err)
463 		goto err_free_resources;
464 
465 	err = txgbe_request_queue_irqs(wx);
466 	if (err)
467 		goto err_free_misc_irq;
468 
469 	/* Notify the stack of the actual queue counts. */
470 	err = netif_set_real_num_tx_queues(netdev, wx->num_tx_queues);
471 	if (err)
472 		goto err_free_irq;
473 
474 	err = netif_set_real_num_rx_queues(netdev, wx->num_rx_queues);
475 	if (err)
476 		goto err_free_irq;
477 
478 	wx_ptp_init(wx);
479 
480 	txgbe_up_complete(wx);
481 
482 	return 0;
483 
484 err_free_irq:
485 	wx_free_irq(wx);
486 err_free_misc_irq:
487 	txgbe_free_misc_irq(wx->priv);
488 	wx_reset_interrupt_capability(wx);
489 err_free_resources:
490 	wx_free_resources(wx);
491 err_reset:
492 	txgbe_reset(wx);
493 
494 	return err;
495 }
496 
497 /**
498  * txgbe_close_suspend - actions necessary to both suspend and close flows
499  * @wx: the private wx struct
500  *
501  * This function should contain the necessary work common to both suspending
502  * and closing of the device.
503  */
txgbe_close_suspend(struct wx * wx)504 static void txgbe_close_suspend(struct wx *wx)
505 {
506 	wx_ptp_suspend(wx);
507 	txgbe_disable_device(wx);
508 	wx_free_resources(wx);
509 }
510 
511 /**
512  * txgbe_close - Disables a network interface
513  * @netdev: network interface device structure
514  *
515  * Returns 0, this is not allowed to fail
516  *
517  * The close entry point is called when an interface is de-activated
518  * by the OS.  The hardware is still under the drivers control, but
519  * needs to be disabled.  A global MAC reset is issued to stop the
520  * hardware, and all transmit and receive resources are freed.
521  **/
txgbe_close(struct net_device * netdev)522 static int txgbe_close(struct net_device *netdev)
523 {
524 	struct wx *wx = netdev_priv(netdev);
525 
526 	wx_ptp_stop(wx);
527 	txgbe_down(wx);
528 	wx_free_irq(wx);
529 	txgbe_free_misc_irq(wx->priv);
530 	wx_free_resources(wx);
531 	txgbe_fdir_filter_exit(wx);
532 	wx_control_hw(wx, false);
533 
534 	return 0;
535 }
536 
txgbe_dev_shutdown(struct pci_dev * pdev)537 static void txgbe_dev_shutdown(struct pci_dev *pdev)
538 {
539 	struct wx *wx = pci_get_drvdata(pdev);
540 	struct net_device *netdev;
541 
542 	netdev = wx->netdev;
543 	netif_device_detach(netdev);
544 
545 	rtnl_lock();
546 	if (netif_running(netdev))
547 		txgbe_close_suspend(wx);
548 	rtnl_unlock();
549 
550 	wx_control_hw(wx, false);
551 
552 	pci_disable_device(pdev);
553 }
554 
txgbe_shutdown(struct pci_dev * pdev)555 static void txgbe_shutdown(struct pci_dev *pdev)
556 {
557 	txgbe_dev_shutdown(pdev);
558 
559 	if (system_state == SYSTEM_POWER_OFF) {
560 		pci_wake_from_d3(pdev, false);
561 		pci_set_power_state(pdev, PCI_D3hot);
562 	}
563 }
564 
565 /**
566  * txgbe_setup_tc - routine to configure net_device for multiple traffic
567  * classes.
568  *
569  * @dev: net device to configure
570  * @tc: number of traffic classes to enable
571  */
txgbe_setup_tc(struct net_device * dev,u8 tc)572 int txgbe_setup_tc(struct net_device *dev, u8 tc)
573 {
574 	struct wx *wx = netdev_priv(dev);
575 
576 	/* Hardware has to reinitialize queues and interrupts to
577 	 * match packet buffer alignment. Unfortunately, the
578 	 * hardware is not flexible enough to do this dynamically.
579 	 */
580 	if (netif_running(dev))
581 		txgbe_close(dev);
582 	else
583 		txgbe_reset(wx);
584 
585 	wx_clear_interrupt_scheme(wx);
586 
587 	if (tc)
588 		netdev_set_num_tc(dev, tc);
589 	else
590 		netdev_reset_tc(dev);
591 
592 	wx_init_interrupt_scheme(wx);
593 
594 	if (netif_running(dev))
595 		txgbe_open(dev);
596 
597 	return 0;
598 }
599 
txgbe_reinit_locked(struct wx * wx)600 static void txgbe_reinit_locked(struct wx *wx)
601 {
602 	int err = 0;
603 
604 	netif_trans_update(wx->netdev);
605 
606 	err = wx_set_state_reset(wx);
607 	if (err) {
608 		wx_err(wx, "wait device reset timeout\n");
609 		return;
610 	}
611 
612 	txgbe_down(wx);
613 	txgbe_up(wx);
614 
615 	clear_bit(WX_STATE_RESETTING, wx->state);
616 }
617 
txgbe_do_reset(struct net_device * netdev)618 void txgbe_do_reset(struct net_device *netdev)
619 {
620 	struct wx *wx = netdev_priv(netdev);
621 
622 	if (netif_running(netdev))
623 		txgbe_reinit_locked(wx);
624 	else
625 		txgbe_reset(wx);
626 }
627 
txgbe_udp_tunnel_sync(struct net_device * dev,unsigned int table)628 static int txgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table)
629 {
630 	struct wx *wx = netdev_priv(dev);
631 	struct udp_tunnel_info ti;
632 
633 	udp_tunnel_nic_get_port(dev, table, 0, &ti);
634 	switch (ti.type) {
635 	case UDP_TUNNEL_TYPE_VXLAN:
636 		wr32(wx, TXGBE_CFG_VXLAN, ntohs(ti.port));
637 		break;
638 	case UDP_TUNNEL_TYPE_VXLAN_GPE:
639 		wr32(wx, TXGBE_CFG_VXLAN_GPE, ntohs(ti.port));
640 		break;
641 	case UDP_TUNNEL_TYPE_GENEVE:
642 		wr32(wx, TXGBE_CFG_GENEVE, ntohs(ti.port));
643 		break;
644 	default:
645 		break;
646 	}
647 
648 	return 0;
649 }
650 
651 static const struct udp_tunnel_nic_info txgbe_udp_tunnels = {
652 	.sync_table	= txgbe_udp_tunnel_sync,
653 	.flags		= UDP_TUNNEL_NIC_INFO_OPEN_ONLY,
654 	.tables		= {
655 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
656 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN_GPE, },
657 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },
658 	},
659 };
660 
661 static const struct net_device_ops txgbe_netdev_ops = {
662 	.ndo_open               = txgbe_open,
663 	.ndo_stop               = txgbe_close,
664 	.ndo_change_mtu         = wx_change_mtu,
665 	.ndo_start_xmit         = wx_xmit_frame,
666 	.ndo_set_rx_mode        = wx_set_rx_mode,
667 	.ndo_set_features       = wx_set_features,
668 	.ndo_fix_features       = wx_fix_features,
669 	.ndo_features_check     = wx_features_check,
670 	.ndo_validate_addr      = eth_validate_addr,
671 	.ndo_set_mac_address    = wx_set_mac,
672 	.ndo_get_stats64        = wx_get_stats64,
673 	.ndo_vlan_rx_add_vid    = wx_vlan_rx_add_vid,
674 	.ndo_vlan_rx_kill_vid   = wx_vlan_rx_kill_vid,
675 	.ndo_hwtstamp_set       = wx_hwtstamp_set,
676 	.ndo_hwtstamp_get       = wx_hwtstamp_get,
677 };
678 
679 /**
680  * txgbe_probe - Device Initialization Routine
681  * @pdev: PCI device information struct
682  * @ent: entry in txgbe_pci_tbl
683  *
684  * Returns 0 on success, negative on failure
685  *
686  * txgbe_probe initializes an adapter identified by a pci_dev structure.
687  * The OS initialization, configuring of the wx private structure,
688  * and a hardware reset occur.
689  **/
txgbe_probe(struct pci_dev * pdev,const struct pci_device_id __always_unused * ent)690 static int txgbe_probe(struct pci_dev *pdev,
691 		       const struct pci_device_id __always_unused *ent)
692 {
693 	struct net_device *netdev;
694 	int err, expected_gts;
695 	struct wx *wx = NULL;
696 	struct txgbe *txgbe;
697 
698 	u16 eeprom_verh = 0, eeprom_verl = 0, offset = 0;
699 	u16 eeprom_cfg_blkh = 0, eeprom_cfg_blkl = 0;
700 	u16 build = 0, major = 0, patch = 0;
701 	u32 etrack_id = 0;
702 
703 	err = pci_enable_device_mem(pdev);
704 	if (err)
705 		return err;
706 
707 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
708 	if (err) {
709 		dev_err(&pdev->dev,
710 			"No usable DMA configuration, aborting\n");
711 		goto err_pci_disable_dev;
712 	}
713 
714 	err = pci_request_selected_regions(pdev,
715 					   pci_select_bars(pdev, IORESOURCE_MEM),
716 					   txgbe_driver_name);
717 	if (err) {
718 		dev_err(&pdev->dev,
719 			"pci_request_selected_regions failed 0x%x\n", err);
720 		goto err_pci_disable_dev;
721 	}
722 
723 	pci_set_master(pdev);
724 
725 	netdev = devm_alloc_etherdev_mqs(&pdev->dev,
726 					 sizeof(struct wx),
727 					 TXGBE_MAX_TX_QUEUES,
728 					 TXGBE_MAX_RX_QUEUES);
729 	if (!netdev) {
730 		err = -ENOMEM;
731 		goto err_pci_release_regions;
732 	}
733 
734 	SET_NETDEV_DEV(netdev, &pdev->dev);
735 
736 	wx = netdev_priv(netdev);
737 	wx->netdev = netdev;
738 	wx->pdev = pdev;
739 
740 	wx->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
741 
742 	wx->hw_addr = devm_ioremap(&pdev->dev,
743 				   pci_resource_start(pdev, 0),
744 				   pci_resource_len(pdev, 0));
745 	if (!wx->hw_addr) {
746 		err = -EIO;
747 		goto err_pci_release_regions;
748 	}
749 
750 	/* The sapphire supports up to 63 VFs per pf, but physical
751 	 * function also need one pool for basic networking.
752 	 */
753 	pci_sriov_set_totalvfs(pdev, TXGBE_MAX_VFS_DRV_LIMIT);
754 	wx->driver_name = txgbe_driver_name;
755 	txgbe_set_ethtool_ops(netdev);
756 	netdev->netdev_ops = &txgbe_netdev_ops;
757 	netdev->udp_tunnel_nic_info = &txgbe_udp_tunnels;
758 
759 	/* setup the private structure */
760 	err = txgbe_sw_init(wx);
761 	if (err)
762 		goto err_pci_release_regions;
763 
764 	/* check if flash load is done after hw power up */
765 	err = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_PERST);
766 	if (err)
767 		goto err_free_mac_table;
768 	err = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_PWRRST);
769 	if (err)
770 		goto err_free_mac_table;
771 
772 	err = wx_mng_present(wx);
773 	if (err) {
774 		dev_err(&pdev->dev, "Management capability is not present\n");
775 		goto err_free_mac_table;
776 	}
777 
778 	err = txgbe_reset_hw(wx);
779 	if (err) {
780 		dev_err(&pdev->dev, "HW Init failed: %d\n", err);
781 		goto err_free_mac_table;
782 	}
783 
784 	netdev->features = NETIF_F_SG |
785 			   NETIF_F_TSO |
786 			   NETIF_F_TSO6 |
787 			   NETIF_F_RXHASH |
788 			   NETIF_F_RXCSUM |
789 			   NETIF_F_HW_CSUM;
790 
791 	netdev->gso_partial_features =  NETIF_F_GSO_ENCAP_ALL;
792 	netdev->features |= netdev->gso_partial_features;
793 	netdev->features |= NETIF_F_SCTP_CRC;
794 	netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
795 	netdev->hw_enc_features |= netdev->vlan_features;
796 	netdev->features |= NETIF_F_VLAN_FEATURES;
797 	/* copy netdev features into list of user selectable features */
798 	netdev->hw_features |= netdev->features | NETIF_F_RXALL;
799 	netdev->hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
800 	netdev->features |= NETIF_F_HIGHDMA;
801 	netdev->hw_features |= NETIF_F_GRO;
802 	netdev->features |= NETIF_F_GRO;
803 	netdev->features |= NETIF_F_RX_UDP_TUNNEL_PORT;
804 
805 	netdev->priv_flags |= IFF_UNICAST_FLT;
806 	netdev->priv_flags |= IFF_SUPP_NOFCS;
807 	netdev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
808 
809 	netdev->min_mtu = ETH_MIN_MTU;
810 	netdev->max_mtu = WX_MAX_JUMBO_FRAME_SIZE -
811 			  (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
812 
813 	/* make sure the EEPROM is good */
814 	err = txgbe_validate_eeprom_checksum(wx, NULL);
815 	if (err != 0) {
816 		dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
817 		wr32(wx, WX_MIS_RST, WX_MIS_RST_SW_RST);
818 		err = -EIO;
819 		goto err_free_mac_table;
820 	}
821 
822 	eth_hw_addr_set(netdev, wx->mac.perm_addr);
823 	wx_mac_set_default_filter(wx, wx->mac.perm_addr);
824 
825 	txgbe_init_service(wx);
826 
827 	err = wx_init_interrupt_scheme(wx);
828 	if (err)
829 		goto err_cancel_service;
830 
831 	/* Save off EEPROM version number and Option Rom version which
832 	 * together make a unique identify for the eeprom
833 	 */
834 	wx_read_ee_hostif(wx,
835 			  wx->eeprom.sw_region_offset + TXGBE_EEPROM_VERSION_H,
836 			  &eeprom_verh);
837 	wx_read_ee_hostif(wx,
838 			  wx->eeprom.sw_region_offset + TXGBE_EEPROM_VERSION_L,
839 			  &eeprom_verl);
840 	etrack_id = (eeprom_verh << 16) | eeprom_verl;
841 
842 	wx_read_ee_hostif(wx,
843 			  wx->eeprom.sw_region_offset + TXGBE_ISCSI_BOOT_CONFIG,
844 			  &offset);
845 
846 	/* Make sure offset to SCSI block is valid */
847 	if (!(offset == 0x0) && !(offset == 0xffff)) {
848 		wx_read_ee_hostif(wx, offset + 0x84, &eeprom_cfg_blkh);
849 		wx_read_ee_hostif(wx, offset + 0x83, &eeprom_cfg_blkl);
850 
851 		/* Only display Option Rom if exist */
852 		if (eeprom_cfg_blkl && eeprom_cfg_blkh) {
853 			major = eeprom_cfg_blkl >> 8;
854 			build = (eeprom_cfg_blkl << 8) | (eeprom_cfg_blkh >> 8);
855 			patch = eeprom_cfg_blkh & 0x00ff;
856 
857 			snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
858 				 "0x%08x, %d.%d.%d", etrack_id, major, build,
859 				 patch);
860 		} else {
861 			snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
862 				 "0x%08x", etrack_id);
863 		}
864 	} else {
865 		snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
866 			 "0x%08x", etrack_id);
867 	}
868 
869 	if (etrack_id < 0x20010)
870 		dev_warn(&pdev->dev, "Please upgrade the firmware to 0x20010 or above.\n");
871 
872 	err = txgbe_test_hostif(wx);
873 	if (err != 0) {
874 		dev_err(&pdev->dev, "Mismatched Firmware version\n");
875 		err = -EIO;
876 		goto err_release_hw;
877 	}
878 
879 	txgbe = devm_kzalloc(&pdev->dev, sizeof(*txgbe), GFP_KERNEL);
880 	if (!txgbe) {
881 		err = -ENOMEM;
882 		goto err_release_hw;
883 	}
884 
885 	txgbe->wx = wx;
886 	wx->priv = txgbe;
887 
888 	txgbe_init_fdir(txgbe);
889 
890 	err = txgbe_init_phy(txgbe);
891 	if (err)
892 		goto err_release_hw;
893 
894 	err = register_netdev(netdev);
895 	if (err)
896 		goto err_remove_phy;
897 
898 	pci_set_drvdata(pdev, wx);
899 
900 	netif_tx_stop_all_queues(netdev);
901 
902 	/* calculate the expected PCIe bandwidth required for optimal
903 	 * performance. Note that some older parts will never have enough
904 	 * bandwidth due to being older generation PCIe parts. We clamp these
905 	 * parts to ensure that no warning is displayed, as this could confuse
906 	 * users otherwise.
907 	 */
908 	expected_gts = txgbe_enumerate_functions(wx) * 10;
909 
910 	/* don't check link if we failed to enumerate functions */
911 	if (expected_gts > 0)
912 		txgbe_check_minimum_link(wx);
913 	else
914 		dev_warn(&pdev->dev, "Failed to enumerate PF devices.\n");
915 
916 	return 0;
917 
918 err_remove_phy:
919 	txgbe_remove_phy(txgbe);
920 err_release_hw:
921 	wx_clear_interrupt_scheme(wx);
922 	wx_control_hw(wx, false);
923 err_cancel_service:
924 	timer_delete_sync(&wx->service_timer);
925 	cancel_work_sync(&wx->service_task);
926 err_free_mac_table:
927 	kfree(wx->rss_key);
928 	kfree(wx->mac_table);
929 err_pci_release_regions:
930 	pci_release_selected_regions(pdev,
931 				     pci_select_bars(pdev, IORESOURCE_MEM));
932 err_pci_disable_dev:
933 	pci_disable_device(pdev);
934 	return err;
935 }
936 
937 /**
938  * txgbe_remove - Device Removal Routine
939  * @pdev: PCI device information struct
940  *
941  * txgbe_remove is called by the PCI subsystem to alert the driver
942  * that it should release a PCI device.  The could be caused by a
943  * Hot-Plug event, or because the driver is going to be removed from
944  * memory.
945  **/
txgbe_remove(struct pci_dev * pdev)946 static void txgbe_remove(struct pci_dev *pdev)
947 {
948 	struct wx *wx = pci_get_drvdata(pdev);
949 	struct txgbe *txgbe = wx->priv;
950 	struct net_device *netdev;
951 
952 	cancel_work_sync(&wx->service_task);
953 
954 	netdev = wx->netdev;
955 	wx_disable_sriov(wx);
956 	unregister_netdev(netdev);
957 
958 	txgbe_remove_phy(txgbe);
959 	wx_free_isb_resources(wx);
960 
961 	pci_release_selected_regions(pdev,
962 				     pci_select_bars(pdev, IORESOURCE_MEM));
963 
964 	kfree(wx->rss_key);
965 	kfree(wx->mac_table);
966 	wx_clear_interrupt_scheme(wx);
967 
968 	pci_disable_device(pdev);
969 }
970 
971 static struct pci_driver txgbe_driver = {
972 	.name     = txgbe_driver_name,
973 	.id_table = txgbe_pci_tbl,
974 	.probe    = txgbe_probe,
975 	.remove   = txgbe_remove,
976 	.shutdown = txgbe_shutdown,
977 	.sriov_configure = wx_pci_sriov_configure,
978 };
979 
980 module_pci_driver(txgbe_driver);
981 
982 MODULE_DEVICE_TABLE(pci, txgbe_pci_tbl);
983 MODULE_AUTHOR("Beijing WangXun Technology Co., Ltd, <software@trustnetic.com>");
984 MODULE_DESCRIPTION("WangXun(R) 10/25/40 Gigabit PCI Express Network Driver");
985 MODULE_LICENSE("GPL");
986