1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2022 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef IRDMA_PUDA_H 36 #define IRDMA_PUDA_H 37 38 #define IRDMA_IEQ_MPA_FRAMING 6 39 #define IRDMA_TCP_OFFSET 40 40 #define IRDMA_IPV4_PAD 20 41 #define IRDMA_MRK_BLK_SZ 512 42 43 enum puda_rsrc_type { 44 IRDMA_PUDA_RSRC_TYPE_ILQ = 1, 45 IRDMA_PUDA_RSRC_TYPE_IEQ, 46 IRDMA_PUDA_RSRC_TYPE_MAX, /* Must be last entry */ 47 }; 48 49 enum puda_rsrc_complete { 50 PUDA_CQ_CREATED = 1, 51 PUDA_QP_CREATED, 52 PUDA_TX_COMPLETE, 53 PUDA_RX_COMPLETE, 54 PUDA_HASH_CRC_COMPLETE, 55 }; 56 57 struct irdma_sc_dev; 58 struct irdma_sc_qp; 59 struct irdma_sc_cq; 60 61 struct irdma_puda_cmpl_info { 62 struct irdma_qp_uk *qp; 63 u8 q_type; 64 u8 l3proto; 65 u8 l4proto; 66 u16 vlan; 67 u32 payload_len; 68 u32 compl_error; /* No_err=0, else major and minor err code */ 69 u32 qp_id; 70 u32 wqe_idx; 71 bool ipv4:1; 72 bool smac_valid:1; 73 bool vlan_valid:1; 74 u8 smac[ETHER_ADDR_LEN]; 75 }; 76 77 struct irdma_puda_send_info { 78 u64 paddr; /* Physical address */ 79 u32 len; 80 u32 ah_id; 81 u8 tcplen; 82 u8 maclen; 83 bool ipv4:1; 84 bool do_lpb:1; 85 void *scratch; 86 }; 87 88 struct irdma_puda_buf { 89 struct list_head list; /* MUST be first entry */ 90 struct irdma_dma_mem mem; /* DMA memory for the buffer */ 91 struct irdma_puda_buf *next; /* for alloclist in rsrc struct */ 92 struct irdma_virt_mem buf_mem; /* Buffer memory for this buffer */ 93 void *scratch; 94 u8 *iph; 95 u8 *tcph; 96 u8 *data; 97 u16 datalen; 98 u16 vlan_id; 99 u8 tcphlen; /* tcp length in bytes */ 100 u8 maclen; /* mac length in bytes */ 101 u32 totallen; /* machlen+iphlen+tcphlen+datalen */ 102 atomic_t refcount; 103 u8 hdrlen; 104 bool virtdma:1; 105 bool ipv4:1; 106 bool vlan_valid:1; 107 bool do_lpb:1; /* Loopback buffer */ 108 bool smac_valid:1; 109 u32 seqnum; 110 u32 ah_id; 111 u8 smac[ETHER_ADDR_LEN]; 112 struct irdma_sc_vsi *vsi; 113 }; 114 115 struct irdma_puda_rsrc_info { 116 void (*receive)(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *buf); 117 void (*xmit_complete)(struct irdma_sc_vsi *vsi, void *sqwrid); 118 enum puda_rsrc_type type; /* ILQ or IEQ */ 119 u32 count; 120 u32 pd_id; 121 u32 cq_id; 122 u32 qp_id; 123 u32 sq_size; 124 u32 rq_size; 125 u32 tx_buf_cnt; /* total bufs allocated will be rq_size + tx_buf_cnt */ 126 u16 buf_size; 127 u16 mss; /* FIXME: Windows driver still using this */ 128 u16 stats_idx; 129 bool stats_idx_valid:1; 130 int abi_ver; 131 }; 132 133 struct irdma_puda_rsrc { 134 struct irdma_sc_cq cq; 135 struct irdma_sc_qp qp; 136 struct irdma_sc_pd sc_pd; 137 struct irdma_sc_dev *dev; 138 struct irdma_sc_vsi *vsi; 139 struct irdma_dma_mem cqmem; 140 struct irdma_dma_mem qpmem; 141 struct irdma_virt_mem ilq_mem; 142 enum puda_rsrc_complete cmpl; 143 enum puda_rsrc_type type; 144 u16 buf_size; /*buf must be max datalen + tcpip hdr + mac */ 145 u32 cq_id; 146 u32 qp_id; 147 u32 sq_size; 148 u32 rq_size; 149 u32 cq_size; 150 struct irdma_sq_uk_wr_trk_info *sq_wrtrk_array; 151 u64 *rq_wrid_array; 152 u32 compl_rxwqe_idx; 153 u32 rx_wqe_idx; 154 u32 rxq_invalid_cnt; 155 u32 tx_wqe_avail_cnt; 156 void *hash_desc; 157 struct list_head txpend; 158 struct list_head bufpool; /* free buffers pool list for recv and xmit */ 159 u32 alloc_buf_count; 160 u32 avail_buf_count; /* snapshot of currently available buffers */ 161 spinlock_t bufpool_lock; 162 struct irdma_puda_buf *alloclist; 163 void (*receive)(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *buf); 164 void (*xmit_complete)(struct irdma_sc_vsi *vsi, void *sqwrid); 165 /* puda stats */ 166 u64 stats_buf_alloc_fail; 167 u64 stats_pkt_rcvd; 168 u64 stats_pkt_sent; 169 u64 stats_rcvd_pkt_err; 170 u64 stats_sent_pkt_q; 171 u64 stats_bad_qp_id; 172 /* IEQ stats */ 173 u64 fpdu_processed; 174 u64 bad_seq_num; 175 u64 crc_err; 176 u64 pmode_count; 177 u64 partials_handled; 178 u16 mss; /* FIXME: Windows driver still using this */ 179 u16 stats_idx; 180 bool check_crc:1; 181 bool stats_idx_valid:1; 182 }; 183 184 struct irdma_puda_buf *irdma_puda_get_bufpool(struct irdma_puda_rsrc *rsrc); 185 void irdma_puda_ret_bufpool(struct irdma_puda_rsrc *rsrc, 186 struct irdma_puda_buf *buf); 187 void irdma_puda_send_buf(struct irdma_puda_rsrc *rsrc, 188 struct irdma_puda_buf *buf); 189 int irdma_puda_send(struct irdma_sc_qp *qp, struct irdma_puda_send_info *info); 190 int irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi, 191 struct irdma_puda_rsrc_info *info); 192 void irdma_puda_dele_rsrc(struct irdma_sc_vsi *vsi, enum puda_rsrc_type type, 193 bool reset); 194 int irdma_puda_poll_cmpl(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq, 195 u32 *compl_err); 196 197 struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev, 198 struct irdma_puda_buf *buf); 199 int irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info, 200 struct irdma_puda_buf *buf); 201 int irdma_ieq_check_mpacrc(void *desc, void *addr, u32 len, u32 val); 202 int irdma_init_hash_desc(void **desc); 203 void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 204 void irdma_free_hash_desc(void *desc); 205 void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len, u32 seqnum); 206 int irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 207 int irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq); 208 int irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 209 void irdma_cqp_cq_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq); 210 void irdma_puda_ieq_get_ah_info(struct irdma_sc_qp *qp, 211 struct irdma_ah_info *ah_info); 212 int irdma_puda_create_ah(struct irdma_sc_dev *dev, 213 struct irdma_ah_info *ah_info, bool wait, 214 enum puda_rsrc_type type, void *cb_param, 215 struct irdma_sc_ah **ah); 216 void irdma_puda_free_ah(struct irdma_sc_dev *dev, struct irdma_sc_ah *ah); 217 void irdma_ieq_process_fpdus(struct irdma_sc_qp *qp, 218 struct irdma_puda_rsrc *ieq); 219 void irdma_ieq_cleanup_qp(struct irdma_puda_rsrc *ieq, struct irdma_sc_qp *qp); 220 #endif /*IRDMA_PROTOS_H */ 221