1 /* 2 3 Broadcom B43 wireless driver 4 5 N-PHY core code. 6 7 Copyright (c) 2008 Michael Buesch <m@bues.ch> 8 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com> 9 Copyright (c) 2016 Adrian Chadd <adrian@FreeBSD.org> 10 11 This program is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 2 of the License, or 14 (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; see the file COPYING. If not, write to 23 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, 24 Boston, MA 02110-1301, USA. 25 26 */ 27 28 /* 29 */ 30 31 #ifndef __IF_BWN_PHY_N_CORE_H__ 32 #define __IF_BWN_PHY_N_CORE_H__ 33 34 struct bwn_mac; 35 36 enum b43_nphy_spur_avoid { 37 BWN_SPUR_AVOID_DISABLE, 38 BWN_SPUR_AVOID_AUTO, 39 BWN_SPUR_AVOID_FORCE, 40 }; 41 42 /* 43 * TODO: determine whether center_freq is the primary 44 * channel centre frequency or the actual centre centre 45 * frequency (eg radio tuning.) It /looks/ like it's 46 * actual channel centre. 47 */ 48 struct bwn_chanspec { 49 uint16_t center_freq; 50 /* This is HT40U, HT40D, HT20, no-HT 20, etc */ 51 bwn_chan_type_t channel_type; 52 }; 53 54 struct bwn_phy_n_iq_comp { 55 int16_t a0; 56 int16_t b0; 57 int16_t a1; 58 int16_t b1; 59 }; 60 61 struct bwn_phy_n_rssical_cache { 62 uint16_t rssical_radio_regs_2G[2]; 63 uint16_t rssical_phy_regs_2G[12]; 64 65 uint16_t rssical_radio_regs_5G[2]; 66 uint16_t rssical_phy_regs_5G[12]; 67 }; 68 69 struct bwn_phy_n_cal_cache { 70 uint16_t txcal_radio_regs_2G[8]; 71 uint16_t txcal_coeffs_2G[8]; 72 struct bwn_phy_n_iq_comp rxcal_coeffs_2G; 73 74 uint16_t txcal_radio_regs_5G[8]; 75 uint16_t txcal_coeffs_5G[8]; 76 struct bwn_phy_n_iq_comp rxcal_coeffs_5G; 77 }; 78 79 struct bwn_phy_n_txpwrindex { 80 int8_t index; 81 int8_t index_internal; 82 int8_t index_internal_save; 83 uint16_t AfectrlOverride; 84 uint16_t AfeCtrlDacGain; 85 uint16_t rad_gain; 86 uint8_t bbmult; 87 uint16_t iqcomp_a; 88 uint16_t iqcomp_b; 89 uint16_t locomp; 90 }; 91 92 struct bwn_phy_n_pwr_ctl_info { 93 uint8_t idle_tssi_2g; 94 uint8_t idle_tssi_5g; 95 }; 96 97 struct bwn_phy_n { 98 uint8_t antsel_type; 99 uint8_t cal_orig_pwr_idx[2]; 100 uint8_t measure_hold; 101 uint8_t phyrxchain; 102 uint8_t hw_phyrxchain; 103 uint8_t hw_phytxchain; 104 uint8_t perical; 105 uint32_t deaf_count; 106 uint32_t rxcalparams; 107 bool hang_avoid; 108 bool mute; 109 uint16_t papd_epsilon_offset[2]; 110 int32_t preamble_override; 111 uint32_t bb_mult_save; 112 113 bool gain_boost; 114 bool elna_gain_config; 115 bool band5g_pwrgain; 116 bool use_int_tx_iq_lo_cal; 117 bool lpf_bw_overrode_for_sample_play; 118 119 uint8_t mphase_cal_phase_id; 120 uint16_t mphase_txcal_cmdidx; 121 uint16_t mphase_txcal_numcmds; 122 uint16_t mphase_txcal_bestcoeffs[11]; 123 124 bool txpwrctrl; 125 bool pwg_gain_5ghz; 126 uint8_t tx_pwr_idx[2]; 127 int8_t tx_power_offset[101]; 128 uint16_t adj_pwr_tbl[84]; 129 uint16_t txcal_bbmult; 130 uint16_t txiqlocal_bestc[11]; 131 bool txiqlocal_coeffsvalid; 132 struct bwn_phy_n_txpwrindex txpwrindex[2]; 133 struct bwn_phy_n_pwr_ctl_info pwr_ctl_info[2]; 134 struct bwn_chanspec txiqlocal_chanspec; 135 struct bwn_ppr tx_pwr_max_ppr; 136 uint16_t tx_pwr_last_recalc_freq; 137 int tx_pwr_last_recalc_limit; 138 uint8_t tsspos_2g; 139 140 uint8_t txrx_chain; 141 uint16_t tx_rx_cal_phy_saveregs[11]; 142 uint16_t tx_rx_cal_radio_saveregs[22]; 143 144 uint16_t rfctrl_intc1_save; 145 uint16_t rfctrl_intc2_save; 146 147 uint16_t classifier_state; 148 uint16_t clip_state[2]; 149 150 enum b43_nphy_spur_avoid spur_avoid; 151 bool aband_spurwar_en; 152 bool gband_spurwar_en; 153 154 bool ipa2g_on; 155 struct bwn_chanspec iqcal_chanspec_2G; 156 struct bwn_chanspec rssical_chanspec_2G; 157 158 bool ipa5g_on; 159 struct bwn_chanspec iqcal_chanspec_5G; 160 struct bwn_chanspec rssical_chanspec_5G; 161 162 struct bwn_phy_n_rssical_cache rssical_cache; 163 struct bwn_phy_n_cal_cache cal_cache; 164 bool crsminpwr_adjusted; 165 bool noisevars_adjusted; 166 }; 167 168 extern bwn_txpwr_result_t bwn_nphy_op_recalc_txpower(struct bwn_mac *mac, bool ignore_tssi); 169 extern int bwn_nphy_op_allocate(struct bwn_mac *mac); 170 extern int bwn_nphy_op_prepare_structs(struct bwn_mac *mac); 171 extern void bwn_nphy_op_free(struct bwn_mac *mac); 172 extern int bwn_nphy_op_init(struct bwn_mac *mac); 173 extern void bwn_nphy_op_maskset(struct bwn_mac *mac, uint16_t reg, uint16_t mask, uint16_t set); 174 extern uint16_t bwn_nphy_op_radio_read(struct bwn_mac *mac, uint16_t reg); 175 extern void bwn_nphy_op_radio_write(struct bwn_mac *mac, uint16_t reg, uint16_t value); 176 extern void bwn_nphy_op_software_rfkill(struct bwn_mac *mac, bool blocked); 177 extern void bwn_nphy_op_switch_analog(struct bwn_mac *mac, bool on); 178 extern int bwn_nphy_op_switch_channel(struct bwn_mac *mac, unsigned int new_channel); 179 extern unsigned int bwn_nphy_op_get_default_chan(struct bwn_mac *mac); 180 181 #endif /* __IF_BWN_PHY_N_CORE_H__ */ 182