1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright (c) 2024, Intel Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the Intel Corporation nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /**
33 * @file ice_lib.h
34 * @brief header for generic device and sysctl functions
35 *
36 * Contains definitions and function declarations for the ice_lib.c file. It
37 * does not depend on the iflib networking stack.
38 */
39
40 #ifndef _ICE_LIB_H_
41 #define _ICE_LIB_H_
42
43 /* include kernel options first */
44 #include "ice_opts.h"
45
46 #include <sys/types.h>
47 #include <sys/bus.h>
48 #include <sys/rman.h>
49 #include <sys/socket.h>
50 #include <sys/sbuf.h>
51 #include <sys/sysctl.h>
52 #include <sys/syslog.h>
53 #include <sys/module.h>
54 #include <sys/proc.h>
55
56 #include <net/if.h>
57 #include <net/if_var.h>
58 #include <net/if_media.h>
59 #include <net/ethernet.h>
60 #include <net/if_types.h>
61
62 #include <sys/bitstring.h>
63
64 #include "ice_dcb.h"
65 #include "ice_type.h"
66 #include "ice_common.h"
67 #include "ice_flow.h"
68 #include "ice_sched.h"
69 #include "ice_resmgr.h"
70
71 #include "ice_rdma_internal.h"
72
73 #include "ice_rss.h"
74
75 enum ice_mdd_source_bits {
76 ICE_MDD_TX_PQM = BIT(0),
77 ICE_MDD_TX_TCLAN = BIT(1),
78 ICE_MDD_TX_TDPU = BIT(2),
79 ICE_MDD_RX = BIT(3),
80 };
81
82 /* Hide debug sysctls unless INVARIANTS is enabled */
83 #ifdef INVARIANTS
84 #define ICE_CTLFLAG_DEBUG 0
85 #else
86 #define ICE_CTLFLAG_DEBUG CTLFLAG_SKIP
87 #endif
88
89 /**
90 * for_each_set_bit - For loop over each set bit in a bit string
91 * @bit: storage for the bit index
92 * @data: address of data block to loop over
93 * @nbits: maximum number of bits to loop over
94 *
95 * macro to create a for loop over a bit string, which runs the body once for
96 * each bit that is set in the string. The bit variable will be set to the
97 * index of each set bit in the string, with zero representing the first bit.
98 */
99 #define for_each_set_bit(bit, data, nbits) \
100 for (bit_ffs((bitstr_t *)(data), (nbits), &(bit)); \
101 (bit) != -1; \
102 bit_ffs_at((bitstr_t *)(data), (bit) + 1, (nbits), &(bit)))
103
104 /**
105 * @var broadcastaddr
106 * @brief broadcast MAC address
107 *
108 * constant defining the broadcast MAC address, used for programming the
109 * broadcast address as a MAC filter for the PF VSI.
110 */
111 static const u8 broadcastaddr[ETHER_ADDR_LEN] = {
112 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
113 };
114
115 MALLOC_DECLARE(M_ICE);
116
117 extern const char ice_driver_version[];
118 extern const uint8_t ice_major_version;
119 extern const uint8_t ice_minor_version;
120 extern const uint8_t ice_patch_version;
121 extern const uint8_t ice_rc_version;
122
123 /* global sysctl indicating whether the Tx FC filter should be enabled */
124 extern bool ice_enable_tx_fc_filter;
125
126 /* global sysctl indicating whether the Tx LLDP filter should be enabled */
127 extern bool ice_enable_tx_lldp_filter;
128
129 /* global sysctl indicating whether FW health status events should be enabled */
130 extern bool ice_enable_health_events;
131
132 #ifdef PCI_IOV
133 /* reconstruct and release a VF automatically after an MDD reset */
134 extern bool ice_mdd_auto_reset_vf;
135 #endif
136
137 /* global sysctl indicating whether to enable 5-layer scheduler topology */
138 extern bool ice_tx_balance_en;
139
140 /**
141 * @struct ice_bar_info
142 * @brief PCI BAR mapping information
143 *
144 * Contains data about a PCI BAR that the driver has mapped for use.
145 */
146 struct ice_bar_info {
147 struct resource *res;
148 bus_space_tag_t tag;
149 bus_space_handle_t handle;
150 bus_size_t size;
151 int rid;
152 };
153
154 /* Alignment for queues */
155 #define DBA_ALIGN 128
156
157 /* Maximum TSO size is (256K)-1 */
158 #define ICE_TSO_SIZE ((256*1024) - 1)
159
160 /* Minimum size for TSO MSS */
161 #define ICE_MIN_TSO_MSS 64
162
163 #define ICE_MAX_TX_SEGS 8
164 #define ICE_MAX_TSO_SEGS 128
165
166 #define ICE_MAX_DMA_SEG_SIZE ((16*1024) - 1)
167
168 #define ICE_MAX_RX_SEGS 5
169
170 #define ICE_MAX_TSO_HDR_SEGS 3
171
172 #define ICE_MSIX_BAR 3
173 #define ICE_MAX_MSIX_VECTORS (GLINT_DYN_CTL_MAX_INDEX + 1)
174
175 #define ICE_DEFAULT_DESC_COUNT 1024
176 #define ICE_MAX_DESC_COUNT 8160
177 #define ICE_MIN_DESC_COUNT 64
178 #define ICE_DESC_COUNT_INCR 32
179
180 /* List of hardware offloads we support */
181 #define ICE_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_TCP | CSUM_IP_UDP | CSUM_IP_SCTP | \
182 CSUM_IP6_TCP| CSUM_IP6_UDP | CSUM_IP6_SCTP | \
183 CSUM_IP_TSO | CSUM_IP6_TSO)
184
185 /* Macros to decide what kind of hardware offload to enable */
186 #define ICE_CSUM_TCP (CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP)
187 #define ICE_CSUM_UDP (CSUM_IP_UDP|CSUM_IP6_UDP)
188 #define ICE_CSUM_SCTP (CSUM_IP_SCTP|CSUM_IP6_SCTP)
189 #define ICE_CSUM_IP (CSUM_IP|CSUM_IP_TSO)
190
191 /* List of known RX CSUM offload flags */
192 #define ICE_RX_CSUM_FLAGS (CSUM_L3_CALC | CSUM_L3_VALID | CSUM_L4_CALC | \
193 CSUM_L4_VALID | CSUM_L5_CALC | CSUM_L5_VALID | \
194 CSUM_COALESCED)
195
196 /* List of interface capabilities supported by ice hardware */
197 #define ICE_FULL_CAPS \
198 (IFCAP_TSO4 | IFCAP_TSO6 | \
199 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \
200 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \
201 IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \
202 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \
203 IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO)
204
205 /* Safe mode disables support for hardware checksums and TSO */
206 #define ICE_SAFE_CAPS \
207 (ICE_FULL_CAPS & ~(IFCAP_HWCSUM | IFCAP_TSO | \
208 IFCAP_VLAN_HWTSO | IFCAP_VLAN_HWCSUM))
209
210 #define ICE_CAPS(sc) \
211 (ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS)
212
213 /**
214 * ICE_NVM_ACCESS
215 * @brief Private ioctl command number for NVM access ioctls
216 *
217 * The ioctl command number used by NVM update for accessing the driver for
218 * NVM access commands.
219 */
220 #define ICE_NVM_ACCESS \
221 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5)
222
223 /**
224 * ICE_DEBUG_DUMP
225 * @brief Private ioctl command number for retrieving debug dump data
226 *
227 * The ioctl command number used by a userspace tool for accessing the driver for
228 * getting debug dump data from the firmware.
229 */
230 #define ICE_DEBUG_DUMP \
231 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 6)
232
233 #define ICE_AQ_LEN 1023
234 #define ICE_MBXQ_LEN 512
235 #define ICE_SBQ_LEN 512
236
237 #define ICE_CTRLQ_WORK_LIMIT 256
238
239 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
240
241 /* wait up to 50 microseconds for queue state change */
242 #define ICE_Q_WAIT_RETRY_LIMIT 5
243
244 #define ICE_UP_TABLE_TRANSLATE(val, i) \
245 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
246 ICE_AQ_VSI_UP_TABLE_UP##i##_M)
247
248 /*
249 * For now, set this to the hardware maximum. Each function gets a smaller
250 * number assigned to it in hw->func_caps.guar_num_vsi, though there
251 * appears to be no guarantee that is the maximum number that a function
252 * can use.
253 */
254 #define ICE_MAX_VSI_AVAILABLE 768
255
256 /* Maximum size of a single frame (for Tx and Rx) */
257 #define ICE_MAX_FRAME_SIZE ICE_AQ_SET_MAC_FRAME_SIZE_MAX
258
259 /* Maximum MTU size */
260 #define ICE_MAX_MTU (ICE_MAX_FRAME_SIZE - \
261 ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN)
262
263 /*
264 * Hardware requires that TSO packets have an segment size of at least 64
265 * bytes. To avoid sending bad frames to the hardware, the driver forces the
266 * MSS for all TSO packets to have a segment size of at least 64 bytes.
267 *
268 * However, if the MTU is reduced below a certain size, then the resulting
269 * larger MSS can result in transmitting segmented frames with a packet size
270 * larger than the MTU.
271 *
272 * Avoid this by preventing the MTU from being lowered below this limit.
273 * Alternative solutions require changing the TCP stack to disable offloading
274 * the segmentation when the requested segment size goes below 64 bytes.
275 */
276 #define ICE_MIN_MTU 112
277
278 /*
279 * The default number of queues reserved for a VF is 4, according to the
280 * AVF Base Mode specification.
281 */
282 #define ICE_DEFAULT_VF_QUEUES 4
283
284 /*
285 * An invalid VSI number to indicate that mirroring should be disabled.
286 */
287 #define ICE_INVALID_MIRROR_VSI ((u16)-1)
288 /*
289 * The maximum number of RX queues allowed per TC in a VSI.
290 */
291 #define ICE_MAX_RXQS_PER_TC 256
292
293 /*
294 * There are three settings that can be updated independently or
295 * altogether: Link speed, FEC, and Flow Control. These macros allow
296 * the caller to specify which setting(s) to update.
297 */
298 #define ICE_APPLY_LS BIT(0)
299 #define ICE_APPLY_FEC BIT(1)
300 #define ICE_APPLY_FC BIT(2)
301 #define ICE_APPLY_LS_FEC (ICE_APPLY_LS | ICE_APPLY_FEC)
302 #define ICE_APPLY_LS_FC (ICE_APPLY_LS | ICE_APPLY_FC)
303 #define ICE_APPLY_FEC_FC (ICE_APPLY_FEC | ICE_APPLY_FC)
304 #define ICE_APPLY_LS_FEC_FC (ICE_APPLY_LS_FEC | ICE_APPLY_FC)
305
306 /*
307 * Mask of valid flags that can be used as an input for the
308 * advertise_speed sysctl.
309 */
310 #define ICE_SYSCTL_SPEEDS_VALID_RANGE 0xFFF
311
312 /**
313 * @enum ice_dyn_idx_t
314 * @brief Dynamic Control ITR indexes
315 *
316 * This enum matches hardware bits and is meant to be used by DYN_CTLN
317 * registers and QINT registers or more generally anywhere in the manual
318 * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any
319 * register but instead is a special value meaning "don't update" ITR0/1/2.
320 */
321 enum ice_dyn_idx_t {
322 ICE_IDX_ITR0 = 0,
323 ICE_IDX_ITR1 = 1,
324 ICE_IDX_ITR2 = 2,
325 ICE_ITR_NONE = 3 /* ITR_NONE must not be used as an index */
326 };
327
328 /* By convention ITR0 is used for RX, and ITR1 is used for TX */
329 #define ICE_RX_ITR ICE_IDX_ITR0
330 #define ICE_TX_ITR ICE_IDX_ITR1
331
332 #define ICE_ITR_MAX 8160
333
334 /* Define the default Tx and Rx ITR as 50us (translates to ~20k int/sec max) */
335 #define ICE_DFLT_TX_ITR 50
336 #define ICE_DFLT_RX_ITR 50
337
338 /* RS FEC register values */
339 #define ICE_RS_FEC_REG_SHIFT 2
340 #define ICE_RS_FEC_RECV_ID_SHIFT 4
341 #define ICE_RS_FEC_CORR_LOW_REG_PORT0 (0x02 << ICE_RS_FEC_REG_SHIFT)
342 #define ICE_RS_FEC_CORR_HIGH_REG_PORT0 (0x03 << ICE_RS_FEC_REG_SHIFT)
343 #define ICE_RS_FEC_UNCORR_LOW_REG_PORT0 (0x04 << ICE_RS_FEC_REG_SHIFT)
344 #define ICE_RS_FEC_UNCORR_HIGH_REG_PORT0 (0x05 << ICE_RS_FEC_REG_SHIFT)
345 #define ICE_RS_FEC_CORR_LOW_REG_PORT1 (0x42 << ICE_RS_FEC_REG_SHIFT)
346 #define ICE_RS_FEC_CORR_HIGH_REG_PORT1 (0x43 << ICE_RS_FEC_REG_SHIFT)
347 #define ICE_RS_FEC_UNCORR_LOW_REG_PORT1 (0x44 << ICE_RS_FEC_REG_SHIFT)
348 #define ICE_RS_FEC_UNCORR_HIGH_REG_PORT1 (0x45 << ICE_RS_FEC_REG_SHIFT)
349 #define ICE_RS_FEC_CORR_LOW_REG_PORT2 (0x4A << ICE_RS_FEC_REG_SHIFT)
350 #define ICE_RS_FEC_CORR_HIGH_REG_PORT2 (0x4B << ICE_RS_FEC_REG_SHIFT)
351 #define ICE_RS_FEC_UNCORR_LOW_REG_PORT2 (0x4C << ICE_RS_FEC_REG_SHIFT)
352 #define ICE_RS_FEC_UNCORR_HIGH_REG_PORT2 (0x4D << ICE_RS_FEC_REG_SHIFT)
353 #define ICE_RS_FEC_CORR_LOW_REG_PORT3 (0x52 << ICE_RS_FEC_REG_SHIFT)
354 #define ICE_RS_FEC_CORR_HIGH_REG_PORT3 (0x53 << ICE_RS_FEC_REG_SHIFT)
355 #define ICE_RS_FEC_UNCORR_LOW_REG_PORT3 (0x54 << ICE_RS_FEC_REG_SHIFT)
356 #define ICE_RS_FEC_UNCORR_HIGH_REG_PORT3 (0x55 << ICE_RS_FEC_REG_SHIFT)
357 #define ICE_RS_FEC_RECEIVER_ID_PCS0 (0x33 << ICE_RS_FEC_RECV_ID_SHIFT)
358 #define ICE_RS_FEC_RECEIVER_ID_PCS1 (0x34 << ICE_RS_FEC_RECV_ID_SHIFT)
359
360 /**
361 * ice_itr_to_reg - Convert an ITR setting into its register equivalent
362 * @hw: The device HW structure
363 * @itr_setting: the ITR setting to convert
364 *
365 * Based on the hardware ITR granularity, convert an ITR setting into the
366 * correct value to prepare programming to the HW.
367 */
ice_itr_to_reg(struct ice_hw * hw,u16 itr_setting)368 static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting)
369 {
370 return itr_setting / hw->itr_gran;
371 }
372
373 /**
374 * @enum ice_rx_dtype
375 * @brief DTYPE header split options
376 *
377 * This enum matches the Rx context bits to define whether header split is
378 * enabled or not.
379 */
380 enum ice_rx_dtype {
381 ICE_RX_DTYPE_NO_SPLIT = 0,
382 ICE_RX_DTYPE_HEADER_SPLIT = 1,
383 ICE_RX_DTYPE_SPLIT_ALWAYS = 2,
384 };
385
386 /* Strings used for displaying FEC mode
387 *
388 * Use ice_fec_str() to get these unless these need to be embedded in a
389 * string constant.
390 */
391 #define ICE_FEC_STRING_AUTO "Auto"
392 #define ICE_FEC_STRING_RS "RS-FEC"
393 #define ICE_FEC_STRING_BASER "FC-FEC/BASE-R"
394 #define ICE_FEC_STRING_NONE "None"
395 #define ICE_FEC_STRING_DIS_AUTO "Auto (w/ No-FEC)"
396
397 /* Strings used for displaying Flow Control mode
398 *
399 * Use ice_fc_str() to get these unless these need to be embedded in a
400 * string constant.
401 */
402 #define ICE_FC_STRING_FULL "Full"
403 #define ICE_FC_STRING_TX "Tx"
404 #define ICE_FC_STRING_RX "Rx"
405 #define ICE_FC_STRING_NONE "None"
406
407 /*
408 * The number of times the ice_handle_i2c_req function will retry reading
409 * I2C data via the Admin Queue before returning EBUSY.
410 */
411 #define ICE_I2C_MAX_RETRIES 10
412
413 /*
414 * The Get Link Status AQ command and other link commands can return
415 * EAGAIN, indicating that the FW Link Management engine is busy.
416 * Define the number of times that the driver should retry sending these
417 * commands and the amount of time it should wait between those retries
418 * (in milliseconds) here.
419 */
420 #define ICE_LINK_AQ_MAX_RETRIES 10
421 #define ICE_LINK_RETRY_DELAY 17
422
423 /*
424 * The Start LLDP Agent AQ command will fail if it's sent too soon after
425 * the LLDP agent is stopped. The period between the stop and start
426 * commands must currently be at least 2 seconds.
427 */
428 #define ICE_START_LLDP_RETRY_WAIT (2 * hz)
429
430 /*
431 * Only certain clusters are valid for certain devices for the FW debug dump
432 * functionality, so define masks of those here.
433 */
434 #define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK_E810 0x4001AF
435 #define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK_E830 0x1AF
436
437 struct ice_softc;
438
439 /**
440 * @enum ice_rx_cso_stat
441 * @brief software checksum offload statistics
442 *
443 * Enumeration of possible checksum offload statistics captured by software
444 * during the Rx path.
445 */
446 enum ice_rx_cso_stat {
447 ICE_CSO_STAT_RX_IP4_ERR,
448 ICE_CSO_STAT_RX_IP6_ERR,
449 ICE_CSO_STAT_RX_L3_ERR,
450 ICE_CSO_STAT_RX_TCP_ERR,
451 ICE_CSO_STAT_RX_UDP_ERR,
452 ICE_CSO_STAT_RX_SCTP_ERR,
453 ICE_CSO_STAT_RX_L4_ERR,
454 ICE_CSO_STAT_RX_COUNT
455 };
456
457 /**
458 * @enum ice_tx_cso_stat
459 * @brief software checksum offload statistics
460 *
461 * Enumeration of possible checksum offload statistics captured by software
462 * during the Tx path.
463 */
464 enum ice_tx_cso_stat {
465 ICE_CSO_STAT_TX_TCP,
466 ICE_CSO_STAT_TX_UDP,
467 ICE_CSO_STAT_TX_SCTP,
468 ICE_CSO_STAT_TX_IP4,
469 ICE_CSO_STAT_TX_IP6,
470 ICE_CSO_STAT_TX_L3_ERR,
471 ICE_CSO_STAT_TX_L4_ERR,
472 ICE_CSO_STAT_TX_COUNT
473 };
474
475 /**
476 * @struct tx_stats
477 * @brief software Tx statistics
478 *
479 * Contains software counted Tx statistics for a single queue
480 */
481 struct tx_stats {
482 /* Soft Stats */
483 u64 tx_bytes;
484 u64 tx_packets;
485 u64 mss_too_small;
486 u64 tso;
487 u64 cso[ICE_CSO_STAT_TX_COUNT];
488 };
489
490 /**
491 * @struct rx_stats
492 * @brief software Rx statistics
493 *
494 * Contains software counted Rx statistics for a single queue
495 */
496 struct rx_stats {
497 /* Soft Stats */
498 u64 rx_packets;
499 u64 rx_bytes;
500 u64 desc_errs;
501 u64 cso[ICE_CSO_STAT_RX_COUNT];
502 };
503
504 /**
505 * @struct ice_vsi_hw_stats
506 * @brief hardware statistics for a VSI
507 *
508 * Stores statistics that are generated by hardware for a VSI.
509 */
510 struct ice_vsi_hw_stats {
511 struct ice_eth_stats prev;
512 struct ice_eth_stats cur;
513 bool offsets_loaded;
514 };
515
516 /**
517 * @struct ice_pf_hw_stats
518 * @brief hardware statistics for a PF
519 *
520 * Stores statistics that are generated by hardware for each PF.
521 */
522 struct ice_pf_hw_stats {
523 struct ice_hw_port_stats prev;
524 struct ice_hw_port_stats cur;
525 bool offsets_loaded;
526 };
527
528 /**
529 * @struct ice_pf_sw_stats
530 * @brief software statistics for a PF
531 *
532 * Contains software generated statistics relevant to a PF.
533 */
534 struct ice_pf_sw_stats {
535 /* # of reset events handled, by type */
536 u32 corer_count;
537 u32 globr_count;
538 u32 empr_count;
539 u32 pfr_count;
540
541 /* # of detected MDD events for Tx and Rx */
542 u32 tx_mdd_count;
543 u32 rx_mdd_count;
544
545 u64 rx_roc_error; /* port oversize packet stats, error_cnt \
546 from GLV_REPC VSI register + RxOversize */
547 };
548
549 /**
550 * @struct ice_tc_info
551 * @brief Traffic class information for a VSI
552 *
553 * Stores traffic class information used in configuring
554 * a VSI.
555 */
556 struct ice_tc_info {
557 u16 qoffset; /* Offset in VSI queue space */
558 u16 qcount_tx; /* TX queues for this Traffic Class */
559 u16 qcount_rx; /* RX queues */
560 };
561
562 /**
563 * @struct ice_vsi
564 * @brief VSI structure
565 *
566 * Contains data relevant to a single VSI
567 */
568 struct ice_vsi {
569 /* back pointer to the softc */
570 struct ice_softc *sc;
571
572 bool dynamic; /* if true, dynamically allocated */
573 bool hw_vsi_created; /* firmware owns a VSI for this handle */
574
575 enum ice_vsi_type type; /* type of this VSI */
576 u16 idx; /* software index to sc->all_vsi[] */
577
578 u16 *tx_qmap; /* Tx VSI to PF queue mapping */
579 u16 *rx_qmap; /* Rx VSI to PF queue mapping */
580
581 enum ice_resmgr_alloc_type qmap_type;
582
583 struct ice_tx_queue *tx_queues; /* Tx queue array */
584 struct ice_rx_queue *rx_queues; /* Rx queue array */
585
586 int num_tx_queues;
587 int num_rx_queues;
588 int num_vectors;
589
590 int16_t rx_itr;
591 int16_t tx_itr;
592
593 /* RSS configuration */
594 u16 rss_table_size; /* HW RSS table size */
595 u8 rss_lut_type; /* Used to configure Get/Set RSS LUT AQ call */
596
597 int max_frame_size;
598 u16 mbuf_sz;
599
600 struct ice_aqc_vsi_props info;
601
602 /* DCB configuration */
603 u8 num_tcs; /* Total number of enabled TCs */
604 u16 tc_map; /* bitmap of enabled Traffic Classes */
605 /* Information for each traffic class */
606 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
607
608 /* context for per-VSI sysctls */
609 struct sysctl_ctx_list ctx;
610 struct sysctl_oid *vsi_node;
611
612 /* context for per-txq sysctls */
613 struct sysctl_ctx_list txqs_ctx;
614 struct sysctl_oid *txqs_node;
615
616 /* context for per-rxq sysctls */
617 struct sysctl_ctx_list rxqs_ctx;
618 struct sysctl_oid *rxqs_node;
619
620 /* VSI-level stats */
621 struct ice_vsi_hw_stats hw_stats;
622
623 /* VSI mirroring details */
624 u16 mirror_src_vsi;
625 u16 rule_mir_ingress;
626 u16 rule_mir_egress;
627
628 #ifdef PCI_IOV
629 u8 vf_num; /* Index of owning VF, if applicable */
630 #endif
631 };
632
633 /**
634 * @struct ice_debug_dump_cmd
635 * @brief arguments/return value for debug dump ioctl
636 */
637 struct ice_debug_dump_cmd {
638 u32 offset; /* offset to read/write from table, in bytes */
639 u16 cluster_id; /* also used to get next cluster id */
640 u16 table_id;
641 u16 data_size; /* size of data field, in bytes */
642 u16 reserved1;
643 u32 reserved2;
644 u8 data[];
645 };
646
647 /**
648 * @struct ice_serdes_equalization
649 * @brief serdes equalization info
650 */
651 struct ice_serdes_equalization {
652 int rx_equalization_pre1;
653 int rx_equalization_pre2;
654 int rx_equalization_post1;
655 int rx_equalization_bflf;
656 int rx_equalization_bfhf;
657 int rx_equalization_drate;
658 int tx_equalization_pre1;
659 int tx_equalization_pre2;
660 int tx_equalization_pre3;
661 int tx_equalization_atten;
662 int tx_equalization_post1;
663 };
664
665 /**
666 * @struct ice_fec_stats_to_sysctl
667 * @brief FEC stats register value of port
668 */
669 struct ice_fec_stats_to_sysctl {
670 u16 fec_corr_cnt_low;
671 u16 fec_corr_cnt_high;
672 u16 fec_uncorr_cnt_low;
673 u16 fec_uncorr_cnt_high;
674 };
675
676 #define ICE_MAX_SERDES_LANE_COUNT 4
677
678 /**
679 * @struct ice_regdump_to_sysctl
680 * @brief PHY stats of port
681 */
682 struct ice_regdump_to_sysctl {
683 /* A multilane port can have max 4 serdes */
684 struct ice_serdes_equalization equalization[ICE_MAX_SERDES_LANE_COUNT];
685 struct ice_fec_stats_to_sysctl stats;
686 };
687
688 /**
689 * @struct ice_port_topology
690 * @brief Port topology from lport i.e. serdes mapping, pcsquad, macport, cage
691 */
692 struct ice_port_topology {
693 u16 pcs_port;
694 u16 primary_serdes_lane;
695 u16 serdes_lane_count;
696 u16 pcs_quad_select;
697 };
698
699 /**
700 * @enum ice_state
701 * @brief Driver state flags
702 *
703 * Used to indicate the status of various driver events. Intended to be
704 * modified only using atomic operations, so that we can use it even in places
705 * which aren't locked.
706 */
707 enum ice_state {
708 ICE_STATE_CONTROLQ_EVENT_PENDING,
709 ICE_STATE_VFLR_PENDING,
710 ICE_STATE_MDD_PENDING,
711 ICE_STATE_RDMA_PE_INTR_PENDING,
712 ICE_STATE_RESET_OICR_RECV,
713 ICE_STATE_RESET_PFR_REQ,
714 ICE_STATE_PREPARED_FOR_RESET,
715 ICE_STATE_SUBIF_NEEDS_REINIT,
716 ICE_STATE_RESET_FAILED,
717 ICE_STATE_DRIVER_INITIALIZED,
718 ICE_STATE_NO_MEDIA,
719 ICE_STATE_RECOVERY_MODE,
720 ICE_STATE_ROLLBACK_MODE,
721 ICE_STATE_LINK_STATUS_REPORTED,
722 ICE_STATE_ATTACHING,
723 ICE_STATE_DETACHING,
724 ICE_STATE_LINK_DEFAULT_OVERRIDE_PENDING,
725 ICE_STATE_LLDP_RX_FLTR_FROM_DRIVER,
726 ICE_STATE_MULTIPLE_TCS,
727 ICE_STATE_DO_FW_DEBUG_DUMP,
728 ICE_STATE_LINK_ACTIVE_ON_DOWN,
729 ICE_STATE_TOTAL_PORT_SHUTDOWN,
730 ICE_STATE_FIRST_INIT_LINK,
731 ICE_STATE_DO_CREATE_MIRR_INTFC,
732 ICE_STATE_DO_DESTROY_MIRR_INTFC,
733 ICE_STATE_PHY_FW_INIT_PENDING,
734 /* This entry must be last */
735 ICE_STATE_LAST,
736 };
737
738 /* Functions for setting and checking driver state. Note the functions take
739 * bit positions, not bitmasks. The atomic_testandset_32 and
740 * atomic_testandclear_32 operations require bit positions, while the
741 * atomic_set_32 and atomic_clear_32 require bitmasks. This can easily lead to
742 * programming error, so we provide wrapper functions to avoid this.
743 */
744
745 /**
746 * ice_set_state - Set the specified state
747 * @s: the state bitmap
748 * @bit: the state to set
749 *
750 * Atomically update the state bitmap with the specified bit set.
751 */
752 static inline void
ice_set_state(volatile u32 * s,enum ice_state bit)753 ice_set_state(volatile u32 *s, enum ice_state bit)
754 {
755 /* atomic_set_32 expects a bitmask */
756 atomic_set_32(s, BIT(bit));
757 }
758
759 /**
760 * ice_clear_state - Clear the specified state
761 * @s: the state bitmap
762 * @bit: the state to clear
763 *
764 * Atomically update the state bitmap with the specified bit cleared.
765 */
766 static inline void
ice_clear_state(volatile u32 * s,enum ice_state bit)767 ice_clear_state(volatile u32 *s, enum ice_state bit)
768 {
769 /* atomic_clear_32 expects a bitmask */
770 atomic_clear_32(s, BIT(bit));
771 }
772
773 /**
774 * ice_testandset_state - Test and set the specified state
775 * @s: the state bitmap
776 * @bit: the bit to test
777 *
778 * Atomically update the state bitmap, setting the specified bit. Returns the
779 * previous value of the bit.
780 */
781 static inline u32
ice_testandset_state(volatile u32 * s,enum ice_state bit)782 ice_testandset_state(volatile u32 *s, enum ice_state bit)
783 {
784 /* atomic_testandset_32 expects a bit position */
785 return atomic_testandset_32(s, bit);
786 }
787
788 /**
789 * ice_testandclear_state - Test and clear the specified state
790 * @s: the state bitmap
791 * @bit: the bit to test
792 *
793 * Atomically update the state bitmap, clearing the specified bit. Returns the
794 * previous value of the bit.
795 */
796 static inline u32
ice_testandclear_state(volatile u32 * s,enum ice_state bit)797 ice_testandclear_state(volatile u32 *s, enum ice_state bit)
798 {
799 /* atomic_testandclear_32 expects a bit position */
800 return atomic_testandclear_32(s, bit);
801 }
802
803 /**
804 * ice_test_state - Test the specified state
805 * @s: the state bitmap
806 * @bit: the bit to test
807 *
808 * Return true if the state is set, false otherwise. Use this only if the flow
809 * does not need to update the state. If you must update the state as well,
810 * prefer ice_testandset_state or ice_testandclear_state.
811 */
812 static inline u32
ice_test_state(volatile u32 * s,enum ice_state bit)813 ice_test_state(volatile u32 *s, enum ice_state bit)
814 {
815 return (*s & BIT(bit)) ? true : false;
816 }
817
818 /**
819 * @struct ice_str_buf
820 * @brief static length buffer for string returning
821 *
822 * Structure containing a fixed size string buffer, used to implement
823 * numeric->string conversion functions that may want to return non-constant
824 * strings.
825 *
826 * This allows returning a fixed size string that is generated by a conversion
827 * function, and then copied to the used location without needing to use an
828 * explicit local variable passed by reference.
829 */
830 struct ice_str_buf {
831 char str[ICE_STR_BUF_LEN];
832 };
833
834 struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err);
835 struct ice_str_buf _ice_status_str(int status);
836 struct ice_str_buf _ice_err_str(int err);
837 struct ice_str_buf _ice_fltr_flag_str(u16 flag);
838 struct ice_str_buf _ice_log_sev_str(u8 log_level);
839 struct ice_str_buf _ice_mdd_tx_tclan_str(u8 event);
840 struct ice_str_buf _ice_mdd_tx_pqm_str(u8 event);
841 struct ice_str_buf _ice_mdd_rx_str(u8 event);
842 struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status);
843
844 #define ice_aq_str(err) _ice_aq_str(err).str
845 #define ice_status_str(err) _ice_status_str(err).str
846 #define ice_err_str(err) _ice_err_str(err).str
847 #define ice_fltr_flag_str(flag) _ice_fltr_flag_str(flag).str
848
849 #define ice_mdd_tx_tclan_str(event) _ice_mdd_tx_tclan_str(event).str
850 #define ice_mdd_tx_pqm_str(event) _ice_mdd_tx_pqm_str(event).str
851 #define ice_mdd_rx_str(event) _ice_mdd_rx_str(event).str
852
853 #define ice_log_sev_str(log_level) _ice_log_sev_str(log_level).str
854 #define ice_fw_lldp_status(lldp_status) _ice_fw_lldp_status(lldp_status).str
855
856 /**
857 * ice_enable_intr - Enable interrupts for given vector
858 * @hw: the device private HW structure
859 * @vector: the interrupt index in PF space
860 *
861 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index.
862 */
863 static inline void
ice_enable_intr(struct ice_hw * hw,int vector)864 ice_enable_intr(struct ice_hw *hw, int vector)
865 {
866 u32 dyn_ctl;
867
868 /* Use ITR_NONE so that ITR configuration is not changed. */
869 dyn_ctl = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
870 (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S);
871 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl);
872 }
873
874 /**
875 * ice_disable_intr - Disable interrupts for given vector
876 * @hw: the device private HW structure
877 * @vector: the interrupt index in PF space
878 *
879 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index.
880 */
881 static inline void
ice_disable_intr(struct ice_hw * hw,int vector)882 ice_disable_intr(struct ice_hw *hw, int vector)
883 {
884 u32 dyn_ctl;
885
886 /* Use ITR_NONE so that ITR configuration is not changed. */
887 dyn_ctl = ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S;
888 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl);
889 }
890
891 /**
892 * ice_is_tx_desc_done - determine if a Tx descriptor is done
893 * @txd: the Tx descriptor to check
894 *
895 * Returns true if hardware is done with a Tx descriptor and software is
896 * capable of re-using it.
897 */
898 static inline bool
ice_is_tx_desc_done(struct ice_tx_desc * txd)899 ice_is_tx_desc_done(struct ice_tx_desc *txd)
900 {
901 return (((txd->cmd_type_offset_bsz & ICE_TXD_QW1_DTYPE_M)
902 >> ICE_TXD_QW1_DTYPE_S) == ICE_TX_DESC_DTYPE_DESC_DONE);
903 }
904
905 /**
906 * ice_get_pf_id - Get the PF id from the hardware registers
907 * @hw: the ice hardware structure
908 *
909 * Reads the PF_FUNC_RID register and extracts the function number from it.
910 * Intended to be used in cases where hw->pf_id hasn't yet been assigned by
911 * ice_init_hw.
912 *
913 * @pre this function should be called only after PCI register access has been
914 * setup, and prior to ice_init_hw. After hardware has been initialized, the
915 * cached hw->pf_id value can be used.
916 */
917 static inline u8
ice_get_pf_id(struct ice_hw * hw)918 ice_get_pf_id(struct ice_hw *hw)
919 {
920 return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >>
921 PF_FUNC_RID_FUNCTION_NUMBER_S);
922 }
923
924 /* Details of how to re-initialize depend on the networking stack */
925 void ice_request_stack_reinit(struct ice_softc *sc);
926
927 /* Details of how to check if the network stack is detaching us */
928 bool ice_driver_is_detaching(struct ice_softc *sc);
929
930 /* Details of how to setup/teardown a mirror interface */
931 /**
932 * @brief Create an interface for mirroring
933 */
934 int ice_create_mirror_interface(struct ice_softc *sc);
935 /**
936 * @brief Destroy created mirroring interface
937 */
938 void ice_destroy_mirror_interface(struct ice_softc *sc);
939
940 const char * ice_fw_module_str(enum ice_aqc_fw_logging_mod module);
941 void ice_add_fw_logging_tunables(struct ice_softc *sc,
942 struct sysctl_oid *parent);
943 void ice_handle_fw_log_event(struct ice_softc *sc, struct ice_aq_desc *desc,
944 void *buf);
945
946 int ice_process_ctrlq(struct ice_softc *sc, enum ice_ctl_q q_type, u16 *pending);
947 int ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num);
948 void ice_free_bar(device_t dev, struct ice_bar_info *bar);
949 void ice_set_ctrlq_len(struct ice_hw *hw);
950 void ice_release_vsi(struct ice_vsi *vsi);
951 void ice_release_vsi_resources(struct ice_vsi *vsi);
952 struct ice_vsi *ice_alloc_vsi(struct ice_softc *sc, enum ice_vsi_type type);
953 void ice_alloc_vsi_qmap(struct ice_vsi *vsi, const int max_tx_queues,
954 const int max_rx_queues);
955 void ice_free_vsi_qmaps(struct ice_vsi *vsi);
956 int ice_initialize_vsi(struct ice_vsi *vsi);
957 void ice_deinit_vsi(struct ice_vsi *vsi);
958 uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi);
959 int ice_get_phy_type_low(uint64_t phy_type_low);
960 int ice_get_phy_type_high(uint64_t phy_type_high);
961 int ice_add_media_types(struct ice_softc *sc, struct ifmedia *media);
962 void ice_configure_rxq_interrupt(struct ice_hw *hw, u16 rxqid, u16 vector, u8 itr_idx);
963 void ice_configure_all_rxq_interrupts(struct ice_vsi *vsi);
964 void ice_configure_txq_interrupt(struct ice_hw *hw, u16 txqid, u16 vector, u8 itr_idx);
965 void ice_configure_all_txq_interrupts(struct ice_vsi *vsi);
966 void ice_flush_rxq_interrupts(struct ice_vsi *vsi);
967 void ice_flush_txq_interrupts(struct ice_vsi *vsi);
968 int ice_cfg_vsi_for_tx(struct ice_vsi *vsi);
969 int ice_cfg_vsi_for_rx(struct ice_vsi *vsi);
970 int ice_control_rx_queue(struct ice_vsi *vsi, u16 qidx, bool enable);
971 int ice_control_all_rx_queues(struct ice_vsi *vsi, bool enable);
972 int ice_cfg_pf_default_mac_filters(struct ice_softc *sc);
973 int ice_rm_pf_default_mac_filters(struct ice_softc *sc);
974 void ice_print_nvm_version(struct ice_softc *sc);
975 void ice_update_vsi_hw_stats(struct ice_vsi *vsi);
976 void ice_reset_vsi_stats(struct ice_vsi *vsi);
977 void ice_update_pf_stats(struct ice_softc *sc);
978 void ice_reset_pf_stats(struct ice_softc *sc);
979 void ice_add_device_sysctls(struct ice_softc *sc);
980 void ice_log_hmc_error(struct ice_hw *hw, device_t dev);
981 void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx,
982 struct sysctl_oid *parent,
983 struct ice_eth_stats *stats);
984 void ice_add_vsi_sysctls(struct ice_vsi *vsi);
985 void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx,
986 struct sysctl_oid *parent,
987 struct ice_softc *sc);
988 void ice_configure_misc_interrupts(struct ice_softc *sc);
989 int ice_sync_multicast_filters(struct ice_softc *sc);
990 int ice_add_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid,
991 u16 length);
992 int ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
993 int ice_remove_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid,
994 u16 length);
995 int ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
996 void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent);
997 void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi);
998 void ice_add_device_tunables(struct ice_softc *sc);
999 int ice_add_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr);
1000 int ice_remove_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr);
1001 int ice_vsi_disable_tx(struct ice_vsi *vsi);
1002 void ice_vsi_add_txqs_ctx(struct ice_vsi *vsi);
1003 void ice_vsi_add_rxqs_ctx(struct ice_vsi *vsi);
1004 void ice_vsi_del_txqs_ctx(struct ice_vsi *vsi);
1005 void ice_vsi_del_rxqs_ctx(struct ice_vsi *vsi);
1006 void ice_add_txq_sysctls(struct ice_tx_queue *txq);
1007 void ice_add_rxq_sysctls(struct ice_rx_queue *rxq);
1008 int ice_config_rss(struct ice_vsi *vsi);
1009 void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc);
1010 int ice_load_pkg_file(struct ice_softc *sc);
1011 void ice_log_pkg_init(struct ice_softc *sc, enum ice_ddp_state pkg_status);
1012 uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter);
1013 void ice_save_pci_info(struct ice_hw *hw, device_t dev);
1014 int ice_replay_all_vsi_cfg(struct ice_softc *sc);
1015 void ice_link_up_msg(struct ice_softc *sc);
1016 int ice_update_laa_mac(struct ice_softc *sc);
1017 void ice_get_and_print_bus_info(struct ice_softc *sc);
1018 const char *ice_fec_str(enum ice_fec_mode mode);
1019 const char *ice_fc_str(enum ice_fc_mode mode);
1020 const char *ice_fwd_act_str(enum ice_sw_fwd_act_type action);
1021 const char *ice_state_to_str(enum ice_state state);
1022 int ice_init_link_events(struct ice_softc *sc);
1023 void ice_configure_rx_itr(struct ice_vsi *vsi);
1024 void ice_configure_tx_itr(struct ice_vsi *vsi);
1025 void ice_setup_pf_vsi(struct ice_softc *sc);
1026 void ice_handle_mdd_event(struct ice_softc *sc);
1027 void ice_init_dcb_setup(struct ice_softc *sc);
1028 int ice_send_version(struct ice_softc *sc);
1029 int ice_cfg_pf_ethertype_filters(struct ice_softc *sc);
1030 void ice_init_link_configuration(struct ice_softc *sc);
1031 void ice_init_saved_phy_cfg(struct ice_softc *sc);
1032 int ice_apply_saved_phy_cfg(struct ice_softc *sc, u8 settings);
1033 void ice_set_link_management_mode(struct ice_softc *sc);
1034 int ice_module_event_handler(module_t mod, int what, void *arg);
1035 int ice_handle_nvm_access_ioctl(struct ice_softc *sc, struct ifdrv *ifd);
1036 int ice_handle_i2c_req(struct ice_softc *sc, struct ifi2creq *req);
1037 int ice_read_sff_eeprom(struct ice_softc *sc, u16 dev_addr, u16 offset, u8* data, u16 length);
1038 int ice_alloc_intr_tracking(struct ice_softc *sc);
1039 void ice_free_intr_tracking(struct ice_softc *sc);
1040 void ice_set_default_local_lldp_mib(struct ice_softc *sc);
1041 void ice_set_link(struct ice_softc *sc, bool enabled);
1042 void ice_add_rx_lldp_filter(struct ice_softc *sc);
1043 void ice_init_health_events(struct ice_softc *sc);
1044 void ice_cfg_pba_num(struct ice_softc *sc);
1045 int ice_handle_debug_dump_ioctl(struct ice_softc *sc, struct ifdrv *ifd);
1046 u8 ice_dcb_get_tc_map(const struct ice_dcbx_cfg *dcbcfg);
1047 void ice_do_dcb_reconfig(struct ice_softc *sc, bool pending_mib);
1048 int ice_setup_vsi_mirroring(struct ice_vsi *vsi);
1049
1050 #endif /* _ICE_LIB_H_ */
1051