1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>.
5 * Copyright (C) 2018 The FreeBSD Foundation.
6 *
7 * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com>
8 * under sponsorship from the FreeBSD Foundation.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 /*
33 * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families.
34 *
35 * USB 3.1 to 10/100/1000 Mbps Ethernet
36 * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800
37 *
38 * USB 2.0 to 10/100/1000 Mbps Ethernet
39 * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850
40 *
41 * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub
42 * LAN7515 (no datasheet available, but probes and functions as LAN7800)
43 *
44 * This driver is based on the if_smsc driver, with lan78xx-specific
45 * functionality modelled on Microchip's Linux lan78xx driver.
46 *
47 * UNIMPLEMENTED FEATURES
48 * ------------------
49 * A number of features supported by the lan78xx are not yet implemented in
50 * this driver:
51 *
52 * - TX checksum offloading: Nothing has been implemented yet.
53 * - Direct address translation filtering: Implemented but untested.
54 * - VLAN tag removal.
55 * - Support for USB interrupt endpoints.
56 * - Latency Tolerance Messaging (LTM) support.
57 * - TCP LSO support.
58 *
59 */
60
61 #include <sys/param.h>
62 #include <sys/bus.h>
63 #include <sys/callout.h>
64 #include <sys/condvar.h>
65 #include <sys/kernel.h>
66 #include <sys/lock.h>
67 #include <sys/malloc.h>
68 #include <sys/module.h>
69 #include <sys/mutex.h>
70 #include <sys/priv.h>
71 #include <sys/queue.h>
72 #include <sys/random.h>
73 #include <sys/socket.h>
74 #include <sys/stddef.h>
75 #include <sys/stdint.h>
76 #include <sys/sx.h>
77 #include <sys/sysctl.h>
78 #include <sys/systm.h>
79 #include <sys/unistd.h>
80
81 #include <net/if.h>
82 #include <net/if_var.h>
83 #include <net/if_media.h>
84
85 #include <dev/mii/mii.h>
86 #include <dev/mii/miivar.h>
87
88 #include <netinet/in.h>
89 #include <netinet/ip.h>
90
91 #include "opt_platform.h"
92
93 #ifdef FDT
94 #include <dev/fdt/fdt_common.h>
95 #include <dev/ofw/ofw_bus.h>
96 #include <dev/ofw/ofw_bus_subr.h>
97 #include <dev/usb/usb_fdt_support.h>
98 #endif
99
100 #include <dev/usb/usb.h>
101 #include <dev/usb/usbdi.h>
102 #include <dev/usb/usbdi_util.h>
103 #include "usbdevs.h"
104
105 #define USB_DEBUG_VAR lan78xx_debug
106 #include <dev/usb/usb_debug.h>
107 #include <dev/usb/usb_process.h>
108
109 #include <dev/usb/net/usb_ethernet.h>
110
111 #include <dev/usb/net/if_mugereg.h>
112
113 #include "miibus_if.h"
114
115 #ifdef USB_DEBUG
116 static int muge_debug = 0;
117
118 SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
119 "Microchip LAN78xx USB-GigE");
120 SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0,
121 "Debug level");
122 #endif
123
124 #define MUGE_DEFAULT_TX_CSUM_ENABLE (false)
125 #define MUGE_DEFAULT_TSO_ENABLE (false)
126
127 /* Supported Vendor and Product IDs. */
128 static const struct usb_device_id lan78xx_devs[] = {
129 #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
130 MUGE_DEV(LAN7800_ETH, 0),
131 MUGE_DEV(LAN7801_ETH, 0),
132 MUGE_DEV(LAN7850_ETH, 0),
133 #undef MUGE_DEV
134 };
135
136 #ifdef USB_DEBUG
137 #define muge_dbg_printf(sc, fmt, args...) \
138 do { \
139 if (muge_debug > 0) \
140 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
141 } while(0)
142 #else
143 #define muge_dbg_printf(sc, fmt, args...) do { } while (0)
144 #endif
145
146 #define muge_warn_printf(sc, fmt, args...) \
147 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
148
149 #define muge_err_printf(sc, fmt, args...) \
150 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
151
152 #define ETHER_IS_VALID(addr) \
153 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
154
155 /* USB endpoints. */
156
157 enum {
158 MUGE_BULK_DT_RD,
159 MUGE_BULK_DT_WR,
160 #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */
161 MUGE_INTR_DT_WR,
162 MUGE_INTR_DT_RD,
163 #endif
164 MUGE_N_TRANSFER,
165 };
166
167 struct muge_softc {
168 struct usb_ether sc_ue;
169 struct mtx sc_mtx;
170 struct usb_xfer *sc_xfer[MUGE_N_TRANSFER];
171 int sc_phyno;
172 uint32_t sc_leds;
173 uint16_t sc_led_modes;
174 uint16_t sc_led_modes_mask;
175
176 /* Settings for the mac control (MAC_CSR) register. */
177 uint32_t sc_rfe_ctl;
178 uint32_t sc_mdix_ctl;
179 uint16_t chipid;
180 uint16_t chiprev;
181 uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN];
182 uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2];
183
184 uint32_t sc_flags;
185 #define MUGE_FLAG_LINK 0x0001
186 #define MUGE_FLAG_INIT_DONE 0x0002
187 };
188
189 #define MUGE_IFACE_IDX 0
190
191 #define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
192 #define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
193 #define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t)
194
195 static device_probe_t muge_probe;
196 static device_attach_t muge_attach;
197 static device_detach_t muge_detach;
198
199 static usb_callback_t muge_bulk_read_callback;
200 static usb_callback_t muge_bulk_write_callback;
201
202 static miibus_readreg_t lan78xx_miibus_readreg;
203 static miibus_writereg_t lan78xx_miibus_writereg;
204 static miibus_statchg_t lan78xx_miibus_statchg;
205
206 static int muge_attach_post_sub(struct usb_ether *ue);
207 static uether_fn_t muge_attach_post;
208 static uether_fn_t muge_init;
209 static uether_fn_t muge_stop;
210 static uether_fn_t muge_start;
211 static uether_fn_t muge_tick;
212 static uether_fn_t muge_setmulti;
213 static uether_fn_t muge_setpromisc;
214
215 static int muge_ifmedia_upd(if_t);
216 static void muge_ifmedia_sts(if_t, struct ifmediareq *);
217
218 static int lan78xx_chip_init(struct muge_softc *sc);
219 static int muge_ioctl(if_t ifp, u_long cmd, caddr_t data);
220
221 static const struct usb_config muge_config[MUGE_N_TRANSFER] = {
222 [MUGE_BULK_DT_WR] = {
223 .type = UE_BULK,
224 .endpoint = UE_ADDR_ANY,
225 .direction = UE_DIR_OUT,
226 .frames = 16,
227 .bufsize = 16 * (MCLBYTES + 16),
228 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
229 .callback = muge_bulk_write_callback,
230 .timeout = 10000, /* 10 seconds */
231 },
232
233 [MUGE_BULK_DT_RD] = {
234 .type = UE_BULK,
235 .endpoint = UE_ADDR_ANY,
236 .direction = UE_DIR_IN,
237 .bufsize = 20480, /* bytes */
238 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
239 .callback = muge_bulk_read_callback,
240 .timeout = 0, /* no timeout */
241 },
242 /*
243 * The chip supports interrupt endpoints, however they aren't
244 * needed as we poll on the MII status.
245 */
246 };
247
248 static const struct usb_ether_methods muge_ue_methods = {
249 .ue_attach_post = muge_attach_post,
250 .ue_attach_post_sub = muge_attach_post_sub,
251 .ue_start = muge_start,
252 .ue_ioctl = muge_ioctl,
253 .ue_init = muge_init,
254 .ue_stop = muge_stop,
255 .ue_tick = muge_tick,
256 .ue_setmulti = muge_setmulti,
257 .ue_setpromisc = muge_setpromisc,
258 .ue_mii_upd = muge_ifmedia_upd,
259 .ue_mii_sts = muge_ifmedia_sts,
260 };
261
262 /**
263 * lan78xx_read_reg - Read a 32-bit register on the device
264 * @sc: driver soft context
265 * @off: offset of the register
266 * @data: pointer a value that will be populated with the register value
267 *
268 * LOCKING:
269 * The device lock must be held before calling this function.
270 *
271 * RETURNS:
272 * 0 on success, a USB_ERR_?? error code on failure.
273 */
274 static int
lan78xx_read_reg(struct muge_softc * sc,uint32_t off,uint32_t * data)275 lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data)
276 {
277 struct usb_device_request req;
278 uint32_t buf;
279 usb_error_t err;
280
281 MUGE_LOCK_ASSERT(sc, MA_OWNED);
282
283 req.bmRequestType = UT_READ_VENDOR_DEVICE;
284 req.bRequest = UVR_READ_REG;
285 USETW(req.wValue, 0);
286 USETW(req.wIndex, off);
287 USETW(req.wLength, 4);
288
289 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
290 if (err != 0)
291 muge_warn_printf(sc, "Failed to read register 0x%0x\n", off);
292 *data = le32toh(buf);
293 return (err);
294 }
295
296 /**
297 * lan78xx_write_reg - Write a 32-bit register on the device
298 * @sc: driver soft context
299 * @off: offset of the register
300 * @data: the 32-bit value to write into the register
301 *
302 * LOCKING:
303 * The device lock must be held before calling this function.
304 *
305 * RETURNS:
306 * 0 on success, a USB_ERR_?? error code on failure.
307 */
308 static int
lan78xx_write_reg(struct muge_softc * sc,uint32_t off,uint32_t data)309 lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data)
310 {
311 struct usb_device_request req;
312 uint32_t buf;
313 usb_error_t err;
314
315 MUGE_LOCK_ASSERT(sc, MA_OWNED);
316
317 buf = htole32(data);
318
319 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
320 req.bRequest = UVR_WRITE_REG;
321 USETW(req.wValue, 0);
322 USETW(req.wIndex, off);
323 USETW(req.wLength, 4);
324
325 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
326 if (err != 0)
327 muge_warn_printf(sc, "Failed to write register 0x%0x\n", off);
328 return (err);
329 }
330
331 /**
332 * lan78xx_wait_for_bits - Poll on a register value until bits are cleared
333 * @sc: soft context
334 * @reg: offset of the register
335 * @bits: if the bits are clear the function returns
336 *
337 * LOCKING:
338 * The device lock must be held before calling this function.
339 *
340 * RETURNS:
341 * 0 on success, or a USB_ERR_?? error code on failure.
342 */
343 static int
lan78xx_wait_for_bits(struct muge_softc * sc,uint32_t reg,uint32_t bits)344 lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits)
345 {
346 usb_ticks_t start_ticks;
347 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
348 uint32_t val;
349 int err;
350
351 MUGE_LOCK_ASSERT(sc, MA_OWNED);
352
353 start_ticks = (usb_ticks_t)ticks;
354 do {
355 if ((err = lan78xx_read_reg(sc, reg, &val)) != 0)
356 return (err);
357 if (!(val & bits))
358 return (0);
359 uether_pause(&sc->sc_ue, hz / 100);
360 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
361
362 return (USB_ERR_TIMEOUT);
363 }
364
365 /**
366 * lan78xx_eeprom_read_raw - Read the attached EEPROM
367 * @sc: soft context
368 * @off: the eeprom address offset
369 * @buf: stores the bytes
370 * @buflen: the number of bytes to read
371 *
372 * Simply reads bytes from an attached eeprom.
373 *
374 * LOCKING:
375 * The function takes and releases the device lock if not already held.
376 *
377 * RETURNS:
378 * 0 on success, or a USB_ERR_?? error code on failure.
379 */
380 static int
lan78xx_eeprom_read_raw(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)381 lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
382 uint16_t buflen)
383 {
384 usb_ticks_t start_ticks;
385 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
386 int err;
387 uint32_t val, saved;
388 uint16_t i;
389 bool locked;
390
391 locked = mtx_owned(&sc->sc_mtx); /* XXX */
392 if (!locked)
393 MUGE_LOCK(sc);
394
395 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) {
396 /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */
397 err = lan78xx_read_reg(sc, ETH_HW_CFG, &val);
398 saved = val;
399
400 val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_);
401 err = lan78xx_write_reg(sc, ETH_HW_CFG, val);
402 }
403
404 err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_);
405 if (err != 0) {
406 muge_warn_printf(sc, "eeprom busy, failed to read data\n");
407 goto done;
408 }
409
410 /* Start reading the bytes, one at a time. */
411 for (i = 0; i < buflen; i++) {
412 val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_;
413 val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i));
414 if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0)
415 goto done;
416
417 start_ticks = (usb_ticks_t)ticks;
418 do {
419 if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) !=
420 0)
421 goto done;
422 if (!(val & ETH_E2P_CMD_BUSY_) ||
423 (val & ETH_E2P_CMD_TIMEOUT_))
424 break;
425
426 uether_pause(&sc->sc_ue, hz / 100);
427 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
428
429 if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) {
430 muge_warn_printf(sc, "eeprom command failed\n");
431 err = USB_ERR_IOERROR;
432 break;
433 }
434
435 if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0)
436 goto done;
437
438 buf[i] = (val & 0xff);
439 }
440
441 done:
442 if (!locked)
443 MUGE_UNLOCK(sc);
444 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) {
445 /* Restore saved LED configuration. */
446 lan78xx_write_reg(sc, ETH_HW_CFG, saved);
447 }
448 return (err);
449 }
450
451 static bool
lan78xx_eeprom_present(struct muge_softc * sc)452 lan78xx_eeprom_present(struct muge_softc *sc)
453 {
454 int ret;
455 uint8_t sig;
456
457 ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1);
458 return (ret == 0 && sig == ETH_E2P_INDICATOR);
459 }
460
461 /**
462 * lan78xx_otp_read_raw
463 * @sc: soft context
464 * @off: the otp address offset
465 * @buf: stores the bytes
466 * @buflen: the number of bytes to read
467 *
468 * Simply reads bytes from the OTP.
469 *
470 * LOCKING:
471 * The function takes and releases the device lock if not already held.
472 *
473 * RETURNS:
474 * 0 on success, or a USB_ERR_?? error code on failure.
475 *
476 */
477 static int
lan78xx_otp_read_raw(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)478 lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
479 uint16_t buflen)
480 {
481 int err;
482 uint32_t val;
483 uint16_t i;
484 bool locked;
485 locked = mtx_owned(&sc->sc_mtx);
486 if (!locked)
487 MUGE_LOCK(sc);
488
489 err = lan78xx_read_reg(sc, OTP_PWR_DN, &val);
490
491 /* Checking if bit is set. */
492 if (val & OTP_PWR_DN_PWRDN_N) {
493 /* Clear it, then wait for it to be cleared. */
494 lan78xx_write_reg(sc, OTP_PWR_DN, 0);
495 err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N);
496 if (err != 0) {
497 muge_warn_printf(sc, "OTP off? failed to read data\n");
498 goto done;
499 }
500 }
501 /* Start reading the bytes, one at a time. */
502 for (i = 0; i < buflen; i++) {
503 err = lan78xx_write_reg(sc, OTP_ADDR1,
504 ((off + i) >> 8) & OTP_ADDR1_15_11);
505 err = lan78xx_write_reg(sc, OTP_ADDR2,
506 ((off + i) & OTP_ADDR2_10_3));
507 err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
508 err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_);
509
510 err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_);
511 if (err != 0) {
512 muge_warn_printf(sc, "OTP busy failed to read data\n");
513 goto done;
514 }
515
516 if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0)
517 goto done;
518
519 buf[i] = (uint8_t)(val & 0xff);
520 }
521
522 done:
523 if (!locked)
524 MUGE_UNLOCK(sc);
525 return (err);
526 }
527
528 /**
529 * lan78xx_otp_read
530 * @sc: soft context
531 * @off: the otp address offset
532 * @buf: stores the bytes
533 * @buflen: the number of bytes to read
534 *
535 * Simply reads bytes from the otp.
536 *
537 * LOCKING:
538 * The function takes and releases device lock if it is not already held.
539 *
540 * RETURNS:
541 * 0 on success, or a USB_ERR_?? error code on failure.
542 */
543 static int
lan78xx_otp_read(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)544 lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf,
545 uint16_t buflen)
546 {
547 uint8_t sig;
548 int err;
549
550 err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1);
551 if (err == 0) {
552 if (sig == OTP_INDICATOR_1) {
553 } else if (sig == OTP_INDICATOR_2) {
554 off += 0x100; /* XXX */
555 } else {
556 err = -EINVAL;
557 }
558 if (!err)
559 err = lan78xx_otp_read_raw(sc, off, buf, buflen);
560 }
561 return (err);
562 }
563
564 /**
565 * lan78xx_setmacaddress - Set the mac address in the device
566 * @sc: driver soft context
567 * @addr: pointer to array contain at least 6 bytes of the mac
568 *
569 * LOCKING:
570 * Should be called with the MUGE lock held.
571 *
572 * RETURNS:
573 * Returns 0 on success or a negative error code.
574 */
575 static int
lan78xx_setmacaddress(struct muge_softc * sc,const uint8_t * addr)576 lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr)
577 {
578 int err;
579 uint32_t val;
580
581 muge_dbg_printf(sc,
582 "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
583 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
584
585 MUGE_LOCK_ASSERT(sc, MA_OWNED);
586
587 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
588 if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0)
589 goto done;
590
591 val = (addr[5] << 8) | addr[4];
592 err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val);
593
594 done:
595 return (err);
596 }
597
598 /**
599 * lan78xx_set_rx_max_frame_length
600 * @sc: driver soft context
601 * @size: pointer to array contain at least 6 bytes of the mac
602 *
603 * Sets the maximum frame length to be received. Frames bigger than
604 * this size are aborted.
605 *
606 * RETURNS:
607 * Returns 0 on success or a negative error code.
608 */
609 static int
lan78xx_set_rx_max_frame_length(struct muge_softc * sc,int size)610 lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size)
611 {
612 uint32_t buf;
613 bool rxenabled;
614
615 /* First we have to disable rx before changing the length. */
616 lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
617 rxenabled = ((buf & ETH_MAC_RX_EN_) != 0);
618
619 if (rxenabled) {
620 buf &= ~ETH_MAC_RX_EN_;
621 lan78xx_write_reg(sc, ETH_MAC_RX, buf);
622 }
623
624 /* Setting max frame length. */
625 buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_;
626 buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) &
627 ETH_MAC_RX_MAX_FR_SIZE_MASK_);
628 lan78xx_write_reg(sc, ETH_MAC_RX, buf);
629
630 /* If it were enabled before, we enable it back. */
631
632 if (rxenabled) {
633 buf |= ETH_MAC_RX_EN_;
634 lan78xx_write_reg(sc, ETH_MAC_RX, buf);
635 }
636
637 return (0);
638 }
639
640 /**
641 * lan78xx_miibus_readreg - Read a MII/MDIO register
642 * @dev: usb ether device
643 * @phy: the number of phy reading from
644 * @reg: the register address
645 *
646 * LOCKING:
647 * Takes and releases the device mutex lock if not already held.
648 *
649 * RETURNS:
650 * Returns the 16-bits read from the MII register, if this function fails
651 * 0 is returned.
652 */
653 static int
lan78xx_miibus_readreg(device_t dev,int phy,int reg)654 lan78xx_miibus_readreg(device_t dev, int phy, int reg)
655 {
656 struct muge_softc *sc = device_get_softc(dev);
657 uint32_t addr, val;
658 bool locked;
659
660 val = 0;
661 locked = mtx_owned(&sc->sc_mtx);
662 if (!locked)
663 MUGE_LOCK(sc);
664
665 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
666 0) {
667 muge_warn_printf(sc, "MII is busy\n");
668 goto done;
669 }
670
671 addr = (phy << 11) | (reg << 6) |
672 ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_;
673 lan78xx_write_reg(sc, ETH_MII_ACC, addr);
674
675 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
676 0) {
677 muge_warn_printf(sc, "MII read timeout\n");
678 goto done;
679 }
680
681 lan78xx_read_reg(sc, ETH_MII_DATA, &val);
682 val = le32toh(val);
683
684 done:
685 if (!locked)
686 MUGE_UNLOCK(sc);
687
688 return (val & 0xFFFF);
689 }
690
691 /**
692 * lan78xx_miibus_writereg - Writes a MII/MDIO register
693 * @dev: usb ether device
694 * @phy: the number of phy writing to
695 * @reg: the register address
696 * @val: the value to write
697 *
698 * Attempts to write a PHY register through the usb controller registers.
699 *
700 * LOCKING:
701 * Takes and releases the device mutex lock if not already held.
702 *
703 * RETURNS:
704 * Always returns 0 regardless of success or failure.
705 */
706 static int
lan78xx_miibus_writereg(device_t dev,int phy,int reg,int val)707 lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val)
708 {
709 struct muge_softc *sc = device_get_softc(dev);
710 uint32_t addr;
711 bool locked;
712
713 if (sc->sc_phyno != phy)
714 return (0);
715
716 locked = mtx_owned(&sc->sc_mtx);
717 if (!locked)
718 MUGE_LOCK(sc);
719
720 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
721 0) {
722 muge_warn_printf(sc, "MII is busy\n");
723 goto done;
724 }
725
726 val = htole32(val);
727 lan78xx_write_reg(sc, ETH_MII_DATA, val);
728
729 addr = (phy << 11) | (reg << 6) |
730 ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_;
731 lan78xx_write_reg(sc, ETH_MII_ACC, addr);
732
733 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0)
734 muge_warn_printf(sc, "MII write timeout\n");
735
736 done:
737 if (!locked)
738 MUGE_UNLOCK(sc);
739 return (0);
740 }
741
742 /*
743 * lan78xx_miibus_statchg - Called to detect phy status change
744 * @dev: usb ether device
745 *
746 * This function is called periodically by the system to poll for status
747 * changes of the link.
748 *
749 * LOCKING:
750 * Takes and releases the device mutex lock if not already held.
751 */
752 static void
lan78xx_miibus_statchg(device_t dev)753 lan78xx_miibus_statchg(device_t dev)
754 {
755 struct muge_softc *sc = device_get_softc(dev);
756 struct mii_data *mii = uether_getmii(&sc->sc_ue);
757 if_t ifp;
758 int err;
759 uint32_t flow = 0;
760 uint32_t fct_flow = 0;
761 bool locked;
762
763 locked = mtx_owned(&sc->sc_mtx);
764 if (!locked)
765 MUGE_LOCK(sc);
766
767 ifp = uether_getifp(&sc->sc_ue);
768 if (mii == NULL || ifp == NULL ||
769 (if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0)
770 goto done;
771
772 /* Use the MII status to determine link status */
773 sc->sc_flags &= ~MUGE_FLAG_LINK;
774 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
775 (IFM_ACTIVE | IFM_AVALID)) {
776 muge_dbg_printf(sc, "media is active\n");
777 switch (IFM_SUBTYPE(mii->mii_media_active)) {
778 case IFM_10_T:
779 case IFM_100_TX:
780 sc->sc_flags |= MUGE_FLAG_LINK;
781 muge_dbg_printf(sc, "10/100 ethernet\n");
782 break;
783 case IFM_1000_T:
784 sc->sc_flags |= MUGE_FLAG_LINK;
785 muge_dbg_printf(sc, "Gigabit ethernet\n");
786 break;
787 default:
788 break;
789 }
790 }
791 /* Lost link, do nothing. */
792 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
793 muge_dbg_printf(sc, "link flag not set\n");
794 goto done;
795 }
796
797 err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow);
798 if (err) {
799 muge_warn_printf(sc,
800 "failed to read initial flow control thresholds, error %d\n",
801 err);
802 goto done;
803 }
804
805 /* Enable/disable full duplex operation and TX/RX pause. */
806 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
807 muge_dbg_printf(sc, "full duplex operation\n");
808
809 /* Enable transmit MAC flow control function. */
810 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
811 flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF;
812
813 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
814 flow |= ETH_FLOW_CR_RX_FCEN_;
815 }
816
817 /* XXX Flow control settings obtained from Microchip's driver. */
818 switch(usbd_get_speed(sc->sc_ue.ue_udev)) {
819 case USB_SPEED_SUPER:
820 fct_flow = 0x817;
821 break;
822 case USB_SPEED_HIGH:
823 fct_flow = 0x211;
824 break;
825 default:
826 break;
827 }
828
829 err += lan78xx_write_reg(sc, ETH_FLOW, flow);
830 err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow);
831 if (err)
832 muge_warn_printf(sc, "media change failed, error %d\n", err);
833
834 done:
835 if (!locked)
836 MUGE_UNLOCK(sc);
837 }
838
839 /*
840 * lan78xx_set_mdix_auto - Configure the device to enable automatic
841 * crossover and polarity detection. LAN7800 provides HP Auto-MDIX
842 * functionality for seamless crossover and polarity detection.
843 *
844 * @sc: driver soft context
845 *
846 * LOCKING:
847 * Takes and releases the device mutex lock if not already held.
848 */
849 static void
lan78xx_set_mdix_auto(struct muge_softc * sc)850 lan78xx_set_mdix_auto(struct muge_softc *sc)
851 {
852 uint32_t buf, err;
853
854 err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
855 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1);
856
857 buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
858 MUGE_EXT_MODE_CTRL);
859 buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_;
860 buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_;
861
862 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
863 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
864 MUGE_EXT_MODE_CTRL, buf);
865
866 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
867 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0);
868
869 if (err != 0)
870 muge_warn_printf(sc, "error setting PHY's MDIX status\n");
871
872 sc->sc_mdix_ctl = buf;
873 }
874
875 /**
876 * lan78xx_phy_init - Initialises the in-built MUGE phy
877 * @sc: driver soft context
878 *
879 * Resets the PHY part of the chip and then initialises it to default
880 * values. The 'link down' and 'auto-negotiation complete' interrupts
881 * from the PHY are also enabled, however we don't monitor the interrupt
882 * endpoints for the moment.
883 *
884 * RETURNS:
885 * Returns 0 on success or EIO if failed to reset the PHY.
886 */
887 static int
lan78xx_phy_init(struct muge_softc * sc)888 lan78xx_phy_init(struct muge_softc *sc)
889 {
890 muge_dbg_printf(sc, "Initializing PHY.\n");
891 uint16_t bmcr, lmsr;
892 usb_ticks_t start_ticks;
893 uint32_t hw_reg;
894 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
895
896 MUGE_LOCK_ASSERT(sc, MA_OWNED);
897
898 /* Reset phy and wait for reset to complete. */
899 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR,
900 BMCR_RESET);
901
902 start_ticks = ticks;
903 do {
904 uether_pause(&sc->sc_ue, hz / 100);
905 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
906 MII_BMCR);
907 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
908
909 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
910 muge_err_printf(sc, "PHY reset timed-out\n");
911 return (EIO);
912 }
913
914 /* Setup phy to interrupt upon link down or autoneg completion. */
915 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
916 MUGE_PHY_INTR_STAT);
917 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
918 MUGE_PHY_INTR_MASK,
919 (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE));
920
921 /* Enable Auto-MDIX for crossover and polarity detection. */
922 lan78xx_set_mdix_auto(sc);
923
924 /* Enable all modes. */
925 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
926 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |
927 ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM);
928
929 /* Restart auto-negotiation. */
930 bmcr |= BMCR_STARTNEG;
931 bmcr |= BMCR_AUTOEN;
932 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
933 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
934
935 /* Configure LED Modes. */
936 if (sc->sc_led_modes_mask != 0) {
937 lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
938 MUGE_PHY_LED_MODE);
939 lmsr &= ~sc->sc_led_modes_mask;
940 lmsr |= sc->sc_led_modes;
941 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
942 MUGE_PHY_LED_MODE, lmsr);
943 }
944
945 /* Enable appropriate LEDs. */
946 if (sc->sc_leds != 0 &&
947 lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) {
948 hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ |
949 ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ );
950 hw_reg |= sc->sc_leds;
951 lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg);
952 }
953 return (0);
954 }
955
956 /**
957 * lan78xx_chip_init - Initialises the chip after power on
958 * @sc: driver soft context
959 *
960 * This initialisation sequence is modelled on the procedure in the Linux
961 * driver.
962 *
963 * RETURNS:
964 * Returns 0 on success or an error code on failure.
965 */
966 static int
lan78xx_chip_init(struct muge_softc * sc)967 lan78xx_chip_init(struct muge_softc *sc)
968 {
969 int err;
970 uint32_t buf;
971 uint32_t burst_cap;
972
973 MUGE_LOCK_ASSERT(sc, MA_OWNED);
974
975 /* Enter H/W config mode. */
976 lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_);
977
978 if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) !=
979 0) {
980 muge_warn_printf(sc,
981 "timed-out waiting for lite reset to complete\n");
982 goto init_failed;
983 }
984
985 /* Set the mac address. */
986 if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
987 muge_warn_printf(sc, "failed to set the MAC address\n");
988 goto init_failed;
989 }
990
991 /* Read and display the revision register. */
992 if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) {
993 muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n",
994 err);
995 goto init_failed;
996 }
997 sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16;
998 sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_;
999 switch (sc->chipid) {
1000 case ETH_ID_REV_CHIP_ID_7800_:
1001 case ETH_ID_REV_CHIP_ID_7850_:
1002 break;
1003 default:
1004 muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n",
1005 sc->chipid);
1006 goto init_failed;
1007 }
1008 device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid,
1009 sc->chiprev);
1010
1011 /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */
1012 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) {
1013 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err);
1014 goto init_failed;
1015 }
1016 buf |= ETH_USB_CFG_BIR_;
1017 lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1018
1019 /*
1020 * XXX LTM support will go here.
1021 */
1022
1023 /* Configuring the burst cap. */
1024 switch (usbd_get_speed(sc->sc_ue.ue_udev)) {
1025 case USB_SPEED_SUPER:
1026 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE;
1027 break;
1028 case USB_SPEED_HIGH:
1029 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE;
1030 break;
1031 default:
1032 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE;
1033 }
1034
1035 lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap);
1036
1037 /* Set the default bulk in delay (same value from Linux driver). */
1038 lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY);
1039
1040 /* Multiple ethernet frames per USB packets. */
1041 err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf);
1042 buf |= ETH_HW_CFG_MEF_;
1043 err = lan78xx_write_reg(sc, ETH_HW_CFG, buf);
1044
1045 /* Enable burst cap. */
1046 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) {
1047 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n",
1048 err);
1049 goto init_failed;
1050 }
1051 buf |= ETH_USB_CFG_BCE_;
1052 err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1053
1054 /*
1055 * Set FCL's RX and TX FIFO sizes: according to data sheet this is
1056 * already the default value. But we initialize it to the same value
1057 * anyways, as that's what the Linux driver does.
1058 *
1059 */
1060 buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512;
1061 err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf);
1062
1063 buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512;
1064 err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf);
1065
1066 /* Enabling interrupts. (Not using them for now) */
1067 err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_);
1068
1069 /*
1070 * Initializing flow control registers to 0. These registers are
1071 * properly set is handled in link-reset function in the Linux driver.
1072 */
1073 err = lan78xx_write_reg(sc, ETH_FLOW, 0);
1074 err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0);
1075
1076 /*
1077 * Settings for the RFE, we enable broadcast and destination address
1078 * perfect filtering.
1079 */
1080 err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf);
1081 buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_;
1082 err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf);
1083
1084 /*
1085 * At this point the Linux driver writes multicast tables, and enables
1086 * checksum engines. But in FreeBSD that gets done in muge_init,
1087 * which gets called when the interface is brought up.
1088 */
1089
1090 /* Reset the PHY. */
1091 lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_);
1092 if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL,
1093 ETH_PMT_CTL_PHY_RST_)) != 0) {
1094 muge_warn_printf(sc,
1095 "timed-out waiting for phy reset to complete\n");
1096 goto init_failed;
1097 }
1098
1099 err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf);
1100 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ &&
1101 !lan78xx_eeprom_present(sc)) {
1102 /* Set automatic duplex and speed on LAN7800 without EEPROM. */
1103 buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_;
1104 }
1105 err = lan78xx_write_reg(sc, ETH_MAC_CR, buf);
1106
1107 /*
1108 * Enable PHY interrupts (Not really getting used for now)
1109 * ETH_INT_EP_CTL: interrupt endpoint control register
1110 * phy events cause interrupts to be issued
1111 */
1112 err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf);
1113 buf |= ETH_INT_ENP_PHY_INT;
1114 err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf);
1115
1116 /*
1117 * Enables mac's transmitter. It will transmit frames from the buffer
1118 * onto the cable.
1119 */
1120 err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf);
1121 buf |= ETH_MAC_TX_TXEN_;
1122 err = lan78xx_write_reg(sc, ETH_MAC_TX, buf);
1123
1124 /* FIFO is capable of transmitting frames to MAC. */
1125 err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf);
1126 buf |= ETH_FCT_TX_CTL_EN_;
1127 err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf);
1128
1129 /*
1130 * Set max frame length. In linux this is dev->mtu (which by default
1131 * is 1500) + VLAN_ETH_HLEN = 1518.
1132 */
1133 err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN);
1134
1135 /* Initialise the PHY. */
1136 if ((err = lan78xx_phy_init(sc)) != 0)
1137 goto init_failed;
1138
1139 /* Enable MAC RX. */
1140 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
1141 buf |= ETH_MAC_RX_EN_;
1142 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
1143
1144 /* Enable FIFO controller RX. */
1145 err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf);
1146 buf |= ETH_FCT_TX_CTL_EN_;
1147 err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf);
1148
1149 sc->sc_flags |= MUGE_FLAG_INIT_DONE;
1150 return (0);
1151
1152 init_failed:
1153 muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err);
1154 return (err);
1155 }
1156
1157 static void
muge_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)1158 muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
1159 {
1160 struct muge_softc *sc = usbd_xfer_softc(xfer);
1161 struct usb_ether *ue = &sc->sc_ue;
1162 if_t ifp = uether_getifp(ue);
1163 struct mbuf *m;
1164 struct usb_page_cache *pc;
1165 uint32_t rx_cmd_a, rx_cmd_b;
1166 uint16_t rx_cmd_c;
1167 int pktlen;
1168 int off;
1169 int actlen;
1170
1171 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
1172 muge_dbg_printf(sc, "rx : actlen %d\n", actlen);
1173
1174 switch (USB_GET_STATE(xfer)) {
1175 case USB_ST_TRANSFERRED:
1176 /*
1177 * There is always a zero length frame after bringing the
1178 * interface up.
1179 */
1180 if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN))
1181 goto tr_setup;
1182
1183 /*
1184 * There may be multiple packets in the USB frame. Each will
1185 * have a header and each needs to have its own mbuf allocated
1186 * and populated for it.
1187 */
1188 pc = usbd_xfer_get_frame(xfer, 0);
1189 off = 0;
1190
1191 while (off < actlen) {
1192 /* The frame header is aligned on a 4 byte boundary. */
1193 off = ((off + 0x3) & ~0x3);
1194
1195 /* Extract RX CMD A. */
1196 if (off + sizeof(rx_cmd_a) > actlen)
1197 goto tr_setup;
1198 usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a));
1199 off += (sizeof(rx_cmd_a));
1200 rx_cmd_a = le32toh(rx_cmd_a);
1201
1202 /* Extract RX CMD B. */
1203 if (off + sizeof(rx_cmd_b) > actlen)
1204 goto tr_setup;
1205 usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b));
1206 off += (sizeof(rx_cmd_b));
1207 rx_cmd_b = le32toh(rx_cmd_b);
1208
1209 /* Extract RX CMD C. */
1210 if (off + sizeof(rx_cmd_c) > actlen)
1211 goto tr_setup;
1212 usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c));
1213 off += (sizeof(rx_cmd_c));
1214 rx_cmd_c = le16toh(rx_cmd_c);
1215
1216 if (off > actlen)
1217 goto tr_setup;
1218
1219 pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
1220
1221 muge_dbg_printf(sc,
1222 "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x "
1223 " pktlen %d actlen %d off %d\n",
1224 rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off);
1225
1226 if (rx_cmd_a & RX_CMD_A_RED_) {
1227 muge_dbg_printf(sc,
1228 "rx error (hdr 0x%08x)\n", rx_cmd_a);
1229 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1230 } else {
1231 /* Ethernet frame too big or too small? */
1232 if ((pktlen < ETHER_HDR_LEN) ||
1233 (pktlen > (actlen - off)))
1234 goto tr_setup;
1235
1236 /* Create a new mbuf to store the packet. */
1237 m = uether_newbuf();
1238 if (m == NULL) {
1239 muge_warn_printf(sc,
1240 "failed to create new mbuf\n");
1241 if_inc_counter(ifp, IFCOUNTER_IQDROPS,
1242 1);
1243 goto tr_setup;
1244 }
1245 if (pktlen > m->m_len) {
1246 muge_dbg_printf(sc,
1247 "buffer too small %d vs %d bytes",
1248 pktlen, m->m_len);
1249 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
1250 m_freem(m);
1251 goto tr_setup;
1252 }
1253 usbd_copy_out(pc, off, mtod(m, uint8_t *),
1254 pktlen);
1255
1256 /*
1257 * Check if RX checksums are computed, and
1258 * offload them
1259 */
1260 if ((if_getcapenable(ifp) & IFCAP_RXCSUM) &&
1261 !(rx_cmd_a & RX_CMD_A_ICSM_)) {
1262 /*
1263 * Remove the extra 2 bytes of the csum
1264 *
1265 * The checksum appears to be
1266 * simplistically calculated over the
1267 * protocol headers up to the end of the
1268 * eth frame. Which means if the eth
1269 * frame is padded the csum calculation
1270 * is incorrectly performed over the
1271 * padding bytes as well. Therefore to
1272 * be safe we ignore the H/W csum on
1273 * frames less than or equal to
1274 * 64 bytes.
1275 *
1276 * Protocols checksummed:
1277 * TCP, UDP, ICMP, IGMP, IP
1278 */
1279 if (pktlen > ETHER_MIN_LEN) {
1280 m->m_pkthdr.csum_flags |=
1281 CSUM_DATA_VALID |
1282 CSUM_PSEUDO_HDR;
1283
1284 /*
1285 * Copy the checksum from the
1286 * last 2 bytes of the transfer
1287 * and put in the csum_data
1288 * field.
1289 */
1290 usbd_copy_out(pc,
1291 (off + pktlen),
1292 &m->m_pkthdr.csum_data, 2);
1293
1294 /*
1295 * The data is copied in network
1296 * order, but the csum algorithm
1297 * in the kernel expects it to
1298 * be in host network order.
1299 */
1300 m->m_pkthdr.csum_data =
1301 ntohs(0xffff);
1302
1303 muge_dbg_printf(sc,
1304 "RX checksum offloaded (0x%04x)\n",
1305 m->m_pkthdr.csum_data);
1306 }
1307 }
1308
1309 /* Enqueue the mbuf on the receive queue. */
1310 if (pktlen < (4 + ETHER_HDR_LEN)) {
1311 m_freem(m);
1312 goto tr_setup;
1313 }
1314 /* Remove 4 trailing bytes */
1315 uether_rxmbuf(ue, m, pktlen - 4);
1316 }
1317
1318 /*
1319 * Update the offset to move to the next potential
1320 * packet.
1321 */
1322 off += pktlen;
1323 }
1324 /* FALLTHROUGH */
1325 case USB_ST_SETUP:
1326 tr_setup:
1327 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1328 usbd_transfer_submit(xfer);
1329 uether_rxflush(ue);
1330 return;
1331 default:
1332 if (error != USB_ERR_CANCELLED) {
1333 muge_warn_printf(sc, "bulk read error, %s\n",
1334 usbd_errstr(error));
1335 usbd_xfer_set_stall(xfer);
1336 goto tr_setup;
1337 }
1338 return;
1339 }
1340 }
1341
1342 /**
1343 * muge_bulk_write_callback - Write callback used to send ethernet frame(s)
1344 * @xfer: the USB transfer
1345 * @error: error code if the transfers is in an errored state
1346 *
1347 * The main write function that pulls ethernet frames off the queue and
1348 * sends them out.
1349 *
1350 */
1351 static void
muge_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)1352 muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1353 {
1354 struct muge_softc *sc = usbd_xfer_softc(xfer);
1355 if_t ifp = uether_getifp(&sc->sc_ue);
1356 struct usb_page_cache *pc;
1357 struct mbuf *m;
1358 int nframes;
1359 uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0;
1360
1361 switch (USB_GET_STATE(xfer)) {
1362 case USB_ST_TRANSFERRED:
1363 muge_dbg_printf(sc,
1364 "USB TRANSFER status: USB_ST_TRANSFERRED\n");
1365 if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE);
1366 /* FALLTHROUGH */
1367 case USB_ST_SETUP:
1368 muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n");
1369 tr_setup:
1370 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 ||
1371 (if_getdrvflags(ifp) & IFF_DRV_OACTIVE) != 0) {
1372 muge_dbg_printf(sc,
1373 "sc->sc_flags & MUGE_FLAG_LINK: %d\n",
1374 (sc->sc_flags & MUGE_FLAG_LINK));
1375 muge_dbg_printf(sc,
1376 "if_getdrvflags(ifp) & IFF_DRV_OACTIVE: %d",
1377 (if_getdrvflags(ifp) & IFF_DRV_OACTIVE));
1378 muge_dbg_printf(sc,
1379 "USB TRANSFER not sending: no link or controller is busy \n");
1380 /*
1381 * Don't send anything if there is no link or
1382 * controller is busy.
1383 */
1384 return;
1385 }
1386 for (nframes = 0;
1387 nframes < 16 && !if_sendq_empty(ifp);
1388 nframes++) {
1389 m = if_dequeue(ifp);
1390 if (m == NULL)
1391 break;
1392 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1393 nframes);
1394 frm_len = 0;
1395 pc = usbd_xfer_get_frame(xfer, nframes);
1396
1397 /*
1398 * Each frame is prefixed with two 32-bit values
1399 * describing the length of the packet and buffer.
1400 */
1401 tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) |
1402 TX_CMD_A_FCS_;
1403 tx_cmd_a = htole32(tx_cmd_a);
1404 usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a));
1405
1406 tx_cmd_b = 0;
1407
1408 /* TCP LSO Support will probably be implemented here. */
1409 tx_cmd_b = htole32(tx_cmd_b);
1410 usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b));
1411
1412 frm_len += 8;
1413
1414 /* Next copy in the actual packet */
1415 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1416 frm_len += m->m_pkthdr.len;
1417
1418 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1419
1420 /*
1421 * If there's a BPF listener, bounce a copy of this
1422 * frame to it.
1423 */
1424 BPF_MTAP(ifp, m);
1425 m_freem(m);
1426
1427 /* Set frame length. */
1428 usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1429 }
1430
1431 muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes);
1432 if (nframes != 0) {
1433 muge_dbg_printf(sc, "USB TRANSFER submit attempt\n");
1434 usbd_xfer_set_frames(xfer, nframes);
1435 usbd_transfer_submit(xfer);
1436 if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, 0);
1437 }
1438 return;
1439
1440 default:
1441 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1442 if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE);
1443
1444 if (error != USB_ERR_CANCELLED) {
1445 muge_err_printf(sc,
1446 "usb error on tx: %s\n", usbd_errstr(error));
1447 usbd_xfer_set_stall(xfer);
1448 goto tr_setup;
1449 }
1450 return;
1451 }
1452 }
1453
1454 /**
1455 * muge_set_mac_addr - Initiailizes NIC MAC address
1456 * @ue: the USB ethernet device
1457 *
1458 * Tries to obtain MAC address from number of sources: registers,
1459 * EEPROM, DTB blob. If all sources fail - generates random MAC.
1460 */
1461 static void
muge_set_mac_addr(struct usb_ether * ue)1462 muge_set_mac_addr(struct usb_ether *ue)
1463 {
1464 struct muge_softc *sc = uether_getsc(ue);
1465 uint32_t mac_h, mac_l;
1466
1467 memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN);
1468
1469 uint32_t val;
1470 lan78xx_read_reg(sc, 0, &val);
1471
1472 /* Read current MAC address from RX_ADDRx registers. */
1473 if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) &&
1474 (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) {
1475 ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1476 ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1477 ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1478 ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1479 ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1480 ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1481 }
1482
1483 /*
1484 * If RX_ADDRx did not provide a valid MAC address, try EEPROM. If that
1485 * doesn't work, try OTP. Whether any of these methods work or not, try
1486 * FDT data, because it is allowed to override the EEPROM/OTP values.
1487 */
1488 if (ETHER_IS_VALID(ue->ue_eaddr)) {
1489 muge_dbg_printf(sc, "MAC assigned from registers\n");
1490 } else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc,
1491 ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 &&
1492 ETHER_IS_VALID(ue->ue_eaddr)) {
1493 muge_dbg_printf(sc, "MAC assigned from EEPROM\n");
1494 } else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr,
1495 ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) {
1496 muge_dbg_printf(sc, "MAC assigned from OTP\n");
1497 }
1498
1499 #ifdef FDT
1500 /* ue->ue_eaddr modified only if config exists for this dev instance. */
1501 usb_fdt_get_mac_addr(ue->ue_dev, ue);
1502 if (ETHER_IS_VALID(ue->ue_eaddr)) {
1503 muge_dbg_printf(sc, "MAC assigned from FDT data\n");
1504 }
1505 #endif
1506
1507 if (!ETHER_IS_VALID(ue->ue_eaddr)) {
1508 muge_dbg_printf(sc, "MAC assigned randomly\n");
1509 arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0);
1510 ue->ue_eaddr[0] &= ~0x01; /* unicast */
1511 ue->ue_eaddr[0] |= 0x02; /* locally administered */
1512 }
1513 }
1514
1515 /**
1516 * muge_set_leds - Initializes NIC LEDs pattern
1517 * @ue: the USB ethernet device
1518 *
1519 * Tries to store the LED modes.
1520 * Supports only DTB blob like the Linux driver does.
1521 */
1522 static void
muge_set_leds(struct usb_ether * ue)1523 muge_set_leds(struct usb_ether *ue)
1524 {
1525 #ifdef FDT
1526 struct muge_softc *sc = uether_getsc(ue);
1527 phandle_t node;
1528 pcell_t modes[4]; /* 4 LEDs are possible */
1529 ssize_t proplen;
1530 uint32_t count;
1531
1532 if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 &&
1533 (proplen = OF_getencprop(node, "microchip,led-modes", modes,
1534 sizeof(modes))) > 0) {
1535 count = proplen / sizeof( uint32_t );
1536 sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ |
1537 (count > 1) * ETH_HW_CFG_LED1_EN_ |
1538 (count > 2) * ETH_HW_CFG_LED2_EN_ |
1539 (count > 3) * ETH_HW_CFG_LED3_EN_;
1540 while (count-- > 0) {
1541 sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count);
1542 sc->sc_led_modes_mask |= 0xf << (4 * count);
1543 }
1544 muge_dbg_printf(sc, "LED modes set from FDT data\n");
1545 }
1546 #endif
1547 }
1548
1549 /**
1550 * muge_attach_post - Called after the driver attached to the USB interface
1551 * @ue: the USB ethernet device
1552 *
1553 * This is where the chip is intialised for the first time. This is
1554 * different from the muge_init() function in that that one is designed to
1555 * setup the H/W to match the UE settings and can be called after a reset.
1556 *
1557 */
1558 static void
muge_attach_post(struct usb_ether * ue)1559 muge_attach_post(struct usb_ether *ue)
1560 {
1561 struct muge_softc *sc = uether_getsc(ue);
1562
1563 muge_dbg_printf(sc, "Calling muge_attach_post.\n");
1564
1565 /* Setup some of the basics */
1566 sc->sc_phyno = 1;
1567
1568 muge_set_mac_addr(ue);
1569 muge_set_leds(ue);
1570
1571 /* Initialise the chip for the first time */
1572 lan78xx_chip_init(sc);
1573 }
1574
1575 /**
1576 * muge_attach_post_sub - Called after attach to the USB interface
1577 * @ue: the USB ethernet device
1578 *
1579 * Most of this is boilerplate code and copied from the base USB ethernet
1580 * driver. It has been overridden so that we can indicate to the system
1581 * that the chip supports H/W checksumming.
1582 *
1583 * RETURNS:
1584 * Returns 0 on success or a negative error code.
1585 */
1586 static int
muge_attach_post_sub(struct usb_ether * ue)1587 muge_attach_post_sub(struct usb_ether *ue)
1588 {
1589 struct muge_softc *sc;
1590 if_t ifp;
1591
1592 sc = uether_getsc(ue);
1593 muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n");
1594 ifp = ue->ue_ifp;
1595 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
1596 if_setstartfn(ifp, uether_start);
1597 if_setioctlfn(ifp, muge_ioctl);
1598 if_setinitfn(ifp, uether_init);
1599 if_setsendqlen(ifp, ifqmaxlen);
1600 if_setsendqready(ifp);
1601
1602 /*
1603 * The chip supports TCP/UDP checksum offloading on TX and RX paths,
1604 * however currently only RX checksum is supported in the driver
1605 * (see top of file).
1606 */
1607 if_setcapabilitiesbit(ifp, IFCAP_VLAN_MTU, 0);
1608 if_sethwassist(ifp, 0);
1609 if_setcapabilitiesbit(ifp, IFCAP_RXCSUM, 0);
1610
1611 if (MUGE_DEFAULT_TX_CSUM_ENABLE)
1612 if_setcapabilitiesbit(ifp, IFCAP_TXCSUM, 0);
1613
1614 /*
1615 * In the Linux driver they also enable scatter/gather (NETIF_F_SG)
1616 * here, that's something related to socket buffers used in Linux.
1617 * FreeBSD doesn't have that as an interface feature.
1618 */
1619 if (MUGE_DEFAULT_TSO_ENABLE)
1620 if_setcapabilitiesbit(ifp, IFCAP_TSO4 | IFCAP_TSO6, 0);
1621
1622 #if 0
1623 /* TX checksuming is disabled since not yet implemented. */
1624 if_setcapabilitiesbit(ifp, IFCAP_TXCSUM, 0);
1625 if_setcapenablebit(ifp, IFCAP_TXCSUM, 0);
1626 if_sethwassist(ifp, CSUM_TCP | CSUM_UDP);
1627 #endif
1628
1629 if_setcapenable(ifp, if_getcapabilities(ifp));
1630
1631 bus_topo_lock();
1632 mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, uether_ifmedia_upd,
1633 ue->ue_methods->ue_mii_sts, BMSR_DEFCAPMASK, sc->sc_phyno,
1634 MII_OFFSET_ANY, 0);
1635 bus_topo_unlock();
1636
1637 return (0);
1638 }
1639
1640 /**
1641 * muge_start - Starts communication with the LAN78xx chip
1642 * @ue: USB ether interface
1643 */
1644 static void
muge_start(struct usb_ether * ue)1645 muge_start(struct usb_ether *ue)
1646 {
1647 struct muge_softc *sc = uether_getsc(ue);
1648
1649 /*
1650 * Start the USB transfers, if not already started.
1651 */
1652 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]);
1653 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]);
1654 }
1655
1656 /**
1657 * muge_ioctl - ioctl function for the device
1658 * @ifp: interface pointer
1659 * @cmd: the ioctl command
1660 * @data: data passed in the ioctl call, typically a pointer to struct
1661 * ifreq.
1662 *
1663 * The ioctl routine is overridden to detect change requests for the H/W
1664 * checksum capabilities.
1665 *
1666 * RETURNS:
1667 * 0 on success and an error code on failure.
1668 */
1669 static int
muge_ioctl(if_t ifp,u_long cmd,caddr_t data)1670 muge_ioctl(if_t ifp, u_long cmd, caddr_t data)
1671 {
1672 struct usb_ether *ue = if_getsoftc(ifp);
1673 struct muge_softc *sc;
1674 struct ifreq *ifr;
1675 int rc;
1676 int mask;
1677 int reinit;
1678
1679 if (cmd == SIOCSIFCAP) {
1680 sc = uether_getsc(ue);
1681 ifr = (struct ifreq *)data;
1682
1683 MUGE_LOCK(sc);
1684
1685 rc = 0;
1686 reinit = 0;
1687
1688 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp);
1689
1690 /* Modify the RX CSUM enable bits. */
1691 if ((mask & IFCAP_RXCSUM) != 0 &&
1692 (if_getcapabilities(ifp) & IFCAP_RXCSUM) != 0) {
1693 if_togglecapenable(ifp, IFCAP_RXCSUM);
1694
1695 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) {
1696 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
1697 reinit = 1;
1698 }
1699 }
1700
1701 MUGE_UNLOCK(sc);
1702 if (reinit)
1703 uether_init(ue);
1704 } else {
1705 rc = uether_ioctl(ifp, cmd, data);
1706 }
1707
1708 return (rc);
1709 }
1710
1711 /**
1712 * muge_reset - Reset the SMSC chip
1713 * @sc: device soft context
1714 *
1715 * LOCKING:
1716 * Should be called with the SMSC lock held.
1717 */
1718 static void
muge_reset(struct muge_softc * sc)1719 muge_reset(struct muge_softc *sc)
1720 {
1721 struct usb_config_descriptor *cd;
1722 usb_error_t err;
1723
1724 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
1725
1726 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
1727 cd->bConfigurationValue);
1728 if (err)
1729 muge_warn_printf(sc, "reset failed (ignored)\n");
1730
1731 /* Wait a little while for the chip to get its brains in order. */
1732 uether_pause(&sc->sc_ue, hz / 100);
1733
1734 /* Reinitialize controller to achieve full reset. */
1735 lan78xx_chip_init(sc);
1736 }
1737
1738 /**
1739 * muge_set_addr_filter
1740 *
1741 * @sc: device soft context
1742 * @index: index of the entry to the perfect address table
1743 * @addr: address to be written
1744 *
1745 */
1746 static void
muge_set_addr_filter(struct muge_softc * sc,int index,uint8_t addr[ETHER_ADDR_LEN])1747 muge_set_addr_filter(struct muge_softc *sc, int index,
1748 uint8_t addr[ETHER_ADDR_LEN])
1749 {
1750 uint32_t tmp;
1751
1752 if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) {
1753 tmp = addr[3];
1754 tmp |= addr[2] | (tmp << 8);
1755 tmp |= addr[1] | (tmp << 8);
1756 tmp |= addr[0] | (tmp << 8);
1757 sc->sc_pfilter_table[index][1] = tmp;
1758 tmp = addr[5];
1759 tmp |= addr[4] | (tmp << 8);
1760 tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_;
1761 sc->sc_pfilter_table[index][0] = tmp;
1762 }
1763 }
1764
1765 /**
1766 * lan78xx_dataport_write - write to the selected RAM
1767 * @sc: The device soft context.
1768 * @ram_select: Select which RAM to access.
1769 * @addr: Starting address to write to.
1770 * @buf: word-sized buffer to write to RAM, starting at @addr.
1771 * @length: length of @buf
1772 *
1773 *
1774 * RETURNS:
1775 * 0 if write successful.
1776 */
1777 static int
lan78xx_dataport_write(struct muge_softc * sc,uint32_t ram_select,uint32_t addr,uint32_t length,uint32_t * buf)1778 lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select,
1779 uint32_t addr, uint32_t length, uint32_t *buf)
1780 {
1781 uint32_t dp_sel;
1782 int i, ret;
1783
1784 MUGE_LOCK_ASSERT(sc, MA_OWNED);
1785 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1786 if (ret < 0)
1787 goto done;
1788
1789 ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel);
1790
1791 dp_sel &= ~ETH_DP_SEL_RSEL_MASK_;
1792 dp_sel |= ram_select;
1793
1794 ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel);
1795
1796 for (i = 0; i < length; i++) {
1797 ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i);
1798 ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]);
1799 ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_);
1800 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1801 if (ret != 0)
1802 goto done;
1803 }
1804
1805 done:
1806 return (ret);
1807 }
1808
1809 /**
1810 * muge_multicast_write
1811 * @sc: device's soft context
1812 *
1813 * Writes perfect address filters and hash address filters to their
1814 * corresponding registers and RAMs.
1815 *
1816 */
1817 static void
muge_multicast_write(struct muge_softc * sc)1818 muge_multicast_write(struct muge_softc *sc)
1819 {
1820 int i;
1821 lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_,
1822 ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN,
1823 sc->sc_mchash_table);
1824
1825 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1826 lan78xx_write_reg(sc, PFILTER_HI(i), 0);
1827 lan78xx_write_reg(sc, PFILTER_LO(i),
1828 sc->sc_pfilter_table[i][1]);
1829 lan78xx_write_reg(sc, PFILTER_HI(i),
1830 sc->sc_pfilter_table[i][0]);
1831 }
1832 }
1833
1834 /**
1835 * muge_hash - Calculate the hash of a mac address
1836 * @addr: The mac address to calculate the hash on
1837 *
1838 * This function is used when configuring a range of multicast mac
1839 * addresses to filter on. The hash of the mac address is put in the
1840 * device's mac hash table.
1841 *
1842 * RETURNS:
1843 * Returns a value from 0-63 value which is the hash of the mac address.
1844 */
1845 static inline uint32_t
muge_hash(uint8_t addr[ETHER_ADDR_LEN])1846 muge_hash(uint8_t addr[ETHER_ADDR_LEN])
1847 {
1848 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff;
1849 }
1850
1851 static u_int
muge_hash_maddr(void * arg,struct sockaddr_dl * sdl,u_int cnt)1852 muge_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
1853 {
1854 struct muge_softc *sc = arg;
1855 uint32_t bitnum;
1856
1857 /* First fill up the perfect address table. */
1858 if (cnt < 32 /* XXX */)
1859 muge_set_addr_filter(sc, cnt + 1, LLADDR(sdl));
1860 else {
1861 bitnum = muge_hash(LLADDR(sdl));
1862 sc->sc_mchash_table[bitnum / 32] |= (1 << (bitnum % 32));
1863 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_HASH_;
1864 }
1865
1866 return (1);
1867 }
1868
1869 /**
1870 * muge_setmulti - Setup multicast
1871 * @ue: usb ethernet device context
1872 *
1873 * Tells the device to either accept frames with a multicast mac address,
1874 * a select group of m'cast mac addresses or just the devices mac address.
1875 *
1876 * LOCKING:
1877 * Should be called with the MUGE lock held.
1878 */
1879 static void
muge_setmulti(struct usb_ether * ue)1880 muge_setmulti(struct usb_ether *ue)
1881 {
1882 struct muge_softc *sc = uether_getsc(ue);
1883 if_t ifp = uether_getifp(ue);
1884 uint8_t i;
1885
1886 MUGE_LOCK_ASSERT(sc, MA_OWNED);
1887
1888 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ |
1889 ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_);
1890
1891 /* Initialize hash filter table. */
1892 for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++)
1893 sc->sc_mchash_table[i] = 0;
1894
1895 /* Initialize perfect filter table. */
1896 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1897 sc->sc_pfilter_table[i][0] = sc->sc_pfilter_table[i][1] = 0;
1898 }
1899
1900 sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_;
1901
1902 if (if_getflags(ifp) & IFF_PROMISC) {
1903 muge_dbg_printf(sc, "promiscuous mode enabled\n");
1904 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1905 } else if (if_getflags(ifp) & IFF_ALLMULTI) {
1906 muge_dbg_printf(sc, "receive all multicast enabled\n");
1907 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_;
1908 } else {
1909 if_foreach_llmaddr(ifp, muge_hash_maddr, sc);
1910 muge_multicast_write(sc);
1911 }
1912 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1913 }
1914
1915 /**
1916 * muge_setpromisc - Enables/disables promiscuous mode
1917 * @ue: usb ethernet device context
1918 *
1919 * LOCKING:
1920 * Should be called with the MUGE lock held.
1921 */
1922 static void
muge_setpromisc(struct usb_ether * ue)1923 muge_setpromisc(struct usb_ether *ue)
1924 {
1925 struct muge_softc *sc = uether_getsc(ue);
1926 if_t ifp = uether_getifp(ue);
1927
1928 muge_dbg_printf(sc, "promiscuous mode %sabled\n",
1929 (if_getflags(ifp) & IFF_PROMISC) ? "en" : "dis");
1930
1931 MUGE_LOCK_ASSERT(sc, MA_OWNED);
1932
1933 if (if_getflags(ifp) & IFF_PROMISC)
1934 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1935 else
1936 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_);
1937
1938 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1939 }
1940
1941 /**
1942 * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming
1943 * @sc: driver soft context
1944 *
1945 * LOCKING:
1946 * Should be called with the MUGE lock held.
1947 *
1948 * RETURNS:
1949 * Returns 0 on success or a negative error code.
1950 */
1951 static int
muge_sethwcsum(struct muge_softc * sc)1952 muge_sethwcsum(struct muge_softc *sc)
1953 {
1954 if_t ifp = uether_getifp(&sc->sc_ue);
1955 int err;
1956
1957 if (!ifp)
1958 return (-EIO);
1959
1960 MUGE_LOCK_ASSERT(sc, MA_OWNED);
1961
1962 if (if_getcapenable(ifp) & IFCAP_RXCSUM) {
1963 sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_;
1964 sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_;
1965 } else {
1966 sc->sc_rfe_ctl &=
1967 ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_);
1968 sc->sc_rfe_ctl &=
1969 ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_);
1970 }
1971
1972 sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_;
1973
1974 err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1975
1976 if (err != 0) {
1977 muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n",
1978 err);
1979 return (err);
1980 }
1981
1982 return (0);
1983 }
1984
1985 /**
1986 * muge_ifmedia_upd - Set media options
1987 * @ifp: interface pointer
1988 *
1989 * Basically boilerplate code that simply calls the mii functions to set
1990 * the media options.
1991 *
1992 * LOCKING:
1993 * The device lock must be held before this function is called.
1994 *
1995 * RETURNS:
1996 * Returns 0 on success or a negative error code.
1997 */
1998 static int
muge_ifmedia_upd(if_t ifp)1999 muge_ifmedia_upd(if_t ifp)
2000 {
2001 struct muge_softc *sc = if_getsoftc(ifp);
2002 muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n");
2003 struct mii_data *mii = uether_getmii(&sc->sc_ue);
2004 struct mii_softc *miisc;
2005 int err;
2006
2007 MUGE_LOCK_ASSERT(sc, MA_OWNED);
2008
2009 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
2010 PHY_RESET(miisc);
2011 err = mii_mediachg(mii);
2012 return (err);
2013 }
2014
2015 /**
2016 * muge_init - Initialises the LAN95xx chip
2017 * @ue: USB ether interface
2018 *
2019 * Called when the interface is brought up (i.e. ifconfig ue0 up), this
2020 * initialise the interface and the rx/tx pipes.
2021 *
2022 * LOCKING:
2023 * Should be called with the MUGE lock held.
2024 */
2025 static void
muge_init(struct usb_ether * ue)2026 muge_init(struct usb_ether *ue)
2027 {
2028 struct muge_softc *sc = uether_getsc(ue);
2029 muge_dbg_printf(sc, "Calling muge_init.\n");
2030 if_t ifp = uether_getifp(ue);
2031 MUGE_LOCK_ASSERT(sc, MA_OWNED);
2032
2033 if (lan78xx_setmacaddress(sc, if_getlladdr(ifp)))
2034 muge_dbg_printf(sc, "setting MAC address failed\n");
2035
2036 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0)
2037 return;
2038
2039 /* Cancel pending I/O. */
2040 muge_stop(ue);
2041
2042 /* Reset the ethernet interface. */
2043 muge_reset(sc);
2044
2045 /* Load the multicast filter. */
2046 muge_setmulti(ue);
2047
2048 /* TCP/UDP checksum offload engines. */
2049 muge_sethwcsum(sc);
2050
2051 usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]);
2052
2053 /* Indicate we are up and running. */
2054 if_setdrvflagbits(ifp, IFF_DRV_RUNNING, 0);
2055
2056 /* Switch to selected media. */
2057 muge_ifmedia_upd(ifp);
2058 muge_start(ue);
2059 }
2060
2061 /**
2062 * muge_stop - Stops communication with the LAN78xx chip
2063 * @ue: USB ether interface
2064 */
2065 static void
muge_stop(struct usb_ether * ue)2066 muge_stop(struct usb_ether *ue)
2067 {
2068 struct muge_softc *sc = uether_getsc(ue);
2069 if_t ifp = uether_getifp(ue);
2070
2071 MUGE_LOCK_ASSERT(sc, MA_OWNED);
2072
2073 if_setdrvflagbits(ifp, 0, (IFF_DRV_RUNNING | IFF_DRV_OACTIVE));
2074 sc->sc_flags &= ~MUGE_FLAG_LINK;
2075
2076 /*
2077 * Stop all the transfers, if not already stopped.
2078 */
2079 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]);
2080 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]);
2081 }
2082
2083 /**
2084 * muge_tick - Called periodically to monitor the state of the LAN95xx chip
2085 * @ue: USB ether interface
2086 *
2087 * Simply calls the mii status functions to check the state of the link.
2088 *
2089 * LOCKING:
2090 * Should be called with the MUGE lock held.
2091 */
2092 static void
muge_tick(struct usb_ether * ue)2093 muge_tick(struct usb_ether *ue)
2094 {
2095
2096 struct muge_softc *sc = uether_getsc(ue);
2097 struct mii_data *mii = uether_getmii(&sc->sc_ue);
2098
2099 MUGE_LOCK_ASSERT(sc, MA_OWNED);
2100
2101 mii_tick(mii);
2102 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
2103 lan78xx_miibus_statchg(ue->ue_dev);
2104 if ((sc->sc_flags & MUGE_FLAG_LINK) != 0)
2105 muge_start(ue);
2106 }
2107 }
2108
2109 /**
2110 * muge_ifmedia_sts - Report current media status
2111 * @ifp: inet interface pointer
2112 * @ifmr: interface media request
2113 *
2114 * Call the mii functions to get the media status.
2115 *
2116 * LOCKING:
2117 * Internally takes and releases the device lock.
2118 */
2119 static void
muge_ifmedia_sts(if_t ifp,struct ifmediareq * ifmr)2120 muge_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
2121 {
2122 struct muge_softc *sc = if_getsoftc(ifp);
2123 struct mii_data *mii = uether_getmii(&sc->sc_ue);
2124
2125 MUGE_LOCK(sc);
2126 mii_pollstat(mii);
2127 ifmr->ifm_active = mii->mii_media_active;
2128 ifmr->ifm_status = mii->mii_media_status;
2129 MUGE_UNLOCK(sc);
2130 }
2131
2132 /**
2133 * muge_probe - Probe the interface.
2134 * @dev: muge device handle
2135 *
2136 * Checks if the device is a match for this driver.
2137 *
2138 * RETURNS:
2139 * Returns 0 on success or an error code on failure.
2140 */
2141 static int
muge_probe(device_t dev)2142 muge_probe(device_t dev)
2143 {
2144 struct usb_attach_arg *uaa = device_get_ivars(dev);
2145
2146 if (uaa->usb_mode != USB_MODE_HOST)
2147 return (ENXIO);
2148 if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX)
2149 return (ENXIO);
2150 if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX)
2151 return (ENXIO);
2152 return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa));
2153 }
2154
2155 /**
2156 * muge_attach - Attach the interface.
2157 * @dev: muge device handle
2158 *
2159 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
2160 *
2161 * RETURNS:
2162 * Returns 0 on success or a negative error code.
2163 */
2164 static int
muge_attach(device_t dev)2165 muge_attach(device_t dev)
2166 {
2167 struct usb_attach_arg *uaa = device_get_ivars(dev);
2168 struct muge_softc *sc = device_get_softc(dev);
2169 struct usb_ether *ue = &sc->sc_ue;
2170 uint8_t iface_index;
2171 int err;
2172
2173 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
2174
2175 device_set_usb_desc(dev);
2176
2177 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
2178
2179 /* Setup the endpoints for the Microchip LAN78xx device. */
2180 iface_index = MUGE_IFACE_IDX;
2181 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
2182 muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx);
2183 if (err) {
2184 device_printf(dev, "error: allocating USB transfers failed\n");
2185 goto err;
2186 }
2187
2188 ue->ue_sc = sc;
2189 ue->ue_dev = dev;
2190 ue->ue_udev = uaa->device;
2191 ue->ue_mtx = &sc->sc_mtx;
2192 ue->ue_methods = &muge_ue_methods;
2193
2194 err = uether_ifattach(ue);
2195 if (err) {
2196 device_printf(dev, "error: could not attach interface\n");
2197 goto err_usbd;
2198 }
2199
2200 /* Wait for lan78xx_chip_init from post-attach callback to complete. */
2201 uether_ifattach_wait(ue);
2202 if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE))
2203 goto err_attached;
2204
2205 return (0);
2206
2207 err_attached:
2208 uether_ifdetach(ue);
2209 err_usbd:
2210 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
2211 err:
2212 mtx_destroy(&sc->sc_mtx);
2213 return (ENXIO);
2214 }
2215
2216 /**
2217 * muge_detach - Detach the interface.
2218 * @dev: muge device handle
2219 *
2220 * RETURNS:
2221 * Returns 0.
2222 */
2223 static int
muge_detach(device_t dev)2224 muge_detach(device_t dev)
2225 {
2226
2227 struct muge_softc *sc = device_get_softc(dev);
2228 struct usb_ether *ue = &sc->sc_ue;
2229
2230 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
2231 uether_ifdetach(ue);
2232 mtx_destroy(&sc->sc_mtx);
2233
2234 return (0);
2235 }
2236
2237 static device_method_t muge_methods[] = {
2238 /* Device interface */
2239 DEVMETHOD(device_probe, muge_probe),
2240 DEVMETHOD(device_attach, muge_attach),
2241 DEVMETHOD(device_detach, muge_detach),
2242
2243 /* Bus interface */
2244 DEVMETHOD(bus_print_child, bus_generic_print_child),
2245 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
2246
2247 /* MII interface */
2248 DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg),
2249 DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg),
2250 DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg),
2251
2252 DEVMETHOD_END
2253 };
2254
2255 static driver_t muge_driver = {
2256 .name = "muge",
2257 .methods = muge_methods,
2258 .size = sizeof(struct muge_softc),
2259 };
2260
2261 DRIVER_MODULE(muge, uhub, muge_driver, NULL, NULL);
2262 DRIVER_MODULE(miibus, muge, miibus_driver, NULL, NULL);
2263 MODULE_DEPEND(muge, uether, 1, 1, 1);
2264 MODULE_DEPEND(muge, usb, 1, 1, 1);
2265 MODULE_DEPEND(muge, ether, 1, 1, 1);
2266 MODULE_DEPEND(muge, miibus, 1, 1, 1);
2267 MODULE_VERSION(muge, 1);
2268 USB_PNP_HOST_INFO(lan78xx_devs);
2269