Home
last modified time | relevance | path

Searched defs:train_set (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dg4x_dp.c829 u8 train_set = intel_dp->train_set[0]; in vlv_set_signal_levels() local
915 u8 train_set = intel_dp->train_set[0]; in chv_set_signal_levels() local
992 static u32 g4x_signal_levels(u8 train_set) in g4x_signal_levels()
1035 u8 train_set = intel_dp->train_set[0]; in g4x_set_signal_levels() local
1051 static u32 snb_cpu_edp_signal_levels(u8 train_set) in snb_cpu_edp_signal_levels()
1083 u8 train_set = intel_dp->train_set[0]; in snb_cpu_edp_set_signal_levels() local
1099 static u32 ivb_cpu_edp_signal_levels(u8 train_set) in ivb_cpu_edp_signal_levels()
1135 u8 train_set = intel_dp->train_set[0]; in ivb_cpu_edp_set_signal_levels() local
H A Dintel_display_types.h1864 u8 train_set[4]; member
/linux/drivers/gpu/drm/hisilicon/hibmc/dp/
H A Ddp_link.c110 u8 *train_set = dp->link.train_set; in hibmc_dp_link_training_cr_pre() local
141 u8 train_set[HIBMC_DP_LANE_NUM_MAX] = {0}; in hibmc_dp_link_get_adjust_train() local
/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c332 u8 train_set[ZYNQMP_DP_MAX_LANES]; member
407 u8 train_set[ZYNQMP_DP_MAX_LANES]; member
697 u8 *train_set = dp->train_set; in zynqmp_dp_adjust_train() local
726 static int zynqmp_dp_update_vs_emph(struct zynqmp_dp *dp, u8 *train_set) in zynqmp_dp_update_vs_emph()
2067 u8 *train_set = &dp->test.train_set[priv->lane]; in zynqmp_dp_swing_set() local
2103 u8 *train_set = &dp->test.train_set[priv->lane]; in zynqmp_dp_preemphasis_set() local
/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c268 uint8_t train_set[4]; member
/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-dp.c551 struct dw_dp_link_train_set *train_set = &link->train.adjust; in dw_dp_link_train_update_vs_emph() local