xref: /linux/drivers/mmc/host/toshsd.c (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Toshiba PCI Secure Digital Host Controller Interface driver
4  *
5  *  Copyright (C) 2014 Ondrej Zary
6  *  Copyright (C) 2007 Richard Betts, All Rights Reserved.
7  *
8  *	Based on asic3_mmc.c, copyright (c) 2005 SDG Systems, LLC and,
9  *	sdhci.c, copyright (C) 2005-2006 Pierre Ossman
10  */
11 
12 #include <linux/delay.h>
13 #include <linux/device.h>
14 #include <linux/module.h>
15 #include <linux/pci.h>
16 #include <linux/scatterlist.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/pm.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/mmc/host.h>
22 #include <linux/mmc/mmc.h>
23 
24 #include "toshsd.h"
25 
26 #define DRIVER_NAME "toshsd"
27 
28 static const struct pci_device_id pci_ids[] = {
29 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA, 0x0805) },
30 	{ /* end: all zeroes */ },
31 };
32 
33 MODULE_DEVICE_TABLE(pci, pci_ids);
34 
toshsd_init(struct toshsd_host * host)35 static void toshsd_init(struct toshsd_host *host)
36 {
37 	/* enable clock */
38 	pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP,
39 					SD_PCICFG_CLKSTOP_ENABLE_ALL);
40 	pci_write_config_byte(host->pdev, SD_PCICFG_CARDDETECT, 2);
41 
42 	/* reset */
43 	iowrite16(0, host->ioaddr + SD_SOFTWARERESET); /* assert */
44 	mdelay(2);
45 	iowrite16(1, host->ioaddr + SD_SOFTWARERESET); /* deassert */
46 	mdelay(2);
47 
48 	/* Clear card registers */
49 	iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
50 	iowrite32(0, host->ioaddr + SD_CARDSTATUS);
51 	iowrite32(0, host->ioaddr + SD_ERRORSTATUS0);
52 	iowrite16(0, host->ioaddr + SD_STOPINTERNAL);
53 
54 	/* SDIO clock? */
55 	iowrite16(0x100, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL);
56 
57 	/* enable LED */
58 	pci_write_config_byte(host->pdev, SD_PCICFG_SDLED_ENABLE1,
59 					SD_PCICFG_LED_ENABLE1_START);
60 	pci_write_config_byte(host->pdev, SD_PCICFG_SDLED_ENABLE2,
61 					SD_PCICFG_LED_ENABLE2_START);
62 
63 	/* set interrupt masks */
64 	iowrite32(~(u32)(SD_CARD_RESP_END | SD_CARD_RW_END
65 			| SD_CARD_CARD_REMOVED_0 | SD_CARD_CARD_INSERTED_0
66 			| SD_BUF_READ_ENABLE | SD_BUF_WRITE_ENABLE
67 			| SD_BUF_CMD_TIMEOUT),
68 			host->ioaddr + SD_INTMASKCARD);
69 
70 	iowrite16(0x1000, host->ioaddr + SD_TRANSACTIONCTRL);
71 }
72 
73 /* Set MMC clock / power.
74  * Note: This controller uses a simple divider scheme therefore it cannot run
75  * SD/MMC cards at full speed (24/20MHz). HCLK (=33MHz PCI clock?) is too high
76  * and the next slowest is 16MHz (div=2).
77  */
__toshsd_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)78 static void __toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
79 {
80 	struct toshsd_host *host = mmc_priv(mmc);
81 
82 	if (ios->clock) {
83 		u16 clk;
84 		int div = 1;
85 
86 		while (ios->clock < HCLK / div)
87 			div *= 2;
88 
89 		clk = div >> 2;
90 
91 		if (div == 1) { /* disable the divider */
92 			pci_write_config_byte(host->pdev, SD_PCICFG_CLKMODE,
93 					      SD_PCICFG_CLKMODE_DIV_DISABLE);
94 			clk |= SD_CARDCLK_DIV_DISABLE;
95 		} else
96 			pci_write_config_byte(host->pdev, SD_PCICFG_CLKMODE, 0);
97 
98 		clk |= SD_CARDCLK_ENABLE_CLOCK;
99 		iowrite16(clk, host->ioaddr + SD_CARDCLOCKCTRL);
100 
101 		mdelay(10);
102 	} else
103 		iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
104 
105 	switch (ios->power_mode) {
106 	case MMC_POWER_OFF:
107 		pci_write_config_byte(host->pdev, SD_PCICFG_POWER1,
108 					SD_PCICFG_PWR1_OFF);
109 		mdelay(1);
110 		break;
111 	case MMC_POWER_UP:
112 		break;
113 	case MMC_POWER_ON:
114 		pci_write_config_byte(host->pdev, SD_PCICFG_POWER1,
115 					SD_PCICFG_PWR1_33V);
116 		pci_write_config_byte(host->pdev, SD_PCICFG_POWER2,
117 					SD_PCICFG_PWR2_AUTO);
118 		mdelay(20);
119 		break;
120 	}
121 
122 	switch (ios->bus_width) {
123 	case MMC_BUS_WIDTH_1:
124 		iowrite16(SD_CARDOPT_REQUIRED | SD_CARDOPT_DATA_RESP_TIMEOUT(14)
125 				| SD_CARDOPT_C2_MODULE_ABSENT
126 				| SD_CARDOPT_DATA_XFR_WIDTH_1,
127 				host->ioaddr + SD_CARDOPTIONSETUP);
128 		break;
129 	case MMC_BUS_WIDTH_4:
130 		iowrite16(SD_CARDOPT_REQUIRED | SD_CARDOPT_DATA_RESP_TIMEOUT(14)
131 				| SD_CARDOPT_C2_MODULE_ABSENT
132 				| SD_CARDOPT_DATA_XFR_WIDTH_4,
133 				host->ioaddr + SD_CARDOPTIONSETUP);
134 		break;
135 	}
136 }
137 
toshsd_set_led(struct toshsd_host * host,unsigned char state)138 static void toshsd_set_led(struct toshsd_host *host, unsigned char state)
139 {
140 	iowrite16(state, host->ioaddr + SDIO_BASE + SDIO_LEDCTRL);
141 }
142 
toshsd_finish_request(struct toshsd_host * host)143 static void toshsd_finish_request(struct toshsd_host *host)
144 {
145 	struct mmc_request *mrq = host->mrq;
146 
147 	/* Write something to end the command */
148 	host->mrq = NULL;
149 	host->cmd = NULL;
150 	host->data = NULL;
151 
152 	toshsd_set_led(host, 0);
153 	mmc_request_done(host->mmc, mrq);
154 }
155 
toshsd_thread_irq(int irq,void * dev_id)156 static irqreturn_t toshsd_thread_irq(int irq, void *dev_id)
157 {
158 	struct toshsd_host *host = dev_id;
159 	struct mmc_data *data = host->data;
160 	struct sg_mapping_iter *sg_miter = &host->sg_miter;
161 	unsigned short *buf;
162 	int count;
163 	unsigned long flags;
164 
165 	if (!data) {
166 		dev_warn(&host->pdev->dev, "Spurious Data IRQ\n");
167 		if (host->cmd) {
168 			host->cmd->error = -EIO;
169 			toshsd_finish_request(host);
170 		}
171 		return IRQ_NONE;
172 	}
173 	spin_lock_irqsave(&host->lock, flags);
174 
175 	if (!sg_miter_next(sg_miter))
176 		goto done;
177 
178 	buf = sg_miter->addr;
179 
180 	/* Ensure we dont read more than one block. The chip will interrupt us
181 	 * When the next block is available.
182 	 */
183 	count = sg_miter->length;
184 	if (count > data->blksz)
185 		count = data->blksz;
186 
187 	dev_dbg(&host->pdev->dev, "count: %08x, flags %08x\n", count,
188 		data->flags);
189 
190 	/* Transfer the data */
191 	if (data->flags & MMC_DATA_READ)
192 		ioread32_rep(host->ioaddr + SD_DATAPORT, buf, count >> 2);
193 	else
194 		iowrite32_rep(host->ioaddr + SD_DATAPORT, buf, count >> 2);
195 
196 	sg_miter->consumed = count;
197 	sg_miter_stop(sg_miter);
198 
199 done:
200 	spin_unlock_irqrestore(&host->lock, flags);
201 
202 	return IRQ_HANDLED;
203 }
204 
toshsd_cmd_irq(struct toshsd_host * host)205 static void toshsd_cmd_irq(struct toshsd_host *host)
206 {
207 	struct mmc_command *cmd = host->cmd;
208 	u8 *buf;
209 	u16 data;
210 
211 	if (!host->cmd) {
212 		dev_warn(&host->pdev->dev, "Spurious CMD irq\n");
213 		return;
214 	}
215 	buf = (u8 *)cmd->resp;
216 	host->cmd = NULL;
217 
218 	if (cmd->flags & MMC_RSP_PRESENT && cmd->flags & MMC_RSP_136) {
219 		/* R2 */
220 		buf[12] = 0xff;
221 		data = ioread16(host->ioaddr + SD_RESPONSE0);
222 		buf[13] = data & 0xff;
223 		buf[14] = data >> 8;
224 		data = ioread16(host->ioaddr + SD_RESPONSE1);
225 		buf[15] = data & 0xff;
226 		buf[8] = data >> 8;
227 		data = ioread16(host->ioaddr + SD_RESPONSE2);
228 		buf[9] = data & 0xff;
229 		buf[10] = data >> 8;
230 		data = ioread16(host->ioaddr + SD_RESPONSE3);
231 		buf[11] = data & 0xff;
232 		buf[4] = data >> 8;
233 		data = ioread16(host->ioaddr + SD_RESPONSE4);
234 		buf[5] = data & 0xff;
235 		buf[6] = data >> 8;
236 		data = ioread16(host->ioaddr + SD_RESPONSE5);
237 		buf[7] = data & 0xff;
238 		buf[0] = data >> 8;
239 		data = ioread16(host->ioaddr + SD_RESPONSE6);
240 		buf[1] = data & 0xff;
241 		buf[2] = data >> 8;
242 		data = ioread16(host->ioaddr + SD_RESPONSE7);
243 		buf[3] = data & 0xff;
244 	} else if (cmd->flags & MMC_RSP_PRESENT) {
245 		/* R1, R1B, R3, R6, R7 */
246 		data = ioread16(host->ioaddr + SD_RESPONSE0);
247 		buf[0] = data & 0xff;
248 		buf[1] = data >> 8;
249 		data = ioread16(host->ioaddr + SD_RESPONSE1);
250 		buf[2] = data & 0xff;
251 		buf[3] = data >> 8;
252 	}
253 
254 	dev_dbg(&host->pdev->dev, "Command IRQ complete %d %d %x\n",
255 		cmd->opcode, cmd->error, cmd->flags);
256 
257 	/* If there is data to handle we will
258 	 * finish the request in the mmc_data_end_irq handler.*/
259 	if (host->data)
260 		return;
261 
262 	toshsd_finish_request(host);
263 }
264 
toshsd_data_end_irq(struct toshsd_host * host)265 static void toshsd_data_end_irq(struct toshsd_host *host)
266 {
267 	struct mmc_data *data = host->data;
268 
269 	host->data = NULL;
270 
271 	if (!data) {
272 		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
273 		return;
274 	}
275 
276 	if (data->error == 0)
277 		data->bytes_xfered = data->blocks * data->blksz;
278 	else
279 		data->bytes_xfered = 0;
280 
281 	dev_dbg(&host->pdev->dev, "Completed data request xfr=%d\n",
282 		data->bytes_xfered);
283 
284 	iowrite16(0, host->ioaddr + SD_STOPINTERNAL);
285 
286 	toshsd_finish_request(host);
287 }
288 
toshsd_irq(int irq,void * dev_id)289 static irqreturn_t toshsd_irq(int irq, void *dev_id)
290 {
291 	struct toshsd_host *host = dev_id;
292 	u32 int_reg, int_mask, int_status, detail;
293 	int error = 0, ret = IRQ_HANDLED;
294 
295 	spin_lock(&host->lock);
296 	int_status = ioread32(host->ioaddr + SD_CARDSTATUS);
297 	int_mask = ioread32(host->ioaddr + SD_INTMASKCARD);
298 	int_reg = int_status & ~int_mask & ~IRQ_DONT_CARE_BITS;
299 
300 	dev_dbg(&host->pdev->dev, "IRQ status:%x mask:%x\n",
301 		int_status, int_mask);
302 
303 	/* nothing to do: it's not our IRQ */
304 	if (!int_reg) {
305 		ret = IRQ_NONE;
306 		goto irq_end;
307 	}
308 
309 	if (int_reg & SD_BUF_CMD_TIMEOUT) {
310 		error = -ETIMEDOUT;
311 		dev_dbg(&host->pdev->dev, "Timeout\n");
312 	} else if (int_reg & SD_BUF_CRC_ERR) {
313 		error = -EILSEQ;
314 		dev_err(&host->pdev->dev, "BadCRC\n");
315 	} else if (int_reg & (SD_BUF_ILLEGAL_ACCESS
316 				| SD_BUF_CMD_INDEX_ERR
317 				| SD_BUF_STOP_BIT_END_ERR
318 				| SD_BUF_OVERFLOW
319 				| SD_BUF_UNDERFLOW
320 				| SD_BUF_DATA_TIMEOUT)) {
321 		dev_err(&host->pdev->dev, "Buffer status error: { %s%s%s%s%s%s}\n",
322 			int_reg & SD_BUF_ILLEGAL_ACCESS ? "ILLEGAL_ACC " : "",
323 			int_reg & SD_BUF_CMD_INDEX_ERR ? "CMD_INDEX " : "",
324 			int_reg & SD_BUF_STOP_BIT_END_ERR ? "STOPBIT_END " : "",
325 			int_reg & SD_BUF_OVERFLOW ? "OVERFLOW " : "",
326 			int_reg & SD_BUF_UNDERFLOW ? "UNDERFLOW " : "",
327 			int_reg & SD_BUF_DATA_TIMEOUT ? "DATA_TIMEOUT " : "");
328 
329 		detail = ioread32(host->ioaddr + SD_ERRORSTATUS0);
330 		dev_err(&host->pdev->dev, "detail error status { %s%s%s%s%s%s%s%s%s%s%s%s%s}\n",
331 			detail & SD_ERR0_RESP_CMD_ERR ? "RESP_CMD " : "",
332 			detail & SD_ERR0_RESP_NON_CMD12_END_BIT_ERR ? "RESP_END_BIT " : "",
333 			detail & SD_ERR0_RESP_CMD12_END_BIT_ERR ? "RESP_END_BIT " : "",
334 			detail & SD_ERR0_READ_DATA_END_BIT_ERR ? "READ_DATA_END_BIT " : "",
335 			detail & SD_ERR0_WRITE_CRC_STATUS_END_BIT_ERR ? "WRITE_CMD_END_BIT " : "",
336 			detail & SD_ERR0_RESP_NON_CMD12_CRC_ERR ? "RESP_CRC " : "",
337 			detail & SD_ERR0_RESP_CMD12_CRC_ERR ? "RESP_CRC " : "",
338 			detail & SD_ERR0_READ_DATA_CRC_ERR ? "READ_DATA_CRC " : "",
339 			detail & SD_ERR0_WRITE_CMD_CRC_ERR ? "WRITE_CMD_CRC " : "",
340 			detail & SD_ERR1_NO_CMD_RESP ? "NO_CMD_RESP " : "",
341 			detail & SD_ERR1_TIMEOUT_READ_DATA ? "READ_DATA_TIMEOUT " : "",
342 			detail & SD_ERR1_TIMEOUT_CRS_STATUS ? "CRS_STATUS_TIMEOUT " : "",
343 			detail & SD_ERR1_TIMEOUT_CRC_BUSY ? "CRC_BUSY_TIMEOUT " : "");
344 		error = -EIO;
345 	}
346 
347 	if (error) {
348 		if (host->cmd)
349 			host->cmd->error = error;
350 
351 		if (error == -ETIMEDOUT) {
352 			iowrite32(int_status &
353 				  ~(SD_BUF_CMD_TIMEOUT | SD_CARD_RESP_END),
354 				  host->ioaddr + SD_CARDSTATUS);
355 		} else {
356 			toshsd_init(host);
357 			__toshsd_set_ios(host->mmc, &host->mmc->ios);
358 			goto irq_end;
359 		}
360 	}
361 
362 	/* Card insert/remove. The mmc controlling code is stateless. */
363 	if (int_reg & (SD_CARD_CARD_INSERTED_0 | SD_CARD_CARD_REMOVED_0)) {
364 		iowrite32(int_status &
365 			  ~(SD_CARD_CARD_REMOVED_0 | SD_CARD_CARD_INSERTED_0),
366 			  host->ioaddr + SD_CARDSTATUS);
367 
368 		if (int_reg & SD_CARD_CARD_INSERTED_0)
369 			toshsd_init(host);
370 
371 		mmc_detect_change(host->mmc, 1);
372 	}
373 
374 	/* Data transfer */
375 	if (int_reg & (SD_BUF_READ_ENABLE | SD_BUF_WRITE_ENABLE)) {
376 		iowrite32(int_status &
377 			  ~(SD_BUF_WRITE_ENABLE | SD_BUF_READ_ENABLE),
378 			  host->ioaddr + SD_CARDSTATUS);
379 
380 		ret = IRQ_WAKE_THREAD;
381 		goto irq_end;
382 	}
383 
384 	/* Command completion */
385 	if (int_reg & SD_CARD_RESP_END) {
386 		iowrite32(int_status & ~(SD_CARD_RESP_END),
387 			  host->ioaddr + SD_CARDSTATUS);
388 		toshsd_cmd_irq(host);
389 	}
390 
391 	/* Data transfer completion */
392 	if (int_reg & SD_CARD_RW_END) {
393 		iowrite32(int_status & ~(SD_CARD_RW_END),
394 			  host->ioaddr + SD_CARDSTATUS);
395 		toshsd_data_end_irq(host);
396 	}
397 irq_end:
398 	spin_unlock(&host->lock);
399 	return ret;
400 }
401 
toshsd_start_cmd(struct toshsd_host * host,struct mmc_command * cmd)402 static void toshsd_start_cmd(struct toshsd_host *host, struct mmc_command *cmd)
403 {
404 	struct mmc_data *data = host->data;
405 	int c = cmd->opcode;
406 
407 	dev_dbg(&host->pdev->dev, "Command opcode: %d\n", cmd->opcode);
408 
409 	if (cmd->opcode == MMC_STOP_TRANSMISSION) {
410 		iowrite16(SD_STOPINT_ISSUE_CMD12,
411 			  host->ioaddr + SD_STOPINTERNAL);
412 
413 		cmd->resp[0] = cmd->opcode;
414 		cmd->resp[1] = 0;
415 		cmd->resp[2] = 0;
416 		cmd->resp[3] = 0;
417 
418 		toshsd_finish_request(host);
419 		return;
420 	}
421 
422 	switch (mmc_resp_type(cmd)) {
423 	case MMC_RSP_NONE:
424 		c |= SD_CMD_RESP_TYPE_NONE;
425 		break;
426 
427 	case MMC_RSP_R1:
428 		c |= SD_CMD_RESP_TYPE_EXT_R1;
429 		break;
430 	case MMC_RSP_R1B:
431 		c |= SD_CMD_RESP_TYPE_EXT_R1B;
432 		break;
433 	case MMC_RSP_R2:
434 		c |= SD_CMD_RESP_TYPE_EXT_R2;
435 		break;
436 	case MMC_RSP_R3:
437 		c |= SD_CMD_RESP_TYPE_EXT_R3;
438 		break;
439 
440 	default:
441 		dev_err(&host->pdev->dev, "Unknown response type %d\n",
442 			mmc_resp_type(cmd));
443 		break;
444 	}
445 
446 	host->cmd = cmd;
447 
448 	if (cmd->opcode == MMC_APP_CMD)
449 		c |= SD_CMD_TYPE_ACMD;
450 
451 	if (cmd->opcode == MMC_GO_IDLE_STATE)
452 		c |= (3 << 8);  /* removed from ipaq-asic3.h for some reason */
453 
454 	if (data) {
455 		c |= SD_CMD_DATA_PRESENT;
456 
457 		if (data->blocks > 1) {
458 			iowrite16(SD_STOPINT_AUTO_ISSUE_CMD12,
459 				  host->ioaddr + SD_STOPINTERNAL);
460 			c |= SD_CMD_MULTI_BLOCK;
461 		}
462 
463 		if (data->flags & MMC_DATA_READ)
464 			c |= SD_CMD_TRANSFER_READ;
465 
466 		/* MMC_DATA_WRITE does not require a bit to be set */
467 	}
468 
469 	/* Send the command */
470 	iowrite32(cmd->arg, host->ioaddr + SD_ARG0);
471 	iowrite16(c, host->ioaddr + SD_CMD);
472 }
473 
toshsd_start_data(struct toshsd_host * host,struct mmc_data * data)474 static void toshsd_start_data(struct toshsd_host *host, struct mmc_data *data)
475 {
476 	unsigned int flags = SG_MITER_ATOMIC;
477 
478 	dev_dbg(&host->pdev->dev, "setup data transfer: blocksize %08x  nr_blocks %d, offset: %08x\n",
479 		data->blksz, data->blocks, data->sg->offset);
480 
481 	host->data = data;
482 
483 	if (data->flags & MMC_DATA_READ)
484 		flags |= SG_MITER_TO_SG;
485 	else
486 		flags |= SG_MITER_FROM_SG;
487 
488 	sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
489 
490 	/* Set transfer length and blocksize */
491 	iowrite16(data->blocks, host->ioaddr + SD_BLOCKCOUNT);
492 	iowrite16(data->blksz, host->ioaddr + SD_CARDXFERDATALEN);
493 }
494 
495 /* Process requests from the MMC layer */
toshsd_request(struct mmc_host * mmc,struct mmc_request * mrq)496 static void toshsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
497 {
498 	struct toshsd_host *host = mmc_priv(mmc);
499 	unsigned long flags;
500 
501 	/* abort if card not present */
502 	if (!(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_PRESENT_0)) {
503 		mrq->cmd->error = -ENOMEDIUM;
504 		mmc_request_done(mmc, mrq);
505 		return;
506 	}
507 
508 	spin_lock_irqsave(&host->lock, flags);
509 
510 	WARN_ON(host->mrq != NULL);
511 
512 	host->mrq = mrq;
513 
514 	if (mrq->data)
515 		toshsd_start_data(host, mrq->data);
516 
517 	toshsd_set_led(host, 1);
518 
519 	toshsd_start_cmd(host, mrq->cmd);
520 
521 	spin_unlock_irqrestore(&host->lock, flags);
522 }
523 
toshsd_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)524 static void toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
525 {
526 	struct toshsd_host *host = mmc_priv(mmc);
527 	unsigned long flags;
528 
529 	spin_lock_irqsave(&host->lock, flags);
530 	__toshsd_set_ios(mmc, ios);
531 	spin_unlock_irqrestore(&host->lock, flags);
532 }
533 
toshsd_get_ro(struct mmc_host * mmc)534 static int toshsd_get_ro(struct mmc_host *mmc)
535 {
536 	struct toshsd_host *host = mmc_priv(mmc);
537 
538 	/* active low */
539 	return !(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_WRITE_PROTECT);
540 }
541 
toshsd_get_cd(struct mmc_host * mmc)542 static int toshsd_get_cd(struct mmc_host *mmc)
543 {
544 	struct toshsd_host *host = mmc_priv(mmc);
545 
546 	return !!(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_PRESENT_0);
547 }
548 
549 static const struct mmc_host_ops toshsd_ops = {
550 	.request = toshsd_request,
551 	.set_ios = toshsd_set_ios,
552 	.get_ro = toshsd_get_ro,
553 	.get_cd = toshsd_get_cd,
554 };
555 
556 
toshsd_powerdown(struct toshsd_host * host)557 static void toshsd_powerdown(struct toshsd_host *host)
558 {
559 	/* mask all interrupts */
560 	iowrite32(0xffffffff, host->ioaddr + SD_INTMASKCARD);
561 	/* disable card clock */
562 	iowrite16(0x000, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL);
563 	iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
564 	/* power down card */
565 	pci_write_config_byte(host->pdev, SD_PCICFG_POWER1, SD_PCICFG_PWR1_OFF);
566 	/* disable clock */
567 	pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP, 0);
568 }
569 
570 #ifdef CONFIG_PM_SLEEP
toshsd_pm_suspend(struct device * dev)571 static int toshsd_pm_suspend(struct device *dev)
572 {
573 	struct pci_dev *pdev = to_pci_dev(dev);
574 	struct toshsd_host *host = pci_get_drvdata(pdev);
575 
576 	toshsd_powerdown(host);
577 
578 	pci_save_state(pdev);
579 	pci_enable_wake(pdev, PCI_D3hot, 0);
580 	pci_disable_device(pdev);
581 	pci_set_power_state(pdev, PCI_D3hot);
582 
583 	return 0;
584 }
585 
toshsd_pm_resume(struct device * dev)586 static int toshsd_pm_resume(struct device *dev)
587 {
588 	struct pci_dev *pdev = to_pci_dev(dev);
589 	struct toshsd_host *host = pci_get_drvdata(pdev);
590 	int ret;
591 
592 	pci_set_power_state(pdev, PCI_D0);
593 	pci_restore_state(pdev);
594 	ret = pci_enable_device(pdev);
595 	if (ret)
596 		return ret;
597 
598 	toshsd_init(host);
599 
600 	return 0;
601 }
602 #endif /* CONFIG_PM_SLEEP */
603 
toshsd_probe(struct pci_dev * pdev,const struct pci_device_id * ent)604 static int toshsd_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
605 {
606 	int ret;
607 	struct toshsd_host *host;
608 	struct mmc_host *mmc;
609 	resource_size_t base;
610 
611 	ret = pci_enable_device(pdev);
612 	if (ret)
613 		return ret;
614 
615 	mmc = mmc_alloc_host(sizeof(struct toshsd_host), &pdev->dev);
616 	if (!mmc) {
617 		ret = -ENOMEM;
618 		goto err;
619 	}
620 
621 	host = mmc_priv(mmc);
622 	host->mmc = mmc;
623 
624 	host->pdev = pdev;
625 	pci_set_drvdata(pdev, host);
626 
627 	ret = pci_request_regions(pdev, DRIVER_NAME);
628 	if (ret)
629 		goto free;
630 
631 	host->ioaddr = pci_iomap(pdev, 0, 0);
632 	if (!host->ioaddr) {
633 		ret = -ENOMEM;
634 		goto release;
635 	}
636 
637 	/* Set MMC host parameters */
638 	mmc->ops = &toshsd_ops;
639 	mmc->caps = MMC_CAP_4_BIT_DATA;
640 	mmc->ocr_avail = MMC_VDD_32_33;
641 
642 	mmc->f_min = HCLK / 512;
643 	mmc->f_max = HCLK;
644 
645 	spin_lock_init(&host->lock);
646 
647 	toshsd_init(host);
648 
649 	ret = request_threaded_irq(pdev->irq, toshsd_irq, toshsd_thread_irq,
650 				   IRQF_SHARED, DRIVER_NAME, host);
651 	if (ret)
652 		goto unmap;
653 
654 	ret = mmc_add_host(mmc);
655 	if (ret)
656 		goto free_irq;
657 
658 	base = pci_resource_start(pdev, 0);
659 	dev_dbg(&pdev->dev, "MMIO %pa, IRQ %d\n", &base, pdev->irq);
660 
661 	pm_suspend_ignore_children(&pdev->dev, 1);
662 
663 	return 0;
664 
665 free_irq:
666 	free_irq(pdev->irq, host);
667 unmap:
668 	pci_iounmap(pdev, host->ioaddr);
669 release:
670 	pci_release_regions(pdev);
671 free:
672 	mmc_free_host(mmc);
673 	pci_set_drvdata(pdev, NULL);
674 err:
675 	pci_disable_device(pdev);
676 	return ret;
677 }
678 
toshsd_remove(struct pci_dev * pdev)679 static void toshsd_remove(struct pci_dev *pdev)
680 {
681 	struct toshsd_host *host = pci_get_drvdata(pdev);
682 
683 	mmc_remove_host(host->mmc);
684 	toshsd_powerdown(host);
685 	free_irq(pdev->irq, host);
686 	pci_iounmap(pdev, host->ioaddr);
687 	pci_release_regions(pdev);
688 	mmc_free_host(host->mmc);
689 	pci_set_drvdata(pdev, NULL);
690 	pci_disable_device(pdev);
691 }
692 
693 static const struct dev_pm_ops toshsd_pm_ops = {
694 	SET_SYSTEM_SLEEP_PM_OPS(toshsd_pm_suspend, toshsd_pm_resume)
695 };
696 
697 static struct pci_driver toshsd_driver = {
698 	.name = DRIVER_NAME,
699 	.id_table = pci_ids,
700 	.probe = toshsd_probe,
701 	.remove = toshsd_remove,
702 	.driver.pm = &toshsd_pm_ops,
703 };
704 
705 module_pci_driver(toshsd_driver);
706 
707 MODULE_AUTHOR("Ondrej Zary, Richard Betts");
708 MODULE_DESCRIPTION("Toshiba PCI Secure Digital Host Controller Interface driver");
709 MODULE_LICENSE("GPL");
710