1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21/* 22 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved. 23 */ 24 25#if !defined(lint) 26#include "assym.h" 27#endif 28 29/* 30 * General assembly language routines. 31 * It is the intent of this file to contain routines that are 32 * specific to cpu architecture. 33 */ 34 35/* 36 * WARNING: If you add a fast trap handler which can be invoked by a 37 * non-privileged user, you may have to use the FAST_TRAP_DONE macro 38 * instead of "done" instruction to return back to the user mode. See 39 * comments for the "fast_trap_done" entry point for more information. 40 */ 41#define FAST_TRAP_DONE \ 42 ba,a fast_trap_done 43 44#include <sys/machclock.h> 45#include <sys/clock.h> 46 47#if defined(lint) 48#include <sys/types.h> 49#include <sys/scb.h> 50#include <sys/systm.h> 51#include <sys/regset.h> 52#include <sys/sunddi.h> 53#include <sys/lockstat.h> 54#endif /* lint */ 55 56 57#include <sys/asm_linkage.h> 58#include <sys/privregs.h> 59#include <vm/hat_sfmmu.h> 60#include <sys/machparam.h> /* To get SYSBASE and PAGESIZE */ 61#include <sys/machthread.h> 62#include <sys/clock.h> 63#include <sys/intreg.h> 64#include <sys/psr_compat.h> 65#include <sys/isa_defs.h> 66#include <sys/dditypes.h> 67#include <sys/intr.h> 68#include <sys/hypervisor_api.h> 69 70#if !defined(lint) 71#include "assym.h" 72#endif 73 74#define ICACHE_FLUSHSZ 0x20 75 76#if defined(lint) 77/* 78 * Softint generated when counter field of tick reg matches value field 79 * of tick_cmpr reg 80 */ 81/*ARGSUSED*/ 82void 83tickcmpr_set(uint64_t clock_cycles) 84{} 85 86#else /* lint */ 87 88 ENTRY_NP(tickcmpr_set) 89 ! get 64-bit clock_cycles interval 90 mov %o0, %o2 91 mov 8, %o3 ! A reasonable initial step size 921: 93 WR_TICKCMPR(%o2,%o4,%o5,__LINE__) ! Write to TICK_CMPR 94 95 GET_NATIVE_TIME(%o0,%o4,%o5,__LINE__) ! Read %tick to confirm the 96 ! value we wrote was in the 97 ! future. 98 99 cmp %o2, %o0 ! If the value we wrote was in the 100 bg,pt %xcc, 2f ! future, then blow out of here. 101 sllx %o3, 1, %o3 ! If not, then double our step size, 102 ba,pt %xcc, 1b ! and take another lap. 103 add %o0, %o3, %o2 ! 1042: 105 retl 106 nop 107 SET_SIZE(tickcmpr_set) 108 109#endif /* lint */ 110 111#if defined(lint) 112 113void 114tickcmpr_disable(void) 115{} 116 117#else 118 119 ENTRY_NP(tickcmpr_disable) 120 mov 1, %g1 121 sllx %g1, TICKINT_DIS_SHFT, %o0 122 WR_TICKCMPR(%o0,%o4,%o5,__LINE__) ! Write to TICK_CMPR 123 retl 124 nop 125 SET_SIZE(tickcmpr_disable) 126 127#endif 128 129#if defined(lint) 130 131/* 132 * tick_write_delta() is intended to increment %stick by the specified delta, 133 * but %stick is only writeable in hyperprivileged mode and at present there 134 * is no provision for this. tick_write_delta is called by the cylic subsystem 135 * if a negative %stick delta is observed after cyclic processing is resumed 136 * after an event such as an OS suspend/resume. On sun4v, the suspend/resume 137 * routines should adjust the %stick offset preventing the cyclic subsystem 138 * from detecting a negative delta. If a negative delta is detected, panic the 139 * system. The negative delta could be caused by improper %stick 140 * synchronization after a suspend/resume. 141 */ 142 143/*ARGSUSED*/ 144void 145tick_write_delta(uint64_t delta) 146{} 147 148#else /* lint */ 149 150 .seg ".text" 151tick_write_delta_panic: 152 .asciz "tick_write_delta: not supported, delta: 0x%lx" 153 154 ENTRY_NP(tick_write_delta) 155 sethi %hi(tick_write_delta_panic), %o1 156 save %sp, -SA(MINFRAME), %sp ! get a new window to preserve caller 157 mov %i0, %o1 158 call panic 159 or %i1, %lo(tick_write_delta_panic), %o0 160 /*NOTREACHED*/ 161 retl 162 nop 163#endif 164 165#if defined(lint) 166/* 167 * return 1 if disabled 168 */ 169 170int 171tickcmpr_disabled(void) 172{ return (0); } 173 174#else /* lint */ 175 176 ENTRY_NP(tickcmpr_disabled) 177 RD_TICKCMPR(%g1,%o0,%o1,__LINE__) 178 retl 179 srlx %g1, TICKINT_DIS_SHFT, %o0 180 SET_SIZE(tickcmpr_disabled) 181 182#endif /* lint */ 183 184/* 185 * Get current tick 186 */ 187#if defined(lint) 188 189u_longlong_t 190gettick(void) 191{ return (0); } 192 193u_longlong_t 194randtick(void) 195{ return (0); } 196 197#else /* lint */ 198 199 ENTRY(gettick) 200 ALTENTRY(randtick) 201 GET_NATIVE_TIME(%o0,%o2,%o3,__LINE__) 202 retl 203 nop 204 SET_SIZE(randtick) 205 SET_SIZE(gettick) 206 207#endif /* lint */ 208 209/* 210 * Get current tick. For trapstat use only. 211 */ 212#if defined (lint) 213 214hrtime_t 215rdtick() 216{ return (0); } 217 218#else 219 ENTRY(rdtick) 220 retl 221 RD_TICK_PHYSICAL(%o0) 222 SET_SIZE(rdtick) 223#endif /* lint */ 224 225 226/* 227 * Return the counter portion of the tick register. 228 */ 229 230#if defined(lint) 231 232uint64_t 233gettick_counter(void) 234{ return(0); } 235 236uint64_t 237gettick_npt(void) 238{ return(0); } 239 240uint64_t 241getstick_npt(void) 242{ return(0); } 243 244#else /* lint */ 245 246 ENTRY_NP(gettick_counter) 247 RD_TICK(%o0,%o1,%o2,__LINE__) 248 retl 249 nop 250 SET_SIZE(gettick_counter) 251 252 ENTRY_NP(gettick_npt) 253 RD_TICK_PHYSICAL(%o0) 254 retl 255 srlx %o0, 63, %o0 256 SET_SIZE(gettick_npt) 257 258 ENTRY_NP(getstick_npt) 259 RD_STICK_PHYSICAL(%o0) 260 retl 261 srlx %o0, 63, %o0 262 SET_SIZE(getstick_npt) 263#endif /* lint */ 264 265/* 266 * Provide a C callable interface to the trap that reads the hi-res timer. 267 * Returns 64-bit nanosecond timestamp in %o0 and %o1. 268 */ 269 270#if defined(lint) 271 272hrtime_t 273gethrtime(void) 274{ 275 return ((hrtime_t)0); 276} 277 278hrtime_t 279gethrtime_unscaled(void) 280{ 281 return ((hrtime_t)0); 282} 283 284hrtime_t 285gethrtime_max(void) 286{ 287 return ((hrtime_t)0); 288} 289 290void 291scalehrtime(hrtime_t *hrt) 292{ 293 *hrt = 0; 294} 295 296void 297gethrestime(timespec_t *tp) 298{ 299 tp->tv_sec = 0; 300 tp->tv_nsec = 0; 301} 302 303time_t 304gethrestime_sec(void) 305{ 306 return (0); 307} 308 309void 310gethrestime_lasttick(timespec_t *tp) 311{ 312 tp->tv_sec = 0; 313 tp->tv_nsec = 0; 314} 315 316/*ARGSUSED*/ 317void 318hres_tick(void) 319{ 320} 321 322void 323panic_hres_tick(void) 324{ 325} 326 327#else /* lint */ 328 329 ENTRY_NP(gethrtime) 330 GET_HRTIME(%g1,%o0,%o1,%o2,%o3,%o4,%o5,%g2,__LINE__) 331 ! %g1 = hrtime 332 retl 333 mov %g1, %o0 334 SET_SIZE(gethrtime) 335 336 ENTRY_NP(gethrtime_unscaled) 337 GET_NATIVE_TIME(%g1,%o2,%o3,__LINE__) ! %g1 = native time 338 retl 339 mov %g1, %o0 340 SET_SIZE(gethrtime_unscaled) 341 342 ENTRY_NP(gethrtime_waitfree) 343 ALTENTRY(dtrace_gethrtime) 344 GET_NATIVE_TIME(%g1,%o2,%o3,__LINE__) ! %g1 = native time 345 NATIVE_TIME_TO_NSEC(%g1, %o2, %o3) 346 retl 347 mov %g1, %o0 348 SET_SIZE(dtrace_gethrtime) 349 SET_SIZE(gethrtime_waitfree) 350 351 ENTRY(gethrtime_max) 352 NATIVE_TIME_MAX(%g1) 353 NATIVE_TIME_TO_NSEC(%g1, %o0, %o1) 354 355 ! hrtime_t's are signed, max hrtime_t must be positive 356 mov -1, %o2 357 brlz,a %g1, 1f 358 srlx %o2, 1, %g1 3591: 360 retl 361 mov %g1, %o0 362 SET_SIZE(gethrtime_max) 363 364 ENTRY(scalehrtime) 365 ldx [%o0], %o1 366 NATIVE_TIME_TO_NSEC(%o1, %o2, %o3) 367 retl 368 stx %o1, [%o0] 369 SET_SIZE(scalehrtime) 370 371/* 372 * Fast trap to return a timestamp, uses trap window, leaves traps 373 * disabled. Returns a 64-bit nanosecond timestamp in %o0 and %o1. 374 * 375 * This is the handler for the ST_GETHRTIME trap. 376 */ 377 378 ENTRY_NP(get_timestamp) 379 GET_HRTIME(%g1,%g2,%g3,%g4,%g5,%o0,%o1,%o2,__LINE__) 380 ! %g1 = hrtime 381 srlx %g1, 32, %o0 ! %o0 = hi32(%g1) 382 srl %g1, 0, %o1 ! %o1 = lo32(%g1) 383 FAST_TRAP_DONE 384 SET_SIZE(get_timestamp) 385 386/* 387 * Macro to convert GET_HRESTIME() bits into a timestamp. 388 * 389 * We use two separate macros so that the platform-dependent GET_HRESTIME() 390 * can be as small as possible; CONV_HRESTIME() implements the generic part. 391 */ 392#define CONV_HRESTIME(hrestsec, hrestnsec, adj, nslt, nano) \ 393 brz,pt adj, 3f; /* no adjustments, it's easy */ \ 394 add hrestnsec, nslt, hrestnsec; /* hrest.tv_nsec += nslt */ \ 395 brlz,pn adj, 2f; /* if hrestime_adj negative */ \ 396 srlx nslt, ADJ_SHIFT, nslt; /* delay: nslt >>= 4 */ \ 397 subcc adj, nslt, %g0; /* hrestime_adj - nslt/16 */ \ 398 movg %xcc, nslt, adj; /* adj by min(adj, nslt/16) */ \ 399 ba 3f; /* go convert to sec/nsec */ \ 400 add hrestnsec, adj, hrestnsec; /* delay: apply adjustment */ \ 4012: addcc adj, nslt, %g0; /* hrestime_adj + nslt/16 */ \ 402 bge,a,pt %xcc, 3f; /* is adj less negative? */ \ 403 add hrestnsec, adj, hrestnsec; /* yes: hrest.nsec += adj */ \ 404 sub hrestnsec, nslt, hrestnsec; /* no: hrest.nsec -= nslt/16 */ \ 4053: cmp hrestnsec, nano; /* more than a billion? */ \ 406 bl,pt %xcc, 4f; /* if not, we're done */ \ 407 nop; /* delay: do nothing :( */ \ 408 add hrestsec, 1, hrestsec; /* hrest.tv_sec++; */ \ 409 sub hrestnsec, nano, hrestnsec; /* hrest.tv_nsec -= NANOSEC; */ \ 410 ba,a 3b; /* check >= billion again */ \ 4114: 412 413 ENTRY_NP(gethrestime) 414 GET_HRESTIME(%o1,%o2,%o3,%o4,%o5,%g1,%g2,%g3,%g4,__LINE__) 415 CONV_HRESTIME(%o1, %o2, %o3, %o4, %o5) 416 stn %o1, [%o0] 417 retl 418 stn %o2, [%o0 + CLONGSIZE] 419 SET_SIZE(gethrestime) 420 421/* 422 * Similar to gethrestime(), but gethrestime_sec() returns current hrestime 423 * seconds. 424 */ 425 ENTRY_NP(gethrestime_sec) 426 GET_HRESTIME(%o0,%o2,%o3,%o4,%o5,%g1,%g2,%g3,%g4,__LINE__) 427 CONV_HRESTIME(%o0, %o2, %o3, %o4, %o5) 428 retl ! %o0 current hrestime seconds 429 nop 430 SET_SIZE(gethrestime_sec) 431 432/* 433 * Returns the hrestime on the last tick. This is simpler than gethrestime() 434 * and gethrestime_sec(): no conversion is required. gethrestime_lasttick() 435 * follows the same locking algorithm as GET_HRESTIME and GET_HRTIME, 436 * outlined in detail in clock.h. (Unlike GET_HRESTIME/GET_HRTIME, we don't 437 * rely on load dependencies to effect the membar #LoadLoad, instead declaring 438 * it explicitly.) 439 */ 440 ENTRY_NP(gethrestime_lasttick) 441 sethi %hi(hres_lock), %o1 4420: 443 lduw [%o1 + %lo(hres_lock)], %o2 ! Load lock value 444 membar #LoadLoad ! Load of lock must complete 445 andn %o2, 1, %o2 ! Mask off lowest bit 446 ldn [%o1 + %lo(hrestime)], %g1 ! Seconds. 447 add %o1, %lo(hrestime), %o4 448 ldn [%o4 + CLONGSIZE], %g2 ! Nanoseconds. 449 membar #LoadLoad ! All loads must complete 450 lduw [%o1 + %lo(hres_lock)], %o3 ! Reload lock value 451 cmp %o3, %o2 ! If lock is locked or has 452 bne 0b ! changed, retry. 453 stn %g1, [%o0] ! Delay: store seconds 454 retl 455 stn %g2, [%o0 + CLONGSIZE] ! Delay: store nanoseconds 456 SET_SIZE(gethrestime_lasttick) 457 458/* 459 * Fast trap for gettimeofday(). Returns a timestruc_t in %o0 and %o1. 460 * 461 * This is the handler for the ST_GETHRESTIME trap. 462 */ 463 464 ENTRY_NP(get_hrestime) 465 GET_HRESTIME(%o0,%o1,%g1,%g2,%g3,%g4,%g5,%o2,%o3,__LINE__) 466 CONV_HRESTIME(%o0, %o1, %g1, %g2, %g3) 467 FAST_TRAP_DONE 468 SET_SIZE(get_hrestime) 469 470/* 471 * Fast trap to return lwp virtual time, uses trap window, leaves traps 472 * disabled. Returns a 64-bit number in %o0:%o1, which is the number 473 * of nanoseconds consumed. 474 * 475 * This is the handler for the ST_GETHRVTIME trap. 476 * 477 * Register usage: 478 * %o0, %o1 = return lwp virtual time 479 * %o2 = CPU/thread 480 * %o3 = lwp 481 * %g1 = scratch 482 * %g5 = scratch 483 */ 484 ENTRY_NP(get_virtime) 485 GET_NATIVE_TIME(%g5,%g1,%g2,__LINE__) ! %g5 = native time in ticks 486 CPU_ADDR(%g2, %g3) ! CPU struct ptr to %g2 487 ldn [%g2 + CPU_THREAD], %g2 ! thread pointer to %g2 488 ldn [%g2 + T_LWP], %g3 ! lwp pointer to %g3 489 490 /* 491 * Subtract start time of current microstate from time 492 * of day to get increment for lwp virtual time. 493 */ 494 ldx [%g3 + LWP_STATE_START], %g1 ! ms_state_start 495 sub %g5, %g1, %g5 496 497 /* 498 * Add current value of ms_acct[LMS_USER] 499 */ 500 ldx [%g3 + LWP_ACCT_USER], %g1 ! ms_acct[LMS_USER] 501 add %g5, %g1, %g5 502 NATIVE_TIME_TO_NSEC(%g5, %g1, %o0) 503 504 srl %g5, 0, %o1 ! %o1 = lo32(%g5) 505 srlx %g5, 32, %o0 ! %o0 = hi32(%g5) 506 507 FAST_TRAP_DONE 508 SET_SIZE(get_virtime) 509 510 511 512 .seg ".text" 513hrtime_base_panic: 514 .asciz "hrtime_base stepping back" 515 516 517 ENTRY_NP(hres_tick) 518 save %sp, -SA(MINFRAME), %sp ! get a new window 519 520 sethi %hi(hrestime), %l4 521 ldstub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 ! try locking 5227: tst %l5 523 bz,pt %xcc, 8f ! if we got it, drive on 524 ld [%l4 + %lo(nsec_scale)], %l5 ! delay: %l5 = scaling factor 525 ldub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 5269: tst %l5 527 bz,a,pn %xcc, 7b 528 ldstub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 529 ba,pt %xcc, 9b 530 ldub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 5318: 532 membar #StoreLoad|#StoreStore 533 534 ! 535 ! update hres_last_tick. %l5 has the scaling factor (nsec_scale). 536 ! 537 ldx [%l4 + %lo(hrtime_base)], %g1 ! load current hrtime_base 538 GET_NATIVE_TIME(%l0,%l3,%l6,__LINE__) ! current native time 539 stx %l0, [%l4 + %lo(hres_last_tick)]! prev = current 540 ! convert native time to nsecs 541 NATIVE_TIME_TO_NSEC_SCALE(%l0, %l5, %l2, NSEC_SHIFT) 542 543 sub %l0, %g1, %i1 ! get accurate nsec delta 544 545 ldx [%l4 + %lo(hrtime_base)], %l1 546 cmp %l1, %l0 547 bg,pn %xcc, 9f 548 nop 549 550 stx %l0, [%l4 + %lo(hrtime_base)] ! update hrtime_base 551 552 ! 553 ! apply adjustment, if any 554 ! 555 ldx [%l4 + %lo(hrestime_adj)], %l0 ! %l0 = hrestime_adj 556 brz %l0, 2f 557 ! hrestime_adj == 0 ? 558 ! yes, skip adjustments 559 clr %l5 ! delay: set adj to zero 560 tst %l0 ! is hrestime_adj >= 0 ? 561 bge,pt %xcc, 1f ! yes, go handle positive case 562 srl %i1, ADJ_SHIFT, %l5 ! delay: %l5 = adj 563 564 addcc %l0, %l5, %g0 ! hrestime_adj < -adj ? 565 bl,pt %xcc, 2f ! yes, use current adj 566 neg %l5 ! delay: %l5 = -adj 567 ba,pt %xcc, 2f 568 mov %l0, %l5 ! no, so set adj = hrestime_adj 5691: 570 subcc %l0, %l5, %g0 ! hrestime_adj < adj ? 571 bl,a,pt %xcc, 2f ! yes, set adj = hrestime_adj 572 mov %l0, %l5 ! delay: adj = hrestime_adj 5732: 574 ldx [%l4 + %lo(timedelta)], %l0 ! %l0 = timedelta 575 sub %l0, %l5, %l0 ! timedelta -= adj 576 577 stx %l0, [%l4 + %lo(timedelta)] ! store new timedelta 578 stx %l0, [%l4 + %lo(hrestime_adj)] ! hrestime_adj = timedelta 579 580 or %l4, %lo(hrestime), %l2 581 ldn [%l2], %i2 ! %i2:%i3 = hrestime sec:nsec 582 ldn [%l2 + CLONGSIZE], %i3 583 add %i3, %l5, %i3 ! hrestime.nsec += adj 584 add %i3, %i1, %i3 ! hrestime.nsec += nslt 585 586 set NANOSEC, %l5 ! %l5 = NANOSEC 587 cmp %i3, %l5 588 bl,pt %xcc, 5f ! if hrestime.tv_nsec < NANOSEC 589 sethi %hi(one_sec), %i1 ! delay 590 add %i2, 0x1, %i2 ! hrestime.tv_sec++ 591 sub %i3, %l5, %i3 ! hrestime.tv_nsec - NANOSEC 592 mov 0x1, %l5 593 st %l5, [%i1 + %lo(one_sec)] 5945: 595 stn %i2, [%l2] 596 stn %i3, [%l2 + CLONGSIZE] ! store the new hrestime 597 598 membar #StoreStore 599 600 ld [%l4 + %lo(hres_lock)], %i1 601 inc %i1 ! release lock 602 st %i1, [%l4 + %lo(hres_lock)] ! clear hres_lock 603 604 ret 605 restore 606 6079: 608 ! 609 ! release hres_lock 610 ! 611 ld [%l4 + %lo(hres_lock)], %i1 612 inc %i1 613 st %i1, [%l4 + %lo(hres_lock)] 614 615 sethi %hi(hrtime_base_panic), %o0 616 call panic 617 or %o0, %lo(hrtime_base_panic), %o0 618 619 SET_SIZE(hres_tick) 620 621#endif /* lint */ 622 623#if !defined(lint) && !defined(__lint) 624 625 .seg ".text" 626kstat_q_panic_msg: 627 .asciz "kstat_q_exit: qlen == 0" 628 629 ENTRY(kstat_q_panic) 630 save %sp, -SA(MINFRAME), %sp 631 sethi %hi(kstat_q_panic_msg), %o0 632 call panic 633 or %o0, %lo(kstat_q_panic_msg), %o0 634 /*NOTREACHED*/ 635 SET_SIZE(kstat_q_panic) 636 637#define BRZPN brz,pn 638#define BRZPT brz,pt 639 640#define KSTAT_Q_UPDATE(QOP, QBR, QZERO, QRETURN, QTYPE) \ 641 ld [%o0 + QTYPE/**/CNT], %o1; /* %o1 = old qlen */ \ 642 QOP %o1, 1, %o2; /* %o2 = new qlen */ \ 643 QBR %o1, QZERO; /* done if qlen == 0 */ \ 644 st %o2, [%o0 + QTYPE/**/CNT]; /* delay: save qlen */ \ 645 ldx [%o0 + QTYPE/**/LASTUPDATE], %o3; \ 646 ldx [%o0 + QTYPE/**/TIME], %o4; /* %o4 = old time */ \ 647 ldx [%o0 + QTYPE/**/LENTIME], %o5; /* %o5 = old lentime */ \ 648 sub %g1, %o3, %o2; /* %o2 = time delta */ \ 649 mulx %o1, %o2, %o3; /* %o3 = cur lentime */ \ 650 add %o4, %o2, %o4; /* %o4 = new time */ \ 651 add %o5, %o3, %o5; /* %o5 = new lentime */ \ 652 stx %o4, [%o0 + QTYPE/**/TIME]; /* save time */ \ 653 stx %o5, [%o0 + QTYPE/**/LENTIME]; /* save lentime */ \ 654QRETURN; \ 655 stx %g1, [%o0 + QTYPE/**/LASTUPDATE]; /* lastupdate = now */ 656 657 .align 16 658 ENTRY(kstat_waitq_enter) 659 GET_NATIVE_TIME(%g1,%g2,%g3,__LINE__) 660 KSTAT_Q_UPDATE(add, BRZPT, 1f, 1:retl, KSTAT_IO_W) 661 SET_SIZE(kstat_waitq_enter) 662 663 .align 16 664 ENTRY(kstat_waitq_exit) 665 GET_NATIVE_TIME(%g1,%g2,%g3,__LINE__) 666 KSTAT_Q_UPDATE(sub, BRZPN, kstat_q_panic, retl, KSTAT_IO_W) 667 SET_SIZE(kstat_waitq_exit) 668 669 .align 16 670 ENTRY(kstat_runq_enter) 671 GET_NATIVE_TIME(%g1,%g2,%g3,__LINE__) 672 KSTAT_Q_UPDATE(add, BRZPT, 1f, 1:retl, KSTAT_IO_R) 673 SET_SIZE(kstat_runq_enter) 674 675 .align 16 676 ENTRY(kstat_runq_exit) 677 GET_NATIVE_TIME(%g1,%g2,%g3,__LINE__) 678 KSTAT_Q_UPDATE(sub, BRZPN, kstat_q_panic, retl, KSTAT_IO_R) 679 SET_SIZE(kstat_runq_exit) 680 681 .align 16 682 ENTRY(kstat_waitq_to_runq) 683 GET_NATIVE_TIME(%g1,%g2,%g3,__LINE__) 684 KSTAT_Q_UPDATE(sub, BRZPN, kstat_q_panic, 1:, KSTAT_IO_W) 685 KSTAT_Q_UPDATE(add, BRZPT, 1f, 1:retl, KSTAT_IO_R) 686 SET_SIZE(kstat_waitq_to_runq) 687 688 .align 16 689 ENTRY(kstat_runq_back_to_waitq) 690 GET_NATIVE_TIME(%g1,%g2,%g3,__LINE__) 691 KSTAT_Q_UPDATE(sub, BRZPN, kstat_q_panic, 1:, KSTAT_IO_R) 692 KSTAT_Q_UPDATE(add, BRZPT, 1f, 1:retl, KSTAT_IO_W) 693 SET_SIZE(kstat_runq_back_to_waitq) 694 695#endif /* lint */ 696 697#ifdef lint 698 699int64_t timedelta; 700hrtime_t hres_last_tick; 701volatile timestruc_t hrestime; 702int64_t hrestime_adj; 703volatile int hres_lock; 704uint_t nsec_scale; 705hrtime_t hrtime_base; 706int traptrace_use_stick; 707 708#else 709 /* 710 * -- WARNING -- 711 * 712 * The following variables MUST be together on a 128-byte boundary. 713 * In addition to the primary performance motivation (having them all 714 * on the same cache line(s)), code here and in the GET*TIME() macros 715 * assumes that they all have the same high 22 address bits (so 716 * there's only one sethi). 717 */ 718 .seg ".data" 719 .global timedelta, hres_last_tick, hrestime, hrestime_adj 720 .global hres_lock, nsec_scale, hrtime_base, traptrace_use_stick 721 .global nsec_shift, adj_shift, native_tick_offset, native_stick_offset 722 723 /* XXX - above comment claims 128-bytes is necessary */ 724 .align 64 725timedelta: 726 .word 0, 0 /* int64_t */ 727hres_last_tick: 728 .word 0, 0 /* hrtime_t */ 729hrestime: 730 .nword 0, 0 /* 2 longs */ 731hrestime_adj: 732 .word 0, 0 /* int64_t */ 733hres_lock: 734 .word 0 735nsec_scale: 736 .word 0 737hrtime_base: 738 .word 0, 0 739traptrace_use_stick: 740 .word 0 741nsec_shift: 742 .word NSEC_SHIFT 743adj_shift: 744 .word ADJ_SHIFT 745 .align 8 746native_tick_offset: 747 .word 0, 0 748 .align 8 749native_stick_offset: 750 .word 0, 0 751 752#endif 753 754 755/* 756 * drv_usecwait(clock_t n) [DDI/DKI - section 9F] 757 * usec_delay(int n) [compatibility - should go one day] 758 * Delay by spinning. 759 * 760 * delay for n microseconds. numbers <= 0 delay 1 usec 761 * 762 * With UltraSPARC-III the combination of supporting mixed-speed CPUs 763 * and variable clock rate for power management requires that we 764 * use %stick to implement this routine. 765 */ 766 767#if defined(lint) 768 769/*ARGSUSED*/ 770void 771drv_usecwait(clock_t n) 772{} 773 774/*ARGSUSED*/ 775void 776usec_delay(int n) 777{} 778 779#else /* lint */ 780 781 ENTRY(drv_usecwait) 782 ALTENTRY(usec_delay) 783 brlez,a,pn %o0, 0f 784 mov 1, %o0 7850: 786 sethi %hi(sticks_per_usec), %o1 787 lduw [%o1 + %lo(sticks_per_usec)], %o1 788 mulx %o1, %o0, %o1 ! Scale usec to ticks 789 inc %o1 ! We don't start on a tick edge 790 GET_NATIVE_TIME(%o2,%o3,%o4,__LINE__) 791 add %o1, %o2, %o1 792 7931: cmp %o1, %o2 794 GET_NATIVE_TIME(%o2,%o3,%o4,__LINE__) 795 bgeu,pt %xcc, 1b 796 nop 797 retl 798 nop 799 SET_SIZE(usec_delay) 800 SET_SIZE(drv_usecwait) 801#endif /* lint */ 802 803#if defined(lint) 804 805/* ARGSUSED */ 806void 807pil14_interrupt(int level) 808{} 809 810#else 811 812/* 813 * Level-14 interrupt prologue. 814 */ 815 ENTRY_NP(pil14_interrupt) 816 CPU_ADDR(%g1, %g2) 817 rdpr %pil, %g6 ! %g6 = interrupted PIL 818 stn %g6, [%g1 + CPU_PROFILE_PIL] ! record interrupted PIL 819 rdpr %tstate, %g6 820 rdpr %tpc, %g5 821 btst TSTATE_PRIV, %g6 ! trap from supervisor mode? 822 bnz,a,pt %xcc, 1f 823 stn %g5, [%g1 + CPU_PROFILE_PC] ! if so, record kernel PC 824 stn %g5, [%g1 + CPU_PROFILE_UPC] ! if not, record user PC 825 ba pil_interrupt_common ! must be large-disp branch 826 stn %g0, [%g1 + CPU_PROFILE_PC] ! zero kernel PC 8271: ba pil_interrupt_common ! must be large-disp branch 828 stn %g0, [%g1 + CPU_PROFILE_UPC] ! zero user PC 829 SET_SIZE(pil14_interrupt) 830 831 ENTRY_NP(tick_rtt) 832 ! 833 ! Load TICK_COMPARE into %o5; if bit 63 is set, then TICK_COMPARE is 834 ! disabled. If TICK_COMPARE is enabled, we know that we need to 835 ! reenqueue the interrupt request structure. We'll then check TICKINT 836 ! in SOFTINT; if it's set, then we know that we were in a TICK_COMPARE 837 ! interrupt. In this case, TICK_COMPARE may have been rewritten 838 ! recently; we'll compare %o5 to the current time to verify that it's 839 ! in the future. 840 ! 841 ! Note that %o5 is live until after 1f. 842 ! XXX - there is a subroutine call while %o5 is live! 843 ! 844 RD_TICKCMPR(%o5,%g1,%g2,__LINE__) 845 srlx %o5, TICKINT_DIS_SHFT, %g1 846 brnz,pt %g1, 2f 847 nop 848 849 rdpr %pstate, %g5 850 andn %g5, PSTATE_IE, %g1 851 wrpr %g0, %g1, %pstate ! Disable vec interrupts 852 853 sethi %hi(cbe_level14_inum), %o1 854 ldx [%o1 + %lo(cbe_level14_inum)], %o1 855 call intr_enqueue_req ! preserves %o5 and %g5 856 mov PIL_14, %o0 857 858 ! Check SOFTINT for TICKINT/STICKINT 859 rd SOFTINT, %o4 860 set (TICK_INT_MASK | STICK_INT_MASK), %o0 861 andcc %o4, %o0, %g0 862 bz,a,pn %icc, 2f 863 wrpr %g0, %g5, %pstate ! Enable vec interrupts 864 865 ! clear TICKINT/STICKINT 866 wr %o0, CLEAR_SOFTINT 867 868 ! 869 ! Now that we've cleared TICKINT, we can reread %tick and confirm 870 ! that the value we programmed is still in the future. If it isn't, 871 ! we need to reprogram TICK_COMPARE to fire as soon as possible. 872 ! 873 GET_NATIVE_TIME(%o0,%g1,%g2,__LINE__) ! %o0 = tick 874 cmp %o5, %o0 ! In the future? 875 bg,a,pt %xcc, 2f ! Yes, drive on. 876 wrpr %g0, %g5, %pstate ! delay: enable vec intr 877 878 ! 879 ! If we're here, then we have programmed TICK_COMPARE with a %tick 880 ! which is in the past; we'll now load an initial step size, and loop 881 ! until we've managed to program TICK_COMPARE to fire in the future. 882 ! 883 mov 8, %o4 ! 8 = arbitrary inital step 8841: add %o0, %o4, %o5 ! Add the step 885 WR_TICKCMPR(%o5,%g1,%g2,__LINE__) ! Write to TICK_CMPR 886 GET_NATIVE_TIME(%o0,%g1,%g2,__LINE__) ! %o0 = tick 887 cmp %o5, %o0 ! In the future? 888 bg,a,pt %xcc, 2f ! Yes, drive on. 889 wrpr %g0, %g5, %pstate ! delay: enable vec intr 890 ba 1b ! No, try again. 891 sllx %o4, 1, %o4 ! delay: double step size 892 8932: ba current_thread_complete 894 nop 895 SET_SIZE(tick_rtt) 896 897#endif /* lint */ 898 899#if defined(lint) 900 901/* ARGSUSED */ 902void 903pil15_interrupt(int level) 904{} 905 906#else /* lint */ 907 908/* 909 * Level-15 interrupt prologue. 910 */ 911 ENTRY_NP(pil15_interrupt) 912 CPU_ADDR(%g1, %g2) 913 rdpr %tstate, %g6 914 rdpr %tpc, %g5 915 btst TSTATE_PRIV, %g6 ! trap from supervisor mode? 916 bnz,a,pt %xcc, 1f 917 stn %g5, [%g1 + CPU_CPCPROFILE_PC] ! if so, record kernel PC 918 stn %g5, [%g1 + CPU_CPCPROFILE_UPC] ! if not, record user PC 919 ba pil15_epilogue ! must be large-disp branch 920 stn %g0, [%g1 + CPU_CPCPROFILE_PC] ! zero kernel PC 9211: ba pil15_epilogue ! must be large-disp branch 922 stn %g0, [%g1 + CPU_CPCPROFILE_UPC] ! zero user PC 923 SET_SIZE(pil15_interrupt) 924 925#endif /* lint */ 926 927#if defined(lint) 928/* 929 * Prefetch a page_t for write or read, this assumes a linear 930 * scan of sequential page_t's. 931 */ 932/*ARGSUSED*/ 933void 934prefetch_page_w(void *pp) 935{} 936 937/*ARGSUSED*/ 938void 939prefetch_page_r(void *pp) 940{} 941#else /* lint */ 942 943/* XXXQ These should be inline templates, not functions */ 944 ENTRY(prefetch_page_w) 945 retl 946 nop 947 SET_SIZE(prefetch_page_w) 948 949 ENTRY(prefetch_page_r) 950 retl 951 nop 952 SET_SIZE(prefetch_page_r) 953 954#endif /* lint */ 955 956#if defined(lint) 957/* 958 * Prefetch struct smap for write. 959 */ 960/*ARGSUSED*/ 961void 962prefetch_smap_w(void *smp) 963{} 964#else /* lint */ 965 966/* XXXQ These should be inline templates, not functions */ 967 ENTRY(prefetch_smap_w) 968 retl 969 nop 970 SET_SIZE(prefetch_smap_w) 971 972#endif /* lint */ 973 974/* 975 * Generic sun4v MMU and Cache operations. 976 */ 977 978#if defined(lint) 979 980/*ARGSUSED*/ 981void 982vtag_flushpage(caddr_t vaddr, uint64_t sfmmup) 983{} 984 985/*ARGSUSED*/ 986void 987vtag_flushall(void) 988{} 989 990/*ARGSUSED*/ 991void 992vtag_unmap_perm_tl1(uint64_t vaddr, uint64_t ctxnum) 993{} 994 995/*ARGSUSED*/ 996void 997vtag_flushpage_tl1(uint64_t vaddr, uint64_t sfmmup) 998{} 999 1000/*ARGSUSED*/ 1001void 1002vtag_flush_pgcnt_tl1(uint64_t vaddr, uint64_t sfmmup_pgcnt) 1003{} 1004 1005/*ARGSUSED*/ 1006void 1007vtag_flushall_tl1(uint64_t dummy1, uint64_t dummy2) 1008{} 1009 1010/*ARGSUSED*/ 1011void 1012vac_flushpage(pfn_t pfnum, int vcolor) 1013{} 1014 1015/*ARGSUSED*/ 1016void 1017vac_flushpage_tl1(uint64_t pfnum, uint64_t vcolor) 1018{} 1019 1020/*ARGSUSED*/ 1021void 1022flush_instr_mem(caddr_t vaddr, size_t len) 1023{} 1024 1025#else /* lint */ 1026 1027 ENTRY_NP(vtag_flushpage) 1028 /* 1029 * flush page from the tlb 1030 * 1031 * %o0 = vaddr 1032 * %o1 = sfmmup 1033 */ 1034 SFMMU_CPU_CNUM(%o1, %g1, %g2) /* %g1 = sfmmu cnum on this CPU */ 1035 1036 mov %g1, %o1 1037 mov MAP_ITLB | MAP_DTLB, %o2 1038 ta MMU_UNMAP_ADDR 1039 brz,pt %o0, 1f 1040 nop 1041 ba panic_bad_hcall 1042 mov MMU_UNMAP_ADDR, %o1 10431: 1044 retl 1045 nop 1046 SET_SIZE(vtag_flushpage) 1047 1048 ENTRY_NP(vtag_flushall) 1049 mov %g0, %o0 ! XXX no cpu list yet 1050 mov %g0, %o1 ! XXX no cpu list yet 1051 mov MAP_ITLB | MAP_DTLB, %o2 1052 mov MMU_DEMAP_ALL, %o5 1053 ta FAST_TRAP 1054 brz,pt %o0, 1f 1055 nop 1056 ba panic_bad_hcall 1057 mov MMU_DEMAP_ALL, %o1 10581: 1059 retl 1060 nop 1061 SET_SIZE(vtag_flushall) 1062 1063 ENTRY_NP(vtag_unmap_perm_tl1) 1064 /* 1065 * x-trap to unmap perm map entry 1066 * %g1 = vaddr 1067 * %g2 = ctxnum (KCONTEXT only) 1068 */ 1069 mov %o0, %g3 1070 mov %o1, %g4 1071 mov %o2, %g5 1072 mov %o5, %g6 1073 mov %g1, %o0 1074 mov %g2, %o1 1075 mov MAP_ITLB | MAP_DTLB, %o2 1076 mov UNMAP_PERM_ADDR, %o5 1077 ta FAST_TRAP 1078 brz,pt %o0, 1f 1079 nop 1080 1081 mov PTL1_BAD_HCALL, %g1 1082 1083 cmp %o0, H_ENOMAP 1084 move %xcc, PTL1_BAD_HCALL_UNMAP_PERM_ENOMAP, %g1 1085 1086 cmp %o0, H_EINVAL 1087 move %xcc, PTL1_BAD_HCALL_UNMAP_PERM_EINVAL, %g1 1088 1089 ba,a ptl1_panic 10901: 1091 mov %g6, %o5 1092 mov %g5, %o2 1093 mov %g4, %o1 1094 mov %g3, %o0 1095 retry 1096 SET_SIZE(vtag_unmap_perm_tl1) 1097 1098 ENTRY_NP(vtag_flushpage_tl1) 1099 /* 1100 * x-trap to flush page from tlb and tsb 1101 * 1102 * %g1 = vaddr, zero-extended on 32-bit kernel 1103 * %g2 = sfmmup 1104 * 1105 * assumes TSBE_TAG = 0 1106 */ 1107 srln %g1, MMU_PAGESHIFT, %g1 1108 slln %g1, MMU_PAGESHIFT, %g1 /* g1 = vaddr */ 1109 mov %o0, %g3 1110 mov %o1, %g4 1111 mov %o2, %g5 1112 mov %g1, %o0 /* vaddr */ 1113 1114 SFMMU_CPU_CNUM(%g2, %o1, %g6) /* %o1 = sfmmu cnum on this CPU */ 1115 1116 mov MAP_ITLB | MAP_DTLB, %o2 1117 ta MMU_UNMAP_ADDR 1118 brz,pt %o0, 1f 1119 nop 1120 ba ptl1_panic 1121 mov PTL1_BAD_HCALL, %g1 11221: 1123 mov %g5, %o2 1124 mov %g4, %o1 1125 mov %g3, %o0 1126 membar #Sync 1127 retry 1128 SET_SIZE(vtag_flushpage_tl1) 1129 1130 ENTRY_NP(vtag_flush_pgcnt_tl1) 1131 /* 1132 * x-trap to flush pgcnt MMU_PAGESIZE pages from tlb 1133 * 1134 * %g1 = vaddr, zero-extended on 32-bit kernel 1135 * %g2 = <sfmmup58|pgcnt6>, (pgcnt - 1) is pass'ed in via pgcnt6 bits. 1136 * 1137 * NOTE: this handler relies on the fact that no 1138 * interrupts or traps can occur during the loop 1139 * issuing the TLB_DEMAP operations. It is assumed 1140 * that interrupts are disabled and this code is 1141 * fetching from the kernel locked text address. 1142 * 1143 * assumes TSBE_TAG = 0 1144 */ 1145 srln %g1, MMU_PAGESHIFT, %g1 1146 slln %g1, MMU_PAGESHIFT, %g1 /* g1 = vaddr */ 1147 mov %o0, %g3 1148 mov %o1, %g4 1149 mov %o2, %g5 1150 1151 and %g2, SFMMU_PGCNT_MASK, %g7 /* g7 = pgcnt - 1 */ 1152 add %g7, 1, %g7 /* g7 = pgcnt */ 1153 1154 andn %g2, SFMMU_PGCNT_MASK, %o0 /* %o0 = sfmmup */ 1155 1156 SFMMU_CPU_CNUM(%o0, %g2, %g6) /* %g2 = sfmmu cnum on this CPU */ 1157 1158 set MMU_PAGESIZE, %g6 /* g6 = pgsize */ 1159 11601: 1161 mov %g1, %o0 /* vaddr */ 1162 mov %g2, %o1 /* cnum */ 1163 mov MAP_ITLB | MAP_DTLB, %o2 1164 ta MMU_UNMAP_ADDR 1165 brz,pt %o0, 2f 1166 nop 1167 ba ptl1_panic 1168 mov PTL1_BAD_HCALL, %g1 11692: 1170 deccc %g7 /* decr pgcnt */ 1171 bnz,pt %icc,1b 1172 add %g1, %g6, %g1 /* go to nextpage */ 1173 1174 mov %g5, %o2 1175 mov %g4, %o1 1176 mov %g3, %o0 1177 membar #Sync 1178 retry 1179 SET_SIZE(vtag_flush_pgcnt_tl1) 1180 1181 ! Not implemented on US1/US2 1182 ENTRY_NP(vtag_flushall_tl1) 1183 mov %o0, %g3 1184 mov %o1, %g4 1185 mov %o2, %g5 1186 mov %o3, %g6 ! XXXQ not used? 1187 mov %o5, %g7 1188 mov %g0, %o0 ! XXX no cpu list yet 1189 mov %g0, %o1 ! XXX no cpu list yet 1190 mov MAP_ITLB | MAP_DTLB, %o2 1191 mov MMU_DEMAP_ALL, %o5 1192 ta FAST_TRAP 1193 brz,pt %o0, 1f 1194 nop 1195 ba ptl1_panic 1196 mov PTL1_BAD_HCALL, %g1 11971: 1198 mov %g7, %o5 1199 mov %g6, %o3 ! XXXQ not used? 1200 mov %g5, %o2 1201 mov %g4, %o1 1202 mov %g3, %o0 1203 retry 1204 SET_SIZE(vtag_flushall_tl1) 1205 1206/* 1207 * flush_instr_mem: 1208 * Flush a portion of the I-$ starting at vaddr 1209 * %o0 vaddr 1210 * %o1 bytes to be flushed 1211 */ 1212 1213 ENTRY(flush_instr_mem) 1214 membar #StoreStore ! Ensure the stores 1215 ! are globally visible 12161: 1217 flush %o0 1218 subcc %o1, ICACHE_FLUSHSZ, %o1 ! bytes = bytes-0x20 1219 bgu,pt %ncc, 1b 1220 add %o0, ICACHE_FLUSHSZ, %o0 ! vaddr = vaddr+0x20 1221 1222 retl 1223 nop 1224 SET_SIZE(flush_instr_mem) 1225 1226#endif /* !lint */ 1227 1228#if !defined(CUSTOM_FPZERO) 1229 1230/* 1231 * fp_zero() - clear all fp data registers and the fsr 1232 */ 1233 1234#if defined(lint) || defined(__lint) 1235 1236void 1237fp_zero(void) 1238{} 1239 1240#else /* lint */ 1241 1242.global fp_zero_zero 1243.align 8 1244fp_zero_zero: 1245 .xword 0 1246 1247 ENTRY_NP(fp_zero) 1248 sethi %hi(fp_zero_zero), %o0 1249 ldx [%o0 + %lo(fp_zero_zero)], %fsr 1250 ldd [%o0 + %lo(fp_zero_zero)], %f0 1251 fmovd %f0, %f2 1252 fmovd %f0, %f4 1253 fmovd %f0, %f6 1254 fmovd %f0, %f8 1255 fmovd %f0, %f10 1256 fmovd %f0, %f12 1257 fmovd %f0, %f14 1258 fmovd %f0, %f16 1259 fmovd %f0, %f18 1260 fmovd %f0, %f20 1261 fmovd %f0, %f22 1262 fmovd %f0, %f24 1263 fmovd %f0, %f26 1264 fmovd %f0, %f28 1265 fmovd %f0, %f30 1266 fmovd %f0, %f32 1267 fmovd %f0, %f34 1268 fmovd %f0, %f36 1269 fmovd %f0, %f38 1270 fmovd %f0, %f40 1271 fmovd %f0, %f42 1272 fmovd %f0, %f44 1273 fmovd %f0, %f46 1274 fmovd %f0, %f48 1275 fmovd %f0, %f50 1276 fmovd %f0, %f52 1277 fmovd %f0, %f54 1278 fmovd %f0, %f56 1279 fmovd %f0, %f58 1280 fmovd %f0, %f60 1281 retl 1282 fmovd %f0, %f62 1283 SET_SIZE(fp_zero) 1284 1285#endif /* lint */ 1286#endif /* CUSTOM_FPZERO */ 1287