1 /*******************************************************************************
2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
3 *
4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided
5 *that the following conditions are met:
6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
7 *following disclaimer.
8 *2. Redistributions in binary form must reproduce the above copyright notice,
9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided
10 *with the distribution.
11 *
12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
20
21
22 ********************************************************************************/
23 /*******************************************************************************/
24 /** \file
25 *
26 * This file contains the SAS/SATA TD layer initialization functions
27 *
28 */
29 #include <sys/cdefs.h>
30 #include <dev/pms/config.h>
31
32 #include <dev/pms/freebsd/driver/common/osenv.h>
33 #include <dev/pms/freebsd/driver/common/ostypes.h>
34 #include <dev/pms/freebsd/driver/common/osdebug.h>
35
36 #include <dev/pms/RefTisa/sallsdk/api/sa.h>
37 #include <dev/pms/RefTisa/sallsdk/api/saapi.h>
38 #include <dev/pms/RefTisa/sallsdk/api/saosapi.h>
39
40 #include <dev/pms/RefTisa/tisa/api/titypes.h>
41 #include <dev/pms/RefTisa/tisa/api/ostiapi.h>
42 #include <dev/pms/RefTisa/tisa/api/tiapi.h>
43 #include <dev/pms/RefTisa/tisa/api/tiglobal.h>
44
45 #ifdef FDS_SM
46 #include <dev/pms/RefTisa/sat/api/sm.h>
47 #include <dev/pms/RefTisa/sat/api/smapi.h>
48 #include <dev/pms/RefTisa/sat/api/tdsmapi.h>
49 #endif
50
51 #ifdef FDS_DM
52 #include <dev/pms/RefTisa/discovery/api/dm.h>
53 #include <dev/pms/RefTisa/discovery/api/dmapi.h>
54 #include <dev/pms/RefTisa/discovery/api/tddmapi.h>
55 #endif
56
57 #include <dev/pms/RefTisa/tisa/sassata/sas/common/tdtypes.h>
58 #include <dev/pms/freebsd/driver/common/osstring.h>
59 #include <dev/pms/RefTisa/tisa/sassata/common/tdutil.h>
60
61 #ifdef INITIATOR_DRIVER
62 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itdtypes.h>
63 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itddefs.h>
64 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itdglobl.h>
65 #endif
66
67 #ifdef TARGET_DRIVER
68 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdglobl.h>
69 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdxchg.h>
70 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdtypes.h>
71 #endif
72
73 #include <dev/pms/RefTisa/tisa/sassata/common/tdsatypes.h>
74 #include <dev/pms/RefTisa/tisa/sassata/common/tdproto.h>
75
76 LOCAL bit32 tdsaGetCardID(tiRoot_t * tiRoot);
77
78
79 bit32 tdCardIDList[TD_MAX_CARD_NUM] = {
80 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
81 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
82 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
83 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
84 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
85 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
86 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
87 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
88 TD_CARD_ID_FREE , TD_CARD_ID_FREE ,
89 TD_CARD_ID_FREE , TD_CARD_ID_FREE
90 };
91
92 /*****************************************************************************
93 *
94 * tdsaGetCardID
95 *
96 * Purpose:
97 *
98 * Parameters:
99 *
100 * tiRoot: Pointer to driver/port instance.
101 *
102 * Return:
103 * tiSuccess : CardIDString was successfully read
104 * tiError : CardIDString reading failed
105 *
106 *****************************************************************************/
tdsaGetCardID(tiRoot_t * tiRoot)107 bit32 tdsaGetCardID(tiRoot_t * tiRoot)
108 {
109 bit32 i;
110 bit32 RetVal = 0xFFFFFFFF;
111
112 for (i = 0 ; i < TD_MAX_CARD_NUM ; i++)
113 {
114 if (tdCardIDList[i] == TD_CARD_ID_FREE)
115 {
116 tdCardIDList[i] = TD_CARD_ID_ALLOC;
117 RetVal = i;
118 break;
119 }
120 }
121
122 return RetVal;
123
124 } /* tdsaGetCardID() */
125
126 /*****************************************************************************
127 *
128 * tdsaFreeCardID
129 *
130 * Purpose:
131 *
132 * Parameters:
133 *
134 * tiRoot: Pointer to driver/port instance.
135 *
136 * Return:
137 * tiSuccess : CardIDString was successfully read
138 * tiError : CardIDString reading failed
139 *
140 *****************************************************************************/
141 osGLOBAL void
tdsaFreeCardID(tiRoot_t * tiRoot,bit32 CardID)142 tdsaFreeCardID(tiRoot_t *tiRoot, bit32 CardID)
143 {
144 OS_ASSERT(CardID < TD_MAX_CARD_NUM, "Invalid CardID\n");
145
146 tdCardIDList[CardID] = TD_CARD_ID_FREE;
147
148 return;
149
150 } /* tdFreeCardID() */
151
152 /*****************************************************************************
153 *
154 * tdsaGetCardIDString
155 *
156 * Purpose:
157 *
158 * Parameters:
159 *
160 * tiRoot: Pointer to driver/port instance.
161 *
162 * Return:
163 * tiSuccess : CardIDString was successfully read
164 * tiError : CardIDString reading failed
165 *
166 *****************************************************************************/
tdsaGetCardIDString(tiRoot_t * tiRoot)167 bit32 tdsaGetCardIDString(tiRoot_t *tiRoot)
168 {
169 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData;
170 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&(tdsaRoot->tdsaAllShared);
171 bit32 ret = tiError;
172 bit32 thisCardID = tdsaGetCardID(tiRoot);
173 char CardNum[10];
174
175 TI_DBG3(("tdsaGetCardIDString: start\n"));
176
177 TI_DBG3(("tdsaGetCardIDString: thisCardID 0x%x\n", thisCardID));
178
179
180 if (thisCardID == 0xFFFFFFFF)
181 {
182 TI_DBG1(("tdGetCardIDString: No more CardIDs available\n"));
183 ret = tiError;
184 }
185 else
186 {
187 tdsaAllShared->CardID = thisCardID;
188 osti_sprintf(CardNum,"CardNum%d", thisCardID);
189 TI_DBG3(("tdsaGetCardIDString: CardNum is %s\n", CardNum));
190 osti_strcpy(tdsaAllShared->CardIDString, CardNum);
191 TI_DBG3(("tdsaGetCardIDString: tdsaAllShared->CardIDString is %s\n", tdsaAllShared->CardIDString));
192 ret = tiSuccess;
193
194 }
195 return ret;
196 }
197 /*****************************************************************************
198 *! \brief tiCOMGetResource
199 *
200 * Purpose: This function is called to determine the Transport
201 * Dependent Layer internal resource requirement.
202 * This function will internally call the initiator specific,
203 * target specific and shared TD resource requirement calls.
204 *
205 * \param tiRoot: Pointer to driver/port instance.
206 * \param loResource: Pointer to low level TSDK resource requirement.
207 * \param initiatorResource: Pointer to initiator functionality memory and
208 * option requirement.
209 * \param targetResource: Pointer to target functionality memory and
210 * option requirement.
211 * \param tdSharedMem: Pointer to cached memory required by the
212 * target/initiator shared functionality.
213 *
214 * \return None
215 *
216 * \note - This function only return the memory requirement in the tiMem_t
217 * structure in loResource, initiatorResource, targetResource
218 * and tdSharedMem. It does not allocate memory, so the address
219 * fields in tiMem_t are not used.
220 *
221 *****************************************************************************/
222 osGLOBAL void
tiCOMGetResource(tiRoot_t * tiRoot,tiLoLevelResource_t * loResource,tiInitiatorResource_t * initiatorResource,tiTargetResource_t * targetResource,tiTdSharedMem_t * tdSharedMem)223 tiCOMGetResource(
224 tiRoot_t *tiRoot,
225 tiLoLevelResource_t *loResource,
226 tiInitiatorResource_t *initiatorResource,
227 tiTargetResource_t *targetResource,
228 tiTdSharedMem_t *tdSharedMem
229 )
230 {
231 TI_DBG6(("tiCOMGetResource start\n"));
232 TI_DBG6(("tiCOMGetResource: loResource %p\n", loResource));
233
234 if(loResource != agNULL)
235 {
236 tdsaLoLevelGetResource(tiRoot, loResource);
237 }
238 if(tdSharedMem != agNULL)
239 {
240 tdsaSharedMemCalculate(tiRoot, loResource, tdSharedMem);
241 }
242
243 #ifdef INITIATOR_DRIVER
244 /* initiator */
245 if(initiatorResource != agNULL)
246 {
247 itdssGetResource(tiRoot, initiatorResource);
248 /*
249 * for the time being set the initiator usecsPerTick
250 * same as lolevel usecsPerTick
251 */
252 if (loResource == agNULL)
253 {
254 TI_DBG1(("tiCOMGetResource: loResource is NULL, wrong\n"));
255 return;
256 }
257 }
258 #endif
259
260 #ifdef TARGET_DRIVER
261 /* target */
262 if(targetResource != agNULL)
263 {
264 ttdssGetResource(tiRoot, targetResource);
265 }
266 #endif
267
268 return;
269 }
270
271
272 /*****************************************************************************
273 *! \brief tiCOMInit
274 *
275 * Purpose: This function is called to initialize Transport Dependent Layer.
276 * This function will internally call the initiator specific,
277 * target specific and shared TD initialization calls.
278 *
279 * \param tiRoot: Pointer to target driver/port instance.
280 * \param loResource: Pointer to low level TSDK resource requirement.
281 * \param initiatorResource: Pointer to initiator functionality memory and
282 * option requirement.
283 * \param targetResource: Pointer to target functionality memory and
284 * option requirement.
285 * \param tdSharedMem: Pointer to cached memory required by the
286 * target/initiator shared functionality.
287 *
288 * \return: tiSuccess - if successful
289 * tiError - if failed
290 *
291 *****************************************************************************/
292 osGLOBAL bit32
tiCOMInit(tiRoot_t * tiRoot,tiLoLevelResource_t * loResource,tiInitiatorResource_t * initiatorResource,tiTargetResource_t * targetResource,tiTdSharedMem_t * tdSharedMem)293 tiCOMInit(
294 tiRoot_t *tiRoot,
295 tiLoLevelResource_t *loResource,
296 tiInitiatorResource_t *initiatorResource,
297 tiTargetResource_t *targetResource,
298 tiTdSharedMem_t *tdSharedMem )
299 {
300 tdsaRoot_t *tdsaRoot;
301 tdsaPortContext_t *tdsaPortContext;
302 tdsaDeviceData_t *tdsaDeviceData;
303
304 #ifdef TD_INT_COALESCE
305 tdsaIntCoalesceContext_t *tdsaIntCoalCxt;
306 #endif
307
308 #ifdef TD_DISCOVER
309 tdsaExpander_t *tdsaExpander;
310 #endif
311
312 bit32 status = tiSuccess;
313 void *IniAddr = agNULL;
314 void *TgtAddr = agNULL;
315 tdsaContext_t *tdsaAllShared;
316 #if defined(TD_INT_COALESCE) || defined(TD_DISCOVER) || defined(TD_INTERNAL_DEBUG)
317 bit32 MaxTargets;
318 #endif
319 #ifdef TD_INTERNAL_DEBUG /* for debugging only */
320 tdsaEsglAllInfo_t *pEsglAllInfo;
321 tdList_t *tdlist_to_fill;
322 tdsaEsglPageInfo_t *page_to_fill;
323 #endif
324 bit32 i;
325 #ifdef FDS_DM
326 dmSwConfig_t dmSwConfig;
327 static dmMemoryRequirement_t dmMemRequirement;
328 bit32 dmUsecsPerTick = 0;
329 bit32 dmMaxNumLocks = 0;
330 #endif
331 #ifdef FDS_SM
332 smSwConfig_t smSwConfig;
333 static smMemoryRequirement_t smMemRequirement;
334 bit32 smUsecsPerTick = 0;
335 bit32 smMaxNumLocks = 0;
336 #endif
337
338
339 /* for memory analysis */
340 TI_DBG6(("ticominit: tdsaroot\n"));
341 TI_DBG6(("ticominit: tdsaRoot_t %d\n", (int)sizeof(tdsaRoot_t)));
342 TI_DBG6(("ticominit: tdsaEsglAllInfo_t %d\n", (int)sizeof(tdsaEsglAllInfo_t)));
343 TI_DBG6(("ticominit: portcontext\n"));
344 TI_DBG6(("ticominit: tdsaPortContext_t %d\n", (int)sizeof(tdsaPortContext_t)));
345 TI_DBG6(("ticominit: device data\n"));
346 TI_DBG6(("ticominit: tdsaDeviceData_t %d\n", (int)sizeof(tdsaDeviceData_t)));
347 TI_DBG6(("ticominit: agsaSASDeviceInfo_t %d\n", (int)sizeof(agsaSASDeviceInfo_t)));
348 TI_DBG6(("ticominit: satDeviceData_t %d\n", (int)sizeof(satDeviceData_t)));
349 TI_DBG6(("ticominit: agsaSATAIdentifyData_t %d\n", (int)sizeof(agsaSATAIdentifyData_t)));
350
351 TI_DBG6(("ticominit: IO request body\n"));
352 TI_DBG6(("ticominit: tdIORequestBody_t %d\n", (int)sizeof(tdIORequestBody_t)));
353 TI_DBG6(("ticominit: tdssIOCompleted_t %d\n", (int)sizeof(tdssIOCompleted_t)));
354 TI_DBG6(("ticominit: agsaIORequest_t %d\n", (int)sizeof(agsaIORequest_t)));
355
356 TI_DBG6(("ticominit: FOR SAS\n"));
357 TI_DBG6(("ticominit: agsaSASRequestBody_t %d\n", (int)sizeof(agsaSASRequestBody_t)));
358 TI_DBG6(("ticominit: FOR SATA\n"));
359 TI_DBG6(("ticominit: agsaSATAInitiatorRequest_t %d\n", (int)sizeof(agsaSATAInitiatorRequest_t)));
360 TI_DBG6(("ticominit: scsiRspSense_t %d\n", (int)sizeof(scsiRspSense_t)));
361 TI_DBG6(("ticominit: tiSenseData_t %d\n", (int)sizeof(tiSenseData_t)));
362 TI_DBG6(("ticominit: satIOContext_t %d\n", (int)sizeof(satIOContext_t)));
363 TI_DBG6(("ticominit: satInternalIo_t %d\n", (int)sizeof(satInternalIo_t)));
364
365
366 /*************************************************************************
367 * TD SHARED AREA
368 *************************************************************************/
369
370 TI_DBG6(("ticominit: start\n"));
371
372
373 #if defined(TD_INT_COALESCE) && defined(TD_DISCOVER)
374
375 /* Let's start from the tdsaRoot */
376 tdsaRoot = tdSharedMem->tdSharedCachedMem1.virtPtr;
377 tdsaPortContext = (tdsaPortContext_t *)((bitptr)tdSharedMem->tdSharedCachedMem1.virtPtr + sizeof(tdsaRoot_t));
378 tdsaDeviceData = (tdsaDeviceData_t *)((bitptr)tdsaPortContext + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT));
379
380 /* the following fn fills in MaxTargets */
381 tdssGetMaxTargetsParams(tiRoot, &MaxTargets);
382 TI_DBG6(("tiCOMInit: MaxTargets %d\n", MaxTargets));
383
384 tdsaIntCoalCxt =
385 (tdsaIntCoalesceContext_t *)((bitptr)tdsaDeviceData
386 + (sizeof(tdsaDeviceData_t) * MaxTargets));
387
388 tdsaExpander =
389 (tdsaExpander_t *)((bitptr)tdsaIntCoalCxt
390 + (sizeof(tdsaIntCoalesceContext_t) * TD_MAX_INT_COALESCE));
391
392
393 #elif defined(TD_INT_COALESCE)
394
395
396
397 /* Let's start from the tdsaRoot */
398 tdsaRoot = tdSharedMem->tdSharedCachedMem1.virtPtr;
399 tdsaPortContext = (tdsaPortContext_t *)((bitptr)tdSharedMem->tdSharedCachedMem1.virtPtr + sizeof(tdsaRoot_t));
400 tdsaDeviceData = (tdsaDeviceData_t *)((bitptr)tdsaPortContext + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT));
401
402 /* the following fn fills in MaxTargets */
403 tdssGetMaxTargetsParams(tiRoot, &MaxTargets);
404 TI_DBG6(("tiCOMInit: MaxTargets %d\n", MaxTargets));
405
406 tdsaIntCoalCxt =
407 (tdsaIntCoalesceContext_t *)((bitptr)tdsaDeviceData
408 + (sizeof(tdsaDeviceData_t) * MaxTargets));
409
410
411 #elif defined(TD_DISCOVER)
412
413
414 /* Let's start from the tdsaRoot */
415 tdsaRoot = tdSharedMem->tdSharedCachedMem1.virtPtr;
416 tdsaPortContext = (tdsaPortContext_t *)((bitptr)tdSharedMem->tdSharedCachedMem1.virtPtr + sizeof(tdsaRoot_t));
417 tdsaDeviceData = (tdsaDeviceData_t *)((bitptr)tdsaPortContext + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT));
418
419 /* the following fn fills in MaxTargets */
420 tdssGetMaxTargetsParams(tiRoot, &MaxTargets);
421 TI_DBG6(("tiCOMInit: MaxTargets %d\n", MaxTargets));
422
423 tdsaExpander =
424 (tdsaExpander_t *)((bitptr)tdsaDeviceData
425 + (sizeof(tdsaDeviceData_t) * MaxTargets));
426
427
428
429 #else
430
431 /* Let's start from the tdsaRoot */
432 tdsaRoot = tdSharedMem->tdSharedCachedMem1.virtPtr;
433 tdsaPortContext = (tdsaPortContext_t *)((bitptr)tdSharedMem->tdSharedCachedMem1.virtPtr + sizeof(tdsaRoot_t));
434 tdsaDeviceData = (tdsaDeviceData_t *)((bitptr)tdsaPortContext + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT));
435
436 #endif
437
438 TI_DBG6(("tiCOMInit: ******* tdsaRoot %p tdsaPortContext %p tdsaDeviceData %p\n", tdsaRoot, tdsaPortContext, tdsaDeviceData));
439
440
441 tiRoot->tdData = tdsaRoot;
442 tdsaAllShared = &(tdsaRoot->tdsaAllShared);
443
444
445 #ifdef INITIATOR_DRIVER
446 /**< Initialize initiator; itdssIni_t itself */
447 if(initiatorResource)
448 {
449 IniAddr = initiatorResource->initiatorMem.tdCachedMem[0].virtPtr;
450 tdsaRoot->itdsaIni = IniAddr;
451 tdsaRoot->itdsaIni->tdsaAllShared = tdsaAllShared;
452 tdsaAllShared->itdsaIni = tdsaRoot->itdsaIni;
453 }
454 #endif
455
456 #ifdef TARGET_DRIVER
457 /**< Initialize target; ttdssTgt_t itself */
458 if(targetResource)
459 {
460 TgtAddr = targetResource->targetMem.tdMem[0].virtPtr;
461 tdsaRoot->ttdsaTgt = TgtAddr;
462 tdsaRoot->ttdsaTgt->tdsaAllShared = tdsaAllShared;
463 tdsaAllShared->ttdsaTgt = tdsaRoot->ttdsaTgt;
464 }
465 #endif /* target driver */
466
467 TI_DBG5(("tiCOMInit: IniAddr %p TgtAddr %p\n", IniAddr, TgtAddr));
468
469 TI_DBG3(("tiCOMInit: tdsaRoot %p tdsaAllShared %p \n",tdsaRoot, tdsaAllShared));
470
471 /**< Initialize the OS data part of the interrupt context agRoot */
472 tdsaAllShared->agRootOsDataForInt.tiRoot = tiRoot;
473 tdsaAllShared->agRootOsDataForInt.tdsaAllShared = (void *) tdsaAllShared;
474 tdsaAllShared->agRootOsDataForInt.itdsaIni = (void *) IniAddr;
475 tdsaAllShared->agRootOsDataForInt.ttdsaTgt = (void *) TgtAddr;
476 /* for sata */
477 tdsaAllShared->agRootOsDataForInt.tdstHost = agNULL;
478 tdsaAllShared->agRootOsDataForInt.tdstDevice = agNULL;
479
480 /* tiInterruptContext is an enum value */
481 tdsaAllShared->agRootOsDataForInt.IntContext = tiInterruptContext;
482 /* queueId or lockid in TD layer; LL maxlock + 1 since TD uses only one lock */
483
484 /* agsaRoot_t */
485 tdsaAllShared->agRootInt.osData =
486 (void *) &(tdsaAllShared->agRootOsDataForInt);
487 tdsaAllShared->agRootInt.sdkData = agNULL;
488
489 /**< Initialize the OS data part of the non-interrupt context agRoot */
490 tdsaAllShared->agRootOsDataForNonInt.tiRoot = tiRoot;
491 tdsaAllShared->agRootOsDataForNonInt.tdsaAllShared = (void *) tdsaAllShared;
492 tdsaAllShared->agRootOsDataForNonInt.itdsaIni = (void *) IniAddr;
493 tdsaAllShared->agRootOsDataForNonInt.ttdsaTgt = (void *) TgtAddr;
494 /* for sata */
495 tdsaAllShared->agRootOsDataForNonInt.tdstHost = agNULL;
496 tdsaAllShared->agRootOsDataForNonInt.tdstDevice = agNULL;
497
498 tdsaAllShared->agRootOsDataForNonInt.IntContext = tiNonInterruptContext;
499 /* queueId or lockid in TD layer; LL maxlock + 1 since TD uses only one lock */
500
501 /* agsaRoot_t */
502 tdsaAllShared->agRootNonInt.osData =
503 (void *) &(tdsaAllShared->agRootOsDataForNonInt);
504 tdsaAllShared->agRootNonInt.sdkData = agNULL;
505
506 tdsaAllShared->loResource = *loResource;
507
508 tdsaAllShared->PortContextMem = tdsaPortContext;
509 tdsaAllShared->DeviceMem = tdsaDeviceData;
510
511 tdsaAllShared->IBQnumber = 0;
512 tdsaAllShared->OBQnumber = 0;
513
514 #ifdef TD_INT_COALESCE
515 tdsaAllShared->IntCoalesce = tdsaIntCoalCxt;
516 #endif
517
518 #ifdef TD_DISCOVER
519 tdsaAllShared->ExpanderHead = tdsaExpander;
520 #endif
521
522 tdsaAllShared->MaxNumLocks = loResource->loLevelOption.numOfQueuesPerPort;
523
524 tdsaAllShared->MaxNumOSLocks = loResource->loLevelOption.maxNumOSLocks;
525
526 #if defined(FDS_DM) && defined(FDS_SM)
527 dmGetRequirements(agNULL,
528 &dmSwConfig,
529 &dmMemRequirement,
530 &dmUsecsPerTick,
531 &dmMaxNumLocks
532 );
533
534 tdsaAllShared->MaxNumDMLocks = dmMaxNumLocks;
535 TI_DBG2(("tiCOMInit: DM MaxNumDMLocks 0x%x\n", tdsaAllShared->MaxNumDMLocks));
536
537 smGetRequirements(agNULL,
538 &smSwConfig,
539 &smMemRequirement,
540 &smUsecsPerTick,
541 &smMaxNumLocks
542 );
543
544 tdsaAllShared->MaxNumSMLocks = smMaxNumLocks;
545 TI_DBG2(("tiCOMInit: SM MaxNumSMLocks 0x%x\n", tdsaAllShared->MaxNumSMLocks));
546
547 tdsaAllShared->MaxNumLLLocks = tdsaAllShared->MaxNumLocks - TD_MAX_LOCKS - tdsaAllShared->MaxNumDMLocks - tdsaAllShared->MaxNumSMLocks;
548 TI_DBG2(("tiCOMInit: LL MaxNumLLLocks 0x%x\n", tdsaAllShared->MaxNumLLLocks));
549
550 #elif defined(FDS_DM)
551 dmGetRequirements(agNULL,
552 &dmSwConfig,
553 &dmMemRequirement,
554 &dmUsecsPerTick,
555 &dmMaxNumLocks
556 );
557
558 tdsaAllShared->MaxNumDMLocks = dmMaxNumLocks;
559 TI_DBG2(("tiCOMInit: DM MaxNumDMLocks 0x%x\n", tdsaAllShared->MaxNumDMLocks));
560
561 tdsaAllShared->MaxNumLLLocks = tdsaAllShared->MaxNumLocks - TD_MAX_LOCKS - tdsaAllShared->MaxNumDMLocks;
562 TI_DBG2(("tiCOMInit: LL MaxNumLLLocks 0x%x\n", tdsaAllShared->MaxNumLLLocks));
563 #elif defined(FDS_SM)
564 smGetRequirements(agNULL,
565 &smSwConfig,
566 &smMemRequirement,
567 &smUsecsPerTick,
568 &smMaxNumLocks
569 );
570
571 tdsaAllShared->MaxNumSMLocks = smMaxNumLocks;
572 TI_DBG2(("tiCOMInit: SM MaxNumSMLocks 0x%x\n", tdsaAllShared->MaxNumSMLocks));
573
574 tdsaAllShared->MaxNumLLLocks = tdsaAllShared->MaxNumLocks - TD_MAX_LOCKS - tdsaAllShared->MaxNumSMLocks;
575 TI_DBG2(("tiCOMInit: LL MaxNumLLLocks 0x%x\n", tdsaAllShared->MaxNumLLLocks));
576 #else
577 tdsaAllShared->MaxNumLLLocks = tdsaAllShared->MaxNumLocks - TD_MAX_LOCKS;
578 TI_DBG2(("tiCOMInit: LL MaxNumLLLocks 0x%x\n", tdsaAllShared->MaxNumLLLocks));
579 #endif
580
581 #ifdef TBD
582 tdsaAllShared->MaxNumLLLocks = loResource->loLevelOption.numOfQueuesPerPort - TD_MAX_LOCKS;
583 #endif
584
585 tdsaAllShared->resetCount = 0;
586
587 /* used for saHwEventAck() and ossaDeregisterDeviceHandleCB() */
588 // tdsaAllShared->EventValid = agFALSE;
589 for(i=0; i<TD_MAX_NUM_PHYS; i++)
590 {
591 tdsaAllShared->eventSource[i].EventValid = agFALSE;
592 tdsaAllShared->eventSource[i].Source.agPortContext = agNULL;
593 tdsaAllShared->eventSource[i].Source.event = 0;
594 /* phy ID */
595 tdsaAllShared->eventSource[i].Source.param = 0xFF;
596 }
597
598
599 #ifdef TD_INTERNAL_DEBUG /* for debugging only */
600 pEsglAllInfo = (tdsaEsglAllInfo_t *)&(tdsaAllShared->EsglAllInfo);
601 #endif
602
603 /* initialize CardIDString */
604 osti_strcpy(tdsaAllShared->CardIDString,"");
605
606
607 #ifdef FDS_DM
608 tdsaAllShared->dmRoot.tdData = tdsaRoot;
609 #endif
610
611 #ifdef FDS_SM
612 tdsaAllShared->smRoot.tdData = tdsaRoot;
613 #endif
614
615 /* get card ID */
616 if (tdsaGetCardIDString(tiRoot) == tiError)
617 {
618 TI_DBG1(("tdsaGetCardIDString() failed\n"));
619 return tiError;
620 }
621
622 /**< initializes jumptable */
623 tdsaJumpTableInit(tiRoot);
624
625 /**< initializes tdsaPortStartInfo_s including flags */
626 tdssInitSASPortStartInfo(tiRoot);
627
628 /* resets all the relevant flags */
629 tdsaResetComMemFlags(tiRoot);
630
631 /**< initializes timers */
632 tdsaInitTimers(tiRoot);
633
634 TI_DBG6(("ticominit: ******* before tdsaRoot %p tdsaPortContext %p tdsaDeviceData %p\n", tdsaRoot, tdsaPortContext, tdsaDeviceData));
635
636
637 /**< initializes tdsaPortContext_t */
638 tdsaPortContextInit(tiRoot);
639
640 /**< initializes devicelist in tdsaPortContext_t */
641 tdsaDeviceDataInit(tiRoot);
642
643 #ifdef TD_INT_COALESCE
644 tdsaIntCoalCxtInit(tiRoot);
645 #endif
646
647 #ifdef TD_DISCOVER
648 tdsaExpanderInit(tiRoot);
649 #endif
650
651 tdsaQueueConfigInit(tiRoot);
652
653 #ifdef TD_INTERNAL_DEBUG /* for debugging only */
654 TI_DBG6(("ticominit: temp 1\n"));
655 TDLIST_DEQUEUE_FROM_HEAD(&tdlist_to_fill, &pEsglAllInfo->freelist);
656 /* get the pointer to the page from list pointer */
657 page_to_fill = TDLIST_OBJECT_BASE(tdsaEsglPageInfo_t, tdlist, tdlist_to_fill);
658 TI_DBG6(("ticominit: pageinfo ID %d\n", page_to_fill->id));
659 /* this does not work */
660 TDLIST_ENQUEUE_AT_HEAD(tdlist_to_fill, &pEsglAllInfo->freelist);
661
662 TI_DBG6(("ticominit: devide\n"));
663 TDLIST_DEQUEUE_FROM_HEAD(&tdlist_to_fill, &pEsglAllInfo->freelist);
664 /* get the pointer to the page from list pointer */
665 page_to_fill = TDLIST_OBJECT_BASE(tdsaEsglPageInfo_t, tdlist, tdlist_to_fill);
666 TDINIT_PRINT("ticominit: second pageinfo ID %d\n", page_to_fill->id);
667
668 TDLIST_ENQUEUE_AT_HEAD(tdlist_to_fill, &pEsglAllInfo->freelist);
669
670 #endif
671
672
673 #ifdef INITIATOR_DRIVER
674 if(initiatorResource != agNULL)
675 {
676 tdsaAllShared->currentOperation |= TD_OPERATION_INITIATOR;
677 TI_DBG5(("tiCOMInit: calling itdssInit\n"));
678 status = itdssInit(tiRoot, initiatorResource, tdSharedMem);
679
680 if(status != tiSuccess)
681 {
682 TI_DBG1(("tiCOMInit: itdInit FAILED\n"));
683 return status;
684 }
685 }
686 #endif
687
688 #ifdef TARGET_DRIVER
689 if(targetResource != agNULL)
690 {
691 tdsaAllShared->currentOperation |= TD_OPERATION_TARGET;
692 TI_DBG5 (("tiCOMInit: calling ttdssInit\n"));
693 status = ttdssInit(tiRoot, targetResource, tdSharedMem);
694
695 if(status != tiSuccess)
696 {
697 TI_DBG1(("tiCOMInit: ttdInit FAILED\n"));
698 return status;
699 }
700 }
701 #endif
702
703 return status;
704 }
705
706 /*****************************************************************************
707 *! \brief tdsaLoLevelGetResource
708 *
709 * Purpose: This function is called to determine the Transport
710 * Dependent Layer internal resource requirement used by the
711 * lower layer TSDK.
712 *
713 * \param tiRoot: Pointer to driver/port instance.
714 * \param loResource: Pointer to low level TSDK resource requirement.
715 *
716 * \return: None
717 *
718 * \note - currenlty mem[0] - mem[18] are being used
719 *
720 *****************************************************************************/
721 /*
722 this calls ostiGetTransportParam which parses the configuration file to get
723 parameters.
724 */
725 osGLOBAL void
tdsaLoLevelGetResource(tiRoot_t * tiRoot,tiLoLevelResource_t * loResource)726 tdsaLoLevelGetResource(
727 tiRoot_t * tiRoot,
728 tiLoLevelResource_t * loResource)
729 {
730 agsaRoot_t agRoot;
731 bit32 usecsPerTick = 0;
732 agsaSwConfig_t SwConfig;
733 static agsaQueueConfig_t QueueConfig;
734 static agsaMemoryRequirement_t memRequirement;
735 bit32 maxQueueSets = 0;
736 bit32 maxNumOSLocks = 0;
737 bit32 i;
738
739 char *buffer;
740 bit32 buffLen;
741 bit32 lenRecv = 0;
742 char *pLastUsedChar = agNULL;
743 char globalStr[] = "Global";
744 char iniParmsStr[] = "InitiatorParms";
745 char SwParmsStr[] = "SWParms";
746 char OBQueueProps[] = "OBQueueProps";
747 char IBQueueProps[] = "IBQueueProps";
748
749 static char IBQueueSize[30];
750 static char OBQueueSize[30];
751 static char IBQueueEleSize[30];
752 static char OBQueueEleSize[30];
753
754 static char OBQueueInterruptCount[30];
755 static char OBQueueInterruptDelay[30];
756 static char OBQueueInterruptEnable[30];
757 static char IBQueuePriority[30];
758
759
760 static char tmpBuffer[DEFAULT_KEY_BUFFER_SIZE];
761 static bit32 InboundQueueSize[AGSA_MAX_OUTBOUND_Q];
762 static bit32 OutboundQueueSize[AGSA_MAX_OUTBOUND_Q];
763 static bit32 InboundQueueEleSize[AGSA_MAX_OUTBOUND_Q];
764 static bit32 OutboundQueueEleSize[AGSA_MAX_OUTBOUND_Q];
765 static bit32 InboundQueuePriority[AGSA_MAX_INBOUND_Q];
766 static bit32 OutboundQueueInterruptDelay[AGSA_MAX_OUTBOUND_Q];
767 static bit32 OutboundQueueInterruptCount[AGSA_MAX_OUTBOUND_Q];
768 static bit32 OutboundQueueInterruptEnable[AGSA_MAX_OUTBOUND_Q];
769 static bit32 cardID = 0;
770 char CardNum[10];
771
772 #ifdef FDS_DM
773 dmRoot_t dmRoot;
774 dmSwConfig_t dmSwConfig;
775 static dmMemoryRequirement_t dmMemRequirement;
776 bit32 dmUsecsPerTick = 0;
777 bit32 dmMaxNumLocks = 0;
778 #endif
779
780 #ifdef FDS_SM
781 smRoot_t smRoot;
782 smSwConfig_t smSwConfig;
783 static smMemoryRequirement_t smMemRequirement;
784 bit32 smUsecsPerTick = 0;
785 bit32 smMaxNumLocks = 0;
786 #endif
787
788 TI_DBG1(("tdsaLoLevelGetResource: start \n"));
789 TI_DBG6(("tdsaLoLevelGetResource: loResource %p\n", loResource));
790
791 osti_memset(&agRoot, 0, sizeof(agsaRoot_t));
792 osti_memset(&QueueConfig, 0, sizeof(QueueConfig));
793 osti_memset(&memRequirement, 0, sizeof(memRequirement));
794 osti_memset(InboundQueueSize, 0, sizeof(InboundQueueSize));
795 osti_memset(OutboundQueueSize, 0, sizeof(OutboundQueueSize));
796 osti_memset(InboundQueueEleSize, 0, sizeof(InboundQueueEleSize));
797 osti_memset(OutboundQueueEleSize, 0, sizeof(OutboundQueueEleSize));
798
799 memRequirement.count = 0;
800
801 /* default values which are overwritten later */
802 /* The followings are default values */
803 SwConfig.maxActiveIOs = DEFAULT_MAX_ACTIVE_IOS;
804 SwConfig.numDevHandles = DEFAULT_MAX_DEV;
805 SwConfig.smpReqTimeout = DEFAULT_SMP_TIMEOUT; /* DEFAULT_VALUE; */
806 SwConfig.numberOfEventRegClients = DEFAULT_NUM_REG_CLIENTS;
807 SwConfig.sizefEventLog1 = HOST_EVENT_LOG_SIZE; /* in KBytes */
808 SwConfig.sizefEventLog2 = HOST_EVENT_LOG_SIZE; /* in KBytes */
809 SwConfig.eventLog1Option = DEFAULT_EVENT_LOG_OPTION;
810 SwConfig.eventLog2Option = DEFAULT_EVENT_LOG_OPTION;
811 SwConfig.fatalErrorInterruptEnable = 1;
812 SwConfig.fatalErrorInterruptVector = 0; /* Was 1 */
813 SwConfig.hostDirectAccessSupport = 0;
814 SwConfig.hostDirectAccessMode = 0;
815 SwConfig.FWConfig = 0;
816 SwConfig.enableDIF = agFALSE;
817 SwConfig.enableEncryption = agFALSE;
818
819 #ifdef SA_CONFIG_MDFD_REGISTRY
820 SwConfig.disableMDF = agFALSE;
821 #endif /*SA_CONFIG_MDFD_REGISTRY*/
822
823 #if defined(SALLSDK_DEBUG)
824 SwConfig.sallDebugLevel = 1; /* DEFAULT_VALUE; */
825 #endif
826
827
828 #ifdef SA_ENABLE_PCI_TRIGGER
829 SwConfig.PCI_trigger = 0; /* DEFAULT_VALUE; */
830 #endif /* SA_ENABLE_PCI_TRIGGER */
831
832 #ifdef FDS_DM
833 /* defaults */
834 dmMemRequirement.count = 0;
835 dmSwConfig.numDevHandles = DEFAULT_MAX_DEV;
836 #ifdef DM_DEBUG
837 dmSwConfig.DMDebugLevel = 1;
838 #endif
839 #endif
840
841 #ifdef FDS_SM
842 /* defaults */
843 smMemRequirement.count = 0;
844 smSwConfig.maxActiveIOs = DEFAULT_MAX_ACTIVE_IOS;
845 smSwConfig.numDevHandles = DEFAULT_MAX_DEV;
846 #ifdef SM_DEBUG
847 smSwConfig.SMDebugLevel = 1;
848 #endif
849 #endif
850
851 buffer = tmpBuffer;
852 buffLen = sizeof(tmpBuffer);
853
854 /* param3 points to QueueConfig; tdsaAllShared does not exit at this point yet */
855 SwConfig.param3 = (void *)&QueueConfig;
856
857 osti_memset(buffer, 0, buffLen);
858 lenRecv = 0;
859
860 if ((ostiGetTransportParam(
861 tiRoot,
862 globalStr,
863 iniParmsStr,
864 agNULL,
865 agNULL,
866 agNULL,
867 agNULL,
868 "MaxTargets",
869 buffer,
870 buffLen,
871 &lenRecv
872 ) == tiSuccess) && (lenRecv != 0))
873 {
874 if (osti_strncmp(buffer, "0x", 2) == 0)
875 {
876 SwConfig.numDevHandles = osti_strtoul (buffer, &pLastUsedChar, 0);
877 }
878 else
879 {
880 SwConfig.numDevHandles = osti_strtoul (buffer, &pLastUsedChar, 10);
881 }
882 TI_DBG2(("tdsaLoLevelGetResource: MaxTargets %d\n", SwConfig.numDevHandles));
883 }
884
885
886 /*
887 * read the NumInboundQueue parameter
888 */
889 osti_memset(buffer, 0, buffLen);
890 lenRecv = 0;
891
892 QueueConfig.numInboundQueues = DEFAULT_NUM_INBOUND_QUEUE; /* default 1 Inbound queue */
893
894 if ((ostiGetTransportParam(
895 tiRoot,
896 globalStr, /* key */
897 SwParmsStr, /* subkey1 */
898 agNULL, /* subkey2 */
899 agNULL,
900 agNULL,
901 agNULL, /* subkey5 */
902 "NumInboundQueues", /* valueName */
903 buffer,
904 buffLen,
905 &lenRecv
906 ) == tiSuccess) && (lenRecv != 0))
907 {
908 if (osti_strncmp(buffer, "0x", 2) == 0)
909 {
910 QueueConfig.numInboundQueues = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
911 }
912 else
913 {
914 QueueConfig.numInboundQueues = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
915 }
916
917 if (QueueConfig.numInboundQueues > AGSA_MAX_INBOUND_Q)
918 {
919 QueueConfig.numInboundQueues = AGSA_MAX_INBOUND_Q;
920 }
921 }
922
923 /*
924 * read the NumOutboundQueue parameter
925 */
926 osti_memset(buffer, 0, buffLen);
927 lenRecv = 0;
928
929 QueueConfig.numOutboundQueues = DEFAULT_NUM_OUTBOUND_QUEUE; /* default 1 Outbound queue */
930
931 if ((ostiGetTransportParam(
932 tiRoot,
933 globalStr, /* key */
934 SwParmsStr, /* subkey1 */
935 agNULL, /* subkey2 */
936 agNULL,
937 agNULL,
938 agNULL, /* subkey5 */
939 "NumOutboundQueues", /* valueName */
940 buffer,
941 buffLen,
942 &lenRecv
943 ) == tiSuccess) && (lenRecv != 0))
944 {
945 if (osti_strncmp(buffer, "0x", 2) == 0)
946 {
947 QueueConfig.numOutboundQueues = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
948 }
949 else
950 {
951 QueueConfig.numOutboundQueues = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
952 }
953
954 if (QueueConfig.numOutboundQueues > AGSA_MAX_OUTBOUND_Q)
955 {
956 QueueConfig.numOutboundQueues = AGSA_MAX_OUTBOUND_Q;
957 }
958 }
959
960 /*
961 * read the MaxActiveIO parameter
962 */
963 osti_memset(buffer, 0, buffLen);
964 lenRecv = 0;
965
966
967 if ((ostiGetTransportParam(
968 tiRoot,
969 globalStr, /* key */
970 SwParmsStr, /* subkey1 */
971 agNULL, /* subkey2 */
972 agNULL,
973 agNULL,
974 agNULL, /* subkey5 */
975 "MaxActiveIO", /* valueName */
976 buffer,
977 buffLen,
978 &lenRecv
979 ) == tiSuccess) && (lenRecv != 0))
980 {
981 if (osti_strncmp(buffer, "0x", 2) == 0)
982 {
983 SwConfig.maxActiveIOs = osti_strtoul (buffer, &pLastUsedChar, 0);
984 }
985 else
986 {
987 SwConfig.maxActiveIOs = osti_strtoul (buffer, &pLastUsedChar, 10);
988 }
989 }
990
991
992
993 /*
994 * read the SMPTO parameter (SMP Timeout)
995 */
996 osti_memset(buffer, 0, buffLen);
997 lenRecv = 0;
998
999 if ((ostiGetTransportParam(
1000 tiRoot,
1001 globalStr, /* key */
1002 SwParmsStr, /* subkey1 */
1003 agNULL, /* subkey2 */
1004 agNULL,
1005 agNULL,
1006 agNULL, /* subkey5 */
1007 "SMPTO", /* valueName */
1008 buffer,
1009 buffLen,
1010 &lenRecv
1011 ) == tiSuccess) && (lenRecv != 0))
1012 {
1013 if (osti_strncmp(buffer, "0x", 2) == 0)
1014 {
1015 SwConfig.smpReqTimeout = osti_strtoul (buffer, &pLastUsedChar, 0);
1016 }
1017 else
1018 {
1019 SwConfig.smpReqTimeout = osti_strtoul (buffer, &pLastUsedChar, 10);
1020 }
1021 }
1022
1023 /*
1024 * read the NumRegClients parameter
1025 */
1026 osti_memset(buffer, 0, buffLen);
1027 lenRecv = 0;
1028
1029 if ((ostiGetTransportParam(
1030 tiRoot,
1031 globalStr, /* key */
1032 SwParmsStr, /* subkey1 */
1033 agNULL, /* subkey2 */
1034 agNULL,
1035 agNULL,
1036 agNULL, /* subkey5 */
1037 "NumRegClients", /* valueName */
1038 buffer,
1039 buffLen,
1040 &lenRecv
1041 ) == tiSuccess) && (lenRecv != 0))
1042 {
1043 if (osti_strncmp(buffer, "0x", 2) == 0)
1044 {
1045 SwConfig.numberOfEventRegClients = osti_strtoul (buffer, &pLastUsedChar, 0);
1046 }
1047 else
1048 {
1049 SwConfig.numberOfEventRegClients = osti_strtoul (buffer, &pLastUsedChar, 10);
1050 }
1051 }
1052
1053 #if defined(SALLSDK_DEBUG)
1054 osti_memset(buffer, 0, buffLen);
1055 lenRecv = 0;
1056
1057 if ((ostiGetTransportParam(
1058 tiRoot,
1059 globalStr, /* key */
1060 SwParmsStr, /* subkey1 */
1061 agNULL, /* subkey2 */
1062 agNULL,
1063 agNULL,
1064 agNULL, /* subkey5 */
1065 "LLDebugLevel", /* valueName */
1066 buffer,
1067 buffLen,
1068 &lenRecv
1069 ) == tiSuccess) && (lenRecv != 0))
1070 {
1071 if (osti_strncmp(buffer, "0x", 2) == 0)
1072 {
1073 SwConfig.sallDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 0);
1074 }
1075 else
1076 {
1077 SwConfig.sallDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 10);
1078 }
1079 }
1080 #endif
1081
1082
1083 #if defined(DM_DEBUG)
1084 osti_memset(buffer, 0, buffLen);
1085 lenRecv = 0;
1086
1087 if ((ostiGetTransportParam(
1088 tiRoot,
1089 globalStr, /* key */
1090 SwParmsStr, /* subkey1 */
1091 agNULL, /* subkey2 */
1092 agNULL,
1093 agNULL,
1094 agNULL, /* subkey5 */
1095 "DMDebugLevel", /* valueName */
1096 buffer,
1097 buffLen,
1098 &lenRecv
1099 ) == tiSuccess) && (lenRecv != 0))
1100 {
1101 if (osti_strncmp(buffer, "0x", 2) == 0)
1102 {
1103 dmSwConfig.DMDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 0);
1104 }
1105 else
1106 {
1107 dmSwConfig.DMDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 10);
1108 }
1109 }
1110 #endif
1111
1112 #if defined(SM_DEBUG)
1113 osti_memset(buffer, 0, buffLen);
1114 lenRecv = 0;
1115
1116 if ((ostiGetTransportParam(
1117 tiRoot,
1118 globalStr, /* key */
1119 SwParmsStr, /* subkey1 */
1120 agNULL, /* subkey2 */
1121 agNULL,
1122 agNULL,
1123 agNULL, /* subkey5 */
1124 "SMDebugLevel", /* valueName */
1125 buffer,
1126 buffLen,
1127 &lenRecv
1128 ) == tiSuccess) && (lenRecv != 0))
1129 {
1130 if (osti_strncmp(buffer, "0x", 2) == 0)
1131 {
1132 smSwConfig.SMDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 0);
1133 }
1134 else
1135 {
1136 smSwConfig.SMDebugLevel = osti_strtoul (buffer, &pLastUsedChar, 10);
1137 }
1138 }
1139 #endif
1140
1141 osti_memset(buffer, 0, buffLen);
1142 lenRecv = 0;
1143
1144 for (i=0;i<QueueConfig.numInboundQueues;i++)
1145 {
1146 osti_sprintf(IBQueueSize,"IBQueueNumElements%d", i);
1147 osti_sprintf(IBQueueEleSize,"IBQueueElementSize%d", i);
1148 osti_sprintf(IBQueuePriority,"IBQueuePriority%d", i);
1149
1150
1151
1152 /*
1153 * read the IBQueueSize
1154 */
1155 osti_memset(buffer, 0, buffLen);
1156 lenRecv = 0;
1157
1158 InboundQueueSize[i] = DEFAULT_INBOUND_QUEUE_SIZE; /* default 256 Inbound queue size */
1159
1160 if ((ostiGetTransportParam(
1161 tiRoot,
1162 globalStr, /* key */
1163 SwParmsStr, /* subkey1 */
1164 IBQueueProps, /* subkey2 */
1165 agNULL,
1166 agNULL,
1167 agNULL, /* subkey5 */
1168 IBQueueSize, /* valueName */
1169 buffer,
1170 buffLen,
1171 &lenRecv
1172 ) == tiSuccess) && (lenRecv != 0))
1173 {
1174 if (osti_strncmp(buffer, "0x", 2) == 0)
1175 {
1176 InboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1177 }
1178 else
1179 {
1180 InboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1181 TI_DBG6(("tdsaLoLevelGetResource: queue number %d IB queue size %d\n", i, InboundQueueSize[i]));
1182 }
1183 }
1184
1185
1186 /*
1187 * read the IBQueueEleSize
1188 */
1189 osti_memset(buffer, 0, buffLen);
1190 lenRecv = 0;
1191
1192 InboundQueueEleSize[i] = DEFAULT_INBOUND_QUEUE_ELE_SIZE; /* default 128 Inbound queue element */
1193
1194 if ((ostiGetTransportParam(
1195 tiRoot,
1196 globalStr, /* key */
1197 SwParmsStr, /* subkey1 */
1198 IBQueueProps, /* subkey2 */
1199 agNULL,
1200 agNULL,
1201 agNULL, /* subkey5 */
1202 IBQueueEleSize, /* valueName */
1203 buffer,
1204 buffLen,
1205 &lenRecv
1206 ) == tiSuccess) && (lenRecv != 0))
1207 {
1208 if (osti_strncmp(buffer, "0x", 2) == 0)
1209 {
1210 InboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1211 }
1212 else
1213 {
1214 InboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1215 TI_DBG6(("tdsaLoLevelGetResource: queue number %d IB queue ele size %d\n", i, InboundQueueEleSize[i]));
1216 }
1217 }
1218
1219 /*
1220 * read the IBQueuePriority
1221 */
1222
1223 osti_memset(buffer, 0, buffLen);
1224 lenRecv = 0;
1225
1226 InboundQueuePriority[i] = DEFAULT_INBOUND_QUEUE_PRIORITY; /* default 0 Inbound queue priority */
1227
1228 if ((ostiGetTransportParam(
1229 tiRoot,
1230 globalStr, /* key */
1231 SwParmsStr, /* subkey1 */
1232 IBQueueProps,/* subkey2 */
1233 agNULL,
1234 agNULL,
1235 agNULL, /* subkey5 */
1236 IBQueuePriority, /* valueName */
1237 buffer,
1238 buffLen,
1239 &lenRecv
1240 ) == tiSuccess) && (lenRecv != 0))
1241 {
1242 if (osti_strncmp(buffer, "0x", 2) == 0)
1243 {
1244 InboundQueuePriority[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1245 }
1246 else
1247 {
1248 InboundQueuePriority[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1249 TI_DBG6(("tdsaLoLevelGetResource: queue number %d priority %d\n", i, InboundQueuePriority[i]));
1250 }
1251 }
1252
1253 /**********************************************/
1254 osti_memset(buffer, 0, buffLen);
1255 lenRecv = 0;
1256 }/* end of loop */
1257
1258
1259 osti_memset(buffer, 0, buffLen);
1260 lenRecv = 0;
1261
1262 for (i=0;i<QueueConfig.numOutboundQueues;i++)
1263 {
1264 osti_sprintf(OBQueueSize,"OBQueueNumElements%d", i);
1265 osti_sprintf(OBQueueEleSize,"OBQueueElementSize%d", i);
1266 osti_sprintf(OBQueueInterruptDelay,"OBQueueInterruptDelay%d", i);
1267 osti_sprintf(OBQueueInterruptCount,"OBQueueInterruptCount%d", i);
1268 osti_sprintf(OBQueueInterruptEnable,"OBQueueInterruptEnable%d", i);
1269
1270 /*
1271 * read the OBQueueSize
1272 */
1273 osti_memset(buffer, 0, buffLen);
1274 lenRecv = 0;
1275
1276 OutboundQueueSize[i] = DEFAULT_OUTBOUND_QUEUE_SIZE; /* default 256 Outbound queue size */
1277
1278 if ((ostiGetTransportParam(
1279 tiRoot,
1280 globalStr, /* key */
1281 SwParmsStr, /* subkey1 */
1282 OBQueueProps, /* subkey2 */
1283 agNULL,
1284 agNULL,
1285 agNULL, /* subkey5 */
1286 OBQueueSize, /* valueName */
1287 buffer,
1288 buffLen,
1289 &lenRecv
1290 ) == tiSuccess) && (lenRecv != 0))
1291 {
1292 if (osti_strncmp(buffer, "0x", 2) == 0)
1293 {
1294 OutboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1295 }
1296 else
1297 {
1298 OutboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1299 TI_DBG6(("tdsaLoLevelGetResource: queue number %d OB queue size %d\n", i, OutboundQueueSize[i]));
1300 }
1301 }
1302
1303
1304 /*
1305 * read the OBQueueEleSize
1306 */
1307 osti_memset(buffer, 0, buffLen);
1308 lenRecv = 0;
1309
1310 OutboundQueueEleSize[i] = DEFAULT_OUTBOUND_QUEUE_ELE_SIZE; /* default 128 Outbound queue element */
1311
1312 if ((ostiGetTransportParam(
1313 tiRoot,
1314 globalStr, /* key */
1315 SwParmsStr, /* subkey1 */
1316 OBQueueProps, /* subkey2 */
1317 agNULL,
1318 agNULL,
1319 agNULL, /* subkey5 */
1320 OBQueueEleSize, /* valueName */
1321 buffer,
1322 buffLen,
1323 &lenRecv
1324 ) == tiSuccess) && (lenRecv != 0))
1325 {
1326 if (osti_strncmp(buffer, "0x", 2) == 0)
1327 {
1328 OutboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1329 }
1330 else
1331 {
1332 OutboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1333 TI_DBG6(("tdsaLoLevelGetResource: queue number %d OB queue ele size %d\n", i, OutboundQueueEleSize[i]));
1334 }
1335 }
1336
1337 /*
1338 * read the OBQueueInterruptDelay
1339 */
1340 osti_memset(buffer, 0, buffLen);
1341 lenRecv = 0;
1342
1343 OutboundQueueInterruptDelay[i] = DEFAULT_OUTBOUND_QUEUE_INTERRUPT_DELAY; /* default 1 Outbound interrupt delay */
1344
1345 if ((ostiGetTransportParam(
1346 tiRoot,
1347 globalStr, /* key */
1348 SwParmsStr, /* subkey1 */
1349 OBQueueProps, /* subkey2 */
1350 agNULL,
1351 agNULL,
1352 agNULL, /* subkey5 */
1353 OBQueueInterruptDelay, /* valueName */
1354 buffer,
1355 buffLen,
1356 &lenRecv
1357 ) == tiSuccess) && (lenRecv != 0))
1358 {
1359 if (osti_strncmp(buffer, "0x", 2) == 0)
1360 {
1361 OutboundQueueInterruptDelay[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1362 }
1363 else
1364 {
1365 OutboundQueueInterruptDelay[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1366 TI_DBG6(("tdsaLoLevelGetResource: queue number %d interrupt delay %d\n", i, OutboundQueueInterruptDelay[i]));
1367 }
1368 }
1369
1370 /*
1371 * read the OBQueueInterruptCount
1372 */
1373
1374 osti_memset(buffer, 0, buffLen);
1375 lenRecv = 0;
1376
1377 OutboundQueueInterruptCount[i] = DEFAULT_OUTBOUND_QUEUE_INTERRUPT_COUNT; /* default 1 Outbound interrupt count */
1378
1379 if ((ostiGetTransportParam(
1380 tiRoot,
1381 globalStr, /* key */
1382 SwParmsStr, /* subkey1 */
1383 OBQueueProps, /* subkey2 */
1384 agNULL,
1385 agNULL,
1386 agNULL, /* subkey5 */
1387 OBQueueInterruptCount, /* valueName */
1388 buffer,
1389 buffLen,
1390 &lenRecv
1391 ) == tiSuccess) && (lenRecv != 0))
1392 {
1393 if (osti_strncmp(buffer, "0x", 2) == 0)
1394 {
1395 OutboundQueueInterruptCount[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1396 }
1397 else
1398 {
1399 OutboundQueueInterruptCount[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1400 TI_DBG6(("tdsaLoLevelGetResource: queue number %d interrupt count %d\n", i, OutboundQueueInterruptCount[i]));
1401 }
1402 }
1403
1404 /*
1405 * read the OBQueueInterruptEnable
1406 */
1407
1408 osti_memset(buffer, 0, buffLen);
1409 lenRecv = 0;
1410
1411 OutboundQueueInterruptEnable[i] = DEFAULT_OUTBOUND_INTERRUPT_ENABLE; /* default 1 Outbound interrupt is enabled */
1412
1413 if ((ostiGetTransportParam(
1414 tiRoot,
1415 globalStr, /* key */
1416 SwParmsStr, /* subkey1 */
1417 OBQueueProps, /* subkey2 */
1418 agNULL,
1419 agNULL,
1420 agNULL, /* subkey5 */
1421 OBQueueInterruptEnable, /* valueName */
1422 buffer,
1423 buffLen,
1424 &lenRecv
1425 ) == tiSuccess) && (lenRecv != 0))
1426 {
1427 if (osti_strncmp(buffer, "0x", 2) == 0)
1428 {
1429 OutboundQueueInterruptEnable[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1430 #ifdef SPC_POLLINGMODE
1431 OutboundQueueInterruptEnable[i] = 0;
1432 #endif /* SPC_POLLINGMODE */
1433
1434 }
1435 else
1436 {
1437 OutboundQueueInterruptEnable[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1438 #ifdef SPC_POLLINGMODE
1439 OutboundQueueInterruptEnable[i] = 0;
1440 #endif /* SPC_POLLINGMODE */
1441 }
1442 TI_DBG2(("tdsaLoLevelGetResource: queue number %d interrupt enable %d\n", i, OutboundQueueInterruptEnable[i]));
1443 }
1444
1445 /**********************************************/
1446 osti_memset(buffer, 0, buffLen);
1447 lenRecv = 0;
1448
1449 }/* end of loop */
1450
1451
1452
1453 /************************************************************
1454 * READ CARD Specific
1455 */
1456 osti_memset(buffer, 0, buffLen);
1457 lenRecv = 0;
1458
1459 for (i=0;i<QueueConfig.numInboundQueues;i++)
1460 {
1461 osti_sprintf(CardNum,"CardNum%d", cardID);
1462 osti_sprintf(IBQueueSize,"IBQueueNumElements%d", i);
1463 osti_sprintf(IBQueueEleSize,"IBQueueElementSize%d", i);
1464 osti_sprintf(IBQueuePriority,"IBQueuePriority%d", i);
1465
1466 /*
1467 * read the IBQueueSize
1468 */
1469 osti_memset(buffer, 0, buffLen);
1470 lenRecv = 0;
1471
1472 if ((ostiGetTransportParam(
1473 tiRoot,
1474 CardNum, /* key */
1475 SwParmsStr, /* subkey1 */
1476 IBQueueProps, /* subkey2 */
1477 agNULL,
1478 agNULL,
1479 agNULL, /* subkey5 */
1480 IBQueueSize, /* valueName */
1481 buffer,
1482 buffLen,
1483 &lenRecv
1484 ) == tiSuccess) && (lenRecv != 0))
1485 {
1486 if (osti_strncmp(buffer, "0x", 2) == 0)
1487 {
1488 InboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1489 }
1490 else
1491 {
1492 InboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1493 TI_DBG6(("tdsaLoLevelGetResource: queue number %d IB queue size %d\n", i, InboundQueueSize[i]));
1494 }
1495 }
1496
1497
1498 /*
1499 * read the IBQueueEleSize
1500 */
1501 osti_memset(buffer, 0, buffLen);
1502 lenRecv = 0;
1503
1504 if ((ostiGetTransportParam(
1505 tiRoot,
1506 CardNum, /* key */
1507 SwParmsStr, /* subkey1 */
1508 IBQueueProps, /* subkey2 */
1509 agNULL,
1510 agNULL,
1511 agNULL, /* subkey5 */
1512 IBQueueEleSize, /* valueName */
1513 buffer,
1514 buffLen,
1515 &lenRecv
1516 ) == tiSuccess) && (lenRecv != 0))
1517 {
1518 if (osti_strncmp(buffer, "0x", 2) == 0)
1519 {
1520 InboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1521 }
1522 else
1523 {
1524 InboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1525 TI_DBG6(("tdsaLoLevelGetResource: queue number %d IB queue size %d\n", i, InboundQueueEleSize[i]));
1526 }
1527 }
1528
1529 /*
1530 * read the IBQueuePriority
1531 */
1532
1533 osti_memset(buffer, 0, buffLen);
1534 lenRecv = 0;
1535 if ((ostiGetTransportParam(
1536 tiRoot,
1537 CardNum, /* key */
1538 SwParmsStr, /* subkey1 */
1539 IBQueueProps,/* subkey2 */
1540 agNULL,
1541 agNULL,
1542 agNULL, /* subkey5 */
1543 IBQueuePriority, /* valueName */
1544 buffer,
1545 buffLen,
1546 &lenRecv
1547 ) == tiSuccess) && (lenRecv != 0))
1548 {
1549 if (osti_strncmp(buffer, "0x", 2) == 0)
1550 {
1551 InboundQueuePriority[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1552 }
1553 else
1554 {
1555 InboundQueuePriority[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1556 TI_DBG6(("tdsaLoLevelGetResource: card number %d queue number %d priority %d\n", cardID, i, InboundQueuePriority[i]));
1557 }
1558 }
1559
1560 /**********************************************/
1561 osti_memset(buffer, 0, buffLen);
1562 lenRecv = 0;
1563 }/* end of loop */
1564
1565
1566
1567 osti_memset(buffer, 0, buffLen);
1568 lenRecv = 0;
1569
1570 for (i=0;i<QueueConfig.numOutboundQueues;i++)
1571 {
1572 osti_sprintf(CardNum,"CardNum%d", cardID);
1573 osti_sprintf(OBQueueSize,"OBQueueNumElements%d", i);
1574 osti_sprintf(OBQueueEleSize,"OBQueueElementSize%d", i);
1575 osti_sprintf(OBQueueInterruptDelay,"OBQueueInterruptDelay%d", i);
1576 osti_sprintf(OBQueueInterruptCount,"OBQueueInterruptCount%d", i);
1577 osti_sprintf(OBQueueInterruptEnable,"OBQueueInterruptEnable%d", i);
1578
1579 /*
1580 * read the OBQueueSize
1581 */
1582 osti_memset(buffer, 0, buffLen);
1583 lenRecv = 0;
1584
1585 if ((ostiGetTransportParam(
1586 tiRoot,
1587 CardNum, /* key */
1588 SwParmsStr, /* subkey1 */
1589 OBQueueProps, /* subkey2 */
1590 agNULL,
1591 agNULL,
1592 agNULL, /* subkey5 */
1593 OBQueueSize, /* valueName */
1594 buffer,
1595 buffLen,
1596 &lenRecv
1597 ) == tiSuccess) && (lenRecv != 0))
1598 {
1599 if (osti_strncmp(buffer, "0x", 2) == 0)
1600 {
1601 OutboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1602 }
1603 else
1604 {
1605 OutboundQueueSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1606 TI_DBG6(("tdsaLoLevelGetResource: queue number %d OB queue size %d\n", i, OutboundQueueSize[i]));
1607 }
1608 }
1609
1610
1611 /*
1612 * read the OBQueueEleSize
1613 */
1614 osti_memset(buffer, 0, buffLen);
1615 lenRecv = 0;
1616
1617 if ((ostiGetTransportParam(
1618 tiRoot,
1619 CardNum, /* key */
1620 SwParmsStr, /* subkey1 */
1621 OBQueueProps, /* subkey2 */
1622 agNULL,
1623 agNULL,
1624 agNULL, /* subkey5 */
1625 OBQueueEleSize, /* valueName */
1626 buffer,
1627 buffLen,
1628 &lenRecv
1629 ) == tiSuccess) && (lenRecv != 0))
1630 {
1631 if (osti_strncmp(buffer, "0x", 2) == 0)
1632 {
1633 OutboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1634 }
1635 else
1636 {
1637 OutboundQueueEleSize[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1638 TI_DBG6(("tdsaLoLevelGetResource: queue number %d OB queue ele size %d\n", i, OutboundQueueEleSize[i]));
1639 }
1640 }
1641
1642 /*
1643 * read the OBQueueInterruptDelay
1644 */
1645 osti_memset(buffer, 0, buffLen);
1646 lenRecv = 0;
1647
1648 if ((ostiGetTransportParam(
1649 tiRoot,
1650 CardNum, /* key */
1651 SwParmsStr, /* subkey1 */
1652 OBQueueProps, /* subkey2 */
1653 agNULL,
1654 agNULL,
1655 agNULL, /* subkey5 */
1656 OBQueueInterruptDelay, /* valueName */
1657 buffer,
1658 buffLen,
1659 &lenRecv
1660 ) == tiSuccess) && (lenRecv != 0))
1661 {
1662 if (osti_strncmp(buffer, "0x", 2) == 0)
1663 {
1664 OutboundQueueInterruptDelay[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1665 }
1666 else
1667 {
1668 OutboundQueueInterruptDelay[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1669 TI_DBG6(("tdsaLoLevelGetResource: card number %d queue number %d interrupt delay %d\n", cardID, i, OutboundQueueInterruptDelay[i]));
1670 }
1671 }
1672
1673 /*
1674 * read the OBQueueInterruptCount
1675 */
1676
1677 osti_memset(buffer, 0, buffLen);
1678 lenRecv = 0;
1679 if ((ostiGetTransportParam(
1680 tiRoot,
1681 CardNum, /* key */
1682 SwParmsStr, /* subkey1 */
1683 OBQueueProps, /* subkey2 */
1684 agNULL,
1685 agNULL,
1686 agNULL, /* subkey5 */
1687 OBQueueInterruptCount, /* valueName */
1688 buffer,
1689 buffLen,
1690 &lenRecv
1691 ) == tiSuccess) && (lenRecv != 0))
1692 {
1693 if (osti_strncmp(buffer, "0x", 2) == 0)
1694 {
1695 OutboundQueueInterruptCount[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1696 }
1697 else
1698 {
1699 OutboundQueueInterruptCount[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1700 TI_DBG6(("tdsaLoLevelGetResource: card number %d queue number %d interrupt count %d\n", cardID, i, OutboundQueueInterruptCount[i]));
1701 }
1702 }
1703
1704 /*
1705 * read the OBQueueInterruptEnable
1706 */
1707
1708 osti_memset(buffer, 0, buffLen);
1709 lenRecv = 0;
1710 if ((ostiGetTransportParam(
1711 tiRoot,
1712 CardNum, /* key */
1713 SwParmsStr, /* subkey1 */
1714 OBQueueProps, /* subkey2 */
1715 agNULL,
1716 agNULL,
1717 agNULL, /* subkey5 */
1718 OBQueueInterruptEnable, /* valueName */
1719 buffer,
1720 buffLen,
1721 &lenRecv
1722 ) == tiSuccess) && (lenRecv != 0))
1723 {
1724 if (osti_strncmp(buffer, "0x", 2) == 0)
1725 {
1726 OutboundQueueInterruptEnable[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 0);
1727 #ifdef SPC_POLLINGMODE
1728 OutboundQueueInterruptEnable[i] = 0;
1729 #endif /* SPC_POLLINGMODE */
1730
1731 }
1732 else
1733 {
1734 OutboundQueueInterruptEnable[i] = (bit16) osti_strtoul (buffer, &pLastUsedChar, 10);
1735 #ifdef SPC_POLLINGMODE
1736 OutboundQueueInterruptEnable[i] = 0;
1737 #endif /* SPC_POLLINGMODE */
1738 }
1739 TI_DBG2(("tdsaLoLevelGetResource: card number %d queue number %d interrupt count %d\n", cardID, i, OutboundQueueInterruptEnable[i]));
1740 }
1741
1742
1743 /**********************************************/
1744 osti_memset(buffer, 0, buffLen);
1745 lenRecv = 0;
1746
1747 }/* end of loop */
1748
1749
1750 TI_DBG6(("tdsaLoLevelGetResource: \n"));
1751 tdsaPrintSwConfig(&SwConfig);
1752
1753 /* fills in queue related parameters */
1754 for (i=0;i<QueueConfig.numInboundQueues;i++)
1755 {
1756 QueueConfig.inboundQueues[i].elementCount = InboundQueueSize[i];
1757 QueueConfig.inboundQueues[i].elementSize = InboundQueueEleSize[i];
1758 QueueConfig.inboundQueues[i].priority = InboundQueuePriority[i];
1759 }
1760 for (i=0;i<QueueConfig.numOutboundQueues;i++)
1761 {
1762 QueueConfig.outboundQueues[i].elementCount = OutboundQueueSize[i];
1763 QueueConfig.outboundQueues[i].elementSize = OutboundQueueEleSize[i];
1764 QueueConfig.outboundQueues[i].interruptDelay = OutboundQueueInterruptDelay[i];
1765 QueueConfig.outboundQueues[i].interruptCount = OutboundQueueInterruptCount[i];
1766 QueueConfig.outboundQueues[i].interruptEnable = OutboundQueueInterruptEnable[i];
1767 }
1768
1769
1770 /* process event log related parameters */
1771 osti_memset(buffer, 0, buffLen);
1772 lenRecv = 0;
1773
1774
1775 if ((ostiGetTransportParam(
1776 tiRoot,
1777 globalStr, /* key */
1778 SwParmsStr, /* subkey1 */
1779 agNULL, /* subkey2 */
1780 agNULL,
1781 agNULL,
1782 agNULL, /* subkey5 */
1783 "EventLogSize1", /* valueName */
1784 buffer,
1785 buffLen,
1786 &lenRecv
1787 ) == tiSuccess) && (lenRecv != 0))
1788 {
1789 if (osti_strncmp(buffer, "0x", 2) == 0)
1790 {
1791 SwConfig.sizefEventLog1 = osti_strtoul (buffer, &pLastUsedChar, 0);
1792 }
1793 else
1794 {
1795 SwConfig.sizefEventLog1 = osti_strtoul (buffer, &pLastUsedChar, 10);
1796 }
1797 }
1798
1799 osti_memset(buffer, 0, buffLen);
1800 lenRecv = 0;
1801
1802
1803 if ((ostiGetTransportParam(
1804 tiRoot,
1805 globalStr, /* key */
1806 SwParmsStr, /* subkey1 */
1807 agNULL, /* subkey2 */
1808 agNULL,
1809 agNULL,
1810 agNULL, /* subkey5 */
1811 "EventLogOption1", /* valueName */
1812 buffer,
1813 buffLen,
1814 &lenRecv
1815 ) == tiSuccess) && (lenRecv != 0))
1816 {
1817 if (osti_strncmp(buffer, "0x", 2) == 0)
1818 {
1819 SwConfig.eventLog1Option = osti_strtoul (buffer, &pLastUsedChar, 0);
1820 }
1821 else
1822 {
1823 SwConfig.eventLog1Option = osti_strtoul (buffer, &pLastUsedChar, 10);
1824 }
1825 }
1826
1827 osti_memset(buffer, 0, buffLen);
1828 lenRecv = 0;
1829
1830
1831 if ((ostiGetTransportParam(
1832 tiRoot,
1833 globalStr, /* key */
1834 SwParmsStr, /* subkey1 */
1835 agNULL, /* subkey2 */
1836 agNULL,
1837 agNULL,
1838 agNULL, /* subkey5 */
1839 "EventLogSize2", /* valueName */ /* size in K Dwords */
1840 buffer,
1841 buffLen,
1842 &lenRecv
1843 ) == tiSuccess) && (lenRecv != 0))
1844 {
1845 if (osti_strncmp(buffer, "0x", 2) == 0)
1846 {
1847 SwConfig.sizefEventLog2 = osti_strtoul (buffer, &pLastUsedChar, 0);
1848 }
1849 else
1850 {
1851 SwConfig.sizefEventLog2 = osti_strtoul (buffer, &pLastUsedChar, 10);
1852 }
1853 }
1854
1855 osti_memset(buffer, 0, buffLen);
1856 lenRecv = 0;
1857
1858
1859 if ((ostiGetTransportParam(
1860 tiRoot,
1861 globalStr, /* key */
1862 SwParmsStr, /* subkey1 */
1863 agNULL, /* subkey2 */
1864 agNULL,
1865 agNULL,
1866 agNULL, /* subkey5 */
1867 "EventLogOption2", /* valueName */
1868 buffer,
1869 buffLen,
1870 &lenRecv
1871 ) == tiSuccess) && (lenRecv != 0))
1872 {
1873 if (osti_strncmp(buffer, "0x", 2) == 0)
1874 {
1875 SwConfig.eventLog2Option = osti_strtoul (buffer, &pLastUsedChar, 0);
1876 }
1877 else
1878 {
1879 SwConfig.eventLog2Option = osti_strtoul (buffer, &pLastUsedChar, 10);
1880 }
1881 }
1882 /* end of event log related parameters */
1883
1884 /*
1885 HDA parameters
1886 */
1887 osti_memset(buffer, 0, buffLen);
1888 lenRecv = 0;
1889
1890
1891 if ((ostiGetTransportParam(
1892 tiRoot,
1893 globalStr, /* key */
1894 SwParmsStr, /* subkey1 */
1895 agNULL, /* subkey2 */
1896 agNULL,
1897 agNULL,
1898 agNULL, /* subkey5 */
1899 "HDASupport", /* valueName */
1900 buffer,
1901 buffLen,
1902 &lenRecv
1903 ) == tiSuccess) && (lenRecv != 0))
1904 {
1905 if (osti_strncmp(buffer, "0x", 2) == 0)
1906 {
1907 SwConfig.hostDirectAccessSupport = osti_strtoul (buffer, &pLastUsedChar, 0);
1908 }
1909 else
1910 {
1911 SwConfig.hostDirectAccessSupport = osti_strtoul (buffer, &pLastUsedChar, 10);
1912 }
1913 }
1914 /***********************************************************************/
1915 osti_memset(buffer, 0, buffLen);
1916 lenRecv = 0;
1917
1918
1919 if ((ostiGetTransportParam(
1920 tiRoot,
1921 globalStr, /* key */
1922 SwParmsStr, /* subkey1 */
1923 agNULL, /* subkey2 */
1924 agNULL,
1925 agNULL,
1926 agNULL, /* subkey5 */
1927 "HDAMode", /* valueName */
1928 buffer,
1929 buffLen,
1930 &lenRecv
1931 ) == tiSuccess) && (lenRecv != 0))
1932 {
1933 if (osti_strncmp(buffer, "0x", 2) == 0)
1934 {
1935 SwConfig.hostDirectAccessMode = osti_strtoul (buffer, &pLastUsedChar, 0);
1936 }
1937 else
1938 {
1939 SwConfig.hostDirectAccessMode = osti_strtoul (buffer, &pLastUsedChar, 10);
1940 }
1941 }
1942 /***********************************************************************/
1943 /* the end of HDA parameters */
1944
1945
1946 /* FW configuration */
1947 osti_memset(buffer, 0, buffLen);
1948 lenRecv = 0;
1949
1950
1951 if ((ostiGetTransportParam(
1952 tiRoot,
1953 globalStr, /* key */
1954 SwParmsStr, /* subkey1 */
1955 agNULL, /* subkey2 */
1956 agNULL,
1957 agNULL,
1958 agNULL, /* subkey5 */
1959 "FWConfig", /* valueName */
1960 buffer,
1961 buffLen,
1962 &lenRecv
1963 ) == tiSuccess) && (lenRecv != 0))
1964 {
1965 if (osti_strncmp(buffer, "0x", 2) == 0)
1966 {
1967 SwConfig.FWConfig = osti_strtoul (buffer, &pLastUsedChar, 0);
1968 }
1969 else
1970 {
1971 SwConfig.FWConfig = osti_strtoul (buffer, &pLastUsedChar, 10);
1972 }
1973 }
1974 /* The end of FW configuration */
1975
1976
1977
1978 #ifdef SA_ENABLE_TRACE_FUNCTIONS
1979
1980 TI_DBG2(("tdsaLoLevelGetResource: SA_ENABLE_TRACE_FUNCTIONS\n"));
1981
1982 /*
1983 buffer = tmpBuffer;
1984 buffLen = sizeof(tmpBuffer);
1985
1986 osti_memset(buffer, 0, buffLen);
1987 lenRecv = 0;
1988 */
1989
1990 SwConfig.TraceBufferSize = 0;
1991 if ((ostiGetTransportParam(
1992 tiRoot,
1993 globalStr, /* key */
1994 SwParmsStr, /* subkey1 */
1995 agNULL, /* subkey2 */
1996 agNULL,
1997 agNULL,
1998 agNULL, /* subkey5 */
1999 "TraceBufferSize", /* valueName */
2000 buffer,
2001 buffLen,
2002 &lenRecv
2003 ) == tiSuccess) && (lenRecv != 0))
2004 {
2005 if (osti_strncmp(buffer, "0x", 2) == 0)
2006 {
2007 SwConfig.TraceBufferSize = osti_strtoul (buffer, &pLastUsedChar, 0);
2008 }
2009 else
2010 {
2011 SwConfig.TraceBufferSize = osti_strtoul (buffer, &pLastUsedChar, 10);
2012 }
2013 TI_DBG2(("tdsaLoLevelGetResource: SwConfig.TraceBufferSize %d\n",SwConfig.TraceBufferSize));
2014 }
2015
2016 #endif /*# SA_ENABLE_TRACE_FUNCTIONS */
2017
2018 SwConfig.mpiContextTable = agNULL;
2019 SwConfig.mpiContextTablelen = 0;
2020
2021 /* default */
2022 for (i=0;i<8;i++)
2023 {
2024 QueueConfig.sasHwEventQueue[i] = 0;
2025 QueueConfig.sataNCQErrorEventQueue[i] = 0;
2026 }
2027
2028 #ifdef TARGET_DRIVER
2029 for (i=0;i<8;i++)
2030 {
2031 QueueConfig.tgtITNexusEventQueue[i] = 0;
2032 QueueConfig.tgtSSPEventQueue[i] = 0;
2033 QueueConfig.tgtSMPEventQueue[i] = 0;
2034 }
2035 #endif
2036
2037 QueueConfig.iqNormalPriorityProcessingDepth = 0;
2038 QueueConfig.iqHighPriorityProcessingDepth = 0;
2039 QueueConfig.generalEventQueue = 0;
2040
2041 /*
2042 * can agRoot be agNULL below? Yes.
2043 * saGetRequirements(agRoot, IN, OUT, OUT, OUT);
2044 */
2045 saGetRequirements(&agRoot,
2046 &SwConfig,
2047 &memRequirement,
2048 &usecsPerTick,
2049 &maxQueueSets
2050 );
2051 #ifdef FDS_DM
2052 dmGetRequirements(&dmRoot,
2053 &dmSwConfig,
2054 &dmMemRequirement,
2055 &dmUsecsPerTick,
2056 &dmMaxNumLocks
2057 );
2058
2059
2060 #endif
2061
2062 #ifdef FDS_SM
2063 smGetRequirements(
2064 &smRoot,
2065 &smSwConfig,
2066 &smMemRequirement,
2067 &smUsecsPerTick,
2068 &smMaxNumLocks
2069 );
2070
2071 #endif
2072
2073 /* initialization */
2074 maxNumOSLocks = loResource->loLevelOption.maxNumOSLocks;
2075 /*
2076 MAX_LL_LAYER_MEM_DESCRIPTORS is 24. see tidefs.h and tiLoLevelMem_t
2077 in titypes.h
2078 */
2079 #if defined (FDS_DM) && defined (FDS_SM)
2080 /* for LL */
2081 TI_DBG1(("tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS %d\n", MAX_LL_LAYER_MEM_DESCRIPTORS));
2082 for(i=0;i<MAX_LL_LAYER_MEM_DESCRIPTORS;i++)
2083 {
2084 loResource->loLevelMem.mem[i].numElements = 0;
2085 loResource->loLevelMem.mem[i].totalLength = 0;
2086 loResource->loLevelMem.mem[i].singleElementLength = 0;
2087 loResource->loLevelMem.mem[i].alignment = 0;
2088 loResource->loLevelMem.mem[i].type = 0;
2089 loResource->loLevelMem.mem[i].reserved = 0;
2090 loResource->loLevelMem.mem[i].virtPtr = agNULL;
2091 loResource->loLevelMem.mem[i].osHandle = agNULL;
2092 loResource->loLevelMem.mem[i].physAddrUpper = 0;
2093 loResource->loLevelMem.mem[i].physAddrLower = 0;
2094 }
2095
2096 TI_DBG1(("tdsaLoLevelGetResource:memRequirement.count %d\n", memRequirement.count));
2097 /* using the returned value from saGetRequirements */
2098 for (i=0;i< memRequirement.count;i++)
2099 {
2100 /* hardcoded values for now */
2101 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements;
2102 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength;
2103 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength;
2104 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment;
2105 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2106 if ( AGSA_DMA_MEM == memRequirement.agMemory[i].type )
2107 {
2108 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2109 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i));
2110
2111 }
2112 else if ( AGSA_CACHED_MEM == memRequirement.agMemory[i].type )
2113 {
2114 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2115 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i));
2116 }
2117 else if ( AGSA_CACHED_DMA_MEM == memRequirement.agMemory[i].type )
2118 {
2119 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2120 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i));
2121 }
2122 }
2123
2124 /* for DM */
2125 TI_DBG1(("tdsaLoLevelGetResource:dmMemRequirement.count %d\n", dmMemRequirement.count));
2126 /* using the returned value from dmGetRequirements */
2127 for (i=memRequirement.count;i< (memRequirement.count + dmMemRequirement.count);i++)
2128 {
2129 /* hardcoded values for now */
2130 loResource->loLevelMem.mem[i].numElements = dmMemRequirement.dmMemory[i-memRequirement.count].numElements;
2131 loResource->loLevelMem.mem[i].totalLength = dmMemRequirement.dmMemory[i-memRequirement.count].totalLength;
2132 loResource->loLevelMem.mem[i].singleElementLength = dmMemRequirement.dmMemory[i-memRequirement.count].singleElementLength;
2133 loResource->loLevelMem.mem[i].alignment = dmMemRequirement.dmMemory[i-memRequirement.count].alignment;
2134 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2135 if ( AGSA_DMA_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type )
2136 {
2137 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2138 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i));
2139
2140 }
2141 else if ( AGSA_CACHED_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type )
2142 {
2143 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2144 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i));
2145 }
2146 else if ( AGSA_CACHED_DMA_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type )
2147 {
2148 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2149 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i));
2150 }
2151 }
2152
2153 /* for SM */
2154 TI_DBG1(("tdsaLoLevelGetResource:smMemRequirement.count %d\n", smMemRequirement.count));
2155 /* using the returned value from dmGetRequirements */
2156 for (i=(memRequirement.count + dmMemRequirement.count);i< (memRequirement.count + dmMemRequirement.count + smMemRequirement.count);i++)
2157 {
2158 /* hardcoded values for now */
2159 loResource->loLevelMem.mem[i].numElements = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].numElements;
2160 loResource->loLevelMem.mem[i].totalLength = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].totalLength;
2161 loResource->loLevelMem.mem[i].singleElementLength = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].singleElementLength;
2162 loResource->loLevelMem.mem[i].alignment = smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].alignment;
2163 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2164 if ( AGSA_DMA_MEM == smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].type )
2165 {
2166 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2167 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i));
2168
2169 }
2170 else if ( AGSA_CACHED_MEM == smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].type )
2171 {
2172 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2173 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i));
2174 }
2175 else if ( AGSA_CACHED_DMA_MEM == smMemRequirement.smMemory[i-memRequirement.count-dmMemRequirement.count].type )
2176 {
2177 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2178 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i));
2179 }
2180 }
2181
2182 /* sets the low level options */
2183 loResource->loLevelOption.usecsPerTick = MIN(MIN(usecsPerTick, dmUsecsPerTick), smUsecsPerTick);
2184 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + dmMaxNumLocks + smMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks;
2185 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue;
2186 /* no more ESGL */
2187 loResource->loLevelMem.count = memRequirement.count + dmMemRequirement.count + smMemRequirement.count;
2188 /* setting interrupt requirements */
2189 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors;
2190 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors;
2191 loResource->loLevelOption.flag = SwConfig.legacyInt_X;
2192 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors));
2193 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors));
2194 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag));
2195
2196 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment ));
2197 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count));
2198
2199 #elif defined(FDS_DM)
2200 TI_DBG1(("tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS %d\n", MAX_LL_LAYER_MEM_DESCRIPTORS));
2201 for(i=0;i<MAX_LL_LAYER_MEM_DESCRIPTORS;i++)
2202 {
2203 loResource->loLevelMem.mem[i].numElements = 0;
2204 loResource->loLevelMem.mem[i].totalLength = 0;
2205 loResource->loLevelMem.mem[i].singleElementLength = 0;
2206 loResource->loLevelMem.mem[i].alignment = 0;
2207 loResource->loLevelMem.mem[i].type = 0;
2208 loResource->loLevelMem.mem[i].reserved = 0;
2209 loResource->loLevelMem.mem[i].virtPtr = agNULL;
2210 loResource->loLevelMem.mem[i].osHandle = agNULL;
2211 loResource->loLevelMem.mem[i].physAddrUpper = 0;
2212 loResource->loLevelMem.mem[i].physAddrLower = 0;
2213 }
2214
2215 TI_DBG1(("tdsaLoLevelGetResource:memRequirement.count %d\n", memRequirement.count));
2216 /* using the returned value from saGetRequirements */
2217 for (i=0;i< memRequirement.count;i++)
2218 {
2219 /* hardcoded values for now */
2220 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements;
2221 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength;
2222 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength;
2223 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment;
2224 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2225 if ( AGSA_DMA_MEM == memRequirement.agMemory[i].type )
2226 {
2227 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2228 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i));
2229
2230 }
2231 else if ( AGSA_CACHED_MEM == memRequirement.agMemory[i].type )
2232 {
2233 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2234 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i));
2235 }
2236 else if ( AGSA_CACHED_DMA_MEM == memRequirement.agMemory[i].type )
2237 {
2238 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2239 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i));
2240 }
2241 }
2242
2243 TI_DBG1(("tdsaLoLevelGetResource:dmMemRequirement.count %d\n", dmMemRequirement.count));
2244 /* using the returned value from dmGetRequirements */
2245 for (i=memRequirement.count;i< (memRequirement.count + dmMemRequirement.count);i++)
2246 {
2247 /* hardcoded values for now */
2248 loResource->loLevelMem.mem[i].numElements = dmMemRequirement.dmMemory[i-memRequirement.count].numElements;
2249 loResource->loLevelMem.mem[i].totalLength = dmMemRequirement.dmMemory[i-memRequirement.count].totalLength;
2250 loResource->loLevelMem.mem[i].singleElementLength = dmMemRequirement.dmMemory[i-memRequirement.count].singleElementLength;
2251 loResource->loLevelMem.mem[i].alignment = dmMemRequirement.dmMemory[i-memRequirement.count].alignment;
2252 TI_DBG2(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2253 if ( AGSA_DMA_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type )
2254 {
2255 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2256 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i));
2257
2258 }
2259 else if ( AGSA_CACHED_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type )
2260 {
2261 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2262 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i));
2263 }
2264 else if ( AGSA_CACHED_DMA_MEM == dmMemRequirement.dmMemory[i-memRequirement.count].type )
2265 {
2266 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2267 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i));
2268 }
2269 }
2270
2271
2272
2273 /* sets the low level options */
2274 loResource->loLevelOption.usecsPerTick = MIN(usecsPerTick, dmUsecsPerTick);
2275 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + dmMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks;
2276 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue;
2277 /* no more ESGL */
2278 loResource->loLevelMem.count = memRequirement.count + dmMemRequirement.count;
2279 /* setting interrupt requirements */
2280 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors;
2281 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors;
2282 loResource->loLevelOption.flag = SwConfig.legacyInt_X;
2283 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors));
2284 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors));
2285 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag));
2286
2287 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment ));
2288 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count));
2289
2290 #elif defined(FDS_SM)
2291 TI_DBG1(("tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS %d\n", MAX_LL_LAYER_MEM_DESCRIPTORS));
2292 for(i=0;i<MAX_LL_LAYER_MEM_DESCRIPTORS;i++)
2293 {
2294 loResource->loLevelMem.mem[i].numElements = 0;
2295 loResource->loLevelMem.mem[i].totalLength = 0;
2296 loResource->loLevelMem.mem[i].singleElementLength = 0;
2297 loResource->loLevelMem.mem[i].alignment = 0;
2298 loResource->loLevelMem.mem[i].type = 0;
2299 loResource->loLevelMem.mem[i].reserved = 0;
2300 loResource->loLevelMem.mem[i].virtPtr = agNULL;
2301 loResource->loLevelMem.mem[i].osHandle = agNULL;
2302 loResource->loLevelMem.mem[i].physAddrUpper = 0;
2303 loResource->loLevelMem.mem[i].physAddrLower = 0;
2304 }
2305
2306 TI_DBG1(("tdsaLoLevelGetResource:memRequirement.count %d\n", memRequirement.count));
2307 /* using the returned value from saGetRequirements */
2308 for (i=0;i< memRequirement.count;i++)
2309 {
2310 /* hardcoded values for now */
2311 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements;
2312 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength;
2313 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength;
2314 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment;
2315 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2316 if ( AGSA_DMA_MEM == memRequirement.agMemory[i].type )
2317 {
2318 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2319 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i));
2320
2321 }
2322 else if ( AGSA_CACHED_MEM == memRequirement.agMemory[i].type )
2323 {
2324 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2325 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i));
2326 }
2327 else if ( AGSA_CACHED_DMA_MEM == memRequirement.agMemory[i].type )
2328 {
2329 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2330 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i));
2331 }
2332 }
2333
2334 TI_DBG1(("tdsaLoLevelGetResource:smMemRequirement.count %d\n", smMemRequirement.count));
2335 /* using the returned value from smGetRequirements */
2336 for (i=memRequirement.count;i< (memRequirement.count + smMemRequirement.count);i++)
2337 {
2338 /* hardcoded values for now */
2339 loResource->loLevelMem.mem[i].numElements = smMemRequirement.smMemory[i-memRequirement.count].numElements;
2340 loResource->loLevelMem.mem[i].totalLength = smMemRequirement.smMemory[i-memRequirement.count].totalLength;
2341 loResource->loLevelMem.mem[i].singleElementLength = smMemRequirement.smMemory[i-memRequirement.count].singleElementLength;
2342 loResource->loLevelMem.mem[i].alignment = smMemRequirement.smMemory[i-memRequirement.count].alignment;
2343 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2344 if ( AGSA_DMA_MEM == smMemRequirement.smMemory[i-memRequirement.count].type )
2345 {
2346 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2347 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i));
2348
2349 }
2350 else if ( AGSA_CACHED_MEM == smMemRequirement.smMemory[i-memRequirement.count].type )
2351 {
2352 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2353 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i));
2354 }
2355 else if ( AGSA_CACHED_DMA_MEM == smMemRequirement.smMemory[i-memRequirement.count].type )
2356 {
2357 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2358 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i));
2359 }
2360 }
2361
2362
2363
2364 /* sets the low level options */
2365 loResource->loLevelOption.usecsPerTick = MIN(usecsPerTick, smUsecsPerTick);
2366 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + smMaxNumLocks + TD_MAX_LOCKS + maxNumOSLocks;
2367 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue;
2368 /* no more ESGL */
2369 loResource->loLevelMem.count = memRequirement.count + smMemRequirement.count;
2370 /* setting interrupt requirements */
2371 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors;
2372 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors;
2373 loResource->loLevelOption.flag = SwConfig.legacyInt_X;
2374 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors));
2375 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors));
2376 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag));
2377
2378 // TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment ));
2379 TI_DBG6(("tdsaLoLevelGetResource: total memRequirement count %d TI_DMA_MEM\n", loResource->loLevelMem.count));
2380
2381
2382 #else
2383 TI_DBG6(("tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS %d\n", MAX_LL_LAYER_MEM_DESCRIPTORS));
2384 for(i=0;i<MAX_LL_LAYER_MEM_DESCRIPTORS;i++)
2385 {
2386 loResource->loLevelMem.mem[i].numElements = 0;
2387 loResource->loLevelMem.mem[i].totalLength = 0;
2388 loResource->loLevelMem.mem[i].singleElementLength = 0;
2389 loResource->loLevelMem.mem[i].alignment = 0;
2390 loResource->loLevelMem.mem[i].type = 0;
2391 loResource->loLevelMem.mem[i].reserved = 0;
2392 loResource->loLevelMem.mem[i].virtPtr = agNULL;
2393 loResource->loLevelMem.mem[i].osHandle = agNULL;
2394 loResource->loLevelMem.mem[i].physAddrUpper = 0;
2395 loResource->loLevelMem.mem[i].physAddrLower = 0;
2396 }
2397
2398 /* using the returned value from saGetRequirements */
2399 for (i=0;i< memRequirement.count;i++)
2400 {
2401 /* hardcoded values for now */
2402 loResource->loLevelMem.mem[i].numElements = memRequirement.agMemory[i].numElements;
2403 loResource->loLevelMem.mem[i].totalLength = memRequirement.agMemory[i].totalLength;
2404 loResource->loLevelMem.mem[i].singleElementLength = memRequirement.agMemory[i].singleElementLength;
2405 loResource->loLevelMem.mem[i].alignment = memRequirement.agMemory[i].alignment;
2406 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].numElements, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].singleElementLength,loResource->loLevelMem.mem[i].alignment ));
2407 if ( AGSA_DMA_MEM == memRequirement.agMemory[i].type )
2408 {
2409 loResource->loLevelMem.mem[i].type = TI_DMA_MEM;
2410 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_DMA_MEM\n", i));
2411
2412 }
2413 else if ( AGSA_CACHED_MEM == memRequirement.agMemory[i].type )
2414 {
2415 loResource->loLevelMem.mem[i].type = TI_CACHED_MEM;
2416 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_MEM\n", i));
2417 }
2418 else if ( AGSA_CACHED_DMA_MEM == memRequirement.agMemory[i].type )
2419 {
2420 loResource->loLevelMem.mem[i].type = TI_CACHED_DMA_MEM;
2421 TI_DBG6(("tdsaLoLevelGetResource: index %d TI_CACHED_DMA_MEM\n", i));
2422 }
2423 }
2424
2425
2426
2427 /* sets the low level options */
2428 loResource->loLevelOption.usecsPerTick = usecsPerTick;
2429 loResource->loLevelOption.numOfQueuesPerPort = maxQueueSets + TD_MAX_LOCKS + maxNumOSLocks;
2430 loResource->loLevelOption.mutexLockUsage = tiOneMutexLockPerQueue;
2431 /* no more ESGL */
2432 loResource->loLevelMem.count = memRequirement.count;
2433 /* setting interrupt requirements */
2434 loResource->loLevelOption.maxInterruptVectors = SwConfig.max_MSIX_InterruptVectors;
2435 loResource->loLevelOption.max_MSI_InterruptVectors = SwConfig.max_MSI_InterruptVectors;
2436 loResource->loLevelOption.flag = SwConfig.legacyInt_X;
2437 TI_DBG2(("tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) %d \n", loResource->loLevelOption.maxInterruptVectors));
2438 TI_DBG2(("tdsaLoLevelGetResource: asking max_MSI_InterruptVectors %d \n", loResource->loLevelOption.max_MSI_InterruptVectors));
2439 TI_DBG2(("tdsaLoLevelGetResource: asking flag - legacyInt_X %d \n", loResource->loLevelOption.flag));
2440
2441 TI_DBG6(("tdsaLoLevelGetResource: index %d numElements %d totalLength %d singleElementLength %d alignment %d\n",memRequirement.count, loResource->loLevelMem.mem[memRequirement.count].numElements,loResource->loLevelMem.mem[memRequirement.count].totalLength, loResource->loLevelMem.mem[memRequirement.count].singleElementLength,loResource->loLevelMem.mem[memRequirement.count].alignment ));
2442 TI_DBG6(("tdsaLoLevelGetResource: memRequirement.count %d TI_DMA_MEM\n", memRequirement.count));
2443 #endif
2444
2445
2446
2447 return;
2448 }
2449
2450 /*****************************************************************************
2451 *! \brief tdsaSharedMemCalculate
2452 *
2453 * Purpose: This function is called to determine the Transport
2454 * Dependent Layer internal resource requirement
2455 * for shared memory between target and initiator
2456 * functionality.
2457 *
2458 * \param tiRoot: Pointer to driver/port instance.
2459 * \param tdSharedMem: Pointer to shared memory structure
2460 *
2461 * \return: None
2462 *
2463 * \note - The shared memory is composed of like the followings
2464 * sizeof(tdsaRoot_t)
2465 * + sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT
2466 * + sizeof(tdsaDeviceData_t) * MaxTargets
2467 * + sizeof(tdsaEsglPageInfo_t) * NumEsglPages
2468 *
2469 *****************************************************************************/
2470 osGLOBAL void
tdsaSharedMemCalculate(tiRoot_t * tiRoot,tiLoLevelResource_t * loResource,tiTdSharedMem_t * tdSharedMem)2471 tdsaSharedMemCalculate(
2472 tiRoot_t * tiRoot,
2473 tiLoLevelResource_t * loResource,
2474 tiTdSharedMem_t * tdSharedMem
2475 )
2476 {
2477 bit32 MaxTargets;
2478
2479 /* the following fn fills in MaxTargets */
2480 tdssGetMaxTargetsParams(tiRoot, &MaxTargets);
2481 TI_DBG6(("tdsaSharedMemCalculate: MaxTargets %d\n", MaxTargets));
2482
2483 /*
2484 * Cached mem for the shared TD Layer functionality
2485 */
2486 tdSharedMem->tdSharedCachedMem1.singleElementLength =
2487 sizeof(tdsaRoot_t) + (sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT) +
2488 (sizeof(tdsaDeviceData_t) * MaxTargets);
2489
2490 #ifdef TD_INT_COALESCE
2491 /* adding TD interrupt coalesce data structure to the shared TD layer */
2492 /* TD_MAX_INT_COALESCE is defined to be 512 */
2493 tdSharedMem->tdSharedCachedMem1.singleElementLength +=
2494 sizeof(tdsaIntCoalesceContext_t) * TD_MAX_INT_COALESCE;
2495 #endif
2496
2497 #ifdef TD_DISCOVER
2498 /* adding expander data structures */
2499 tdSharedMem->tdSharedCachedMem1.singleElementLength +=
2500 sizeof(tdsaExpander_t) * MaxTargets;
2501 #endif
2502
2503 tdSharedMem->tdSharedCachedMem1.numElements = 1;
2504
2505 tdSharedMem->tdSharedCachedMem1.totalLength =
2506 tdSharedMem->tdSharedCachedMem1.singleElementLength *
2507 tdSharedMem->tdSharedCachedMem1.numElements;
2508
2509 tdSharedMem->tdSharedCachedMem1.alignment = 8;
2510
2511 tdSharedMem->tdSharedCachedMem1.type = TI_CACHED_MEM;
2512
2513 tdSharedMem->tdSharedCachedMem1.virtPtr = agNULL;
2514 tdSharedMem->tdSharedCachedMem1.osHandle = agNULL;
2515 tdSharedMem->tdSharedCachedMem1.physAddrUpper = 0;
2516 tdSharedMem->tdSharedCachedMem1.physAddrLower = 0;
2517 tdSharedMem->tdSharedCachedMem1.reserved = 0;
2518
2519 return;
2520 }
2521
2522
2523 /*****************************************************************************
2524 *! \biref tdResetComMemFlags
2525 *
2526 * Purpose: This function is called to reset all the flags for the port
2527 *
2528 * \param tiRoot: Pointer to driver/port instance.
2529 *
2530 * \return: None
2531 *
2532 *
2533 *****************************************************************************/
2534 osGLOBAL void
tdsaResetComMemFlags(tiRoot_t * tiRoot)2535 tdsaResetComMemFlags(
2536 tiRoot_t *tiRoot
2537 )
2538 {
2539 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData;
2540 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
2541 #ifdef TD_DEBUG_ENABLE
2542 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem;
2543 TI_DBG6(("tdsaResetComMemFlags: start\n"));
2544 TI_DBG6(("tdsaResetComMemFlag:: ******* tdsaRoot %p \n", tdsaRoot));
2545 TI_DBG6(("tdsaResetComMemFlag:: ******* tdsaPortContext %p \n",tdsaPortContext));
2546 #endif
2547
2548 tdsaAllShared->flags.sysIntsActive = agFALSE;
2549 tdsaAllShared->flags.resetInProgress = agFALSE;
2550
2551 return;
2552 }
2553
2554 /*****************************************************************************
2555 *! \biref tdssInitSASPortStartInfo
2556 *
2557 * Purpose: This function sets information related to staring a port
2558 *
2559 * \param tiRoot: Pointer to driver/port instance.
2560 *
2561 * \return: None
2562 *
2563 *
2564 *****************************************************************************/
2565 osGLOBAL void
tdssInitSASPortStartInfo(tiRoot_t * tiRoot)2566 tdssInitSASPortStartInfo(
2567 tiRoot_t *tiRoot
2568 )
2569 {
2570 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData;
2571 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
2572 int i;
2573 #ifdef TD_DEBUG_ENABLE
2574 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem;
2575 TI_DBG6(("tdssInitSASPortStartInfo: start\n"));
2576
2577 TI_DBG6(("tdssInitSASPortStartInfo: ******* tdsaRoot %p \n", tdsaRoot));
2578 TI_DBG6(("tdssInitSASPortStartInfo: ******* tdsaPortContext %p \n",tdsaPortContext));
2579 #endif
2580
2581 for(i=0;i<TD_MAX_NUM_PHYS;i++)
2582 {
2583 tdsaAllShared->Ports[i].tiPortalContext = agNULL;
2584 tdsaAllShared->Ports[i].portContext = agNULL;
2585 tdsaAllShared->Ports[i].SASID.sasAddressHi[0] = 0;
2586 tdsaAllShared->Ports[i].SASID.sasAddressHi[1] = 0;
2587 tdsaAllShared->Ports[i].SASID.sasAddressHi[2] = 0;
2588 tdsaAllShared->Ports[i].SASID.sasAddressHi[3] = 0;
2589 tdsaAllShared->Ports[i].SASID.sasAddressLo[0] = 0;
2590 tdsaAllShared->Ports[i].SASID.sasAddressLo[1] = 0;
2591 tdsaAllShared->Ports[i].SASID.sasAddressLo[2] = 0;
2592 tdsaAllShared->Ports[i].SASID.sasAddressLo[3] = 0;
2593 tdsaAllShared->Ports[i].SASID.phyIdentifier = (bit8) i;
2594 /* continue .... */
2595
2596 tdsaAllShared->Ports[i].flags.portStarted = agFALSE;
2597 tdsaAllShared->Ports[i].flags.portInitialized = agFALSE;
2598 tdsaAllShared->Ports[i].flags.portReadyForDiscoverySent = agFALSE;
2599 tdsaAllShared->Ports[i].flags.portStoppedByOSLayer = agFALSE;
2600 tdsaAllShared->Ports[i].flags.failPortInit = agFALSE;
2601 }
2602
2603 return;
2604 }
2605
2606
2607 /*****************************************************************************
2608 *! \brief tdsaInitTimers
2609 *
2610 * Purpose: This function is called to initialize the timers
2611 * for initiator
2612 *
2613 * \param tiRoot: pointer to the driver instance
2614 *
2615 * \return: None
2616 *
2617 * \note:
2618 *
2619 *****************************************************************************/
2620
2621 osGLOBAL void
tdsaInitTimers(tiRoot_t * tiRoot)2622 tdsaInitTimers(
2623 tiRoot_t *tiRoot
2624 )
2625 {
2626 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData;
2627 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
2628 #ifdef TD_DEBUG_ENABLE
2629 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem;
2630
2631 TI_DBG6(("tdsaInitTimers: start \n"));
2632 TI_DBG6(("tdsaInitTimers: ******* tdsaRoot %p \n", tdsaRoot));
2633 TI_DBG6(("tdsaInitTimers: ******* tdsaPortContext %p \n",tdsaPortContext));
2634 #endif
2635
2636 /* initialize the timerlist */
2637 TDLIST_INIT_HDR(&(tdsaAllShared->timerlist));
2638
2639 return;
2640 }
2641
2642
2643 /*****************************************************************************
2644 *! \brief tdsaJumpTableInit
2645 *
2646 * Purpose: This function initializes SAS related callback functions
2647 *
2648 * \param tiRoot: pointer to the driver instance
2649 *
2650 * \return: None
2651 *
2652 * \note:
2653 *
2654 *****************************************************************************/
2655 osGLOBAL void
tdsaJumpTableInit(tiRoot_t * tiRoot)2656 tdsaJumpTableInit(
2657 tiRoot_t *tiRoot
2658 )
2659 {
2660
2661 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData;
2662 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
2663 #ifdef TD_DEBUG_ENABLE
2664 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem;
2665
2666 TI_DBG6(("tdsaJumpTableInit: start \n"));
2667 TI_DBG6(("tdsaJumpTableInit:: ******* tdsaRoot %p \n", tdsaRoot));
2668 TI_DBG6(("tdsaJumpTableInit:: ******* tdsaPortContext %p \n",tdsaPortContext));
2669 #endif
2670
2671 /* tdtype.h */
2672 /*
2673 For combo,
2674 pSSPIOCompleted, pSMPCompleted; use callback
2675 pSSPReqReceive, pSMPReqReceived; use jumptable
2676 */
2677
2678 #ifdef INITIATOR_DRIVER
2679 tdsaAllShared->tdJumpTable.pSSPIOCompleted = agNULL; /* initiator */
2680 tdsaAllShared->tdJumpTable.pSMPCompleted =agNULL; /* initiator */
2681 #endif
2682 #ifdef TARGET_DRIVER
2683 tdsaAllShared->tdJumpTable.pSSPIOCompleted = agNULL;
2684 tdsaAllShared->tdJumpTable.pSSPReqReceived = &ttdsaSSPReqReceived;
2685 tdsaAllShared->tdJumpTable.pSMPReqReceived = &ttdsaSMPReqReceived;
2686 tdsaAllShared->tdJumpTable.pSMPCompleted =agNULL;
2687 #endif
2688 tdsaAllShared->tdJumpTable.pGetSGLChunk = agNULL;
2689 return;
2690
2691 }
2692
2693
2694 /*****************************************************************************
2695 *! \brief tdsaPortContextInit
2696 *
2697 * Purpose: This function initializes port contexts.
2698 *
2699 * \param tiRoot: pointer to the driver instance
2700 *
2701 * \return: None
2702 *
2703 * \note:
2704 *
2705 *****************************************************************************/
2706 osGLOBAL void
tdsaPortContextInit(tiRoot_t * tiRoot)2707 tdsaPortContextInit(
2708 tiRoot_t *tiRoot
2709 )
2710 {
2711 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData;
2712 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
2713 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem;
2714 int i = 0;
2715 int j = 0;
2716
2717 TI_DBG6(("tdsaPortContextInit: start\n"));
2718 TI_DBG6(("tdsaPortContextInit: ******* sizeof(tdsaPortContext) %d %x\n", (int)sizeof(tdsaPortContext_t), (unsigned int)sizeof(tdsaPortContext_t)));
2719 TI_DBG6(("tdsaPortContextInit: ******* tdsaRoot %p \n", tdsaRoot));
2720 TI_DBG6(("tdsaPortContextInit: ******* tdsaPortContext %p \n",tdsaPortContext));
2721 TI_DBG6(("tdsaPortContextInit: ******* tdsaPortContext+1 %p \n",tdsaPortContext + 1));
2722 TI_DBG6(("tdsaPortContextInit: ******* &tdsaPortContext[0] %p &tdsaPortContext[1] %p\n", &(tdsaPortContext[0]), &(tdsaPortContext[1])));
2723
2724 TDLIST_INIT_HDR(&(tdsaAllShared->MainPortContextList));
2725 TDLIST_INIT_HDR(&(tdsaAllShared->FreePortContextList));
2726
2727 for(i=0;i<TD_MAX_PORT_CONTEXT;i++)
2728 {
2729 TDLIST_INIT_ELEMENT(&(tdsaPortContext[i].FreeLink));
2730 TDLIST_INIT_ELEMENT(&(tdsaPortContext[i].MainLink));
2731
2732 #ifdef TD_DISCOVER
2733 TDLIST_INIT_HDR(&(tdsaPortContext[i].discovery.discoveringExpanderList));
2734 TDLIST_INIT_HDR(&(tdsaPortContext[i].discovery.UpdiscoveringExpanderList));
2735 tdsaPortContext[i].discovery.type = TDSA_DISCOVERY_OPTION_FULL_START;
2736 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.discoveryTimer));
2737 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.configureRouteTimer));
2738 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.deviceRegistrationTimer));
2739 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.SMPBusyTimer));
2740 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.BCTimer));
2741 tdsaInitTimerRequest(tiRoot, &(tdsaPortContext[i].discovery.DiscoverySMPTimer));
2742 tdsaPortContext[i].discovery.retries = 0;
2743 tdsaPortContext[i].discovery.configureRouteRetries = 0;
2744 tdsaPortContext[i].discovery.deviceRetistrationRetries = 0;
2745 tdsaPortContext[i].discovery.pendingSMP = 0;
2746 tdsaPortContext[i].discovery.SeenBC = agFALSE;
2747 tdsaPortContext[i].discovery.forcedOK = agFALSE;
2748 tdsaPortContext[i].discovery.SMPRetries = 0;
2749 // tdsaPortContext[i].discovery.doIncremental = agFALSE;
2750 tdsaPortContext[i].discovery.ResetTriggerred = agFALSE;
2751 #endif
2752
2753
2754 #ifdef INITIATOR_DRIVER
2755 tdsaPortContext[i].DiscoveryState = ITD_DSTATE_NOT_STARTED;
2756 tdsaPortContext[i].nativeSATAMode = agFALSE;
2757 tdsaPortContext[i].directAttatchedSAS = agFALSE;
2758 tdsaPortContext[i].DiscoveryRdyGiven = agFALSE;
2759 tdsaPortContext[i].SeenLinkUp = agFALSE;
2760
2761 #endif
2762 tdsaPortContext[i].id = i;
2763 tdsaPortContext[i].agPortContext = agNULL;
2764 tdsaPortContext[i].LinkRate = 0;
2765 tdsaPortContext[i].Count = 0;
2766 tdsaPortContext[i].valid = agFALSE;
2767 for (j=0;j<TD_MAX_NUM_PHYS;j++)
2768 {
2769 tdsaPortContext[i].PhyIDList[j] = agFALSE;
2770 }
2771 tdsaPortContext[i].RegisteredDevNums = 0;
2772 tdsaPortContext[i].eventPhyID = 0xFF;
2773 tdsaPortContext[i].Transient = agFALSE;
2774 tdsaPortContext[i].PortRecoverPhyID = 0xFF;
2775 tdsaPortContext[i].DiscFailNSeenBC = agFALSE;
2776 #ifdef FDS_DM
2777 tdsaPortContext[i].dmPortContext.tdData = &(tdsaPortContext[i]);
2778 tdsaPortContext[i].DMDiscoveryState = dmDiscCompleted;
2779 tdsaPortContext[i].UseDM = agFALSE;
2780 tdsaPortContext[i].UpdateMCN = agFALSE;
2781 #endif
2782 /* add more variables later */
2783 TDLIST_ENQUEUE_AT_TAIL(&(tdsaPortContext[i].FreeLink), &(tdsaAllShared->FreePortContextList));
2784 }
2785
2786 #ifdef TD_INTERNAL_DEBUG /* for debugging only */
2787 for(i=0;i<TD_MAX_PORT_CONTEXT;i++)
2788 {
2789 TI_DBG6(("tdsaPortContextInit: index %d &tdsaPortContext[] %p\n", i, &(tdsaPortContext[i])));
2790 }
2791 TI_DBG6(("tdsaPortContextInit: sizeof(tdsaPortContext_t) %d 0x%x\n", sizeof(tdsaPortContext_t), sizeof(tdsaPortContext_t)));
2792 #endif
2793 return;
2794 }
2795
2796 /*****************************************************************************
2797 *! \brief tdsaPortContextReInit
2798 *
2799 * Purpose: This function re-initializes port contexts for reuse.
2800 *
2801 * \param tiRoot: pointer to the driver instance
2802 * \param onePortContext: pointer to the portcontext
2803 *
2804 * \return: None
2805 *
2806 * \note:
2807 *
2808 *****************************************************************************/
2809 osGLOBAL void
tdsaPortContextReInit(tiRoot_t * tiRoot,tdsaPortContext_t * onePortContext)2810 tdsaPortContextReInit(
2811 tiRoot_t *tiRoot,
2812 tdsaPortContext_t *onePortContext
2813 )
2814 {
2815 int j=0;
2816 #ifdef TD_DISCOVER
2817 tdsaDiscovery_t *discovery;
2818 #endif
2819
2820 TI_DBG3(("tdsaPortContextReInit: start\n"));
2821
2822 #ifdef TD_DISCOVER
2823 discovery = &(onePortContext->discovery);
2824
2825 onePortContext->discovery.type = TDSA_DISCOVERY_OPTION_FULL_START;
2826 onePortContext->discovery.retries = 0;
2827 onePortContext->discovery.configureRouteRetries = 0;
2828 onePortContext->discovery.deviceRetistrationRetries = 0;
2829 onePortContext->discovery.pendingSMP = 0;
2830 onePortContext->discovery.SeenBC = agFALSE;
2831 onePortContext->discovery.forcedOK = agFALSE;
2832 onePortContext->discovery.SMPRetries = 0;
2833 onePortContext->discovery.ResetTriggerred = agFALSE;
2834 /* free expander lists */
2835 tdsaFreeAllExp(tiRoot, onePortContext);
2836 /* kill the discovery-related timers if they are running */
2837 if (discovery->discoveryTimer.timerRunning == agTRUE)
2838 {
2839 tdsaKillTimer(
2840 tiRoot,
2841 &discovery->discoveryTimer
2842 );
2843 }
2844 if (discovery->configureRouteTimer.timerRunning == agTRUE)
2845 {
2846 tdsaKillTimer(
2847 tiRoot,
2848 &discovery->configureRouteTimer
2849 );
2850 }
2851 if (discovery->deviceRegistrationTimer.timerRunning == agTRUE)
2852 {
2853 tdsaKillTimer(
2854 tiRoot,
2855 &discovery->deviceRegistrationTimer
2856 );
2857 }
2858 if (discovery->BCTimer.timerRunning == agTRUE)
2859 {
2860 tdsaKillTimer(
2861 tiRoot,
2862 &discovery->BCTimer
2863 );
2864 }
2865 if (discovery->SMPBusyTimer.timerRunning == agTRUE)
2866 {
2867 tdsaKillTimer(
2868 tiRoot,
2869 &discovery->SMPBusyTimer
2870 );
2871 }
2872 if (discovery->DiscoverySMPTimer.timerRunning == agTRUE)
2873 {
2874 tdsaKillTimer(
2875 tiRoot,
2876 &discovery->DiscoverySMPTimer
2877 );
2878 }
2879 #endif
2880
2881 #ifdef INITIATOR_DRIVER
2882 onePortContext->DiscoveryState = ITD_DSTATE_NOT_STARTED;
2883 onePortContext->nativeSATAMode = agFALSE;
2884 onePortContext->directAttatchedSAS = agFALSE;
2885 onePortContext->DiscoveryRdyGiven = agFALSE;
2886 onePortContext->SeenLinkUp = agFALSE;
2887 #endif
2888 onePortContext->agPortContext->osData = agNULL;
2889 onePortContext->agPortContext = agNULL;
2890 onePortContext->tiPortalContext = agNULL;
2891 onePortContext->agRoot = agNULL;
2892 onePortContext->LinkRate = 0;
2893 onePortContext->Count = 0;
2894 onePortContext->valid = agFALSE;
2895 for (j=0;j<TD_MAX_NUM_PHYS;j++)
2896 {
2897 onePortContext->PhyIDList[j] = agFALSE;
2898 }
2899 onePortContext->RegisteredDevNums = 0;
2900 onePortContext->eventPhyID = 0xFF;
2901 onePortContext->Transient = agFALSE;
2902 onePortContext->PortRecoverPhyID = 0xFF;
2903 onePortContext->DiscFailNSeenBC = agFALSE;
2904
2905 #ifdef FDS_DM
2906 onePortContext->dmPortContext.tdData = onePortContext;
2907 onePortContext->DMDiscoveryState = dmDiscCompleted;
2908 onePortContext->UseDM = agFALSE;
2909 onePortContext->UpdateMCN = agFALSE;
2910 #endif
2911 return;
2912 }
2913
2914 /*****************************************************************************
2915 *! \brief tdsaDeviceDataInit
2916 *
2917 * Purpose: This function initializes devices
2918 *
2919 * \param tiRoot: pointer to the driver instance
2920 *
2921 * \return: None
2922 *
2923 * \note:
2924 *
2925 *****************************************************************************/
2926 osGLOBAL void
tdsaDeviceDataInit(tiRoot_t * tiRoot)2927 tdsaDeviceDataInit(
2928 tiRoot_t *tiRoot
2929 )
2930 {
2931 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData;
2932 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
2933 #ifdef TD_DEBUG_ENABLE
2934 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContextMem;
2935 #endif
2936 tdsaDeviceData_t *tdsaDeviceData =
2937 (tdsaDeviceData_t *)tdsaAllShared->DeviceMem;
2938 int i;
2939 #ifdef SATA_ENABLE
2940 bit32 j;
2941 satInternalIo_t *satIntIO;
2942 #endif
2943 bit32 MaxTargets;
2944
2945 TI_DBG6(("tdsaDeviceDataInit: start\n"));
2946 TI_DBG6(("tdsaDeviceDataInit: ******* tdsaPortContext %p \n",tdsaPortContext));
2947 TI_DBG6(("tdsaDeviceDataInit: ******* tdsaDeviceData %p\n", tdsaDeviceData));
2948 TI_DBG6(("tdsaDeviceDataInit: ******* tdsaDeviceData+1 %p\n", tdsaDeviceData+1));
2949 TI_DBG6(("tdsaDeviceDataInit: ******* &tdsaDeviceData[0] %p &tdsaDeviceData[1] %p\n", &(tdsaDeviceData[0]), &(tdsaDeviceData[1])));
2950
2951 /* the following fn fills in MaxTargets */
2952 tdssGetMaxTargetsParams(tiRoot, &MaxTargets);
2953 TI_DBG6(("tdsaDeviceDataInit: MaxTargets %d\n", MaxTargets));
2954
2955 TDLIST_INIT_HDR(&(tdsaAllShared->MainDeviceList));
2956 TDLIST_INIT_HDR(&(tdsaAllShared->FreeDeviceList));
2957
2958 for(i=0;i<(int)MaxTargets;i++)
2959 {
2960 TDLIST_INIT_ELEMENT(&(tdsaDeviceData[i].FreeLink));
2961 TDLIST_INIT_ELEMENT(&(tdsaDeviceData[i].MainLink));
2962 TDLIST_INIT_ELEMENT(&(tdsaDeviceData[i].IncDisLink));
2963 tdsaDeviceData[i].id = i;
2964 tdsaDeviceData[i].InQID = 0;
2965 tdsaDeviceData[i].OutQID = 0;
2966 tdsaDeviceData[i].DeviceType = TD_DEFAULT_DEVICE;
2967 tdsaDeviceData[i].agRoot = agNULL;
2968 tdsaDeviceData[i].agDevHandle = agNULL;
2969
2970 tdsaDeviceData[i].pJumpTable = &(tdsaAllShared->tdJumpTable);
2971 tdsaDeviceData[i].tiDeviceHandle.osData = agNULL;
2972 tdsaDeviceData[i].tiDeviceHandle.tdData = &(tdsaDeviceData[i]);
2973 tdsaDeviceData[i].tdPortContext = agNULL;
2974 tdsaDeviceData[i].tdExpander = agNULL;
2975 tdsaDeviceData[i].ExpDevice = agNULL;
2976 tdsaDeviceData[i].phyID = 0xFF;
2977 tdsaDeviceData[i].SASAddressID.sasAddressHi = 0;
2978 tdsaDeviceData[i].SASAddressID.sasAddressLo = 0;
2979 tdsaDeviceData[i].valid = agFALSE;
2980 tdsaDeviceData[i].valid2 = agFALSE;
2981 tdsaDeviceData[i].processed = agFALSE;
2982 tdsaDeviceData[i].initiator_ssp_stp_smp = 0;
2983 tdsaDeviceData[i].target_ssp_stp_smp = 0;
2984 tdsaDeviceData[i].numOfPhys = 0;
2985 tdsaDeviceData[i].registered = agFALSE;
2986 tdsaDeviceData[i].directlyAttached = agFALSE;
2987 tdsaDeviceData[i].SASSpecDeviceType = 0xFF;
2988 tdsaDeviceData[i].IOStart = 0;
2989 tdsaDeviceData[i].IOResponse = 0;
2990 tdsaDeviceData[i].agDeviceResetContext.osData = agNULL;
2991 tdsaDeviceData[i].agDeviceResetContext.sdkData = agNULL;
2992 tdsaDeviceData[i].TRflag = agFALSE;
2993 tdsaDeviceData[i].ResetCnt = 0;
2994 tdsaDeviceData[i].OSAbortAll = agFALSE;
2995
2996 #ifdef FDS_DM
2997 tdsaDeviceData[i].devMCN = 1;
2998 tdsaDeviceData[i].finalMCN = 1;
2999 #endif
3000
3001 #ifdef FDS_SM
3002 tdsaDeviceData[i].SMNumOfFCA = 0;
3003 tdsaDeviceData[i].SMNumOfID = 0;
3004 #endif
3005
3006 #ifdef SATA_ENABLE
3007 TDLIST_INIT_HDR(&(tdsaDeviceData[i].satDevData.satIoLinkList));
3008 TDLIST_INIT_HDR(&(tdsaDeviceData[i].satDevData.satFreeIntIoLinkList));
3009 TDLIST_INIT_HDR(&(tdsaDeviceData[i].satDevData.satActiveIntIoLinkList));
3010
3011 /* default */
3012 tdsaDeviceData[i].satDevData.satDriveState = SAT_DEV_STATE_NORMAL;
3013 tdsaDeviceData[i].satDevData.satNCQMaxIO =SAT_NCQ_MAX;
3014 tdsaDeviceData[i].satDevData.satPendingIO = 0;
3015 tdsaDeviceData[i].satDevData.satPendingNCQIO = 0;
3016 tdsaDeviceData[i].satDevData.satPendingNONNCQIO = 0;
3017 tdsaDeviceData[i].satDevData.IDDeviceValid = agFALSE;
3018 tdsaDeviceData[i].satDevData.freeSATAFDMATagBitmap = 0;
3019 tdsaDeviceData[i].satDevData.NumOfFCA = 0;
3020 tdsaDeviceData[i].satDevData.NumOfIDRetries = 0;
3021 tdsaDeviceData[i].satDevData.ID_Retries = 0;
3022 tdsaDeviceData[i].satDevData.IDPending = agFALSE;
3023 tdsaInitTimerRequest(tiRoot, &(tdsaDeviceData[i].SATAIDDeviceTimer));
3024 #ifdef FDS_SM
3025 tdsaInitTimerRequest(tiRoot, &(tdsaDeviceData[i].tdIDTimer));
3026 #endif
3027 osti_memset(tdsaDeviceData[i].satDevData.satMaxLBA, 0, sizeof(tdsaDeviceData[i].satDevData.satMaxLBA));
3028
3029 tdsaDeviceData[i].satDevData.satSaDeviceData = &tdsaDeviceData[i];
3030 satIntIO = &tdsaDeviceData[i].satDevData.satIntIo[0];
3031 for (j = 0; j < SAT_MAX_INT_IO; j++)
3032 {
3033 TDLIST_INIT_ELEMENT (&satIntIO->satIntIoLink);
3034 TDLIST_ENQUEUE_AT_TAIL (&satIntIO->satIntIoLink,
3035 &tdsaDeviceData[i].satDevData.satFreeIntIoLinkList);
3036 satIntIO->satOrgTiIORequest = agNULL;
3037 satIntIO->id = j;
3038 satIntIO = satIntIO + 1;
3039 }
3040 #endif
3041 /* some other variables */
3042 TDLIST_ENQUEUE_AT_TAIL(&(tdsaDeviceData[i].FreeLink), &(tdsaAllShared->FreeDeviceList));
3043 }
3044
3045 #ifdef TD_INTERNAL_DEBUG /* for debugging only */
3046 for(i=0;i<MaxTargets;i++)
3047 {
3048 TI_DBG6(("tdsaDeviceDataInit: index %d &tdsaDeviceData[] %p\n", i, &(tdsaDeviceData[i])));
3049
3050 }
3051 TI_DBG6(("tdsaDeviceDataInit: sizeof(tdsaDeviceData_t) %d 0x%x\n", sizeof(tdsaDeviceData_t), sizeof(tdsaDeviceData_t)));
3052 #endif
3053 return;
3054 }
3055
3056 /*****************************************************************************
3057 *! \brief tdsaDeviceDataReInit
3058 *
3059 * Purpose: This function re-initializes device data for reuse.
3060 *
3061 * \param tiRoot: pointer to the driver instance
3062 * \param onePortContext: pointer to the device data
3063 *
3064 * \return: None
3065 *
3066 * \note:
3067 *
3068 *****************************************************************************/
3069 osGLOBAL void
tdsaDeviceDataReInit(tiRoot_t * tiRoot,tdsaDeviceData_t * oneDeviceData)3070 tdsaDeviceDataReInit(
3071 tiRoot_t *tiRoot,
3072 tdsaDeviceData_t *oneDeviceData
3073 )
3074 {
3075 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData;
3076 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
3077 #ifdef SATA_ENABLE
3078 int j=0;
3079 satInternalIo_t *satIntIO;
3080 #endif
3081
3082 TI_DBG3(("tdsaDeviceDataReInit: start\n"));
3083
3084 oneDeviceData->InQID = 0;
3085 oneDeviceData->OutQID = 0;
3086 oneDeviceData->DeviceType = TD_DEFAULT_DEVICE;
3087 oneDeviceData->agDevHandle = agNULL;
3088
3089 oneDeviceData->pJumpTable = &(tdsaAllShared->tdJumpTable);
3090 oneDeviceData->tiDeviceHandle.osData = agNULL;
3091 oneDeviceData->tiDeviceHandle.tdData = oneDeviceData;
3092 oneDeviceData->tdPortContext = agNULL;
3093 oneDeviceData->tdExpander = agNULL;
3094 oneDeviceData->ExpDevice = agNULL;
3095 oneDeviceData->phyID = 0xFF;
3096 oneDeviceData->SASAddressID.sasAddressHi = 0;
3097 oneDeviceData->SASAddressID.sasAddressLo = 0;
3098 oneDeviceData->valid = agFALSE;
3099 oneDeviceData->valid2 = agFALSE;
3100 oneDeviceData->processed = agFALSE;
3101 oneDeviceData->initiator_ssp_stp_smp = 0;
3102 oneDeviceData->target_ssp_stp_smp = 0;
3103 oneDeviceData->numOfPhys = 0;
3104 oneDeviceData->registered = agFALSE;
3105 oneDeviceData->directlyAttached = agFALSE;
3106 oneDeviceData->SASSpecDeviceType = 0xFF;
3107 oneDeviceData->IOStart = 0;
3108 oneDeviceData->IOResponse = 0;
3109 oneDeviceData->agDeviceResetContext.osData = agNULL;
3110 oneDeviceData->agDeviceResetContext.sdkData = agNULL;
3111 oneDeviceData->TRflag = agFALSE;
3112 oneDeviceData->ResetCnt = 0;
3113 oneDeviceData->OSAbortAll = agFALSE;
3114
3115 #ifdef FDS_DM
3116 oneDeviceData->devMCN = 1;
3117 oneDeviceData->finalMCN = 1;
3118 #endif
3119
3120 #ifdef FDS_SM
3121 oneDeviceData->SMNumOfFCA = 0;
3122 oneDeviceData->SMNumOfID = 0;
3123 if (oneDeviceData->tdIDTimer.timerRunning == agTRUE)
3124 {
3125 tdsaKillTimer(
3126 tiRoot,
3127 &oneDeviceData->tdIDTimer
3128 );
3129 }
3130 #endif
3131
3132 #ifdef SATA_ENABLE
3133 /* default */
3134 oneDeviceData->satDevData.satDriveState = SAT_DEV_STATE_NORMAL;
3135 oneDeviceData->satDevData.satNCQMaxIO =SAT_NCQ_MAX;
3136 oneDeviceData->satDevData.satPendingIO = 0;
3137 oneDeviceData->satDevData.satPendingNCQIO = 0;
3138 oneDeviceData->satDevData.satPendingNONNCQIO = 0;
3139 oneDeviceData->satDevData.IDDeviceValid = agFALSE;
3140 oneDeviceData->satDevData.freeSATAFDMATagBitmap = 0;
3141 oneDeviceData->satDevData.NumOfFCA = 0;
3142 oneDeviceData->satDevData.NumOfIDRetries = 0;
3143 oneDeviceData->satDevData.ID_Retries = 0;
3144 oneDeviceData->satDevData.IDPending = agFALSE;
3145
3146 osti_memset(oneDeviceData->satDevData.satMaxLBA, 0, sizeof(oneDeviceData->satDevData.satMaxLBA));
3147 osti_memset(&(oneDeviceData->satDevData.satIdentifyData), 0xFF, sizeof(agsaSATAIdentifyData_t));
3148
3149 oneDeviceData->satDevData.satSaDeviceData = oneDeviceData;
3150
3151 satIntIO = (satInternalIo_t *)&(oneDeviceData->satDevData.satIntIo[0]);
3152 for (j = 0; j < SAT_MAX_INT_IO; j++)
3153 {
3154 TI_DBG3(("tdsaDeviceDataReInit: in loop of internal io free, id %d\n", satIntIO->id));
3155 satFreeIntIoResource(tiRoot, &(oneDeviceData->satDevData), satIntIO);
3156 satIntIO = satIntIO + 1;
3157 }
3158 #endif
3159 return;
3160 }
3161
3162 #ifdef TD_INT_COALESCE
3163 /*****************************************************************************
3164 *! \brief tdsaIntCoalCxtInit(
3165 *
3166 * Purpose: This function initializes interrupt coalesce contexts.
3167 *
3168 * \param tiRoot: pointer to the driver instance
3169 *
3170 * \return: None
3171 *
3172 * \note:
3173 *
3174 *****************************************************************************/
3175 osGLOBAL void
tdsaIntCoalCxtInit(tiRoot_t * tiRoot)3176 tdsaIntCoalCxtInit(
3177 tiRoot_t *tiRoot
3178 )
3179 {
3180 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData;
3181 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
3182 tdsaPortContext_t *tdsaPortContext = (tdsaPortContext_t *)tdsaAllShared->PortContext;
3183 tdsaDeviceData_t *tdsaDeviceData = (tdsaDeviceData_t *)tdsaAllShared->DeviceDataHead;
3184 tdsaIntCoalesceContext_t *tdsaIntCoalCxt = (tdsaIntCoalesceContext_t *)tdsaAllShared->IntCoalesce;
3185 int i = 0;
3186 int j = 0;
3187 bit32 MaxTargets;
3188
3189 TI_DBG2(("tdsaIntCoalCxtInit: start\n"));
3190 TI_DBG6(("tdsaIntCoalCxtInit: ******* sizeof(tdsaPortContext) %d 0x%x\n", sizeof(tdsaPortContext_t), sizeof(tdsaPortContext_t)));
3191 TI_DBG6(("tdsaIntCoalCxtInit: ******* sizeof(tdsaIntCoalCxt) %d 0x%x\n", sizeof(tdsaDeviceData_t), sizeof(tdsaDeviceData_t)));
3192 TI_DBG6(("tdsaIntCoalCxtInit: ******* sizeof(tdsaIntCoalCxt) %d 0x%x\n", sizeof(tdsaIntCoalesceContext_t), sizeof(tdsaIntCoalesceContext_t)));
3193 TI_DBG6(("tdsaIntCoalCxtInit: ******* tdsaRoot %p \n", tdsaRoot));
3194 TI_DBG6(("tdsaIntCoalCxtInit: ******* tdsaPortContext %p \n",tdsaPortContext));
3195 TI_DBG6(("tdsaDeviceDataInit: ******* tdsaDeviceData %p\n", tdsaDeviceData));
3196 TI_DBG6(("tdsaIntCoalCxtInit: ******* tdsaIntCoalCxt+1 %p \n", tdsaIntCoalCxt + 1));
3197 TI_DBG6(("tdsaIntCoalCxtInit: ******* &tdsaIntCoalCxt[0] %p &tdsaIntCoalCxt[1] %p\n", &(tdsaIntCoalCxt[0]), &(tdsaIntCoalCxt[1])));
3198
3199 /* for debug */
3200 TI_DBG6(("tdsaIntCoalCxtInit: TD_MAX_PORT_CONTEXT %d\n", TD_MAX_PORT_CONTEXT));
3201 /* the following fn fills in MaxTargets */
3202 tdssGetMaxTargetsParams(tiRoot, &MaxTargets);
3203 TI_DBG6(("tdsaIntCoalCxtInit: MaxTargets %d\n", MaxTargets));
3204
3205 TI_DBG6(("tdsaIntCoalCxtInit: portcontext in sum 0x%x\n", sizeof(tdsaPortContext_t) * TD_MAX_PORT_CONTEXT));
3206 TI_DBG6(("tdsaIntCoalCxtInit: devicedata in sum 0x%x\n", sizeof(tdsaDeviceData_t) * MaxTargets));
3207
3208 /*
3209 tdsaIntCoalCx[0] is just head, not an element
3210 */
3211 TDLIST_INIT_HDR(&(tdsaIntCoalCxt[0].MainLink));
3212 TDLIST_INIT_HDR(&(tdsaIntCoalCxt[0].FreeLink));
3213
3214 tdsaIntCoalCxt[0].tdsaAllShared = tdsaAllShared;
3215 tdsaIntCoalCxt[0].tiIntCoalesceCxt = agNULL;
3216 tdsaIntCoalCxt[0].id = 0;
3217
3218
3219 for(i=1;i<TD_MAX_INT_COALESCE;i++)
3220 {
3221 TDLIST_INIT_ELEMENT(&(tdsaIntCoalCxt[i].FreeLink));
3222 TDLIST_INIT_ELEMENT(&(tdsaIntCoalCxt[i].MainLink));
3223
3224 tdsaIntCoalCxt[i].tdsaAllShared = tdsaAllShared;
3225 tdsaIntCoalCxt[i].tiIntCoalesceCxt = agNULL;
3226 tdsaIntCoalCxt[i].id = i;
3227
3228 /* enqueue */
3229 TDLIST_ENQUEUE_AT_TAIL(&(tdsaIntCoalCxt[i].FreeLink), &(tdsaIntCoalCxt[0].FreeLink));
3230 }
3231 return;
3232 }
3233 #endif /* TD_INT_COALESCE */
3234
3235
3236 osGLOBAL void
tdsaExpanderInit(tiRoot_t * tiRoot)3237 tdsaExpanderInit(
3238 tiRoot_t *tiRoot
3239 )
3240 {
3241 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *) tiRoot->tdData;
3242 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
3243
3244 tdsaExpander_t *tdsaExpander =
3245 (tdsaExpander_t *)tdsaAllShared->ExpanderHead;
3246 bit32 MaxTargets;
3247
3248
3249 int i;
3250
3251 TI_DBG6(("tdsaExpanderInit: start\n"));
3252 tdssGetMaxTargetsParams(tiRoot, &MaxTargets);
3253 TI_DBG6(("tdsaExpanderInit: MaxTargets %d\n", MaxTargets));
3254
3255 // TDLIST_INIT_HDR(&(tdsaAllShared->discoveringExpanderList));
3256 TDLIST_INIT_HDR(&(tdsaAllShared->freeExpanderList));
3257
3258 for(i=0;i<(int)MaxTargets;i++)
3259 {
3260 TDLIST_INIT_ELEMENT(&(tdsaExpander[i].linkNode));
3261 TDLIST_INIT_ELEMENT(&(tdsaExpander[i].upNode));
3262 /* initialize expander fields */
3263 tdsaExpander[i].tdDevice = agNULL;
3264 tdsaExpander[i].tdUpStreamExpander = agNULL;
3265 tdsaExpander[i].tdDeviceToProcess = agNULL;
3266 tdsaExpander[i].tdCurrentDownStreamExpander = agNULL;
3267 tdsaExpander[i].hasUpStreamDevice = agFALSE;
3268 tdsaExpander[i].numOfUpStreamPhys = 0;
3269 tdsaExpander[i].currentUpStreamPhyIndex = 0;
3270 tdsaExpander[i].numOfDownStreamPhys = 0;
3271 tdsaExpander[i].currentDownStreamPhyIndex = 0;
3272 tdsaExpander[i].discoveringPhyId = 0;
3273 tdsaExpander[i].underDiscovering = agFALSE;
3274 tdsaExpander[i].id = i;
3275 tdsaExpander[i].tdReturnginExpander = agNULL;
3276 tdsaExpander[i].discoverSMPAllowed = agTRUE;
3277 osti_memset( &(tdsaExpander[i].currentIndex), 0, sizeof(tdsaExpander[i].currentIndex));
3278 osti_memset( &(tdsaExpander[i].upStreamPhys), 0, sizeof(tdsaExpander[i].upStreamPhys));
3279 osti_memset( &(tdsaExpander[i].downStreamPhys), 0, sizeof(tdsaExpander[i].downStreamPhys));
3280 osti_memset( &(tdsaExpander[i].routingAttribute), 0, sizeof(tdsaExpander[i].routingAttribute));
3281 tdsaExpander[i].configSASAddrTableIndex = 0;
3282 osti_memset( &(tdsaExpander[i].configSASAddressHiTable), 0, sizeof(tdsaExpander[i].configSASAddressHiTable));
3283 osti_memset( &(tdsaExpander[i].configSASAddressLoTable), 0, sizeof(tdsaExpander[i].configSASAddressLoTable));
3284
3285
3286 TDLIST_ENQUEUE_AT_TAIL(&(tdsaExpander[i].linkNode), &(tdsaAllShared->freeExpanderList));
3287 }
3288 return;
3289 }
3290
3291 osGLOBAL void
tdsaQueueConfigInit(tiRoot_t * tiRoot)3292 tdsaQueueConfigInit(
3293 tiRoot_t *tiRoot
3294 )
3295 {
3296 tdsaRoot_t *tdsaRoot = (tdsaRoot_t *)tiRoot->tdData;
3297 tdsaContext_t *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
3298
3299 /* for memory index requirement */
3300 agsaQueueConfig_t *QueueConfig;
3301 bit32 i;
3302
3303 TI_DBG2(("tdsaQueueConfigInit: start\n"));
3304 tdsaGetSwConfigParams(tiRoot);
3305 QueueConfig = &tdsaAllShared->QueueConfig;
3306
3307 for(i=0;i<QueueConfig->numInboundQueues;i++)
3308 {
3309 QueueConfig->inboundQueues[i].elementCount = tdsaAllShared->InboundQueueSize[i];
3310 QueueConfig->inboundQueues[i].elementSize = tdsaAllShared->InboundQueueEleSize[i];
3311 QueueConfig->inboundQueues[i].priority = tdsaAllShared->InboundQueuePriority[i];
3312 QueueConfig->inboundQueues[i].reserved = 0;
3313 }
3314 for(i=0;i<QueueConfig->numOutboundQueues;i++)
3315 {
3316 QueueConfig->outboundQueues[i].elementCount = tdsaAllShared->OutboundQueueSize[i];
3317 QueueConfig->outboundQueues[i].elementSize = tdsaAllShared->OutboundQueueEleSize[i];
3318 QueueConfig->outboundQueues[i].interruptDelay = tdsaAllShared->OutboundQueueInterruptDelay[i]; /* default 0; no interrupt delay */
3319 QueueConfig->outboundQueues[i].interruptCount = tdsaAllShared->OutboundQueueInterruptCount[i]; /* default 1*/
3320 QueueConfig->outboundQueues[i].interruptEnable = tdsaAllShared->OutboundQueueInterruptEnable[i]; /* default 1*/
3321 QueueConfig->outboundQueues[i].interruptVectorIndex = 0;
3322 }
3323 /* default */
3324 for (i=0;i<8;i++)
3325 {
3326 QueueConfig->sasHwEventQueue[i] = 0;
3327 QueueConfig->sataNCQErrorEventQueue[i] = 0;
3328 }
3329
3330 #ifdef TARGET_DRIVER
3331 for (i=0;i<8;i++)
3332 {
3333 QueueConfig->tgtITNexusEventQueue[i] = 0;
3334 QueueConfig->tgtSSPEventQueue[i] = 0;
3335 QueueConfig->tgtSMPEventQueue[i] = 0;
3336 }
3337 #endif
3338 QueueConfig->iqNormalPriorityProcessingDepth = 0;
3339 QueueConfig->iqHighPriorityProcessingDepth = 0;
3340 QueueConfig->generalEventQueue = 0;
3341
3342 return;
3343 }
3344
3345 /*****************************************************************************
3346 *! \brief tdssGetMaxTargetsParams
3347 *
3348 * Purpose: This function is called to get default parameters from the
3349 * OS Specific area. This function is called in the context of
3350 * tiCOMGetResource() and tiCOMInit().
3351 *
3352 *
3353 * \param tiRoot: Pointer to initiator driver/port instance.
3354 * \param option: Pointer to bit32 where the max target number is saved
3355 *
3356 * \return: None
3357 *
3358 * \note -
3359 *
3360 *****************************************************************************/
3361 osGLOBAL void
tdssGetMaxTargetsParams(tiRoot_t * tiRoot,bit32 * pMaxTargets)3362 tdssGetMaxTargetsParams(
3363 tiRoot_t *tiRoot,
3364 bit32 *pMaxTargets
3365 )
3366 {
3367 char *key = agNULL;
3368 char *subkey1 = agNULL;
3369 char *subkey2 = agNULL;
3370 char *buffer;
3371 bit32 buffLen;
3372 bit32 lenRecv = 0;
3373 char *pLastUsedChar = agNULL;
3374 char tmpBuffer[DEFAULT_KEY_BUFFER_SIZE];
3375 char globalStr[] = "Global";
3376 char iniParmsStr[] = "InitiatorParms";
3377 bit32 MaxTargets;
3378
3379 TI_DBG6(("tdssGetMaxTargetsParams: start\n"));
3380
3381 *pMaxTargets = DEFAULT_MAX_DEV;
3382
3383 /* to remove compiler warnings */
3384 pLastUsedChar = pLastUsedChar;
3385 lenRecv = lenRecv;
3386 subkey2 = subkey2;
3387 subkey1 = subkey1;
3388 key = key;
3389 buffer = &tmpBuffer[0];
3390 buffLen = sizeof (tmpBuffer);
3391
3392 osti_memset(buffer, 0, buffLen);
3393
3394 /* defaults are overwritten in the following */
3395 /* Get MaxTargets */
3396 if ((ostiGetTransportParam(
3397 tiRoot,
3398 globalStr,
3399 iniParmsStr,
3400 agNULL,
3401 agNULL,
3402 agNULL,
3403 agNULL,
3404 "MaxTargets",
3405 buffer,
3406 buffLen,
3407 &lenRecv
3408 ) == tiSuccess) && (lenRecv != 0))
3409 {
3410 if (osti_strncmp(buffer, "0x", 2) == 0)
3411 {
3412 MaxTargets = osti_strtoul (buffer, &pLastUsedChar, 0);
3413 }
3414 else
3415 {
3416 MaxTargets = osti_strtoul (buffer, &pLastUsedChar, 10);
3417 }
3418 *pMaxTargets = MaxTargets;
3419 TI_DBG2(("tdssGetMaxTargetsParams: MaxTargets %d\n", MaxTargets ));
3420 }
3421
3422 osti_memset(buffer, 0, buffLen);
3423 lenRecv = 0;
3424
3425 return;
3426 }
3427
3428 /* temporary to distinguish SAS and SATA mode */
3429 osGLOBAL void
tdssGetSATAOnlyModeParams(tiRoot_t * tiRoot,bit32 * pSATAOnlyMode)3430 tdssGetSATAOnlyModeParams(
3431 tiRoot_t *tiRoot,
3432 bit32 *pSATAOnlyMode
3433 )
3434 {
3435 char *key = agNULL;
3436 char *subkey1 = agNULL;
3437 char *subkey2 = agNULL;
3438 char *buffer;
3439 bit32 buffLen;
3440 bit32 lenRecv = 0;
3441 char *pLastUsedChar = agNULL;
3442 char tmpBuffer[DEFAULT_KEY_BUFFER_SIZE];
3443 char globalStr[] = "Global";
3444 char iniParmsStr[] = "InitiatorParms";
3445 bit32 SATAOnlyMode;
3446
3447 TI_DBG6(("tdssGetSATAOnlyModeParams: start\n"));
3448
3449 *pSATAOnlyMode = agFALSE; /* default SAS and SATA */
3450
3451 /* to remove compiler warnings */
3452 pLastUsedChar = pLastUsedChar;
3453 lenRecv = lenRecv;
3454 subkey2 = subkey2;
3455 subkey1 = subkey1;
3456 key = key;
3457 buffer = &tmpBuffer[0];
3458 buffLen = sizeof (tmpBuffer);
3459
3460 osti_memset(buffer, 0, buffLen);
3461
3462 /* defaults are overwritten in the following */
3463 /* Get SATAOnlyMode */
3464 if ((ostiGetTransportParam(
3465 tiRoot,
3466 globalStr,
3467 iniParmsStr,
3468 agNULL,
3469 agNULL,
3470 agNULL,
3471 agNULL,
3472 "SATAOnlyMode",
3473 buffer,
3474 buffLen,
3475 &lenRecv
3476 ) == tiSuccess) && (lenRecv != 0))
3477 {
3478 if (osti_strncmp(buffer, "0x", 2) == 0)
3479 {
3480 SATAOnlyMode = osti_strtoul (buffer, &pLastUsedChar, 0);
3481 }
3482 else
3483 {
3484 SATAOnlyMode = osti_strtoul (buffer, &pLastUsedChar, 10);
3485 }
3486 *pSATAOnlyMode = SATAOnlyMode;
3487 }
3488
3489 osti_memset(buffer, 0, buffLen);
3490 lenRecv = 0;
3491
3492 return;
3493 }
3494
3495
3496