1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
5 */
6
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include <linux/average.h>
18 #if defined(__FreeBSD__)
19 #include <linux/wait.h>
20 #endif
21 #include <linux/firmware.h>
22 #include <linux/suspend.h>
23 #if defined(CONFIG_OF)
24 #include <linux/of.h>
25 #endif
26
27 #include "qmi.h"
28 #include "htc.h"
29 #include "wmi.h"
30 #include "hal.h"
31 #include "dp.h"
32 #include "ce.h"
33 #include "mac.h"
34 #include "hw.h"
35 #include "hal_rx.h"
36 #include "reg.h"
37 #include "thermal.h"
38 #include "dbring.h"
39 #include "spectral.h"
40 #include "wow.h"
41 #include "fw.h"
42 #include "coredump.h"
43 #include "cfr.h"
44
45 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
46
47 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
48
49 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
50
51 /* Pending management packets threshold for dropping probe responses */
52 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
53
54 #define ATH11K_INVALID_HW_MAC_ID 0xFF
55 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
56
57 /* SMBIOS type containing Board Data File Name Extension */
58 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
59
60 /* SMBIOS type structure length (excluding strings-set) */
61 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
62
63 /* The magic used by QCA spec */
64 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
65
66 extern unsigned int ath11k_frame_mode;
67 extern bool ath11k_ftm_mode;
68
69 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
70
71 #define ATH11K_MON_TIMER_INTERVAL 10
72 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
73 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
74 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
75 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
76 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
77 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
78
79 enum ath11k_supported_bw {
80 ATH11K_BW_20 = 0,
81 ATH11K_BW_40 = 1,
82 ATH11K_BW_80 = 2,
83 ATH11K_BW_160 = 3,
84 };
85
86 enum ath11k_bdf_search {
87 ATH11K_BDF_SEARCH_DEFAULT,
88 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
89 };
90
91 #if defined(__FreeBSD__)
92 #ifdef WME_AC_BE
93 #undef WME_AC_BE
94 #endif
95 #ifdef WME_AC_BK
96 #undef WME_AC_BK
97 #endif
98 #ifdef WME_AC_VI
99 #undef WME_AC_VI
100 #endif
101 #ifdef WME_AC_VO
102 #undef WME_AC_VO
103 #endif
104 #ifdef WME_NUM_AC
105 #undef WME_NUM_AC
106 #endif
107 #endif
108
109 enum wme_ac {
110 WME_AC_BE,
111 WME_AC_BK,
112 WME_AC_VI,
113 WME_AC_VO,
114 WME_NUM_AC
115 };
116
117 #define ATH11K_HT_MCS_MAX 7
118 #define ATH11K_VHT_MCS_MAX 9
119 #define ATH11K_HE_MCS_MAX 11
120
121 enum ath11k_crypt_mode {
122 /* Only use hardware crypto engine */
123 ATH11K_CRYPT_MODE_HW,
124 /* Only use software crypto */
125 ATH11K_CRYPT_MODE_SW,
126 };
127
ath11k_tid_to_ac(u32 tid)128 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
129 {
130 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
131 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
132 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
133 WME_AC_VO);
134 }
135
136 enum ath11k_skb_flags {
137 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
138 ATH11K_SKB_CIPHER_SET = BIT(1),
139 };
140
141 struct ath11k_skb_cb {
142 dma_addr_t paddr;
143 u8 eid;
144 u8 flags;
145 u32 cipher;
146 struct ath11k *ar;
147 struct ieee80211_vif *vif;
148 } __packed;
149
150 struct ath11k_skb_rxcb {
151 dma_addr_t paddr;
152 bool is_first_msdu;
153 bool is_last_msdu;
154 bool is_continuation;
155 bool is_mcbc;
156 bool is_eapol;
157 struct hal_rx_desc *rx_desc;
158 u8 err_rel_src;
159 u8 err_code;
160 u8 mac_id;
161 u8 unmapped;
162 u8 is_frag;
163 u8 tid;
164 u16 peer_id;
165 u16 seq_no;
166 };
167
168 enum ath11k_hw_rev {
169 ATH11K_HW_IPQ8074,
170 ATH11K_HW_QCA6390_HW20,
171 ATH11K_HW_IPQ6018_HW10,
172 ATH11K_HW_QCN9074_HW10,
173 ATH11K_HW_WCN6855_HW20,
174 ATH11K_HW_WCN6855_HW21,
175 ATH11K_HW_WCN6750_HW10,
176 ATH11K_HW_IPQ5018_HW10,
177 ATH11K_HW_QCA2066_HW21,
178 ATH11K_HW_QCA6698AQ_HW21,
179 };
180
181 enum ath11k_firmware_mode {
182 /* the default mode, standard 802.11 functionality */
183 ATH11K_FIRMWARE_MODE_NORMAL,
184
185 /* factory tests etc */
186 ATH11K_FIRMWARE_MODE_FTM,
187
188 /* Cold boot calibration */
189 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
190 };
191
192 extern bool ath11k_cold_boot_cal;
193
194 #define ATH11K_IRQ_NUM_MAX 52
195 #define ATH11K_EXT_IRQ_NUM_MAX 16
196
197 struct ath11k_ext_irq_grp {
198 struct ath11k_base *ab;
199 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
200 u32 num_irq;
201 u32 grp_id;
202 u64 timestamp;
203 bool napi_enabled;
204 struct napi_struct napi;
205 struct net_device *napi_ndev;
206 };
207
208 enum ath11k_smbios_cc_type {
209 /* disable country code setting from SMBIOS */
210 ATH11K_SMBIOS_CC_DISABLE = 0,
211
212 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
213 ATH11K_SMBIOS_CC_ISO = 1,
214
215 /* worldwide regdomain */
216 ATH11K_SMBIOS_CC_WW = 2,
217 };
218
219 struct ath11k_smbios_bdf {
220 struct dmi_header hdr;
221
222 u8 features_disabled;
223
224 /* enum ath11k_smbios_cc_type */
225 u8 country_code_flag;
226
227 /* To set specific country, you need to set country code
228 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
229 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
230 * 0x53). To set country to INDONESIA, then country code value =
231 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
232 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
233 * setting.
234 */
235 u16 cc_code;
236
237 u8 bdf_enabled;
238 u8 bdf_ext[];
239 } __packed;
240
241 #define HEHANDLE_CAP_PHYINFO_SIZE 3
242 #define HECAP_PHYINFO_SIZE 9
243 #define HECAP_MACINFO_SIZE 5
244 #define HECAP_TXRX_MCS_NSS_SIZE 2
245 #define HECAP_PPET16_PPET8_MAX_SIZE 25
246
247 #define HE_PPET16_PPET8_SIZE 8
248
249 /* 802.11ax PPE (PPDU packet Extension) threshold */
250 struct he_ppe_threshold {
251 u32 numss_m1;
252 u32 ru_mask;
253 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
254 };
255
256 struct ath11k_he {
257 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
258 u32 hecap_rxmcsnssmap;
259 u32 hecap_txmcsnssmap;
260 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
261 struct he_ppe_threshold hecap_ppet;
262 u32 heop_param;
263 };
264
265 #define MAX_RADIOS 3
266
267 /* ipq5018 hw param macros */
268 #define MAX_RADIOS_5018 1
269 #define CE_CNT_5018 6
270 #define TARGET_CE_CNT_5018 9
271 #define SVC_CE_MAP_LEN_5018 17
272 #define RXDMA_PER_PDEV_5018 1
273
274 enum {
275 WMI_HOST_TP_SCALE_MAX = 0,
276 WMI_HOST_TP_SCALE_50 = 1,
277 WMI_HOST_TP_SCALE_25 = 2,
278 WMI_HOST_TP_SCALE_12 = 3,
279 WMI_HOST_TP_SCALE_MIN = 4,
280 WMI_HOST_TP_SCALE_SIZE = 5,
281 };
282
283 enum ath11k_scan_state {
284 ATH11K_SCAN_IDLE,
285 ATH11K_SCAN_STARTING,
286 ATH11K_SCAN_RUNNING,
287 ATH11K_SCAN_ABORTING,
288 };
289
290 enum ath11k_11d_state {
291 ATH11K_11D_IDLE,
292 ATH11K_11D_PREPARING,
293 ATH11K_11D_RUNNING,
294 };
295
296 enum ath11k_dev_flags {
297 ATH11K_CAC_RUNNING,
298 ATH11K_FLAG_CORE_REGISTERED,
299 ATH11K_FLAG_CRASH_FLUSH,
300 ATH11K_FLAG_RAW_MODE,
301 ATH11K_FLAG_HW_CRYPTO_DISABLED,
302 ATH11K_FLAG_BTCOEX,
303 ATH11K_FLAG_RECOVERY,
304 ATH11K_FLAG_UNREGISTERING,
305 ATH11K_FLAG_REGISTERED,
306 ATH11K_FLAG_QMI_FAIL,
307 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
308 ATH11K_FLAG_CE_IRQ_ENABLED,
309 ATH11K_FLAG_EXT_IRQ_ENABLED,
310 ATH11K_FLAG_FIXED_MEM_RGN,
311 ATH11K_FLAG_DEVICE_INIT_DONE,
312 ATH11K_FLAG_MULTI_MSI_VECTORS,
313 ATH11K_FLAG_FTM_SEGMENTED,
314 };
315
316 enum ath11k_monitor_flags {
317 ATH11K_FLAG_MONITOR_CONF_ENABLED,
318 ATH11K_FLAG_MONITOR_STARTED,
319 ATH11K_FLAG_MONITOR_VDEV_CREATED,
320 };
321
322 #define ATH11K_IPV6_UC_TYPE 0
323 #define ATH11K_IPV6_AC_TYPE 1
324
325 #define ATH11K_IPV6_MAX_COUNT 16
326 #define ATH11K_IPV4_MAX_COUNT 2
327
328 struct ath11k_arp_ns_offload {
329 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
330 u32 ipv4_count;
331 u32 ipv6_count;
332 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
333 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
334 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
335 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
336 u8 mac_addr[ETH_ALEN];
337 };
338
339 struct ath11k_rekey_data {
340 u8 kck[NL80211_KCK_LEN];
341 u8 kek[NL80211_KCK_LEN];
342 u64 replay_ctr;
343 bool enable_offload;
344 };
345
346 /**
347 * struct ath11k_chan_power_info - TPE containing power info per channel chunk
348 * @chan_cfreq: channel center freq (MHz)
349 * e.g.
350 * channel 37/20 MHz, it is 6135
351 * channel 37/40 MHz, it is 6125
352 * channel 37/80 MHz, it is 6145
353 * channel 37/160 MHz, it is 6185
354 * @tx_power: transmit power (dBm)
355 */
356 struct ath11k_chan_power_info {
357 u16 chan_cfreq;
358 s8 tx_power;
359 };
360
361 /* ath11k only deals with 160 MHz, so 8 subchannels */
362 #define ATH11K_NUM_PWR_LEVELS 8
363
364 /**
365 * struct ath11k_reg_tpc_power_info - regulatory TPC power info
366 * @is_psd_power: is PSD power or not
367 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD
368 * @ap_power_type: type of power (SP/LPI/VLP)
369 * @num_pwr_levels: number of power levels
370 * @reg_max: Array of maximum TX power (dBm) per PSD value
371 * @tpe: TPE values processed from TPE IE
372 * @chan_power_info: power info to send to firmware
373 */
374 struct ath11k_reg_tpc_power_info {
375 bool is_psd_power;
376 u8 eirp_power;
377 enum wmi_reg_6ghz_ap_type ap_power_type;
378 u8 num_pwr_levels;
379 u8 reg_max[ATH11K_NUM_PWR_LEVELS];
380 s8 tpe[ATH11K_NUM_PWR_LEVELS];
381 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS];
382 };
383
384 struct ath11k_vif {
385 u32 vdev_id;
386 enum wmi_vdev_type vdev_type;
387 enum wmi_vdev_subtype vdev_subtype;
388 u32 beacon_interval;
389 u32 dtim_period;
390 u16 ast_hash;
391 u16 ast_idx;
392 u16 tcl_metadata;
393 u8 hal_addr_search_flags;
394 u8 search_type;
395
396 struct ath11k *ar;
397 struct ieee80211_vif *vif;
398
399 struct wmi_wmm_params_all_arg wmm_params;
400 struct wmi_wmm_params_all_arg muedca_params;
401 struct list_head list;
402 union {
403 struct {
404 u32 uapsd;
405 } sta;
406 struct {
407 /* 127 stations; wmi limit */
408 u8 tim_bitmap[16];
409 u8 tim_len;
410 u32 ssid_len;
411 u8 ssid[IEEE80211_MAX_SSID_LEN];
412 bool hidden_ssid;
413 /* P2P_IE with NoA attribute for P2P_GO case */
414 u32 noa_len;
415 u8 *noa_data;
416 } ap;
417 } u;
418
419 bool is_started;
420 bool is_up;
421 bool ftm_responder;
422 bool spectral_enabled;
423 bool ps;
424 u32 aid;
425 u8 bssid[ETH_ALEN];
426 struct cfg80211_bitrate_mask bitrate_mask;
427 struct delayed_work connection_loss_work;
428 struct work_struct bcn_tx_work;
429 int num_legacy_stations;
430 int rtscts_prot_mode;
431 int txpower;
432 bool rsnie_present;
433 bool wpaie_present;
434 bool bcca_zero_sent;
435 bool do_not_send_tmpl;
436 struct ath11k_arp_ns_offload arp_ns_offload;
437 struct ath11k_rekey_data rekey_data;
438 u32 num_stations;
439 bool reinstall_group_keys;
440
441 struct ath11k_reg_tpc_power_info reg_tpc_info;
442
443 /* Must be last - ends in a flexible-array member.
444 *
445 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
446 * especially because it has a flexible array. Find a better way.
447 */
448 struct ieee80211_chanctx_conf chanctx;
449 };
450
451 struct ath11k_vif_iter {
452 u32 vdev_id;
453 struct ath11k_vif *arvif;
454 };
455
456 struct ath11k_rx_peer_stats {
457 u64 num_msdu;
458 u64 num_mpdu_fcs_ok;
459 u64 num_mpdu_fcs_err;
460 u64 tcp_msdu_count;
461 u64 udp_msdu_count;
462 u64 other_msdu_count;
463 u64 ampdu_msdu_count;
464 u64 non_ampdu_msdu_count;
465 u64 stbc_count;
466 u64 beamformed_count;
467 u64 mcs_count[HAL_RX_MAX_MCS + 1];
468 u64 nss_count[HAL_RX_MAX_NSS];
469 u64 bw_count[HAL_RX_BW_MAX];
470 u64 gi_count[HAL_RX_GI_MAX];
471 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
472 u64 tid_count[IEEE80211_NUM_TIDS + 1];
473 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
474 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
475 u64 rx_duration;
476 u64 dcm_count;
477 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
478 };
479
480 #define ATH11K_HE_MCS_NUM 12
481 #define ATH11K_VHT_MCS_NUM 10
482 #define ATH11K_BW_NUM 4
483 #define ATH11K_NSS_NUM 4
484 #define ATH11K_LEGACY_NUM 12
485 #define ATH11K_GI_NUM 4
486 #define ATH11K_HT_MCS_NUM 32
487
488 enum ath11k_pkt_rx_err {
489 ATH11K_PKT_RX_ERR_FCS,
490 ATH11K_PKT_RX_ERR_TKIP,
491 ATH11K_PKT_RX_ERR_CRYPT,
492 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
493 ATH11K_PKT_RX_ERR_MAX,
494 };
495
496 enum ath11k_ampdu_subfrm_num {
497 ATH11K_AMPDU_SUBFRM_NUM_10,
498 ATH11K_AMPDU_SUBFRM_NUM_20,
499 ATH11K_AMPDU_SUBFRM_NUM_30,
500 ATH11K_AMPDU_SUBFRM_NUM_40,
501 ATH11K_AMPDU_SUBFRM_NUM_50,
502 ATH11K_AMPDU_SUBFRM_NUM_60,
503 ATH11K_AMPDU_SUBFRM_NUM_MORE,
504 ATH11K_AMPDU_SUBFRM_NUM_MAX,
505 };
506
507 enum ath11k_amsdu_subfrm_num {
508 ATH11K_AMSDU_SUBFRM_NUM_1,
509 ATH11K_AMSDU_SUBFRM_NUM_2,
510 ATH11K_AMSDU_SUBFRM_NUM_3,
511 ATH11K_AMSDU_SUBFRM_NUM_4,
512 ATH11K_AMSDU_SUBFRM_NUM_MORE,
513 ATH11K_AMSDU_SUBFRM_NUM_MAX,
514 };
515
516 enum ath11k_counter_type {
517 ATH11K_COUNTER_TYPE_BYTES,
518 ATH11K_COUNTER_TYPE_PKTS,
519 ATH11K_COUNTER_TYPE_MAX,
520 };
521
522 enum ath11k_stats_type {
523 ATH11K_STATS_TYPE_SUCC,
524 ATH11K_STATS_TYPE_FAIL,
525 ATH11K_STATS_TYPE_RETRY,
526 ATH11K_STATS_TYPE_AMPDU,
527 ATH11K_STATS_TYPE_MAX,
528 };
529
530 struct ath11k_htt_data_stats {
531 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
532 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
533 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
534 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
535 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
536 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
537 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
538 };
539
540 struct ath11k_htt_tx_stats {
541 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
542 u64 tx_duration;
543 u64 ba_fails;
544 u64 ack_fails;
545 };
546
547 struct ath11k_per_ppdu_tx_stats {
548 u16 succ_pkts;
549 u16 failed_pkts;
550 u16 retry_pkts;
551 u32 succ_bytes;
552 u32 failed_bytes;
553 u32 retry_bytes;
554 };
555
556 DECLARE_EWMA(avg_rssi, 10, 8)
557
558 struct ath11k_per_peer_cfr_capture {
559 enum ath11k_cfr_capture_method cfr_method;
560 enum ath11k_cfr_capture_bw cfr_bw;
561 u32 cfr_enable;
562 u32 cfr_period;
563 };
564
565 struct ath11k_sta {
566 struct ath11k_vif *arvif;
567
568 /* the following are protected by ar->data_lock */
569 u32 changed; /* IEEE80211_RC_* */
570 u32 bw;
571 u32 nss;
572 u32 smps;
573 enum hal_pn_type pn_type;
574
575 struct work_struct update_wk;
576 struct work_struct set_4addr_wk;
577 struct rate_info txrate;
578 u32 peer_nss;
579 struct rate_info last_txrate;
580 u64 rx_duration;
581 u64 tx_duration;
582 u8 rssi_comb;
583 struct ewma_avg_rssi avg_rssi;
584 s8 rssi_beacon;
585 s8 chain_signal[IEEE80211_MAX_CHAINS];
586 struct ath11k_htt_tx_stats *tx_stats;
587 struct ath11k_rx_peer_stats *rx_stats;
588
589 #ifdef CONFIG_MAC80211_DEBUGFS
590 /* protected by conf_mutex */
591 bool aggr_mode;
592 #endif
593
594 bool use_4addr_set;
595 u16 tcl_metadata;
596
597 /* Protected with ar->data_lock */
598 enum ath11k_wmi_peer_ps_state peer_ps_state;
599 u64 ps_start_time;
600 u64 ps_start_jiffies;
601 u64 ps_total_duration;
602 bool peer_current_ps_valid;
603
604 u32 bw_prev;
605
606 #ifdef CONFIG_ATH11K_CFR
607 struct ath11k_per_peer_cfr_capture cfr_capture;
608 #endif
609 };
610
611 #define ATH11K_MIN_5G_FREQ 4150
612 #define ATH11K_MIN_6G_FREQ 5925
613 #define ATH11K_MAX_6G_FREQ 7115
614 #define ATH11K_NUM_CHANS 102
615 #define ATH11K_MAX_5G_CHAN 177
616
617 enum ath11k_state {
618 ATH11K_STATE_OFF,
619 ATH11K_STATE_ON,
620 ATH11K_STATE_RESTARTING,
621 ATH11K_STATE_RESTARTED,
622 ATH11K_STATE_WEDGED,
623 ATH11K_STATE_FTM,
624 /* Add other states as required */
625 };
626
627 /* Antenna noise floor */
628 #define ATH11K_DEFAULT_NOISE_FLOOR -95
629
630 #define ATH11K_INVALID_RSSI_FULL -1
631
632 #define ATH11K_INVALID_RSSI_EMPTY -128
633
634 struct ath11k_fw_stats {
635 struct dentry *debugfs_fwstats;
636 u32 pdev_id;
637 u32 stats_id;
638 struct list_head pdevs;
639 struct list_head vdevs;
640 struct list_head bcn;
641 u32 num_vdev_recvd;
642 u32 num_bcn_recvd;
643 };
644
645 struct ath11k_dbg_htt_stats {
646 u8 type;
647 u8 reset;
648 struct debug_htt_stats_req *stats_req;
649 /* protects shared stats req buffer */
650 spinlock_t lock;
651 };
652
653 #define MAX_MODULE_ID_BITMAP_WORDS 16
654
655 struct ath11k_debug {
656 struct dentry *debugfs_pdev;
657 struct ath11k_dbg_htt_stats htt_stats;
658 u32 extd_tx_stats;
659 u32 extd_rx_stats;
660 u32 pktlog_filter;
661 u32 pktlog_mode;
662 u32 pktlog_peer_valid;
663 u8 pktlog_peer_addr[ETH_ALEN];
664 u32 rx_filter;
665 u32 mem_offset;
666 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
667 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
668 };
669
670 struct ath11k_per_peer_tx_stats {
671 u32 succ_bytes;
672 u32 retry_bytes;
673 u32 failed_bytes;
674 u16 succ_pkts;
675 u16 retry_pkts;
676 u16 failed_pkts;
677 u32 duration;
678 u8 ba_fails;
679 bool is_ampdu;
680 };
681
682 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
683 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
684
685 struct ath11k {
686 struct ath11k_base *ab;
687 struct ath11k_pdev *pdev;
688 struct ieee80211_hw *hw;
689 struct ath11k_pdev_wmi *wmi;
690 struct ath11k_pdev_dp dp;
691 u8 mac_addr[ETH_ALEN];
692 struct ath11k_he ar_he;
693 enum ath11k_state state;
694 bool supports_6ghz;
695 struct {
696 struct completion started;
697 struct completion completed;
698 struct completion on_channel;
699 struct delayed_work timeout;
700 enum ath11k_scan_state state;
701 bool is_roc;
702 int vdev_id;
703 int roc_freq;
704 bool roc_notify;
705 } scan;
706
707 struct {
708 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
709 struct ieee80211_sband_iftype_data
710 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
711 } mac;
712
713 unsigned long dev_flags;
714 unsigned int filter_flags;
715 unsigned long monitor_flags;
716 u32 min_tx_power;
717 u32 max_tx_power;
718 u32 txpower_limit_2g;
719 u32 txpower_limit_5g;
720 u32 txpower_scale;
721 u32 power_scale;
722 u32 chan_tx_pwr;
723 u32 num_stations;
724 u32 max_num_stations;
725 /* To synchronize concurrent synchronous mac80211 callback operations,
726 * concurrent debugfs configuration and concurrent FW statistics events.
727 */
728 struct mutex conf_mutex;
729 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
730 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
731 * channel context data, survey info, test mode data, channel_update_queue.
732 */
733 spinlock_t data_lock;
734
735 struct list_head arvifs;
736 /* should never be NULL; needed for regular htt rx */
737 struct ieee80211_channel *rx_channel;
738
739 /* valid during scan; needed for mgmt rx during scan */
740 struct ieee80211_channel *scan_channel;
741
742 u8 cfg_tx_chainmask;
743 u8 cfg_rx_chainmask;
744 u8 num_rx_chains;
745 u8 num_tx_chains;
746 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
747 u8 pdev_idx;
748 u8 lmac_id;
749
750 struct completion peer_assoc_done;
751 struct completion peer_delete_done;
752
753 int install_key_status;
754 struct completion install_key_done;
755
756 int last_wmi_vdev_start_status;
757 struct completion vdev_setup_done;
758 struct completion vdev_delete_done;
759
760 int num_peers;
761 int max_num_peers;
762 u32 num_started_vdevs;
763 u32 num_created_vdevs;
764 unsigned long long allocated_vdev_map;
765
766 struct idr txmgmt_idr;
767 /* protects txmgmt_idr data */
768 spinlock_t txmgmt_idr_lock;
769 atomic_t num_pending_mgmt_tx;
770 wait_queue_head_t txmgmt_empty_waitq;
771
772 /* cycle count is reported twice for each visited channel during scan.
773 * access protected by data_lock
774 */
775 u32 survey_last_rx_clear_count;
776 u32 survey_last_cycle_count;
777
778 /* Channel info events are expected to come in pairs without and with
779 * COMPLETE flag set respectively for each channel visit during scan.
780 *
781 * However there are deviations from this rule. This flag is used to
782 * avoid reporting garbage data.
783 */
784 bool ch_info_can_report_survey;
785 struct survey_info survey[ATH11K_NUM_CHANS];
786 struct completion bss_survey_done;
787
788 struct work_struct regd_update_work;
789 struct work_struct channel_update_work;
790 /* protected with data_lock */
791 struct list_head channel_update_queue;
792
793 struct work_struct wmi_mgmt_tx_work;
794 struct sk_buff_head wmi_mgmt_tx_queue;
795
796 struct ath11k_wow wow;
797 struct completion target_suspend;
798 bool target_suspend_ack;
799 struct ath11k_per_peer_tx_stats peer_tx_stats;
800 struct list_head ppdu_stats_info;
801 u32 ppdu_stat_list_depth;
802
803 struct ath11k_per_peer_tx_stats cached_stats;
804 u32 last_ppdu_id;
805 u32 cached_ppdu_id;
806 int monitor_vdev_id;
807 struct completion fw_mode_reset;
808 u8 ftm_msgref;
809 #ifdef CONFIG_ATH11K_DEBUGFS
810 struct ath11k_debug debug;
811 #endif
812 #ifdef CONFIG_ATH11K_SPECTRAL
813 struct ath11k_spectral spectral;
814 #endif
815 bool dfs_block_radar_events;
816 struct ath11k_thermal thermal;
817 u32 vdev_id_11d_scan;
818 struct completion completed_11d_scan;
819 enum ath11k_11d_state state_11d;
820 bool regdom_set_by_user;
821 int hw_rate_code;
822 u8 twt_enabled;
823 bool nlo_enabled;
824 u8 alpha2[REG_ALPHA2_LEN + 1];
825 struct ath11k_fw_stats fw_stats;
826 struct completion fw_stats_complete;
827 struct completion fw_stats_done;
828
829 /* protected by conf_mutex */
830 bool ps_state_enable;
831 bool ps_timekeeper_enable;
832 s8 max_allowed_tx_power;
833
834 #ifdef CONFIG_ATH11K_CFR
835 struct ath11k_cfr cfr;
836 #endif
837 bool cfr_enabled;
838 };
839
840 struct ath11k_band_cap {
841 u32 phy_id;
842 u32 max_bw_supported;
843 u32 ht_cap_info;
844 u32 he_cap_info[2];
845 u32 he_mcs;
846 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
847 struct ath11k_ppe_threshold he_ppet;
848 u16 he_6ghz_capa;
849 };
850
851 struct ath11k_pdev_cap {
852 u32 supported_bands;
853 u32 ampdu_density;
854 u32 vht_cap;
855 u32 vht_mcs;
856 u32 he_mcs;
857 u32 tx_chain_mask;
858 u32 rx_chain_mask;
859 u32 tx_chain_mask_shift;
860 u32 rx_chain_mask_shift;
861 struct ath11k_band_cap band[NUM_NL80211_BANDS];
862 bool nss_ratio_enabled;
863 u8 nss_ratio_info;
864 };
865
866 struct ath11k_pdev {
867 struct ath11k *ar;
868 u32 pdev_id;
869 struct ath11k_pdev_cap cap;
870 u8 mac_addr[ETH_ALEN];
871 };
872
873 struct ath11k_board_data {
874 const struct firmware *fw;
875 const void *data;
876 size_t len;
877 };
878
879 struct ath11k_pci_ops {
880 int (*wakeup)(struct ath11k_base *ab);
881 void (*release)(struct ath11k_base *ab);
882 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
883 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
884 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
885 };
886
887 /* IPQ8074 HW channel counters frequency value in hertz */
888 #define IPQ8074_CC_FREQ_HERTZ 320000
889
890 struct ath11k_bp_stats {
891 /* Head Pointer reported by the last HTT Backpressure event for the ring */
892 u16 hp;
893
894 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
895 u16 tp;
896
897 /* Number of Backpressure events received for the ring */
898 u32 count;
899
900 /* Last recorded event timestamp */
901 unsigned long jiffies;
902 };
903
904 struct ath11k_dp_ring_bp_stats {
905 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
906 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
907 };
908
909 struct ath11k_soc_dp_tx_err_stats {
910 /* TCL Ring Descriptor unavailable */
911 u32 desc_na[DP_TCL_NUM_RING_MAX];
912 /* Other failures during dp_tx due to mem allocation failure
913 * idr unavailable etc.
914 */
915 atomic_t misc_fail;
916 };
917
918 struct ath11k_soc_dp_stats {
919 u32 err_ring_pkts;
920 u32 invalid_rbm;
921 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
922 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
923 u32 hal_reo_error[DP_REO_DST_RING_MAX];
924 struct ath11k_soc_dp_tx_err_stats tx_err;
925 struct ath11k_dp_ring_bp_stats bp_stats;
926 };
927
928 struct ath11k_msi_user {
929 char *name;
930 int num_vectors;
931 u32 base_vector;
932 };
933
934 struct ath11k_msi_config {
935 int total_vectors;
936 int total_users;
937 struct ath11k_msi_user *users;
938 u16 hw_rev;
939 };
940
941 enum ath11k_pm_policy {
942 ATH11K_PM_DEFAULT,
943 ATH11K_PM_WOW,
944 };
945
946 /* Master structure to hold the hw data which may be used in core module */
947 struct ath11k_base {
948 enum ath11k_hw_rev hw_rev;
949 enum ath11k_firmware_mode fw_mode;
950 struct platform_device *pdev;
951 struct device *dev;
952 struct ath11k_qmi qmi;
953 struct ath11k_wmi_base wmi_ab;
954 struct completion fw_ready;
955 int num_radios;
956 /* HW channel counters frequency value in hertz common to all MACs */
957 u32 cc_freq_hz;
958
959 struct ath11k_dump_file_data *dump_data;
960 size_t ath11k_coredump_len;
961 struct work_struct dump_work;
962
963 struct ath11k_htc htc;
964
965 struct ath11k_dp dp;
966
967 void __iomem *mem;
968 void __iomem *mem_ce;
969 unsigned long mem_len;
970
971 struct {
972 enum ath11k_bus bus;
973 const struct ath11k_hif_ops *ops;
974 } hif;
975
976 struct {
977 struct completion wakeup_completed;
978 } wow;
979
980 struct ath11k_ce ce;
981 struct timer_list rx_replenish_retry;
982 struct ath11k_hal hal;
983 /* To synchronize core_start/core_stop */
984 struct mutex core_lock;
985 /* Protects data like peers */
986 spinlock_t base_lock;
987 struct ath11k_pdev pdevs[MAX_RADIOS];
988 struct {
989 enum WMI_HOST_WLAN_BAND supported_bands;
990 u32 pdev_id;
991 } target_pdev_ids[MAX_RADIOS];
992 u8 target_pdev_count;
993 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
994 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
995 unsigned long long free_vdev_map;
996
997 /* To synchronize rhash tbl write operation */
998 struct mutex tbl_mtx_lock;
999
1000 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
1001 struct rhashtable *rhead_peer_addr;
1002 struct rhashtable_params rhash_peer_addr_param;
1003
1004 /* The rhashtable containing struct ath11k_peer keyed by id */
1005 struct rhashtable *rhead_peer_id;
1006 struct rhashtable_params rhash_peer_id_param;
1007
1008 struct list_head peers;
1009 wait_queue_head_t peer_mapping_wq;
1010 u8 mac_addr[ETH_ALEN];
1011 int irq_num[ATH11K_IRQ_NUM_MAX];
1012 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
1013 struct ath11k_targ_cap target_caps;
1014 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
1015 bool pdevs_macaddr_valid;
1016
1017 struct ath11k_hw_params hw_params;
1018
1019 const struct firmware *cal_file;
1020
1021 /* Below regd's are protected by ab->data_lock */
1022 /* This is the regd set for every radio
1023 * by the firmware during initialization
1024 */
1025 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
1026 /* This regd is set during dynamic country setting
1027 * This may or may not be used during the runtime
1028 */
1029 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
1030 struct cur_regulatory_info *reg_info_store;
1031
1032 /* Current DFS Regulatory */
1033 enum ath11k_dfs_region dfs_region;
1034 #ifdef CONFIG_ATH11K_DEBUGFS
1035 struct dentry *debugfs_soc;
1036 #endif
1037 struct ath11k_soc_dp_stats soc_stats;
1038
1039 unsigned long dev_flags;
1040 struct completion driver_recovery;
1041 struct workqueue_struct *workqueue;
1042 struct work_struct restart_work;
1043 struct work_struct update_11d_work;
1044 u8 new_alpha2[3];
1045 struct workqueue_struct *workqueue_aux;
1046 struct work_struct reset_work;
1047 atomic_t reset_count;
1048 atomic_t recovery_count;
1049 atomic_t recovery_start_count;
1050 bool is_reset;
1051 struct completion reset_complete;
1052 struct completion reconfigure_complete;
1053 struct completion recovery_start;
1054 /* continuous recovery fail count */
1055 atomic_t fail_cont_count;
1056 unsigned long reset_fail_timeout;
1057 struct {
1058 /* protected by data_lock */
1059 u32 fw_crash_counter;
1060 } stats;
1061 u32 pktlog_defs_checksum;
1062
1063 struct ath11k_dbring_cap *db_caps;
1064 u32 num_db_cap;
1065
1066 /* To synchronize 11d scan vdev id */
1067 struct mutex vdev_id_11d_lock;
1068 struct timer_list mon_reap_timer;
1069
1070 struct completion htc_suspend;
1071
1072 struct {
1073 enum ath11k_bdf_search bdf_search;
1074 u32 vendor;
1075 u32 device;
1076 u32 subsystem_vendor;
1077 u32 subsystem_device;
1078 } id;
1079
1080 struct {
1081 struct {
1082 const struct ath11k_msi_config *config;
1083 u32 ep_base_data;
1084 u32 irqs[32];
1085 u32 addr_lo;
1086 u32 addr_hi;
1087 } msi;
1088
1089 const struct ath11k_pci_ops *ops;
1090 } pci;
1091
1092 struct {
1093 u32 api_version;
1094
1095 const struct firmware *fw;
1096 const u8 *amss_data;
1097 size_t amss_len;
1098 const u8 *m3_data;
1099 size_t m3_len;
1100
1101 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);
1102 } fw;
1103
1104 struct completion restart_completed;
1105
1106 #ifdef CONFIG_NL80211_TESTMODE
1107 struct {
1108 u32 data_pos;
1109 u32 expected_seq;
1110 u8 *eventdata;
1111 } testmode;
1112 #endif
1113
1114 enum ath11k_pm_policy pm_policy;
1115 enum ath11k_pm_policy actual_pm_policy;
1116 struct notifier_block pm_nb;
1117
1118 /* must be last */
1119 u8 drv_priv[] __aligned(sizeof(void *));
1120 };
1121
1122 struct ath11k_fw_stats_pdev {
1123 struct list_head list;
1124
1125 /* PDEV stats */
1126 s32 ch_noise_floor;
1127 /* Cycles spent transmitting frames */
1128 u32 tx_frame_count;
1129 /* Cycles spent receiving frames */
1130 u32 rx_frame_count;
1131 /* Total channel busy time, evidently */
1132 u32 rx_clear_count;
1133 /* Total on-channel time */
1134 u32 cycle_count;
1135 u32 phy_err_count;
1136 u32 chan_tx_power;
1137 u32 ack_rx_bad;
1138 u32 rts_bad;
1139 u32 rts_good;
1140 u32 fcs_bad;
1141 u32 no_beacons;
1142 u32 mib_int_count;
1143
1144 /* PDEV TX stats */
1145 /* Num HTT cookies queued to dispatch list */
1146 s32 comp_queued;
1147 /* Num HTT cookies dispatched */
1148 s32 comp_delivered;
1149 /* Num MSDU queued to WAL */
1150 s32 msdu_enqued;
1151 /* Num MPDU queue to WAL */
1152 s32 mpdu_enqued;
1153 /* Num MSDUs dropped by WMM limit */
1154 s32 wmm_drop;
1155 /* Num Local frames queued */
1156 s32 local_enqued;
1157 /* Num Local frames done */
1158 s32 local_freed;
1159 /* Num queued to HW */
1160 s32 hw_queued;
1161 /* Num PPDU reaped from HW */
1162 s32 hw_reaped;
1163 /* Num underruns */
1164 s32 underrun;
1165 /* Num hw paused */
1166 u32 hw_paused;
1167 /* Num PPDUs cleaned up in TX abort */
1168 s32 tx_abort;
1169 /* Num MPDUs requeued by SW */
1170 s32 mpdus_requeued;
1171 /* excessive retries */
1172 u32 tx_ko;
1173 u32 tx_xretry;
1174 /* data hw rate code */
1175 u32 data_rc;
1176 /* Scheduler self triggers */
1177 u32 self_triggers;
1178 /* frames dropped due to excessive sw retries */
1179 u32 sw_retry_failure;
1180 /* illegal rate phy errors */
1181 u32 illgl_rate_phy_err;
1182 /* wal pdev continuous xretry */
1183 u32 pdev_cont_xretry;
1184 /* wal pdev tx timeouts */
1185 u32 pdev_tx_timeout;
1186 /* wal pdev resets */
1187 u32 pdev_resets;
1188 /* frames dropped due to non-availability of stateless TIDs */
1189 u32 stateless_tid_alloc_failure;
1190 /* PhY/BB underrun */
1191 u32 phy_underrun;
1192 /* MPDU is more than txop limit */
1193 u32 txop_ovf;
1194 /* Num sequences posted */
1195 u32 seq_posted;
1196 /* Num sequences failed in queueing */
1197 u32 seq_failed_queueing;
1198 /* Num sequences completed */
1199 u32 seq_completed;
1200 /* Num sequences restarted */
1201 u32 seq_restarted;
1202 /* Num of MU sequences posted */
1203 u32 mu_seq_posted;
1204 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1205 * (Reset,channel change)
1206 */
1207 s32 mpdus_sw_flush;
1208 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1209 s32 mpdus_hw_filter;
1210 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1211 * PPDU_duration based on rate, dyn_bw)
1212 */
1213 s32 mpdus_truncated;
1214 /* Num MPDUs that was tried but didn't receive ACK or BA */
1215 s32 mpdus_ack_failed;
1216 /* Num MPDUs that was dropped du to expiry. */
1217 s32 mpdus_expired;
1218
1219 /* PDEV RX stats */
1220 /* Cnts any change in ring routing mid-ppdu */
1221 s32 mid_ppdu_route_change;
1222 /* Total number of statuses processed */
1223 s32 status_rcvd;
1224 /* Extra frags on rings 0-3 */
1225 s32 r0_frags;
1226 s32 r1_frags;
1227 s32 r2_frags;
1228 s32 r3_frags;
1229 /* MSDUs / MPDUs delivered to HTT */
1230 s32 htt_msdus;
1231 s32 htt_mpdus;
1232 /* MSDUs / MPDUs delivered to local stack */
1233 s32 loc_msdus;
1234 s32 loc_mpdus;
1235 /* AMSDUs that have more MSDUs than the status ring size */
1236 s32 oversize_amsdu;
1237 /* Number of PHY errors */
1238 s32 phy_errs;
1239 /* Number of PHY errors drops */
1240 s32 phy_err_drop;
1241 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1242 s32 mpdu_errs;
1243 /* Num overflow errors */
1244 s32 rx_ovfl_errs;
1245 };
1246
1247 struct ath11k_fw_stats_vdev {
1248 struct list_head list;
1249
1250 u32 vdev_id;
1251 u32 beacon_snr;
1252 u32 data_snr;
1253 u32 num_tx_frames[WLAN_MAX_AC];
1254 u32 num_rx_frames;
1255 u32 num_tx_frames_retries[WLAN_MAX_AC];
1256 u32 num_tx_frames_failures[WLAN_MAX_AC];
1257 u32 num_rts_fail;
1258 u32 num_rts_success;
1259 u32 num_rx_err;
1260 u32 num_rx_discard;
1261 u32 num_tx_not_acked;
1262 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1263 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1264 };
1265
1266 struct ath11k_fw_stats_bcn {
1267 struct list_head list;
1268
1269 u32 vdev_id;
1270 u32 tx_bcn_succ_cnt;
1271 u32 tx_bcn_outage_cnt;
1272 };
1273
1274 void ath11k_fw_stats_init(struct ath11k *ar);
1275 void ath11k_fw_stats_pdevs_free(struct list_head *head);
1276 void ath11k_fw_stats_vdevs_free(struct list_head *head);
1277 void ath11k_fw_stats_bcn_free(struct list_head *head);
1278 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1279
1280 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1281 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1282 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1283
1284 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1285 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1286
1287 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
1288 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
1289
1290 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1291 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1292 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1293 int ath11k_core_pre_init(struct ath11k_base *ab);
1294 int ath11k_core_init(struct ath11k_base *ath11k);
1295 void ath11k_core_deinit(struct ath11k_base *ath11k);
1296 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1297 enum ath11k_bus bus);
1298 void ath11k_core_free(struct ath11k_base *ath11k);
1299 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1300 struct ath11k_board_data *bd);
1301 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1302 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1303 struct ath11k_board_data *bd,
1304 const char *name);
1305 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1306 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1307 int ath11k_core_check_smbios(struct ath11k_base *ab);
1308 void ath11k_core_halt(struct ath11k *ar);
1309 int ath11k_core_resume_early(struct ath11k_base *ab);
1310 int ath11k_core_resume(struct ath11k_base *ab);
1311 int ath11k_core_suspend(struct ath11k_base *ab);
1312 int ath11k_core_suspend_late(struct ath11k_base *ab);
1313 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1314 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);
1315
1316 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1317 const char *filename);
1318 const char *ath11k_core_get_usecase_firmware(struct ath11k_base *ab);
1319
ath11k_scan_state_str(enum ath11k_scan_state state)1320 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1321 {
1322 switch (state) {
1323 case ATH11K_SCAN_IDLE:
1324 return "idle";
1325 case ATH11K_SCAN_STARTING:
1326 return "starting";
1327 case ATH11K_SCAN_RUNNING:
1328 return "running";
1329 case ATH11K_SCAN_ABORTING:
1330 return "aborting";
1331 }
1332
1333 return "unknown";
1334 }
1335
ATH11K_SKB_CB(struct sk_buff * skb)1336 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1337 {
1338 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1339 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1340 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1341 }
1342
ATH11K_SKB_RXCB(struct sk_buff * skb)1343 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1344 {
1345 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1346 return (struct ath11k_skb_rxcb *)skb->cb;
1347 }
1348
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1349 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1350 {
1351 return (struct ath11k_vif *)vif->drv_priv;
1352 }
1353
ath11k_sta_to_arsta(struct ieee80211_sta * sta)1354 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta)
1355 {
1356 return (struct ath11k_sta *)sta->drv_priv;
1357 }
1358
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1359 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1360 int mac_id)
1361 {
1362 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1363 }
1364
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1365 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1366 const char *filename,
1367 void *buf, size_t buf_len)
1368 {
1369 const char *fw_name = NULL;
1370
1371 #if defined(CONFIG_OF)
1372 of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name);
1373 #endif
1374
1375 if (!fw_name)
1376 fw_name = ath11k_core_get_usecase_firmware(ab);
1377
1378 if (fw_name && strncmp(filename, "board", 5))
1379 snprintf(buf, buf_len, "%s/%s/%s/%s", ATH11K_FW_DIR,
1380 ab->hw_params.fw.dir, fw_name, filename);
1381 else
1382 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1383 ab->hw_params.fw.dir, filename);
1384 }
1385
ath11k_bus_str(enum ath11k_bus bus)1386 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1387 {
1388 switch (bus) {
1389 case ATH11K_BUS_PCI:
1390 return "pci";
1391 case ATH11K_BUS_AHB:
1392 return "ahb";
1393 }
1394
1395 return "unknown";
1396 }
1397
1398 void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab);
1399
1400 #endif /* _CORE_H_ */
1401