1 /*-
2 * Copyright (c) 2015-2016 Chelsio Communications, Inc.
3 * All rights reserved.
4 * Written by: John Baldwin <jhb@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/param.h>
29 #include <sys/bus.h>
30 #include <sys/kernel.h>
31 #include <sys/module.h>
32 #include <sys/socket.h>
33 #include <sys/systm.h>
34 #include <sys/iov.h>
35 #include <dev/pci/pcivar.h>
36 #include <net/if.h>
37 #include <net/if_vlan_var.h>
38
39 #ifdef PCI_IOV
40 #include <sys/nv.h>
41 #include <sys/iov_schema.h>
42 #include <dev/pci/pci_iov.h>
43 #endif
44
45 #include "common/common.h"
46 #include "common/t4_regs.h"
47 #include "t4_if.h"
48
49 struct t4iov_softc {
50 device_t sc_dev;
51 device_t sc_main;
52 bool sc_attached;
53
54 int pf;
55 int regs_rid;
56 struct resource *regs_res;
57 bus_space_handle_t bh;
58 bus_space_tag_t bt;
59 };
60
61 struct {
62 uint16_t device;
63 char *desc;
64 } t4iov_pciids[] = {
65 {0x4000, "Chelsio T440-dbg"},
66 {0x4001, "Chelsio T420-CR"},
67 {0x4002, "Chelsio T422-CR"},
68 {0x4003, "Chelsio T440-CR"},
69 {0x4004, "Chelsio T420-BCH"},
70 {0x4005, "Chelsio T440-BCH"},
71 {0x4006, "Chelsio T440-CH"},
72 {0x4007, "Chelsio T420-SO"},
73 {0x4008, "Chelsio T420-CX"},
74 {0x4009, "Chelsio T420-BT"},
75 {0x400a, "Chelsio T404-BT"},
76 {0x400e, "Chelsio T440-LP-CR"},
77 }, t5iov_pciids[] = {
78 {0x5000, "Chelsio T580-dbg"},
79 {0x5001, "Chelsio T520-CR"}, /* 2 x 10G */
80 {0x5002, "Chelsio T522-CR"}, /* 2 x 10G, 2 X 1G */
81 {0x5003, "Chelsio T540-CR"}, /* 4 x 10G */
82 {0x5007, "Chelsio T520-SO"}, /* 2 x 10G, nomem */
83 {0x5009, "Chelsio T520-BT"}, /* 2 x 10GBaseT */
84 {0x500a, "Chelsio T504-BT"}, /* 4 x 1G */
85 {0x500d, "Chelsio T580-CR"}, /* 2 x 40G */
86 {0x500e, "Chelsio T540-LP-CR"}, /* 4 x 10G */
87 {0x5010, "Chelsio T580-LP-CR"}, /* 2 x 40G */
88 {0x5011, "Chelsio T520-LL-CR"}, /* 2 x 10G */
89 {0x5012, "Chelsio T560-CR"}, /* 1 x 40G, 2 x 10G */
90 {0x5014, "Chelsio T580-LP-SO-CR"}, /* 2 x 40G, nomem */
91 {0x5015, "Chelsio T502-BT"}, /* 2 x 1G */
92 {0x5018, "Chelsio T540-BT"}, /* 4 x 10GBaseT */
93 {0x5019, "Chelsio T540-LP-BT"}, /* 4 x 10GBaseT */
94 {0x501a, "Chelsio T540-SO-BT"}, /* 4 x 10GBaseT, nomem */
95 {0x501b, "Chelsio T540-SO-CR"}, /* 4 x 10G, nomem */
96 }, t6iov_pciids[] = {
97 {0x6000, "Chelsio T6-DBG-25"}, /* 2 x 10/25G, debug */
98 {0x6001, "Chelsio T6225-CR"}, /* 2 x 10/25G */
99 {0x6002, "Chelsio T6225-SO-CR"}, /* 2 x 10/25G, nomem */
100 {0x6003, "Chelsio T6425-CR"}, /* 4 x 10/25G */
101 {0x6004, "Chelsio T6425-SO-CR"}, /* 4 x 10/25G, nomem */
102 {0x6005, "Chelsio T6225-SO-OCP3"}, /* 2 x 10/25G, nomem */
103 {0x6006, "Chelsio T6225-OCP3"}, /* 2 x 10/25G */
104 {0x6007, "Chelsio T62100-LP-CR"}, /* 2 x 40/50/100G */
105 {0x6008, "Chelsio T62100-SO-CR"}, /* 2 x 40/50/100G, nomem */
106 {0x6009, "Chelsio T6210-BT"}, /* 2 x 10GBASE-T */
107 {0x600d, "Chelsio T62100-CR"}, /* 2 x 40/50/100G */
108 {0x6010, "Chelsio T6-DBG-100"}, /* 2 x 40/50/100G, debug */
109 {0x6011, "Chelsio T6225-LL-CR"}, /* 2 x 10/25G */
110 {0x6014, "Chelsio T62100-SO-OCP3"}, /* 2 x 40/50/100G, nomem */
111 {0x6015, "Chelsio T6201-BT"}, /* 2 x 1000BASE-T */
112
113 /* Custom */
114 {0x6080, "Chelsio T6225 80"},
115 {0x6081, "Chelsio T62100 81"},
116 {0x6082, "Chelsio T6225-CR 82"},
117 {0x6083, "Chelsio T62100-CR 83"},
118 {0x6084, "Chelsio T64100-CR 84"},
119 {0x6085, "Chelsio T6240-SO 85"},
120 {0x6086, "Chelsio T6225-SO-CR 86"},
121 {0x6087, "Chelsio T6225-CR 87"},
122 };
123
124 static inline uint32_t
t4iov_read_reg(struct t4iov_softc * sc,uint32_t reg)125 t4iov_read_reg(struct t4iov_softc *sc, uint32_t reg)
126 {
127
128 return bus_space_read_4(sc->bt, sc->bh, reg);
129 }
130
131 static int t4iov_attach_child(device_t dev);
132
133 static int
t4iov_probe(device_t dev)134 t4iov_probe(device_t dev)
135 {
136 uint16_t d;
137 size_t i;
138
139 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
140 return (ENXIO);
141
142 d = pci_get_device(dev);
143 for (i = 0; i < nitems(t4iov_pciids); i++) {
144 if (d == t4iov_pciids[i].device) {
145 device_set_desc(dev, t4iov_pciids[i].desc);
146 device_quiet(dev);
147 return (BUS_PROBE_DEFAULT);
148 }
149 }
150 return (ENXIO);
151 }
152
153 static int
t5iov_probe(device_t dev)154 t5iov_probe(device_t dev)
155 {
156 uint16_t d;
157 size_t i;
158
159 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
160 return (ENXIO);
161
162 d = pci_get_device(dev);
163 for (i = 0; i < nitems(t5iov_pciids); i++) {
164 if (d == t5iov_pciids[i].device) {
165 device_set_desc(dev, t5iov_pciids[i].desc);
166 device_quiet(dev);
167 return (BUS_PROBE_DEFAULT);
168 }
169 }
170 return (ENXIO);
171 }
172
173 static int
t6iov_probe(device_t dev)174 t6iov_probe(device_t dev)
175 {
176 uint16_t d;
177 size_t i;
178
179 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
180 return (ENXIO);
181
182 d = pci_get_device(dev);
183 for (i = 0; i < nitems(t6iov_pciids); i++) {
184 if (d == t6iov_pciids[i].device) {
185 device_set_desc(dev, t6iov_pciids[i].desc);
186 device_quiet(dev);
187 return (BUS_PROBE_DEFAULT);
188 }
189 }
190 return (ENXIO);
191 }
192
193 static int
t4iov_attach(device_t dev)194 t4iov_attach(device_t dev)
195 {
196 struct t4iov_softc *sc;
197 uint32_t pl_rev, whoami;
198 int error;
199
200 sc = device_get_softc(dev);
201 sc->sc_dev = dev;
202
203 sc->regs_rid = PCIR_BAR(0);
204 sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
205 &sc->regs_rid, RF_ACTIVE);
206 if (sc->regs_res == NULL) {
207 device_printf(dev, "cannot map registers.\n");
208 return (ENXIO);
209 }
210 sc->bt = rman_get_bustag(sc->regs_res);
211 sc->bh = rman_get_bushandle(sc->regs_res);
212
213 pl_rev = t4iov_read_reg(sc, A_PL_REV);
214 whoami = t4iov_read_reg(sc, A_PL_WHOAMI);
215 if (G_CHIPID(pl_rev) <= CHELSIO_T5)
216 sc->pf = G_SOURCEPF(whoami);
217 else
218 sc->pf = G_T6_SOURCEPF(whoami);
219
220 sc->sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev),
221 pci_get_slot(dev), 4);
222 if (sc->sc_main == NULL) {
223 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
224 sc->regs_res);
225 return (ENXIO);
226 }
227 if (T4_IS_MAIN_READY(sc->sc_main) == 0) {
228 error = t4iov_attach_child(dev);
229 if (error != 0)
230 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
231 sc->regs_res);
232 return (error);
233 }
234 return (0);
235 }
236
237 static int
t4iov_attach_child(device_t dev)238 t4iov_attach_child(device_t dev)
239 {
240 struct t4iov_softc *sc;
241 #ifdef PCI_IOV
242 nvlist_t *pf_schema, *vf_schema;
243 #endif
244 device_t pdev;
245 int error;
246
247 sc = device_get_softc(dev);
248 MPASS(!sc->sc_attached);
249
250 /*
251 * PF0-3 are associated with a specific port on the NIC (PF0
252 * with port 0, etc.). Ask the PF4 driver for the device for
253 * this function's associated port to determine if the port is
254 * present.
255 */
256 error = T4_READ_PORT_DEVICE(sc->sc_main, pci_get_function(dev), &pdev);
257 if (error)
258 return (0);
259
260 #ifdef PCI_IOV
261 pf_schema = pci_iov_schema_alloc_node();
262 vf_schema = pci_iov_schema_alloc_node();
263 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL);
264 pci_iov_schema_add_vlan(vf_schema, "vlan", 0, 0);
265 error = pci_iov_attach_name(dev, pf_schema, vf_schema, "%s",
266 device_get_nameunit(pdev));
267 if (error) {
268 device_printf(dev, "Failed to initialize SR-IOV: %d\n", error);
269 return (0);
270 }
271 #endif
272
273 sc->sc_attached = true;
274 return (0);
275 }
276
277 static int
t4iov_detach_child(device_t dev)278 t4iov_detach_child(device_t dev)
279 {
280 struct t4iov_softc *sc;
281 #ifdef PCI_IOV
282 int error;
283 #endif
284
285 sc = device_get_softc(dev);
286 if (!sc->sc_attached)
287 return (0);
288
289 #ifdef PCI_IOV
290 error = pci_iov_detach(dev);
291 if (error != 0) {
292 device_printf(dev, "Failed to disable SR-IOV\n");
293 return (error);
294 }
295 #endif
296
297 sc->sc_attached = false;
298 return (0);
299 }
300
301 static int
t4iov_detach(device_t dev)302 t4iov_detach(device_t dev)
303 {
304 struct t4iov_softc *sc;
305 int error;
306
307 sc = device_get_softc(dev);
308 if (sc->sc_attached) {
309 error = t4iov_detach_child(dev);
310 if (error)
311 return (error);
312 }
313 if (sc->regs_res) {
314 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
315 sc->regs_res);
316 }
317 return (0);
318 }
319
320 #ifdef PCI_IOV
321 static int
t4iov_iov_init(device_t dev,uint16_t num_vfs,const struct nvlist * config)322 t4iov_iov_init(device_t dev, uint16_t num_vfs, const struct nvlist *config)
323 {
324
325 /* XXX: The Linux driver sets up a vf_monitor task on T4 adapters. */
326 return (0);
327 }
328
329 static void
t4iov_iov_uninit(device_t dev)330 t4iov_iov_uninit(device_t dev)
331 {
332 }
333
334 static int
t4iov_add_vf(device_t dev,uint16_t vfnum,const struct nvlist * config)335 t4iov_add_vf(device_t dev, uint16_t vfnum, const struct nvlist *config)
336 {
337 const void *mac;
338 struct t4iov_softc *sc;
339 struct adapter *adap;
340 uint8_t ma[ETHER_ADDR_LEN];
341 size_t size;
342 int rc;
343
344 sc = device_get_softc(dev);
345 MPASS(sc->sc_attached);
346 MPASS(sc->sc_main != NULL);
347 adap = device_get_softc(sc->sc_main);
348
349 if (nvlist_exists_binary(config, "mac-addr")) {
350 mac = nvlist_get_binary(config, "mac-addr", &size);
351 bcopy(mac, ma, ETHER_ADDR_LEN);
352
353 if (begin_synchronized_op(adap, NULL, SLEEP_OK | INTR_OK,
354 "t4vfma") != 0)
355 return (ENXIO);
356 rc = -t4_set_vf_mac(adap, sc->pf, vfnum + 1, 1, ma);
357 end_synchronized_op(adap, 0);
358 if (rc != 0) {
359 device_printf(dev,
360 "Failed to set VF%d MAC address to "
361 "%02x:%02x:%02x:%02x:%02x:%02x, rc = %d\n", vfnum,
362 ma[0], ma[1], ma[2], ma[3], ma[4], ma[5], rc);
363 return (rc);
364 }
365 }
366
367 if (nvlist_exists_number(config, "vlan")) {
368 uint16_t vlan = nvlist_get_number(config, "vlan");
369
370 /* We can't restrict to VID 0 */
371 if (vlan == DOT1Q_VID_NULL)
372 return (ENOTSUP);
373
374 if (vlan == VF_VLAN_TRUNK)
375 vlan = DOT1Q_VID_NULL;
376
377 if (begin_synchronized_op(adap, NULL, SLEEP_OK | INTR_OK,
378 "t4vfvl") != 0)
379 return (ENXIO);
380 rc = t4_set_vlan_acl(adap, sc->pf, vfnum + 1, vlan);
381 end_synchronized_op(adap, 0);
382 if (rc != 0) {
383 device_printf(dev,
384 "Failed to set VF%d VLAN to %d, rc = %d\n",
385 vfnum, vlan, rc);
386 return (rc);
387 }
388 }
389
390 return (0);
391 }
392 #endif
393
394 static device_method_t t4iov_methods[] = {
395 DEVMETHOD(device_probe, t4iov_probe),
396 DEVMETHOD(device_attach, t4iov_attach),
397 DEVMETHOD(device_detach, t4iov_detach),
398
399 #ifdef PCI_IOV
400 DEVMETHOD(pci_iov_init, t4iov_iov_init),
401 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
402 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
403 #endif
404
405 DEVMETHOD(t4_attach_child, t4iov_attach_child),
406 DEVMETHOD(t4_detach_child, t4iov_detach_child),
407
408 DEVMETHOD_END
409 };
410
411 static driver_t t4iov_driver = {
412 "t4iov",
413 t4iov_methods,
414 sizeof(struct t4iov_softc)
415 };
416
417 static device_method_t t5iov_methods[] = {
418 DEVMETHOD(device_probe, t5iov_probe),
419 DEVMETHOD(device_attach, t4iov_attach),
420 DEVMETHOD(device_detach, t4iov_detach),
421
422 #ifdef PCI_IOV
423 DEVMETHOD(pci_iov_init, t4iov_iov_init),
424 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
425 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
426 #endif
427
428 DEVMETHOD(t4_attach_child, t4iov_attach_child),
429 DEVMETHOD(t4_detach_child, t4iov_detach_child),
430
431 DEVMETHOD_END
432 };
433
434 static driver_t t5iov_driver = {
435 "t5iov",
436 t5iov_methods,
437 sizeof(struct t4iov_softc)
438 };
439
440 static device_method_t t6iov_methods[] = {
441 DEVMETHOD(device_probe, t6iov_probe),
442 DEVMETHOD(device_attach, t4iov_attach),
443 DEVMETHOD(device_detach, t4iov_detach),
444
445 #ifdef PCI_IOV
446 DEVMETHOD(pci_iov_init, t4iov_iov_init),
447 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
448 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
449 #endif
450
451 DEVMETHOD(t4_attach_child, t4iov_attach_child),
452 DEVMETHOD(t4_detach_child, t4iov_detach_child),
453
454 DEVMETHOD_END
455 };
456
457 static driver_t t6iov_driver = {
458 "t6iov",
459 t6iov_methods,
460 sizeof(struct t4iov_softc)
461 };
462
463 DRIVER_MODULE(t4iov, pci, t4iov_driver, 0, 0);
464 MODULE_VERSION(t4iov, 1);
465
466 DRIVER_MODULE(t5iov, pci, t5iov_driver, 0, 0);
467 MODULE_VERSION(t5iov, 1);
468
469 DRIVER_MODULE(t6iov, pci, t6iov_driver, 0, 0);
470 MODULE_VERSION(t6iov, 1);
471