1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3 * Copyright 2020-2021 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include <linux/types.h>
25 #include <linux/sched/task.h>
26 #include <linux/dynamic_debug.h>
27 #include <drm/ttm/ttm_tt.h>
28 #include <drm/drm_exec.h>
29
30 #include "amdgpu_sync.h"
31 #include "amdgpu_object.h"
32 #include "amdgpu_vm.h"
33 #include "amdgpu_hmm.h"
34 #include "amdgpu.h"
35 #include "amdgpu_xgmi.h"
36 #include "kfd_priv.h"
37 #include "kfd_svm.h"
38 #include "kfd_migrate.h"
39 #include "kfd_smi_events.h"
40
41 #ifdef dev_fmt
42 #undef dev_fmt
43 #endif
44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__
45
46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1
47
48 /* Long enough to ensure no retry fault comes after svm range is restored and
49 * page table is updated.
50 */
51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC)
52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG)
53 #define dynamic_svm_range_dump(svms) \
54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
55 #else
56 #define dynamic_svm_range_dump(svms) \
57 do { if (0) svm_range_debug_dump(svms); } while (0)
58 #endif
59
60 /* Giant svm range split into smaller ranges based on this, it is decided using
61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to
62 * power of 2MB.
63 */
64 static uint64_t max_svm_range_pages;
65
66 struct criu_svm_metadata {
67 struct list_head list;
68 struct kfd_criu_svm_range_priv_data data;
69 };
70
71 static void svm_range_evict_svm_bo_worker(struct work_struct *work);
72 static bool
73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
74 const struct mmu_notifier_range *range,
75 unsigned long cur_seq);
76 static int
77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
78 uint64_t *bo_s, uint64_t *bo_l);
79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = {
80 .invalidate = svm_range_cpu_invalidate_pagetables,
81 };
82
83 /**
84 * svm_range_unlink - unlink svm_range from lists and interval tree
85 * @prange: svm range structure to be removed
86 *
87 * Remove the svm_range from the svms and svm_bo lists and the svms
88 * interval tree.
89 *
90 * Context: The caller must hold svms->lock
91 */
svm_range_unlink(struct svm_range * prange)92 static void svm_range_unlink(struct svm_range *prange)
93 {
94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
95 prange, prange->start, prange->last);
96
97 if (prange->svm_bo) {
98 spin_lock(&prange->svm_bo->list_lock);
99 list_del(&prange->svm_bo_list);
100 spin_unlock(&prange->svm_bo->list_lock);
101 }
102
103 list_del(&prange->list);
104 if (prange->it_node.start != 0 && prange->it_node.last != 0)
105 interval_tree_remove(&prange->it_node, &prange->svms->objects);
106 }
107
108 static void
svm_range_add_notifier_locked(struct mm_struct * mm,struct svm_range * prange)109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange)
110 {
111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
112 prange, prange->start, prange->last);
113
114 mmu_interval_notifier_insert_locked(&prange->notifier, mm,
115 prange->start << PAGE_SHIFT,
116 prange->npages << PAGE_SHIFT,
117 &svm_range_mn_ops);
118 }
119
120 /**
121 * svm_range_add_to_svms - add svm range to svms
122 * @prange: svm range structure to be added
123 *
124 * Add the svm range to svms interval tree and link list
125 *
126 * Context: The caller must hold svms->lock
127 */
svm_range_add_to_svms(struct svm_range * prange)128 static void svm_range_add_to_svms(struct svm_range *prange)
129 {
130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
131 prange, prange->start, prange->last);
132
133 list_move_tail(&prange->list, &prange->svms->list);
134 prange->it_node.start = prange->start;
135 prange->it_node.last = prange->last;
136 interval_tree_insert(&prange->it_node, &prange->svms->objects);
137 }
138
svm_range_remove_notifier(struct svm_range * prange)139 static void svm_range_remove_notifier(struct svm_range *prange)
140 {
141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n",
142 prange->svms, prange,
143 prange->notifier.interval_tree.start >> PAGE_SHIFT,
144 prange->notifier.interval_tree.last >> PAGE_SHIFT);
145
146 if (prange->notifier.interval_tree.start != 0 &&
147 prange->notifier.interval_tree.last != 0)
148 mmu_interval_notifier_remove(&prange->notifier);
149 }
150
151 static bool
svm_is_valid_dma_mapping_addr(struct device * dev,dma_addr_t dma_addr)152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr)
153 {
154 return dma_addr && !dma_mapping_error(dev, dma_addr) &&
155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN);
156 }
157
158 static int
svm_range_dma_map_dev(struct amdgpu_device * adev,struct svm_range * prange,unsigned long offset,unsigned long npages,unsigned long * hmm_pfns,uint32_t gpuidx)159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange,
160 unsigned long offset, unsigned long npages,
161 unsigned long *hmm_pfns, uint32_t gpuidx)
162 {
163 enum dma_data_direction dir = DMA_BIDIRECTIONAL;
164 dma_addr_t *addr = prange->dma_addr[gpuidx];
165 struct device *dev = adev->dev;
166 struct page *page;
167 int i, r;
168
169 if (!addr) {
170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL);
171 if (!addr)
172 return -ENOMEM;
173 prange->dma_addr[gpuidx] = addr;
174 }
175
176 addr += offset;
177 for (i = 0; i < npages; i++) {
178 if (svm_is_valid_dma_mapping_addr(dev, addr[i]))
179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir);
180
181 page = hmm_pfn_to_page(hmm_pfns[i]);
182 if (is_zone_device_page(page)) {
183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev;
184
185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) +
186 bo_adev->vm_manager.vram_base_offset -
187 bo_adev->kfd.pgmap.range.start;
188 addr[i] |= SVM_RANGE_VRAM_DOMAIN;
189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]);
190 continue;
191 }
192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
193 r = dma_mapping_error(dev, addr[i]);
194 if (r) {
195 dev_err(dev, "failed %d dma_map_page\n", r);
196 return r;
197 }
198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n",
199 addr[i] >> PAGE_SHIFT, page_to_pfn(page));
200 }
201
202 return 0;
203 }
204
205 static int
svm_range_dma_map(struct svm_range * prange,unsigned long * bitmap,unsigned long offset,unsigned long npages,unsigned long * hmm_pfns)206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap,
207 unsigned long offset, unsigned long npages,
208 unsigned long *hmm_pfns)
209 {
210 struct kfd_process *p;
211 uint32_t gpuidx;
212 int r;
213
214 p = container_of(prange->svms, struct kfd_process, svms);
215
216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
217 struct kfd_process_device *pdd;
218
219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
220 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
221 if (!pdd) {
222 pr_debug("failed to find device idx %d\n", gpuidx);
223 return -EINVAL;
224 }
225
226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages,
227 hmm_pfns, gpuidx);
228 if (r)
229 break;
230 }
231
232 return r;
233 }
234
svm_range_dma_unmap_dev(struct device * dev,dma_addr_t * dma_addr,unsigned long offset,unsigned long npages)235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr,
236 unsigned long offset, unsigned long npages)
237 {
238 enum dma_data_direction dir = DMA_BIDIRECTIONAL;
239 int i;
240
241 if (!dma_addr)
242 return;
243
244 for (i = offset; i < offset + npages; i++) {
245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i]))
246 continue;
247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT);
248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir);
249 dma_addr[i] = 0;
250 }
251 }
252
svm_range_dma_unmap(struct svm_range * prange)253 void svm_range_dma_unmap(struct svm_range *prange)
254 {
255 struct kfd_process_device *pdd;
256 dma_addr_t *dma_addr;
257 struct device *dev;
258 struct kfd_process *p;
259 uint32_t gpuidx;
260
261 p = container_of(prange->svms, struct kfd_process, svms);
262
263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
264 dma_addr = prange->dma_addr[gpuidx];
265 if (!dma_addr)
266 continue;
267
268 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
269 if (!pdd) {
270 pr_debug("failed to find device idx %d\n", gpuidx);
271 continue;
272 }
273 dev = &pdd->dev->adev->pdev->dev;
274
275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages);
276 }
277 }
278
svm_range_free(struct svm_range * prange,bool do_unmap)279 static void svm_range_free(struct svm_range *prange, bool do_unmap)
280 {
281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT;
282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms);
283 uint32_t gpuidx;
284
285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange,
286 prange->start, prange->last);
287
288 svm_range_vram_node_free(prange);
289 if (do_unmap)
290 svm_range_dma_unmap(prange);
291
292 if (do_unmap && !p->xnack_enabled) {
293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size);
294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
296 }
297
298 /* free dma_addr array for each gpu */
299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
300 if (prange->dma_addr[gpuidx]) {
301 kvfree(prange->dma_addr[gpuidx]);
302 prange->dma_addr[gpuidx] = NULL;
303 }
304 }
305
306 mutex_destroy(&prange->lock);
307 mutex_destroy(&prange->migrate_mutex);
308 kfree(prange);
309 }
310
311 static void
svm_range_set_default_attributes(struct svm_range_list * svms,int32_t * location,int32_t * prefetch_loc,uint8_t * granularity,uint32_t * flags)312 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location,
313 int32_t *prefetch_loc, uint8_t *granularity,
314 uint32_t *flags)
315 {
316 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
317 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
318 *granularity = svms->default_granularity;
319 *flags =
320 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT;
321 }
322
323 static struct
svm_range_new(struct svm_range_list * svms,uint64_t start,uint64_t last,bool update_mem_usage)324 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start,
325 uint64_t last, bool update_mem_usage)
326 {
327 uint64_t size = last - start + 1;
328 struct svm_range *prange;
329 struct kfd_process *p;
330
331 prange = kzalloc(sizeof(*prange), GFP_KERNEL);
332 if (!prange)
333 return NULL;
334
335 p = container_of(svms, struct kfd_process, svms);
336 if (!p->xnack_enabled && update_mem_usage &&
337 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT,
338 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) {
339 pr_info("SVM mapping failed, exceeds resident system memory limit\n");
340 kfree(prange);
341 return NULL;
342 }
343 prange->npages = size;
344 prange->svms = svms;
345 prange->start = start;
346 prange->last = last;
347 INIT_LIST_HEAD(&prange->list);
348 INIT_LIST_HEAD(&prange->update_list);
349 INIT_LIST_HEAD(&prange->svm_bo_list);
350 INIT_LIST_HEAD(&prange->deferred_list);
351 INIT_LIST_HEAD(&prange->child_list);
352 atomic_set(&prange->invalid, 0);
353 prange->validate_timestamp = 0;
354 prange->vram_pages = 0;
355 mutex_init(&prange->migrate_mutex);
356 mutex_init(&prange->lock);
357
358 if (p->xnack_enabled)
359 bitmap_copy(prange->bitmap_access, svms->bitmap_supported,
360 MAX_GPU_INSTANCE);
361
362 svm_range_set_default_attributes(svms, &prange->preferred_loc,
363 &prange->prefetch_loc,
364 &prange->granularity, &prange->flags);
365
366 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last);
367
368 return prange;
369 }
370
svm_bo_ref_unless_zero(struct svm_range_bo * svm_bo)371 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo)
372 {
373 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref))
374 return false;
375
376 return true;
377 }
378
svm_range_bo_release(struct kref * kref)379 static void svm_range_bo_release(struct kref *kref)
380 {
381 struct svm_range_bo *svm_bo;
382
383 svm_bo = container_of(kref, struct svm_range_bo, kref);
384 pr_debug("svm_bo 0x%p\n", svm_bo);
385
386 spin_lock(&svm_bo->list_lock);
387 while (!list_empty(&svm_bo->range_list)) {
388 struct svm_range *prange =
389 list_first_entry(&svm_bo->range_list,
390 struct svm_range, svm_bo_list);
391 /* list_del_init tells a concurrent svm_range_vram_node_new when
392 * it's safe to reuse the svm_bo pointer and svm_bo_list head.
393 */
394 list_del_init(&prange->svm_bo_list);
395 spin_unlock(&svm_bo->list_lock);
396
397 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
398 prange->start, prange->last);
399 mutex_lock(&prange->lock);
400 prange->svm_bo = NULL;
401 /* prange should not hold vram page now */
402 WARN_ONCE(prange->actual_loc, "prange should not hold vram page");
403 mutex_unlock(&prange->lock);
404
405 spin_lock(&svm_bo->list_lock);
406 }
407 spin_unlock(&svm_bo->list_lock);
408
409 if (mmget_not_zero(svm_bo->eviction_fence->mm)) {
410 struct kfd_process_device *pdd;
411 struct kfd_process *p;
412 struct mm_struct *mm;
413
414 mm = svm_bo->eviction_fence->mm;
415 /*
416 * The forked child process takes svm_bo device pages ref, svm_bo could be
417 * released after parent process is gone.
418 */
419 p = kfd_lookup_process_by_mm(mm);
420 if (p) {
421 pdd = kfd_get_process_device_data(svm_bo->node, p);
422 if (pdd)
423 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage);
424 kfd_unref_process(p);
425 }
426 mmput(mm);
427 }
428
429 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base))
430 /* We're not in the eviction worker. Signal the fence. */
431 dma_fence_signal(&svm_bo->eviction_fence->base);
432 dma_fence_put(&svm_bo->eviction_fence->base);
433 amdgpu_bo_unref(&svm_bo->bo);
434 kfree(svm_bo);
435 }
436
svm_range_bo_wq_release(struct work_struct * work)437 static void svm_range_bo_wq_release(struct work_struct *work)
438 {
439 struct svm_range_bo *svm_bo;
440
441 svm_bo = container_of(work, struct svm_range_bo, release_work);
442 svm_range_bo_release(&svm_bo->kref);
443 }
444
svm_range_bo_release_async(struct kref * kref)445 static void svm_range_bo_release_async(struct kref *kref)
446 {
447 struct svm_range_bo *svm_bo;
448
449 svm_bo = container_of(kref, struct svm_range_bo, kref);
450 pr_debug("svm_bo 0x%p\n", svm_bo);
451 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release);
452 schedule_work(&svm_bo->release_work);
453 }
454
svm_range_bo_unref_async(struct svm_range_bo * svm_bo)455 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo)
456 {
457 kref_put(&svm_bo->kref, svm_range_bo_release_async);
458 }
459
svm_range_bo_unref(struct svm_range_bo * svm_bo)460 static void svm_range_bo_unref(struct svm_range_bo *svm_bo)
461 {
462 if (svm_bo)
463 kref_put(&svm_bo->kref, svm_range_bo_release);
464 }
465
466 static bool
svm_range_validate_svm_bo(struct kfd_node * node,struct svm_range * prange)467 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange)
468 {
469 mutex_lock(&prange->lock);
470 if (!prange->svm_bo) {
471 mutex_unlock(&prange->lock);
472 return false;
473 }
474 if (prange->ttm_res) {
475 /* We still have a reference, all is well */
476 mutex_unlock(&prange->lock);
477 return true;
478 }
479 if (svm_bo_ref_unless_zero(prange->svm_bo)) {
480 /*
481 * Migrate from GPU to GPU, remove range from source svm_bo->node
482 * range list, and return false to allocate svm_bo from destination
483 * node.
484 */
485 if (prange->svm_bo->node != node) {
486 mutex_unlock(&prange->lock);
487
488 spin_lock(&prange->svm_bo->list_lock);
489 list_del_init(&prange->svm_bo_list);
490 spin_unlock(&prange->svm_bo->list_lock);
491
492 svm_range_bo_unref(prange->svm_bo);
493 return false;
494 }
495 if (READ_ONCE(prange->svm_bo->evicting)) {
496 struct dma_fence *f;
497 struct svm_range_bo *svm_bo;
498 /* The BO is getting evicted,
499 * we need to get a new one
500 */
501 mutex_unlock(&prange->lock);
502 svm_bo = prange->svm_bo;
503 f = dma_fence_get(&svm_bo->eviction_fence->base);
504 svm_range_bo_unref(prange->svm_bo);
505 /* wait for the fence to avoid long spin-loop
506 * at list_empty_careful
507 */
508 dma_fence_wait(f, false);
509 dma_fence_put(f);
510 } else {
511 /* The BO was still around and we got
512 * a new reference to it
513 */
514 mutex_unlock(&prange->lock);
515 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n",
516 prange->svms, prange->start, prange->last);
517
518 prange->ttm_res = prange->svm_bo->bo->tbo.resource;
519 return true;
520 }
521
522 } else {
523 mutex_unlock(&prange->lock);
524 }
525
526 /* We need a new svm_bo. Spin-loop to wait for concurrent
527 * svm_range_bo_release to finish removing this range from
528 * its range list and set prange->svm_bo to null. After this,
529 * it is safe to reuse the svm_bo pointer and svm_bo_list head.
530 */
531 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo)
532 cond_resched();
533
534 return false;
535 }
536
svm_range_bo_new(void)537 static struct svm_range_bo *svm_range_bo_new(void)
538 {
539 struct svm_range_bo *svm_bo;
540
541 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL);
542 if (!svm_bo)
543 return NULL;
544
545 kref_init(&svm_bo->kref);
546 INIT_LIST_HEAD(&svm_bo->range_list);
547 spin_lock_init(&svm_bo->list_lock);
548
549 return svm_bo;
550 }
551
552 int
svm_range_vram_node_new(struct kfd_node * node,struct svm_range * prange,bool clear)553 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange,
554 bool clear)
555 {
556 struct kfd_process_device *pdd;
557 struct amdgpu_bo_param bp;
558 struct svm_range_bo *svm_bo;
559 struct amdgpu_bo_user *ubo;
560 struct amdgpu_bo *bo;
561 struct kfd_process *p;
562 struct mm_struct *mm;
563 int r;
564
565 p = container_of(prange->svms, struct kfd_process, svms);
566 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n",
567 p->lead_thread->pid, prange->svms,
568 prange->start, prange->last);
569
570 if (svm_range_validate_svm_bo(node, prange))
571 return 0;
572
573 svm_bo = svm_range_bo_new();
574 if (!svm_bo) {
575 pr_debug("failed to alloc svm bo\n");
576 return -ENOMEM;
577 }
578 mm = get_task_mm(p->lead_thread);
579 if (!mm) {
580 pr_debug("failed to get mm\n");
581 kfree(svm_bo);
582 return -ESRCH;
583 }
584 svm_bo->node = node;
585 svm_bo->eviction_fence =
586 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1),
587 mm,
588 svm_bo);
589 mmput(mm);
590 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker);
591 svm_bo->evicting = 0;
592 memset(&bp, 0, sizeof(bp));
593 bp.size = prange->npages * PAGE_SIZE;
594 bp.byte_align = PAGE_SIZE;
595 bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
596 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
597 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0;
598 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE;
599 bp.type = ttm_bo_type_device;
600 bp.resv = NULL;
601 if (node->xcp)
602 bp.xcp_id_plus1 = node->xcp->id + 1;
603
604 r = amdgpu_bo_create_user(node->adev, &bp, &ubo);
605 if (r) {
606 pr_debug("failed %d to create bo\n", r);
607 goto create_bo_failed;
608 }
609 bo = &ubo->bo;
610
611 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n",
612 bo->tbo.resource->start << PAGE_SHIFT, bp.size,
613 bp.xcp_id_plus1 - 1);
614
615 r = amdgpu_bo_reserve(bo, true);
616 if (r) {
617 pr_debug("failed %d to reserve bo\n", r);
618 goto reserve_bo_failed;
619 }
620
621 if (clear) {
622 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false);
623 if (r) {
624 pr_debug("failed %d to sync bo\n", r);
625 amdgpu_bo_unreserve(bo);
626 goto reserve_bo_failed;
627 }
628 }
629
630 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
631 if (r) {
632 pr_debug("failed %d to reserve bo\n", r);
633 amdgpu_bo_unreserve(bo);
634 goto reserve_bo_failed;
635 }
636 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true);
637
638 amdgpu_bo_unreserve(bo);
639
640 svm_bo->bo = bo;
641 prange->svm_bo = svm_bo;
642 prange->ttm_res = bo->tbo.resource;
643 prange->offset = 0;
644
645 spin_lock(&svm_bo->list_lock);
646 list_add(&prange->svm_bo_list, &svm_bo->range_list);
647 spin_unlock(&svm_bo->list_lock);
648
649 pdd = svm_range_get_pdd_by_node(prange, node);
650 if (pdd)
651 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage);
652
653 return 0;
654
655 reserve_bo_failed:
656 amdgpu_bo_unref(&bo);
657 create_bo_failed:
658 dma_fence_put(&svm_bo->eviction_fence->base);
659 kfree(svm_bo);
660 prange->ttm_res = NULL;
661
662 return r;
663 }
664
svm_range_vram_node_free(struct svm_range * prange)665 void svm_range_vram_node_free(struct svm_range *prange)
666 {
667 /* serialize prange->svm_bo unref */
668 mutex_lock(&prange->lock);
669 /* prange->svm_bo has not been unref */
670 if (prange->ttm_res) {
671 prange->ttm_res = NULL;
672 mutex_unlock(&prange->lock);
673 svm_range_bo_unref(prange->svm_bo);
674 } else
675 mutex_unlock(&prange->lock);
676 }
677
678 struct kfd_node *
svm_range_get_node_by_id(struct svm_range * prange,uint32_t gpu_id)679 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id)
680 {
681 struct kfd_process *p;
682 struct kfd_process_device *pdd;
683
684 p = container_of(prange->svms, struct kfd_process, svms);
685 pdd = kfd_process_device_data_by_id(p, gpu_id);
686 if (!pdd) {
687 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id);
688 return NULL;
689 }
690
691 return pdd->dev;
692 }
693
694 struct kfd_process_device *
svm_range_get_pdd_by_node(struct svm_range * prange,struct kfd_node * node)695 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node)
696 {
697 struct kfd_process *p;
698
699 p = container_of(prange->svms, struct kfd_process, svms);
700
701 return kfd_get_process_device_data(node, p);
702 }
703
svm_range_bo_validate(void * param,struct amdgpu_bo * bo)704 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo)
705 {
706 struct ttm_operation_ctx ctx = { false, false };
707
708 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
709
710 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
711 }
712
713 static int
svm_range_check_attr(struct kfd_process * p,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs)714 svm_range_check_attr(struct kfd_process *p,
715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
716 {
717 uint32_t i;
718
719 for (i = 0; i < nattr; i++) {
720 uint32_t val = attrs[i].value;
721 int gpuidx = MAX_GPU_INSTANCE;
722
723 switch (attrs[i].type) {
724 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
725 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM &&
726 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED)
727 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
728 break;
729 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
730 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM)
731 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
732 break;
733 case KFD_IOCTL_SVM_ATTR_ACCESS:
734 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
735 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
736 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
737 break;
738 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
739 break;
740 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
741 break;
742 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
743 break;
744 default:
745 pr_debug("unknown attr type 0x%x\n", attrs[i].type);
746 return -EINVAL;
747 }
748
749 if (gpuidx < 0) {
750 pr_debug("no GPU 0x%x found\n", val);
751 return -EINVAL;
752 } else if (gpuidx < MAX_GPU_INSTANCE &&
753 !test_bit(gpuidx, p->svms.bitmap_supported)) {
754 pr_debug("GPU 0x%x not supported\n", val);
755 return -EINVAL;
756 }
757 }
758
759 return 0;
760 }
761
762 static void
svm_range_apply_attrs(struct kfd_process * p,struct svm_range * prange,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs,bool * update_mapping)763 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange,
764 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
765 bool *update_mapping)
766 {
767 uint32_t i;
768 int gpuidx;
769
770 for (i = 0; i < nattr; i++) {
771 switch (attrs[i].type) {
772 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
773 prange->preferred_loc = attrs[i].value;
774 break;
775 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
776 prange->prefetch_loc = attrs[i].value;
777 break;
778 case KFD_IOCTL_SVM_ATTR_ACCESS:
779 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
780 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
781 if (!p->xnack_enabled)
782 *update_mapping = true;
783
784 gpuidx = kfd_process_gpuidx_from_gpuid(p,
785 attrs[i].value);
786 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
787 bitmap_clear(prange->bitmap_access, gpuidx, 1);
788 bitmap_clear(prange->bitmap_aip, gpuidx, 1);
789 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
790 bitmap_set(prange->bitmap_access, gpuidx, 1);
791 bitmap_clear(prange->bitmap_aip, gpuidx, 1);
792 } else {
793 bitmap_clear(prange->bitmap_access, gpuidx, 1);
794 bitmap_set(prange->bitmap_aip, gpuidx, 1);
795 }
796 break;
797 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
798 *update_mapping = true;
799 prange->flags |= attrs[i].value;
800 break;
801 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
802 *update_mapping = true;
803 prange->flags &= ~attrs[i].value;
804 break;
805 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
806 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F);
807 break;
808 default:
809 WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
810 }
811 }
812 }
813
814 static bool
svm_range_is_same_attrs(struct kfd_process * p,struct svm_range * prange,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs)815 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange,
816 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
817 {
818 uint32_t i;
819 int gpuidx;
820
821 for (i = 0; i < nattr; i++) {
822 switch (attrs[i].type) {
823 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
824 if (prange->preferred_loc != attrs[i].value)
825 return false;
826 break;
827 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
828 /* Prefetch should always trigger a migration even
829 * if the value of the attribute didn't change.
830 */
831 return false;
832 case KFD_IOCTL_SVM_ATTR_ACCESS:
833 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
834 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
835 gpuidx = kfd_process_gpuidx_from_gpuid(p,
836 attrs[i].value);
837 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
838 if (test_bit(gpuidx, prange->bitmap_access) ||
839 test_bit(gpuidx, prange->bitmap_aip))
840 return false;
841 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
842 if (!test_bit(gpuidx, prange->bitmap_access))
843 return false;
844 } else {
845 if (!test_bit(gpuidx, prange->bitmap_aip))
846 return false;
847 }
848 break;
849 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
850 if ((prange->flags & attrs[i].value) != attrs[i].value)
851 return false;
852 break;
853 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
854 if ((prange->flags & attrs[i].value) != 0)
855 return false;
856 break;
857 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
858 if (prange->granularity != attrs[i].value)
859 return false;
860 break;
861 default:
862 WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
863 }
864 }
865
866 return true;
867 }
868
869 /**
870 * svm_range_debug_dump - print all range information from svms
871 * @svms: svm range list header
872 *
873 * debug output svm range start, end, prefetch location from svms
874 * interval tree and link list
875 *
876 * Context: The caller must hold svms->lock
877 */
svm_range_debug_dump(struct svm_range_list * svms)878 static void svm_range_debug_dump(struct svm_range_list *svms)
879 {
880 struct interval_tree_node *node;
881 struct svm_range *prange;
882
883 pr_debug("dump svms 0x%p list\n", svms);
884 pr_debug("range\tstart\tpage\tend\t\tlocation\n");
885
886 list_for_each_entry(prange, &svms->list, list) {
887 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
888 prange, prange->start, prange->npages,
889 prange->start + prange->npages - 1,
890 prange->actual_loc);
891 }
892
893 pr_debug("dump svms 0x%p interval tree\n", svms);
894 pr_debug("range\tstart\tpage\tend\t\tlocation\n");
895 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL);
896 while (node) {
897 prange = container_of(node, struct svm_range, it_node);
898 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
899 prange, prange->start, prange->npages,
900 prange->start + prange->npages - 1,
901 prange->actual_loc);
902 node = interval_tree_iter_next(node, 0, ~0ULL);
903 }
904 }
905
906 static void *
svm_range_copy_array(void * psrc,size_t size,uint64_t num_elements,uint64_t offset,uint64_t * vram_pages)907 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements,
908 uint64_t offset, uint64_t *vram_pages)
909 {
910 unsigned char *src = (unsigned char *)psrc + offset;
911 unsigned char *dst;
912 uint64_t i;
913
914 dst = kvmalloc_array(num_elements, size, GFP_KERNEL);
915 if (!dst)
916 return NULL;
917
918 if (!vram_pages) {
919 memcpy(dst, src, num_elements * size);
920 return (void *)dst;
921 }
922
923 *vram_pages = 0;
924 for (i = 0; i < num_elements; i++) {
925 dma_addr_t *temp;
926 temp = (dma_addr_t *)dst + i;
927 *temp = *((dma_addr_t *)src + i);
928 if (*temp&SVM_RANGE_VRAM_DOMAIN)
929 (*vram_pages)++;
930 }
931
932 return (void *)dst;
933 }
934
935 static int
svm_range_copy_dma_addrs(struct svm_range * dst,struct svm_range * src)936 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src)
937 {
938 int i;
939
940 for (i = 0; i < MAX_GPU_INSTANCE; i++) {
941 if (!src->dma_addr[i])
942 continue;
943 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i],
944 sizeof(*src->dma_addr[i]), src->npages, 0, NULL);
945 if (!dst->dma_addr[i])
946 return -ENOMEM;
947 }
948
949 return 0;
950 }
951
952 static int
svm_range_split_array(void * ppnew,void * ppold,size_t size,uint64_t old_start,uint64_t old_n,uint64_t new_start,uint64_t new_n,uint64_t * new_vram_pages)953 svm_range_split_array(void *ppnew, void *ppold, size_t size,
954 uint64_t old_start, uint64_t old_n,
955 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages)
956 {
957 unsigned char *new, *old, *pold;
958 uint64_t d;
959
960 if (!ppold)
961 return 0;
962 pold = *(unsigned char **)ppold;
963 if (!pold)
964 return 0;
965
966 d = (new_start - old_start) * size;
967 /* get dma addr array for new range and calculte its vram page number */
968 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages);
969 if (!new)
970 return -ENOMEM;
971 d = (new_start == old_start) ? new_n * size : 0;
972 old = svm_range_copy_array(pold, size, old_n, d, NULL);
973 if (!old) {
974 kvfree(new);
975 return -ENOMEM;
976 }
977 kvfree(pold);
978 *(void **)ppold = old;
979 *(void **)ppnew = new;
980
981 return 0;
982 }
983
984 static int
svm_range_split_pages(struct svm_range * new,struct svm_range * old,uint64_t start,uint64_t last)985 svm_range_split_pages(struct svm_range *new, struct svm_range *old,
986 uint64_t start, uint64_t last)
987 {
988 uint64_t npages = last - start + 1;
989 int i, r;
990
991 for (i = 0; i < MAX_GPU_INSTANCE; i++) {
992 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i],
993 sizeof(*old->dma_addr[i]), old->start,
994 npages, new->start, new->npages,
995 old->actual_loc ? &new->vram_pages : NULL);
996 if (r)
997 return r;
998 }
999 if (old->actual_loc)
1000 old->vram_pages -= new->vram_pages;
1001
1002 return 0;
1003 }
1004
1005 static int
svm_range_split_nodes(struct svm_range * new,struct svm_range * old,uint64_t start,uint64_t last)1006 svm_range_split_nodes(struct svm_range *new, struct svm_range *old,
1007 uint64_t start, uint64_t last)
1008 {
1009 uint64_t npages = last - start + 1;
1010
1011 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n",
1012 new->svms, new, new->start, start, last);
1013
1014 if (new->start == old->start) {
1015 new->offset = old->offset;
1016 old->offset += new->npages;
1017 } else {
1018 new->offset = old->offset + npages;
1019 }
1020
1021 new->svm_bo = svm_range_bo_ref(old->svm_bo);
1022 new->ttm_res = old->ttm_res;
1023
1024 spin_lock(&new->svm_bo->list_lock);
1025 list_add(&new->svm_bo_list, &new->svm_bo->range_list);
1026 spin_unlock(&new->svm_bo->list_lock);
1027
1028 return 0;
1029 }
1030
1031 /**
1032 * svm_range_split_adjust - split range and adjust
1033 *
1034 * @new: new range
1035 * @old: the old range
1036 * @start: the old range adjust to start address in pages
1037 * @last: the old range adjust to last address in pages
1038 *
1039 * Copy system memory dma_addr or vram ttm_res in old range to new
1040 * range from new_start up to size new->npages, the remaining old range is from
1041 * start to last
1042 *
1043 * Return:
1044 * 0 - OK, -ENOMEM - out of memory
1045 */
1046 static int
svm_range_split_adjust(struct svm_range * new,struct svm_range * old,uint64_t start,uint64_t last)1047 svm_range_split_adjust(struct svm_range *new, struct svm_range *old,
1048 uint64_t start, uint64_t last)
1049 {
1050 int r;
1051
1052 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n",
1053 new->svms, new->start, old->start, old->last, start, last);
1054
1055 if (new->start < old->start ||
1056 new->last > old->last) {
1057 WARN_ONCE(1, "invalid new range start or last\n");
1058 return -EINVAL;
1059 }
1060
1061 r = svm_range_split_pages(new, old, start, last);
1062 if (r)
1063 return r;
1064
1065 if (old->actual_loc && old->ttm_res) {
1066 r = svm_range_split_nodes(new, old, start, last);
1067 if (r)
1068 return r;
1069 }
1070
1071 old->npages = last - start + 1;
1072 old->start = start;
1073 old->last = last;
1074 new->flags = old->flags;
1075 new->preferred_loc = old->preferred_loc;
1076 new->prefetch_loc = old->prefetch_loc;
1077 new->actual_loc = old->actual_loc;
1078 new->granularity = old->granularity;
1079 new->mapped_to_gpu = old->mapped_to_gpu;
1080 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1081 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1082 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount));
1083
1084 return 0;
1085 }
1086
1087 /**
1088 * svm_range_split - split a range in 2 ranges
1089 *
1090 * @prange: the svm range to split
1091 * @start: the remaining range start address in pages
1092 * @last: the remaining range last address in pages
1093 * @new: the result new range generated
1094 *
1095 * Two cases only:
1096 * case 1: if start == prange->start
1097 * prange ==> prange[start, last]
1098 * new range [last + 1, prange->last]
1099 *
1100 * case 2: if last == prange->last
1101 * prange ==> prange[start, last]
1102 * new range [prange->start, start - 1]
1103 *
1104 * Return:
1105 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last
1106 */
1107 static int
svm_range_split(struct svm_range * prange,uint64_t start,uint64_t last,struct svm_range ** new)1108 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last,
1109 struct svm_range **new)
1110 {
1111 uint64_t old_start = prange->start;
1112 uint64_t old_last = prange->last;
1113 struct svm_range_list *svms;
1114 int r = 0;
1115
1116 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms,
1117 old_start, old_last, start, last);
1118
1119 if (old_start != start && old_last != last)
1120 return -EINVAL;
1121 if (start < old_start || last > old_last)
1122 return -EINVAL;
1123
1124 svms = prange->svms;
1125 if (old_start == start)
1126 *new = svm_range_new(svms, last + 1, old_last, false);
1127 else
1128 *new = svm_range_new(svms, old_start, start - 1, false);
1129 if (!*new)
1130 return -ENOMEM;
1131
1132 r = svm_range_split_adjust(*new, prange, start, last);
1133 if (r) {
1134 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n",
1135 r, old_start, old_last, start, last);
1136 svm_range_free(*new, false);
1137 *new = NULL;
1138 }
1139
1140 return r;
1141 }
1142
1143 static int
svm_range_split_tail(struct svm_range * prange,uint64_t new_last,struct list_head * insert_list,struct list_head * remap_list)1144 svm_range_split_tail(struct svm_range *prange, uint64_t new_last,
1145 struct list_head *insert_list, struct list_head *remap_list)
1146 {
1147 struct svm_range *tail = NULL;
1148 int r = svm_range_split(prange, prange->start, new_last, &tail);
1149
1150 if (!r) {
1151 list_add(&tail->list, insert_list);
1152 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity))
1153 list_add(&tail->update_list, remap_list);
1154 }
1155 return r;
1156 }
1157
1158 static int
svm_range_split_head(struct svm_range * prange,uint64_t new_start,struct list_head * insert_list,struct list_head * remap_list)1159 svm_range_split_head(struct svm_range *prange, uint64_t new_start,
1160 struct list_head *insert_list, struct list_head *remap_list)
1161 {
1162 struct svm_range *head = NULL;
1163 int r = svm_range_split(prange, new_start, prange->last, &head);
1164
1165 if (!r) {
1166 list_add(&head->list, insert_list);
1167 if (!IS_ALIGNED(new_start, 1UL << prange->granularity))
1168 list_add(&head->update_list, remap_list);
1169 }
1170 return r;
1171 }
1172
1173 static void
svm_range_add_child(struct svm_range * prange,struct mm_struct * mm,struct svm_range * pchild,enum svm_work_list_ops op)1174 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm,
1175 struct svm_range *pchild, enum svm_work_list_ops op)
1176 {
1177 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
1178 pchild, pchild->start, pchild->last, prange, op);
1179
1180 pchild->work_item.mm = mm;
1181 pchild->work_item.op = op;
1182 list_add_tail(&pchild->child_list, &prange->child_list);
1183 }
1184
1185 static bool
svm_nodes_in_same_hive(struct kfd_node * node_a,struct kfd_node * node_b)1186 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b)
1187 {
1188 return (node_a->adev == node_b->adev ||
1189 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev));
1190 }
1191
1192 static uint64_t
svm_range_get_pte_flags(struct kfd_node * node,struct svm_range * prange,int domain)1193 svm_range_get_pte_flags(struct kfd_node *node,
1194 struct svm_range *prange, int domain)
1195 {
1196 struct kfd_node *bo_node;
1197 uint32_t flags = prange->flags;
1198 uint32_t mapping_flags = 0;
1199 uint32_t gc_ip_version = KFD_GC_VERSION(node);
1200 uint64_t pte_flags;
1201 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN);
1202 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT);
1203 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT;
1204 unsigned int mtype_local;
1205
1206 if (domain == SVM_RANGE_VRAM_DOMAIN)
1207 bo_node = prange->svm_bo->node;
1208
1209 switch (gc_ip_version) {
1210 case IP_VERSION(9, 4, 1):
1211 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1212 if (bo_node == node) {
1213 mapping_flags |= coherent ?
1214 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1215 } else {
1216 mapping_flags |= coherent ?
1217 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1218 if (svm_nodes_in_same_hive(node, bo_node))
1219 snoop = true;
1220 }
1221 } else {
1222 mapping_flags |= coherent ?
1223 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1224 }
1225 break;
1226 case IP_VERSION(9, 4, 2):
1227 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1228 if (bo_node == node) {
1229 mapping_flags |= coherent ?
1230 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1231 if (node->adev->gmc.xgmi.connected_to_cpu)
1232 snoop = true;
1233 } else {
1234 mapping_flags |= coherent ?
1235 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1236 if (svm_nodes_in_same_hive(node, bo_node))
1237 snoop = true;
1238 }
1239 } else {
1240 mapping_flags |= coherent ?
1241 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1242 }
1243 break;
1244 case IP_VERSION(9, 4, 3):
1245 case IP_VERSION(9, 4, 4):
1246 case IP_VERSION(9, 5, 0):
1247 if (ext_coherent)
1248 mtype_local = AMDGPU_VM_MTYPE_CC;
1249 else
1250 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
1251 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1252 snoop = true;
1253 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1254 /* local HBM region close to partition */
1255 if (bo_node->adev == node->adev &&
1256 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id))
1257 mapping_flags |= mtype_local;
1258 /* local HBM region far from partition or remote XGMI GPU
1259 * with regular system scope coherence
1260 */
1261 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent)
1262 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1263 /* PCIe P2P on GPUs pre-9.5.0 */
1264 else if (gc_ip_version < IP_VERSION(9, 5, 0) &&
1265 !svm_nodes_in_same_hive(bo_node, node))
1266 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1267 /* Other remote memory */
1268 else
1269 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1270 /* system memory accessed by the APU */
1271 } else if (node->adev->flags & AMD_IS_APU) {
1272 /* On NUMA systems, locality is determined per-page
1273 * in amdgpu_gmc_override_vm_pte_flags
1274 */
1275 if (num_possible_nodes() <= 1)
1276 mapping_flags |= mtype_local;
1277 else
1278 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1279 /* system memory accessed by the dGPU */
1280 } else {
1281 if (gc_ip_version < IP_VERSION(9, 5, 0))
1282 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1283 else
1284 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1285 }
1286 break;
1287 case IP_VERSION(12, 0, 0):
1288 case IP_VERSION(12, 0, 1):
1289 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1290 break;
1291 default:
1292 mapping_flags |= coherent ?
1293 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1294 }
1295
1296 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE;
1297
1298 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO)
1299 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE;
1300 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC)
1301 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
1302
1303 pte_flags = AMDGPU_PTE_VALID;
1304 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM;
1305 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
1306 if (gc_ip_version >= IP_VERSION(12, 0, 0))
1307 pte_flags |= AMDGPU_PTE_IS_PTE;
1308
1309 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags);
1310 return pte_flags;
1311 }
1312
1313 static int
svm_range_unmap_from_gpu(struct amdgpu_device * adev,struct amdgpu_vm * vm,uint64_t start,uint64_t last,struct dma_fence ** fence)1314 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1315 uint64_t start, uint64_t last,
1316 struct dma_fence **fence)
1317 {
1318 uint64_t init_pte_value = 0;
1319
1320 pr_debug("[0x%llx 0x%llx]\n", start, last);
1321
1322 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start,
1323 last, init_pte_value, 0, 0, NULL, NULL,
1324 fence);
1325 }
1326
1327 static int
svm_range_unmap_from_gpus(struct svm_range * prange,unsigned long start,unsigned long last,uint32_t trigger)1328 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
1329 unsigned long last, uint32_t trigger)
1330 {
1331 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1332 struct kfd_process_device *pdd;
1333 struct dma_fence *fence = NULL;
1334 struct kfd_process *p;
1335 uint32_t gpuidx;
1336 int r = 0;
1337
1338 if (!prange->mapped_to_gpu) {
1339 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n",
1340 prange, prange->start, prange->last);
1341 return 0;
1342 }
1343
1344 if (prange->start == start && prange->last == last) {
1345 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange);
1346 prange->mapped_to_gpu = false;
1347 }
1348
1349 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
1350 MAX_GPU_INSTANCE);
1351 p = container_of(prange->svms, struct kfd_process, svms);
1352
1353 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1354 pr_debug("unmap from gpu idx 0x%x\n", gpuidx);
1355 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1356 if (!pdd) {
1357 pr_debug("failed to find device idx %d\n", gpuidx);
1358 return -EINVAL;
1359 }
1360
1361 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid,
1362 start, last, trigger);
1363
1364 r = svm_range_unmap_from_gpu(pdd->dev->adev,
1365 drm_priv_to_vm(pdd->drm_priv),
1366 start, last, &fence);
1367 if (r)
1368 break;
1369
1370 if (fence) {
1371 r = dma_fence_wait(fence, false);
1372 dma_fence_put(fence);
1373 fence = NULL;
1374 if (r)
1375 break;
1376 }
1377 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT);
1378 }
1379
1380 return r;
1381 }
1382
1383 static int
svm_range_map_to_gpu(struct kfd_process_device * pdd,struct svm_range * prange,unsigned long offset,unsigned long npages,bool readonly,dma_addr_t * dma_addr,struct amdgpu_device * bo_adev,struct dma_fence ** fence,bool flush_tlb)1384 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange,
1385 unsigned long offset, unsigned long npages, bool readonly,
1386 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev,
1387 struct dma_fence **fence, bool flush_tlb)
1388 {
1389 struct amdgpu_device *adev = pdd->dev->adev;
1390 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv);
1391 uint64_t pte_flags;
1392 unsigned long last_start;
1393 int last_domain;
1394 int r = 0;
1395 int64_t i, j;
1396
1397 last_start = prange->start + offset;
1398
1399 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms,
1400 last_start, last_start + npages - 1, readonly);
1401
1402 for (i = offset; i < offset + npages; i++) {
1403 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN;
1404 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN;
1405
1406 /* Collect all pages in the same address range and memory domain
1407 * that can be mapped with a single call to update mapping.
1408 */
1409 if (i < offset + npages - 1 &&
1410 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN))
1411 continue;
1412
1413 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n",
1414 last_start, prange->start + i, last_domain ? "GPU" : "CPU");
1415
1416 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain);
1417 if (readonly)
1418 pte_flags &= ~AMDGPU_PTE_WRITEABLE;
1419
1420 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n",
1421 prange->svms, last_start, prange->start + i,
1422 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0,
1423 pte_flags);
1424
1425 /* For dGPU mode, we use same vm_manager to allocate VRAM for
1426 * different memory partition based on fpfn/lpfn, we should use
1427 * same vm_manager.vram_base_offset regardless memory partition.
1428 */
1429 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true,
1430 NULL, last_start, prange->start + i,
1431 pte_flags,
1432 (last_start - prange->start) << PAGE_SHIFT,
1433 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0,
1434 NULL, dma_addr, &vm->last_update);
1435
1436 for (j = last_start - prange->start; j <= i; j++)
1437 dma_addr[j] |= last_domain;
1438
1439 if (r) {
1440 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
1441 goto out;
1442 }
1443 last_start = prange->start + i + 1;
1444 }
1445
1446 r = amdgpu_vm_update_pdes(adev, vm, false);
1447 if (r) {
1448 pr_debug("failed %d to update directories 0x%lx\n", r,
1449 prange->start);
1450 goto out;
1451 }
1452
1453 if (fence)
1454 *fence = dma_fence_get(vm->last_update);
1455
1456 out:
1457 return r;
1458 }
1459
1460 static int
svm_range_map_to_gpus(struct svm_range * prange,unsigned long offset,unsigned long npages,bool readonly,unsigned long * bitmap,bool wait,bool flush_tlb)1461 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset,
1462 unsigned long npages, bool readonly,
1463 unsigned long *bitmap, bool wait, bool flush_tlb)
1464 {
1465 struct kfd_process_device *pdd;
1466 struct amdgpu_device *bo_adev = NULL;
1467 struct kfd_process *p;
1468 struct dma_fence *fence = NULL;
1469 uint32_t gpuidx;
1470 int r = 0;
1471
1472 if (prange->svm_bo && prange->ttm_res)
1473 bo_adev = prange->svm_bo->node->adev;
1474
1475 p = container_of(prange->svms, struct kfd_process, svms);
1476 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1477 pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
1478 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1479 if (!pdd) {
1480 pr_debug("failed to find device idx %d\n", gpuidx);
1481 return -EINVAL;
1482 }
1483
1484 pdd = kfd_bind_process_to_device(pdd->dev, p);
1485 if (IS_ERR(pdd))
1486 return -EINVAL;
1487
1488 if (bo_adev && pdd->dev->adev != bo_adev &&
1489 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) {
1490 pr_debug("cannot map to device idx %d\n", gpuidx);
1491 continue;
1492 }
1493
1494 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly,
1495 prange->dma_addr[gpuidx],
1496 bo_adev, wait ? &fence : NULL,
1497 flush_tlb);
1498 if (r)
1499 break;
1500
1501 if (fence) {
1502 r = dma_fence_wait(fence, false);
1503 dma_fence_put(fence);
1504 fence = NULL;
1505 if (r) {
1506 pr_debug("failed %d to dma fence wait\n", r);
1507 break;
1508 }
1509 }
1510
1511 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY);
1512 }
1513
1514 return r;
1515 }
1516
1517 struct svm_validate_context {
1518 struct kfd_process *process;
1519 struct svm_range *prange;
1520 bool intr;
1521 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1522 struct drm_exec exec;
1523 };
1524
svm_range_reserve_bos(struct svm_validate_context * ctx,bool intr)1525 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr)
1526 {
1527 struct kfd_process_device *pdd;
1528 struct amdgpu_vm *vm;
1529 uint32_t gpuidx;
1530 int r;
1531
1532 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0);
1533 drm_exec_until_all_locked(&ctx->exec) {
1534 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1535 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1536 if (!pdd) {
1537 pr_debug("failed to find device idx %d\n", gpuidx);
1538 r = -EINVAL;
1539 goto unreserve_out;
1540 }
1541 vm = drm_priv_to_vm(pdd->drm_priv);
1542
1543 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2);
1544 drm_exec_retry_on_contention(&ctx->exec);
1545 if (unlikely(r)) {
1546 pr_debug("failed %d to reserve bo\n", r);
1547 goto unreserve_out;
1548 }
1549 }
1550 }
1551
1552 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1553 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1554 if (!pdd) {
1555 pr_debug("failed to find device idx %d\n", gpuidx);
1556 r = -EINVAL;
1557 goto unreserve_out;
1558 }
1559
1560 r = amdgpu_vm_validate(pdd->dev->adev,
1561 drm_priv_to_vm(pdd->drm_priv), NULL,
1562 svm_range_bo_validate, NULL);
1563 if (r) {
1564 pr_debug("failed %d validate pt bos\n", r);
1565 goto unreserve_out;
1566 }
1567 }
1568
1569 return 0;
1570
1571 unreserve_out:
1572 drm_exec_fini(&ctx->exec);
1573 return r;
1574 }
1575
svm_range_unreserve_bos(struct svm_validate_context * ctx)1576 static void svm_range_unreserve_bos(struct svm_validate_context *ctx)
1577 {
1578 drm_exec_fini(&ctx->exec);
1579 }
1580
kfd_svm_page_owner(struct kfd_process * p,int32_t gpuidx)1581 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx)
1582 {
1583 struct kfd_process_device *pdd;
1584
1585 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1586 if (!pdd)
1587 return NULL;
1588
1589 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev);
1590 }
1591
1592 /*
1593 * Validation+GPU mapping with concurrent invalidation (MMU notifiers)
1594 *
1595 * To prevent concurrent destruction or change of range attributes, the
1596 * svm_read_lock must be held. The caller must not hold the svm_write_lock
1597 * because that would block concurrent evictions and lead to deadlocks. To
1598 * serialize concurrent migrations or validations of the same range, the
1599 * prange->migrate_mutex must be held.
1600 *
1601 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its
1602 * eviction fence.
1603 *
1604 * The following sequence ensures race-free validation and GPU mapping:
1605 *
1606 * 1. Reserve page table (and SVM BO if range is in VRAM)
1607 * 2. hmm_range_fault to get page addresses (if system memory)
1608 * 3. DMA-map pages (if system memory)
1609 * 4-a. Take notifier lock
1610 * 4-b. Check that pages still valid (mmu_interval_read_retry)
1611 * 4-c. Check that the range was not split or otherwise invalidated
1612 * 4-d. Update GPU page table
1613 * 4.e. Release notifier lock
1614 * 5. Release page table (and SVM BO) reservation
1615 */
svm_range_validate_and_map(struct mm_struct * mm,unsigned long map_start,unsigned long map_last,struct svm_range * prange,int32_t gpuidx,bool intr,bool wait,bool flush_tlb)1616 static int svm_range_validate_and_map(struct mm_struct *mm,
1617 unsigned long map_start, unsigned long map_last,
1618 struct svm_range *prange, int32_t gpuidx,
1619 bool intr, bool wait, bool flush_tlb)
1620 {
1621 struct svm_validate_context *ctx;
1622 unsigned long start, end, addr;
1623 struct kfd_process *p;
1624 void *owner;
1625 int32_t idx;
1626 int r = 0;
1627
1628 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL);
1629 if (!ctx)
1630 return -ENOMEM;
1631 ctx->process = container_of(prange->svms, struct kfd_process, svms);
1632 ctx->prange = prange;
1633 ctx->intr = intr;
1634
1635 if (gpuidx < MAX_GPU_INSTANCE) {
1636 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE);
1637 bitmap_set(ctx->bitmap, gpuidx, 1);
1638 } else if (ctx->process->xnack_enabled) {
1639 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
1640
1641 /* If prefetch range to GPU, or GPU retry fault migrate range to
1642 * GPU, which has ACCESS attribute to the range, create mapping
1643 * on that GPU.
1644 */
1645 if (prange->actual_loc) {
1646 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process,
1647 prange->actual_loc);
1648 if (gpuidx < 0) {
1649 WARN_ONCE(1, "failed get device by id 0x%x\n",
1650 prange->actual_loc);
1651 r = -EINVAL;
1652 goto free_ctx;
1653 }
1654 if (test_bit(gpuidx, prange->bitmap_access))
1655 bitmap_set(ctx->bitmap, gpuidx, 1);
1656 }
1657
1658 /*
1659 * If prange is already mapped or with always mapped flag,
1660 * update mapping on GPUs with ACCESS attribute
1661 */
1662 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1663 if (prange->mapped_to_gpu ||
1664 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)
1665 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE);
1666 }
1667 } else {
1668 bitmap_or(ctx->bitmap, prange->bitmap_access,
1669 prange->bitmap_aip, MAX_GPU_INSTANCE);
1670 }
1671
1672 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1673 r = 0;
1674 goto free_ctx;
1675 }
1676
1677 if (prange->actual_loc && !prange->ttm_res) {
1678 /* This should never happen. actual_loc gets set by
1679 * svm_migrate_ram_to_vram after allocating a BO.
1680 */
1681 WARN_ONCE(1, "VRAM BO missing during validation\n");
1682 r = -EINVAL;
1683 goto free_ctx;
1684 }
1685
1686 r = svm_range_reserve_bos(ctx, intr);
1687 if (r)
1688 goto free_ctx;
1689
1690 p = container_of(prange->svms, struct kfd_process, svms);
1691 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap,
1692 MAX_GPU_INSTANCE));
1693 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) {
1694 if (kfd_svm_page_owner(p, idx) != owner) {
1695 owner = NULL;
1696 break;
1697 }
1698 }
1699
1700 start = map_start << PAGE_SHIFT;
1701 end = (map_last + 1) << PAGE_SHIFT;
1702 for (addr = start; !r && addr < end; ) {
1703 struct hmm_range *hmm_range = NULL;
1704 unsigned long map_start_vma;
1705 unsigned long map_last_vma;
1706 struct vm_area_struct *vma;
1707 unsigned long next = 0;
1708 unsigned long offset;
1709 unsigned long npages;
1710 bool readonly;
1711
1712 vma = vma_lookup(mm, addr);
1713 if (vma) {
1714 readonly = !(vma->vm_flags & VM_WRITE);
1715
1716 next = min(vma->vm_end, end);
1717 npages = (next - addr) >> PAGE_SHIFT;
1718 WRITE_ONCE(p->svms.faulting_task, current);
1719 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages,
1720 readonly, owner, NULL,
1721 &hmm_range);
1722 WRITE_ONCE(p->svms.faulting_task, NULL);
1723 if (r)
1724 pr_debug("failed %d to get svm range pages\n", r);
1725 } else {
1726 r = -EFAULT;
1727 }
1728
1729 if (!r) {
1730 offset = (addr >> PAGE_SHIFT) - prange->start;
1731 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages,
1732 hmm_range->hmm_pfns);
1733 if (r)
1734 pr_debug("failed %d to dma map range\n", r);
1735 }
1736
1737 svm_range_lock(prange);
1738
1739 /* Free backing memory of hmm_range if it was initialized
1740 * Overrride return value to TRY AGAIN only if prior returns
1741 * were successful
1742 */
1743 if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range) && !r) {
1744 pr_debug("hmm update the range, need validate again\n");
1745 r = -EAGAIN;
1746 }
1747
1748 if (!r && !list_empty(&prange->child_list)) {
1749 pr_debug("range split by unmap in parallel, validate again\n");
1750 r = -EAGAIN;
1751 }
1752
1753 if (!r) {
1754 map_start_vma = max(map_start, prange->start + offset);
1755 map_last_vma = min(map_last, prange->start + offset + npages - 1);
1756 if (map_start_vma <= map_last_vma) {
1757 offset = map_start_vma - prange->start;
1758 npages = map_last_vma - map_start_vma + 1;
1759 r = svm_range_map_to_gpus(prange, offset, npages, readonly,
1760 ctx->bitmap, wait, flush_tlb);
1761 }
1762 }
1763
1764 if (!r && next == end)
1765 prange->mapped_to_gpu = true;
1766
1767 svm_range_unlock(prange);
1768
1769 addr = next;
1770 }
1771
1772 svm_range_unreserve_bos(ctx);
1773 if (!r)
1774 prange->validate_timestamp = ktime_get_boottime();
1775
1776 free_ctx:
1777 kfree(ctx);
1778
1779 return r;
1780 }
1781
1782 /**
1783 * svm_range_list_lock_and_flush_work - flush pending deferred work
1784 *
1785 * @svms: the svm range list
1786 * @mm: the mm structure
1787 *
1788 * Context: Returns with mmap write lock held, pending deferred work flushed
1789 *
1790 */
1791 void
svm_range_list_lock_and_flush_work(struct svm_range_list * svms,struct mm_struct * mm)1792 svm_range_list_lock_and_flush_work(struct svm_range_list *svms,
1793 struct mm_struct *mm)
1794 {
1795 retry_flush_work:
1796 flush_work(&svms->deferred_list_work);
1797 mmap_write_lock(mm);
1798
1799 if (list_empty(&svms->deferred_range_list))
1800 return;
1801 mmap_write_unlock(mm);
1802 pr_debug("retry flush\n");
1803 goto retry_flush_work;
1804 }
1805
svm_range_restore_work(struct work_struct * work)1806 static void svm_range_restore_work(struct work_struct *work)
1807 {
1808 struct delayed_work *dwork = to_delayed_work(work);
1809 struct amdkfd_process_info *process_info;
1810 struct svm_range_list *svms;
1811 struct svm_range *prange;
1812 struct kfd_process *p;
1813 struct mm_struct *mm;
1814 int evicted_ranges;
1815 int invalid;
1816 int r;
1817
1818 svms = container_of(dwork, struct svm_range_list, restore_work);
1819 evicted_ranges = atomic_read(&svms->evicted_ranges);
1820 if (!evicted_ranges)
1821 return;
1822
1823 pr_debug("restore svm ranges\n");
1824
1825 p = container_of(svms, struct kfd_process, svms);
1826 process_info = p->kgd_process_info;
1827
1828 /* Keep mm reference when svm_range_validate_and_map ranges */
1829 mm = get_task_mm(p->lead_thread);
1830 if (!mm) {
1831 pr_debug("svms 0x%p process mm gone\n", svms);
1832 return;
1833 }
1834
1835 mutex_lock(&process_info->lock);
1836 svm_range_list_lock_and_flush_work(svms, mm);
1837 mutex_lock(&svms->lock);
1838
1839 evicted_ranges = atomic_read(&svms->evicted_ranges);
1840
1841 list_for_each_entry(prange, &svms->list, list) {
1842 invalid = atomic_read(&prange->invalid);
1843 if (!invalid)
1844 continue;
1845
1846 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n",
1847 prange->svms, prange, prange->start, prange->last,
1848 invalid);
1849
1850 /*
1851 * If range is migrating, wait for migration is done.
1852 */
1853 mutex_lock(&prange->migrate_mutex);
1854
1855 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange,
1856 MAX_GPU_INSTANCE, false, true, false);
1857 if (r)
1858 pr_debug("failed %d to map 0x%lx to gpus\n", r,
1859 prange->start);
1860
1861 mutex_unlock(&prange->migrate_mutex);
1862 if (r)
1863 goto out_reschedule;
1864
1865 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid)
1866 goto out_reschedule;
1867 }
1868
1869 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) !=
1870 evicted_ranges)
1871 goto out_reschedule;
1872
1873 evicted_ranges = 0;
1874
1875 r = kgd2kfd_resume_mm(mm);
1876 if (r) {
1877 /* No recovery from this failure. Probably the CP is
1878 * hanging. No point trying again.
1879 */
1880 pr_debug("failed %d to resume KFD\n", r);
1881 }
1882
1883 pr_debug("restore svm ranges successfully\n");
1884
1885 out_reschedule:
1886 mutex_unlock(&svms->lock);
1887 mmap_write_unlock(mm);
1888 mutex_unlock(&process_info->lock);
1889
1890 /* If validation failed, reschedule another attempt */
1891 if (evicted_ranges) {
1892 pr_debug("reschedule to restore svm range\n");
1893 queue_delayed_work(system_freezable_wq, &svms->restore_work,
1894 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1895
1896 kfd_smi_event_queue_restore_rescheduled(mm);
1897 }
1898 mmput(mm);
1899 }
1900
1901 /**
1902 * svm_range_evict - evict svm range
1903 * @prange: svm range structure
1904 * @mm: current process mm_struct
1905 * @start: starting process queue number
1906 * @last: last process queue number
1907 * @event: mmu notifier event when range is evicted or migrated
1908 *
1909 * Stop all queues of the process to ensure GPU doesn't access the memory, then
1910 * return to let CPU evict the buffer and proceed CPU pagetable update.
1911 *
1912 * Don't need use lock to sync cpu pagetable invalidation with GPU execution.
1913 * If invalidation happens while restore work is running, restore work will
1914 * restart to ensure to get the latest CPU pages mapping to GPU, then start
1915 * the queues.
1916 */
1917 static int
svm_range_evict(struct svm_range * prange,struct mm_struct * mm,unsigned long start,unsigned long last,enum mmu_notifier_event event)1918 svm_range_evict(struct svm_range *prange, struct mm_struct *mm,
1919 unsigned long start, unsigned long last,
1920 enum mmu_notifier_event event)
1921 {
1922 struct svm_range_list *svms = prange->svms;
1923 struct svm_range *pchild;
1924 struct kfd_process *p;
1925 int r = 0;
1926
1927 p = container_of(svms, struct kfd_process, svms);
1928
1929 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
1930 svms, prange->start, prange->last, start, last);
1931
1932 if (!p->xnack_enabled ||
1933 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) {
1934 int evicted_ranges;
1935 bool mapped = prange->mapped_to_gpu;
1936
1937 list_for_each_entry(pchild, &prange->child_list, child_list) {
1938 if (!pchild->mapped_to_gpu)
1939 continue;
1940 mapped = true;
1941 mutex_lock_nested(&pchild->lock, 1);
1942 if (pchild->start <= last && pchild->last >= start) {
1943 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n",
1944 pchild->start, pchild->last);
1945 atomic_inc(&pchild->invalid);
1946 }
1947 mutex_unlock(&pchild->lock);
1948 }
1949
1950 if (!mapped)
1951 return r;
1952
1953 if (prange->start <= last && prange->last >= start)
1954 atomic_inc(&prange->invalid);
1955
1956 evicted_ranges = atomic_inc_return(&svms->evicted_ranges);
1957 if (evicted_ranges != 1)
1958 return r;
1959
1960 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n",
1961 prange->svms, prange->start, prange->last);
1962
1963 /* First eviction, stop the queues */
1964 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM);
1965 if (r)
1966 pr_debug("failed to quiesce KFD\n");
1967
1968 pr_debug("schedule to restore svm %p ranges\n", svms);
1969 queue_delayed_work(system_freezable_wq, &svms->restore_work,
1970 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1971 } else {
1972 unsigned long s, l;
1973 uint32_t trigger;
1974
1975 if (event == MMU_NOTIFY_MIGRATE)
1976 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE;
1977 else
1978 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY;
1979
1980 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n",
1981 prange->svms, start, last);
1982 list_for_each_entry(pchild, &prange->child_list, child_list) {
1983 mutex_lock_nested(&pchild->lock, 1);
1984 s = max(start, pchild->start);
1985 l = min(last, pchild->last);
1986 if (l >= s)
1987 svm_range_unmap_from_gpus(pchild, s, l, trigger);
1988 mutex_unlock(&pchild->lock);
1989 }
1990 s = max(start, prange->start);
1991 l = min(last, prange->last);
1992 if (l >= s)
1993 svm_range_unmap_from_gpus(prange, s, l, trigger);
1994 }
1995
1996 return r;
1997 }
1998
svm_range_clone(struct svm_range * old)1999 static struct svm_range *svm_range_clone(struct svm_range *old)
2000 {
2001 struct svm_range *new;
2002
2003 new = svm_range_new(old->svms, old->start, old->last, false);
2004 if (!new)
2005 return NULL;
2006 if (svm_range_copy_dma_addrs(new, old)) {
2007 svm_range_free(new, false);
2008 return NULL;
2009 }
2010 if (old->svm_bo) {
2011 new->ttm_res = old->ttm_res;
2012 new->offset = old->offset;
2013 new->svm_bo = svm_range_bo_ref(old->svm_bo);
2014 spin_lock(&new->svm_bo->list_lock);
2015 list_add(&new->svm_bo_list, &new->svm_bo->range_list);
2016 spin_unlock(&new->svm_bo->list_lock);
2017 }
2018 new->flags = old->flags;
2019 new->preferred_loc = old->preferred_loc;
2020 new->prefetch_loc = old->prefetch_loc;
2021 new->actual_loc = old->actual_loc;
2022 new->granularity = old->granularity;
2023 new->mapped_to_gpu = old->mapped_to_gpu;
2024 new->vram_pages = old->vram_pages;
2025 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
2026 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
2027 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount));
2028
2029 return new;
2030 }
2031
svm_range_set_max_pages(struct amdgpu_device * adev)2032 void svm_range_set_max_pages(struct amdgpu_device *adev)
2033 {
2034 uint64_t max_pages;
2035 uint64_t pages, _pages;
2036 uint64_t min_pages = 0;
2037 int i, id;
2038
2039 for (i = 0; i < adev->kfd.dev->num_nodes; i++) {
2040 if (adev->kfd.dev->nodes[i]->xcp)
2041 id = adev->kfd.dev->nodes[i]->xcp->id;
2042 else
2043 id = -1;
2044 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17;
2045 pages = clamp(pages, 1ULL << 9, 1ULL << 18);
2046 pages = rounddown_pow_of_two(pages);
2047 min_pages = min_not_zero(min_pages, pages);
2048 }
2049
2050 do {
2051 max_pages = READ_ONCE(max_svm_range_pages);
2052 _pages = min_not_zero(max_pages, min_pages);
2053 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages);
2054 }
2055
2056 static int
svm_range_split_new(struct svm_range_list * svms,uint64_t start,uint64_t last,uint64_t max_pages,struct list_head * insert_list,struct list_head * update_list)2057 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last,
2058 uint64_t max_pages, struct list_head *insert_list,
2059 struct list_head *update_list)
2060 {
2061 struct svm_range *prange;
2062 uint64_t l;
2063
2064 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n",
2065 max_pages, start, last);
2066
2067 while (last >= start) {
2068 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1);
2069
2070 prange = svm_range_new(svms, start, l, true);
2071 if (!prange)
2072 return -ENOMEM;
2073 list_add(&prange->list, insert_list);
2074 list_add(&prange->update_list, update_list);
2075
2076 start = l + 1;
2077 }
2078 return 0;
2079 }
2080
2081 /**
2082 * svm_range_add - add svm range and handle overlap
2083 * @p: the range add to this process svms
2084 * @start: page size aligned
2085 * @size: page size aligned
2086 * @nattr: number of attributes
2087 * @attrs: array of attributes
2088 * @update_list: output, the ranges need validate and update GPU mapping
2089 * @insert_list: output, the ranges need insert to svms
2090 * @remove_list: output, the ranges are replaced and need remove from svms
2091 * @remap_list: output, remap unaligned svm ranges
2092 *
2093 * Check if the virtual address range has overlap with any existing ranges,
2094 * split partly overlapping ranges and add new ranges in the gaps. All changes
2095 * should be applied to the range_list and interval tree transactionally. If
2096 * any range split or allocation fails, the entire update fails. Therefore any
2097 * existing overlapping svm_ranges are cloned and the original svm_ranges left
2098 * unchanged.
2099 *
2100 * If the transaction succeeds, the caller can update and insert clones and
2101 * new ranges, then free the originals.
2102 *
2103 * Otherwise the caller can free the clones and new ranges, while the old
2104 * svm_ranges remain unchanged.
2105 *
2106 * Context: Process context, caller must hold svms->lock
2107 *
2108 * Return:
2109 * 0 - OK, otherwise error code
2110 */
2111 static int
svm_range_add(struct kfd_process * p,uint64_t start,uint64_t size,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs,struct list_head * update_list,struct list_head * insert_list,struct list_head * remove_list,struct list_head * remap_list)2112 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size,
2113 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
2114 struct list_head *update_list, struct list_head *insert_list,
2115 struct list_head *remove_list, struct list_head *remap_list)
2116 {
2117 unsigned long last = start + size - 1UL;
2118 struct svm_range_list *svms = &p->svms;
2119 struct interval_tree_node *node;
2120 struct svm_range *prange;
2121 struct svm_range *tmp;
2122 struct list_head new_list;
2123 int r = 0;
2124
2125 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last);
2126
2127 INIT_LIST_HEAD(update_list);
2128 INIT_LIST_HEAD(insert_list);
2129 INIT_LIST_HEAD(remove_list);
2130 INIT_LIST_HEAD(&new_list);
2131 INIT_LIST_HEAD(remap_list);
2132
2133 node = interval_tree_iter_first(&svms->objects, start, last);
2134 while (node) {
2135 struct interval_tree_node *next;
2136 unsigned long next_start;
2137
2138 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start,
2139 node->last);
2140
2141 prange = container_of(node, struct svm_range, it_node);
2142 next = interval_tree_iter_next(node, start, last);
2143 next_start = min(node->last, last) + 1;
2144
2145 if (svm_range_is_same_attrs(p, prange, nattr, attrs) &&
2146 prange->mapped_to_gpu) {
2147 /* nothing to do */
2148 } else if (node->start < start || node->last > last) {
2149 /* node intersects the update range and its attributes
2150 * will change. Clone and split it, apply updates only
2151 * to the overlapping part
2152 */
2153 struct svm_range *old = prange;
2154
2155 prange = svm_range_clone(old);
2156 if (!prange) {
2157 r = -ENOMEM;
2158 goto out;
2159 }
2160
2161 list_add(&old->update_list, remove_list);
2162 list_add(&prange->list, insert_list);
2163 list_add(&prange->update_list, update_list);
2164
2165 if (node->start < start) {
2166 pr_debug("change old range start\n");
2167 r = svm_range_split_head(prange, start,
2168 insert_list, remap_list);
2169 if (r)
2170 goto out;
2171 }
2172 if (node->last > last) {
2173 pr_debug("change old range last\n");
2174 r = svm_range_split_tail(prange, last,
2175 insert_list, remap_list);
2176 if (r)
2177 goto out;
2178 }
2179 } else {
2180 /* The node is contained within start..last,
2181 * just update it
2182 */
2183 list_add(&prange->update_list, update_list);
2184 }
2185
2186 /* insert a new node if needed */
2187 if (node->start > start) {
2188 r = svm_range_split_new(svms, start, node->start - 1,
2189 READ_ONCE(max_svm_range_pages),
2190 &new_list, update_list);
2191 if (r)
2192 goto out;
2193 }
2194
2195 node = next;
2196 start = next_start;
2197 }
2198
2199 /* add a final range at the end if needed */
2200 if (start <= last)
2201 r = svm_range_split_new(svms, start, last,
2202 READ_ONCE(max_svm_range_pages),
2203 &new_list, update_list);
2204
2205 out:
2206 if (r) {
2207 list_for_each_entry_safe(prange, tmp, insert_list, list)
2208 svm_range_free(prange, false);
2209 list_for_each_entry_safe(prange, tmp, &new_list, list)
2210 svm_range_free(prange, true);
2211 } else {
2212 list_splice(&new_list, insert_list);
2213 }
2214
2215 return r;
2216 }
2217
2218 static void
svm_range_update_notifier_and_interval_tree(struct mm_struct * mm,struct svm_range * prange)2219 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm,
2220 struct svm_range *prange)
2221 {
2222 unsigned long start;
2223 unsigned long last;
2224
2225 start = prange->notifier.interval_tree.start >> PAGE_SHIFT;
2226 last = prange->notifier.interval_tree.last >> PAGE_SHIFT;
2227
2228 if (prange->start == start && prange->last == last)
2229 return;
2230
2231 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
2232 prange->svms, prange, start, last, prange->start,
2233 prange->last);
2234
2235 if (start != 0 && last != 0) {
2236 interval_tree_remove(&prange->it_node, &prange->svms->objects);
2237 svm_range_remove_notifier(prange);
2238 }
2239 prange->it_node.start = prange->start;
2240 prange->it_node.last = prange->last;
2241
2242 interval_tree_insert(&prange->it_node, &prange->svms->objects);
2243 svm_range_add_notifier_locked(mm, prange);
2244 }
2245
2246 static void
svm_range_handle_list_op(struct svm_range_list * svms,struct svm_range * prange,struct mm_struct * mm)2247 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange,
2248 struct mm_struct *mm)
2249 {
2250 switch (prange->work_item.op) {
2251 case SVM_OP_NULL:
2252 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2253 svms, prange, prange->start, prange->last);
2254 break;
2255 case SVM_OP_UNMAP_RANGE:
2256 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2257 svms, prange, prange->start, prange->last);
2258 svm_range_unlink(prange);
2259 svm_range_remove_notifier(prange);
2260 svm_range_free(prange, true);
2261 break;
2262 case SVM_OP_UPDATE_RANGE_NOTIFIER:
2263 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2264 svms, prange, prange->start, prange->last);
2265 svm_range_update_notifier_and_interval_tree(mm, prange);
2266 break;
2267 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP:
2268 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2269 svms, prange, prange->start, prange->last);
2270 svm_range_update_notifier_and_interval_tree(mm, prange);
2271 /* TODO: implement deferred validation and mapping */
2272 break;
2273 case SVM_OP_ADD_RANGE:
2274 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange,
2275 prange->start, prange->last);
2276 svm_range_add_to_svms(prange);
2277 svm_range_add_notifier_locked(mm, prange);
2278 break;
2279 case SVM_OP_ADD_RANGE_AND_MAP:
2280 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms,
2281 prange, prange->start, prange->last);
2282 svm_range_add_to_svms(prange);
2283 svm_range_add_notifier_locked(mm, prange);
2284 /* TODO: implement deferred validation and mapping */
2285 break;
2286 default:
2287 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange,
2288 prange->work_item.op);
2289 }
2290 }
2291
svm_range_drain_retry_fault(struct svm_range_list * svms)2292 static void svm_range_drain_retry_fault(struct svm_range_list *svms)
2293 {
2294 struct kfd_process_device *pdd;
2295 struct kfd_process *p;
2296 uint32_t i;
2297
2298 p = container_of(svms, struct kfd_process, svms);
2299
2300 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2301 pdd = p->pdds[i];
2302 if (!pdd)
2303 continue;
2304
2305 pr_debug("drain retry fault gpu %d svms %p\n", i, svms);
2306
2307 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2308 pdd->dev->adev->irq.retry_cam_enabled ?
2309 &pdd->dev->adev->irq.ih :
2310 &pdd->dev->adev->irq.ih1);
2311
2312 if (pdd->dev->adev->irq.retry_cam_enabled)
2313 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2314 &pdd->dev->adev->irq.ih_soft);
2315
2316
2317 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms);
2318 }
2319 }
2320
svm_range_deferred_list_work(struct work_struct * work)2321 static void svm_range_deferred_list_work(struct work_struct *work)
2322 {
2323 struct svm_range_list *svms;
2324 struct svm_range *prange;
2325 struct mm_struct *mm;
2326
2327 svms = container_of(work, struct svm_range_list, deferred_list_work);
2328 pr_debug("enter svms 0x%p\n", svms);
2329
2330 spin_lock(&svms->deferred_list_lock);
2331 while (!list_empty(&svms->deferred_range_list)) {
2332 prange = list_first_entry(&svms->deferred_range_list,
2333 struct svm_range, deferred_list);
2334 spin_unlock(&svms->deferred_list_lock);
2335
2336 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange,
2337 prange->start, prange->last, prange->work_item.op);
2338
2339 mm = prange->work_item.mm;
2340
2341 mmap_write_lock(mm);
2342
2343 /* Remove from deferred_list must be inside mmap write lock, for
2344 * two race cases:
2345 * 1. unmap_from_cpu may change work_item.op and add the range
2346 * to deferred_list again, cause use after free bug.
2347 * 2. svm_range_list_lock_and_flush_work may hold mmap write
2348 * lock and continue because deferred_list is empty, but
2349 * deferred_list work is actually waiting for mmap lock.
2350 */
2351 spin_lock(&svms->deferred_list_lock);
2352 list_del_init(&prange->deferred_list);
2353 spin_unlock(&svms->deferred_list_lock);
2354
2355 mutex_lock(&svms->lock);
2356 mutex_lock(&prange->migrate_mutex);
2357 while (!list_empty(&prange->child_list)) {
2358 struct svm_range *pchild;
2359
2360 pchild = list_first_entry(&prange->child_list,
2361 struct svm_range, child_list);
2362 pr_debug("child prange 0x%p op %d\n", pchild,
2363 pchild->work_item.op);
2364 list_del_init(&pchild->child_list);
2365 svm_range_handle_list_op(svms, pchild, mm);
2366 }
2367 mutex_unlock(&prange->migrate_mutex);
2368
2369 svm_range_handle_list_op(svms, prange, mm);
2370 mutex_unlock(&svms->lock);
2371 mmap_write_unlock(mm);
2372
2373 /* Pairs with mmget in svm_range_add_list_work. If dropping the
2374 * last mm refcount, schedule release work to avoid circular locking
2375 */
2376 mmput_async(mm);
2377
2378 spin_lock(&svms->deferred_list_lock);
2379 }
2380 spin_unlock(&svms->deferred_list_lock);
2381 pr_debug("exit svms 0x%p\n", svms);
2382 }
2383
2384 void
svm_range_add_list_work(struct svm_range_list * svms,struct svm_range * prange,struct mm_struct * mm,enum svm_work_list_ops op)2385 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
2386 struct mm_struct *mm, enum svm_work_list_ops op)
2387 {
2388 spin_lock(&svms->deferred_list_lock);
2389 /* if prange is on the deferred list */
2390 if (!list_empty(&prange->deferred_list)) {
2391 pr_debug("update exist prange 0x%p work op %d\n", prange, op);
2392 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n");
2393 if (op != SVM_OP_NULL &&
2394 prange->work_item.op != SVM_OP_UNMAP_RANGE)
2395 prange->work_item.op = op;
2396 } else {
2397 prange->work_item.op = op;
2398
2399 /* Pairs with mmput in deferred_list_work */
2400 mmget(mm);
2401 prange->work_item.mm = mm;
2402 list_add_tail(&prange->deferred_list,
2403 &prange->svms->deferred_range_list);
2404 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2405 prange, prange->start, prange->last, op);
2406 }
2407 spin_unlock(&svms->deferred_list_lock);
2408 }
2409
schedule_deferred_list_work(struct svm_range_list * svms)2410 void schedule_deferred_list_work(struct svm_range_list *svms)
2411 {
2412 spin_lock(&svms->deferred_list_lock);
2413 if (!list_empty(&svms->deferred_range_list))
2414 schedule_work(&svms->deferred_list_work);
2415 spin_unlock(&svms->deferred_list_lock);
2416 }
2417
2418 static void
svm_range_unmap_split(struct mm_struct * mm,struct svm_range * parent,struct svm_range * prange,unsigned long start,unsigned long last)2419 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
2420 struct svm_range *prange, unsigned long start,
2421 unsigned long last)
2422 {
2423 struct svm_range *head;
2424 struct svm_range *tail;
2425
2426 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2427 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange,
2428 prange->start, prange->last);
2429 return;
2430 }
2431 if (start > prange->last || last < prange->start)
2432 return;
2433
2434 head = tail = prange;
2435 if (start > prange->start)
2436 svm_range_split(prange, prange->start, start - 1, &tail);
2437 if (last < tail->last)
2438 svm_range_split(tail, last + 1, tail->last, &head);
2439
2440 if (head != prange && tail != prange) {
2441 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2442 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
2443 } else if (tail != prange) {
2444 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE);
2445 } else if (head != prange) {
2446 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2447 } else if (parent != prange) {
2448 prange->work_item.op = SVM_OP_UNMAP_RANGE;
2449 }
2450 }
2451
2452 static void
svm_range_unmap_from_cpu(struct mm_struct * mm,struct svm_range * prange,unsigned long start,unsigned long last)2453 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
2454 unsigned long start, unsigned long last)
2455 {
2456 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU;
2457 struct svm_range_list *svms;
2458 struct svm_range *pchild;
2459 struct kfd_process *p;
2460 unsigned long s, l;
2461 bool unmap_parent;
2462 uint32_t i;
2463
2464 if (atomic_read(&prange->queue_refcount)) {
2465 int r;
2466
2467 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n",
2468 prange->start << PAGE_SHIFT);
2469 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM);
2470 if (r)
2471 pr_debug("failed %d to quiesce KFD queues\n", r);
2472 }
2473
2474 p = kfd_lookup_process_by_mm(mm);
2475 if (!p)
2476 return;
2477 svms = &p->svms;
2478
2479 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms,
2480 prange, prange->start, prange->last, start, last);
2481
2482 /* calculate time stamps that are used to decide which page faults need be
2483 * dropped or handled before unmap pages from gpu vm
2484 */
2485 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2486 struct kfd_process_device *pdd;
2487 struct amdgpu_device *adev;
2488 struct amdgpu_ih_ring *ih;
2489 uint32_t checkpoint_wptr;
2490
2491 pdd = p->pdds[i];
2492 if (!pdd)
2493 continue;
2494
2495 adev = pdd->dev->adev;
2496
2497 /* Check and drain ih1 ring if cam not available */
2498 if (adev->irq.ih1.ring_size) {
2499 ih = &adev->irq.ih1;
2500 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih);
2501 if (ih->rptr != checkpoint_wptr) {
2502 svms->checkpoint_ts[i] =
2503 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1);
2504 continue;
2505 }
2506 }
2507
2508 /* check if dev->irq.ih_soft is not empty */
2509 ih = &adev->irq.ih_soft;
2510 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih);
2511 if (ih->rptr != checkpoint_wptr)
2512 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1);
2513 }
2514
2515 unmap_parent = start <= prange->start && last >= prange->last;
2516
2517 list_for_each_entry(pchild, &prange->child_list, child_list) {
2518 mutex_lock_nested(&pchild->lock, 1);
2519 s = max(start, pchild->start);
2520 l = min(last, pchild->last);
2521 if (l >= s)
2522 svm_range_unmap_from_gpus(pchild, s, l, trigger);
2523 svm_range_unmap_split(mm, prange, pchild, start, last);
2524 mutex_unlock(&pchild->lock);
2525 }
2526 s = max(start, prange->start);
2527 l = min(last, prange->last);
2528 if (l >= s)
2529 svm_range_unmap_from_gpus(prange, s, l, trigger);
2530 svm_range_unmap_split(mm, prange, prange, start, last);
2531
2532 if (unmap_parent)
2533 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
2534 else
2535 svm_range_add_list_work(svms, prange, mm,
2536 SVM_OP_UPDATE_RANGE_NOTIFIER);
2537 schedule_deferred_list_work(svms);
2538
2539 kfd_unref_process(p);
2540 }
2541
2542 /**
2543 * svm_range_cpu_invalidate_pagetables - interval notifier callback
2544 * @mni: mmu_interval_notifier struct
2545 * @range: mmu_notifier_range struct
2546 * @cur_seq: value to pass to mmu_interval_set_seq()
2547 *
2548 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it
2549 * is from migration, or CPU page invalidation callback.
2550 *
2551 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed
2552 * work thread, and split prange if only part of prange is unmapped.
2553 *
2554 * For invalidation event, if GPU retry fault is not enabled, evict the queues,
2555 * then schedule svm_range_restore_work to update GPU mapping and resume queues.
2556 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will
2557 * update GPU mapping to recover.
2558 *
2559 * Context: mmap lock, notifier_invalidate_start lock are held
2560 * for invalidate event, prange lock is held if this is from migration
2561 */
2562 static bool
svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier * mni,const struct mmu_notifier_range * range,unsigned long cur_seq)2563 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
2564 const struct mmu_notifier_range *range,
2565 unsigned long cur_seq)
2566 {
2567 struct svm_range *prange;
2568 unsigned long start;
2569 unsigned long last;
2570
2571 if (range->event == MMU_NOTIFY_RELEASE)
2572 return true;
2573 if (!mmget_not_zero(mni->mm))
2574 return true;
2575
2576 start = mni->interval_tree.start;
2577 last = mni->interval_tree.last;
2578 start = max(start, range->start) >> PAGE_SHIFT;
2579 last = min(last, range->end - 1) >> PAGE_SHIFT;
2580 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n",
2581 start, last, range->start >> PAGE_SHIFT,
2582 (range->end - 1) >> PAGE_SHIFT,
2583 mni->interval_tree.start >> PAGE_SHIFT,
2584 mni->interval_tree.last >> PAGE_SHIFT, range->event);
2585
2586 prange = container_of(mni, struct svm_range, notifier);
2587
2588 svm_range_lock(prange);
2589 mmu_interval_set_seq(mni, cur_seq);
2590
2591 switch (range->event) {
2592 case MMU_NOTIFY_UNMAP:
2593 svm_range_unmap_from_cpu(mni->mm, prange, start, last);
2594 break;
2595 default:
2596 svm_range_evict(prange, mni->mm, start, last, range->event);
2597 break;
2598 }
2599
2600 svm_range_unlock(prange);
2601 mmput(mni->mm);
2602
2603 return true;
2604 }
2605
2606 /**
2607 * svm_range_from_addr - find svm range from fault address
2608 * @svms: svm range list header
2609 * @addr: address to search range interval tree, in pages
2610 * @parent: parent range if range is on child list
2611 *
2612 * Context: The caller must hold svms->lock
2613 *
2614 * Return: the svm_range found or NULL
2615 */
2616 struct svm_range *
svm_range_from_addr(struct svm_range_list * svms,unsigned long addr,struct svm_range ** parent)2617 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr,
2618 struct svm_range **parent)
2619 {
2620 struct interval_tree_node *node;
2621 struct svm_range *prange;
2622 struct svm_range *pchild;
2623
2624 node = interval_tree_iter_first(&svms->objects, addr, addr);
2625 if (!node)
2626 return NULL;
2627
2628 prange = container_of(node, struct svm_range, it_node);
2629 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n",
2630 addr, prange->start, prange->last, node->start, node->last);
2631
2632 if (addr >= prange->start && addr <= prange->last) {
2633 if (parent)
2634 *parent = prange;
2635 return prange;
2636 }
2637 list_for_each_entry(pchild, &prange->child_list, child_list)
2638 if (addr >= pchild->start && addr <= pchild->last) {
2639 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n",
2640 addr, pchild->start, pchild->last);
2641 if (parent)
2642 *parent = prange;
2643 return pchild;
2644 }
2645
2646 return NULL;
2647 }
2648
2649 /* svm_range_best_restore_location - decide the best fault restore location
2650 * @prange: svm range structure
2651 * @adev: the GPU on which vm fault happened
2652 *
2653 * This is only called when xnack is on, to decide the best location to restore
2654 * the range mapping after GPU vm fault. Caller uses the best location to do
2655 * migration if actual loc is not best location, then update GPU page table
2656 * mapping to the best location.
2657 *
2658 * If the preferred loc is accessible by faulting GPU, use preferred loc.
2659 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu
2660 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then
2661 * if range actual loc is cpu, best_loc is cpu
2662 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is
2663 * range actual loc.
2664 * Otherwise, GPU no access, best_loc is -1.
2665 *
2666 * Return:
2667 * -1 means vm fault GPU no access
2668 * 0 for CPU or GPU id
2669 */
2670 static int32_t
svm_range_best_restore_location(struct svm_range * prange,struct kfd_node * node,int32_t * gpuidx)2671 svm_range_best_restore_location(struct svm_range *prange,
2672 struct kfd_node *node,
2673 int32_t *gpuidx)
2674 {
2675 struct kfd_node *bo_node, *preferred_node;
2676 struct kfd_process *p;
2677 uint32_t gpuid;
2678 int r;
2679
2680 p = container_of(prange->svms, struct kfd_process, svms);
2681
2682 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx);
2683 if (r < 0) {
2684 pr_debug("failed to get gpuid from kgd\n");
2685 return -1;
2686 }
2687
2688 if (node->adev->apu_prefer_gtt)
2689 return 0;
2690
2691 if (prange->preferred_loc == gpuid ||
2692 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) {
2693 return prange->preferred_loc;
2694 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
2695 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc);
2696 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node))
2697 return prange->preferred_loc;
2698 /* fall through */
2699 }
2700
2701 if (test_bit(*gpuidx, prange->bitmap_access))
2702 return gpuid;
2703
2704 if (test_bit(*gpuidx, prange->bitmap_aip)) {
2705 if (!prange->actual_loc)
2706 return 0;
2707
2708 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc);
2709 if (bo_node && svm_nodes_in_same_hive(node, bo_node))
2710 return prange->actual_loc;
2711 else
2712 return 0;
2713 }
2714
2715 return -1;
2716 }
2717
2718 static int
svm_range_get_range_boundaries(struct kfd_process * p,int64_t addr,unsigned long * start,unsigned long * last,bool * is_heap_stack)2719 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr,
2720 unsigned long *start, unsigned long *last,
2721 bool *is_heap_stack)
2722 {
2723 struct vm_area_struct *vma;
2724 struct interval_tree_node *node;
2725 struct rb_node *rb_node;
2726 unsigned long start_limit, end_limit;
2727
2728 vma = vma_lookup(p->mm, addr << PAGE_SHIFT);
2729 if (!vma) {
2730 pr_debug("VMA does not exist in address [0x%llx]\n", addr);
2731 return -EFAULT;
2732 }
2733
2734 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma);
2735
2736 start_limit = max(vma->vm_start >> PAGE_SHIFT,
2737 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity));
2738 end_limit = min(vma->vm_end >> PAGE_SHIFT,
2739 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity));
2740
2741 /* First range that starts after the fault address */
2742 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX);
2743 if (node) {
2744 end_limit = min(end_limit, node->start);
2745 /* Last range that ends before the fault address */
2746 rb_node = rb_prev(&node->rb);
2747 } else {
2748 /* Last range must end before addr because
2749 * there was no range after addr
2750 */
2751 rb_node = rb_last(&p->svms.objects.rb_root);
2752 }
2753 if (rb_node) {
2754 node = container_of(rb_node, struct interval_tree_node, rb);
2755 if (node->last >= addr) {
2756 WARN(1, "Overlap with prev node and page fault addr\n");
2757 return -EFAULT;
2758 }
2759 start_limit = max(start_limit, node->last + 1);
2760 }
2761
2762 *start = start_limit;
2763 *last = end_limit - 1;
2764
2765 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n",
2766 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT,
2767 *start, *last, *is_heap_stack);
2768
2769 return 0;
2770 }
2771
2772 static int
svm_range_check_vm_userptr(struct kfd_process * p,uint64_t start,uint64_t last,uint64_t * bo_s,uint64_t * bo_l)2773 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last,
2774 uint64_t *bo_s, uint64_t *bo_l)
2775 {
2776 struct amdgpu_bo_va_mapping *mapping;
2777 struct interval_tree_node *node;
2778 struct amdgpu_bo *bo = NULL;
2779 unsigned long userptr;
2780 uint32_t i;
2781 int r;
2782
2783 for (i = 0; i < p->n_pdds; i++) {
2784 struct amdgpu_vm *vm;
2785
2786 if (!p->pdds[i]->drm_priv)
2787 continue;
2788
2789 vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
2790 r = amdgpu_bo_reserve(vm->root.bo, false);
2791 if (r)
2792 return r;
2793
2794 /* Check userptr by searching entire vm->va interval tree */
2795 node = interval_tree_iter_first(&vm->va, 0, ~0ULL);
2796 while (node) {
2797 mapping = container_of((struct rb_node *)node,
2798 struct amdgpu_bo_va_mapping, rb);
2799 bo = mapping->bo_va->base.bo;
2800
2801 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
2802 start << PAGE_SHIFT,
2803 last << PAGE_SHIFT,
2804 &userptr)) {
2805 node = interval_tree_iter_next(node, 0, ~0ULL);
2806 continue;
2807 }
2808
2809 pr_debug("[0x%llx 0x%llx] already userptr mapped\n",
2810 start, last);
2811 if (bo_s && bo_l) {
2812 *bo_s = userptr >> PAGE_SHIFT;
2813 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1;
2814 }
2815 amdgpu_bo_unreserve(vm->root.bo);
2816 return -EADDRINUSE;
2817 }
2818 amdgpu_bo_unreserve(vm->root.bo);
2819 }
2820 return 0;
2821 }
2822
2823 static struct
svm_range_create_unregistered_range(struct kfd_node * node,struct kfd_process * p,struct mm_struct * mm,int64_t addr)2824 svm_range *svm_range_create_unregistered_range(struct kfd_node *node,
2825 struct kfd_process *p,
2826 struct mm_struct *mm,
2827 int64_t addr)
2828 {
2829 struct svm_range *prange = NULL;
2830 unsigned long start, last;
2831 uint32_t gpuid, gpuidx;
2832 bool is_heap_stack;
2833 uint64_t bo_s = 0;
2834 uint64_t bo_l = 0;
2835 int r;
2836
2837 if (svm_range_get_range_boundaries(p, addr, &start, &last,
2838 &is_heap_stack))
2839 return NULL;
2840
2841 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l);
2842 if (r != -EADDRINUSE)
2843 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l);
2844
2845 if (r == -EADDRINUSE) {
2846 if (addr >= bo_s && addr <= bo_l)
2847 return NULL;
2848
2849 /* Create one page svm range if 2MB range overlapping */
2850 start = addr;
2851 last = addr;
2852 }
2853
2854 prange = svm_range_new(&p->svms, start, last, true);
2855 if (!prange) {
2856 pr_debug("Failed to create prange in address [0x%llx]\n", addr);
2857 return NULL;
2858 }
2859 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) {
2860 pr_debug("failed to get gpuid from kgd\n");
2861 svm_range_free(prange, true);
2862 return NULL;
2863 }
2864
2865 if (is_heap_stack)
2866 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM;
2867
2868 svm_range_add_to_svms(prange);
2869 svm_range_add_notifier_locked(mm, prange);
2870
2871 return prange;
2872 }
2873
2874 /* svm_range_skip_recover - decide if prange can be recovered
2875 * @prange: svm range structure
2876 *
2877 * GPU vm retry fault handle skip recover the range for cases:
2878 * 1. prange is on deferred list to be removed after unmap, it is stale fault,
2879 * deferred list work will drain the stale fault before free the prange.
2880 * 2. prange is on deferred list to add interval notifier after split, or
2881 * 3. prange is child range, it is split from parent prange, recover later
2882 * after interval notifier is added.
2883 *
2884 * Return: true to skip recover, false to recover
2885 */
svm_range_skip_recover(struct svm_range * prange)2886 static bool svm_range_skip_recover(struct svm_range *prange)
2887 {
2888 struct svm_range_list *svms = prange->svms;
2889
2890 spin_lock(&svms->deferred_list_lock);
2891 if (list_empty(&prange->deferred_list) &&
2892 list_empty(&prange->child_list)) {
2893 spin_unlock(&svms->deferred_list_lock);
2894 return false;
2895 }
2896 spin_unlock(&svms->deferred_list_lock);
2897
2898 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2899 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n",
2900 svms, prange, prange->start, prange->last);
2901 return true;
2902 }
2903 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP ||
2904 prange->work_item.op == SVM_OP_ADD_RANGE) {
2905 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n",
2906 svms, prange, prange->start, prange->last);
2907 return true;
2908 }
2909 return false;
2910 }
2911
2912 static void
svm_range_count_fault(struct kfd_node * node,struct kfd_process * p,int32_t gpuidx)2913 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p,
2914 int32_t gpuidx)
2915 {
2916 struct kfd_process_device *pdd;
2917
2918 /* fault is on different page of same range
2919 * or fault is skipped to recover later
2920 * or fault is on invalid virtual address
2921 */
2922 if (gpuidx == MAX_GPU_INSTANCE) {
2923 uint32_t gpuid;
2924 int r;
2925
2926 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx);
2927 if (r < 0)
2928 return;
2929 }
2930
2931 /* fault is recovered
2932 * or fault cannot recover because GPU no access on the range
2933 */
2934 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
2935 if (pdd)
2936 WRITE_ONCE(pdd->faults, pdd->faults + 1);
2937 }
2938
2939 static bool
svm_fault_allowed(struct vm_area_struct * vma,bool write_fault)2940 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault)
2941 {
2942 unsigned long requested = VM_READ;
2943
2944 if (write_fault)
2945 requested |= VM_WRITE;
2946
2947 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested,
2948 vma->vm_flags);
2949 return (vma->vm_flags & requested) == requested;
2950 }
2951
2952 int
svm_range_restore_pages(struct amdgpu_device * adev,unsigned int pasid,uint32_t vmid,uint32_t node_id,uint64_t addr,uint64_t ts,bool write_fault)2953 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid,
2954 uint32_t vmid, uint32_t node_id,
2955 uint64_t addr, uint64_t ts, bool write_fault)
2956 {
2957 unsigned long start, last, size;
2958 struct mm_struct *mm = NULL;
2959 struct svm_range_list *svms;
2960 struct svm_range *prange;
2961 struct kfd_process *p;
2962 ktime_t timestamp = ktime_get_boottime();
2963 struct kfd_node *node;
2964 int32_t best_loc;
2965 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE;
2966 bool write_locked = false;
2967 struct vm_area_struct *vma;
2968 bool migration = false;
2969 int r = 0;
2970
2971 if (!KFD_IS_SVM_API_SUPPORTED(adev)) {
2972 pr_debug("device does not support SVM\n");
2973 return -EFAULT;
2974 }
2975
2976 p = kfd_lookup_process_by_pasid(pasid, NULL);
2977 if (!p) {
2978 pr_debug("kfd process not founded pasid 0x%x\n", pasid);
2979 return 0;
2980 }
2981 svms = &p->svms;
2982
2983 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr);
2984
2985 if (atomic_read(&svms->drain_pagefaults)) {
2986 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr);
2987 r = 0;
2988 goto out;
2989 }
2990
2991 node = kfd_node_by_irq_ids(adev, node_id, vmid);
2992 if (!node) {
2993 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id,
2994 vmid);
2995 r = -EFAULT;
2996 goto out;
2997 }
2998
2999 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) {
3000 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id);
3001 r = -EFAULT;
3002 goto out;
3003 }
3004
3005 if (!p->xnack_enabled) {
3006 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid);
3007 r = -EFAULT;
3008 goto out;
3009 }
3010
3011 /* p->lead_thread is available as kfd_process_wq_release flush the work
3012 * before releasing task ref.
3013 */
3014 mm = get_task_mm(p->lead_thread);
3015 if (!mm) {
3016 pr_debug("svms 0x%p failed to get mm\n", svms);
3017 r = 0;
3018 goto out;
3019 }
3020
3021 mmap_read_lock(mm);
3022 retry_write_locked:
3023 mutex_lock(&svms->lock);
3024
3025 /* check if this page fault time stamp is before svms->checkpoint_ts */
3026 if (svms->checkpoint_ts[gpuidx] != 0) {
3027 if (amdgpu_ih_ts_after_or_equal(ts, svms->checkpoint_ts[gpuidx])) {
3028 pr_debug("draining retry fault, drop fault 0x%llx\n", addr);
3029 r = -EAGAIN;
3030 goto out_unlock_svms;
3031 } else {
3032 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts
3033 * to zero to avoid following ts wrap around give wrong comparing
3034 */
3035 svms->checkpoint_ts[gpuidx] = 0;
3036 }
3037 }
3038
3039 prange = svm_range_from_addr(svms, addr, NULL);
3040 if (!prange) {
3041 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n",
3042 svms, addr);
3043 if (!write_locked) {
3044 /* Need the write lock to create new range with MMU notifier.
3045 * Also flush pending deferred work to make sure the interval
3046 * tree is up to date before we add a new range
3047 */
3048 mutex_unlock(&svms->lock);
3049 mmap_read_unlock(mm);
3050 mmap_write_lock(mm);
3051 write_locked = true;
3052 goto retry_write_locked;
3053 }
3054 prange = svm_range_create_unregistered_range(node, p, mm, addr);
3055 if (!prange) {
3056 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n",
3057 svms, addr);
3058 mmap_write_downgrade(mm);
3059 r = -EFAULT;
3060 goto out_unlock_svms;
3061 }
3062 }
3063 if (write_locked)
3064 mmap_write_downgrade(mm);
3065
3066 mutex_lock(&prange->migrate_mutex);
3067
3068 if (svm_range_skip_recover(prange)) {
3069 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
3070 r = 0;
3071 goto out_unlock_range;
3072 }
3073
3074 /* skip duplicate vm fault on different pages of same range */
3075 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp,
3076 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) {
3077 pr_debug("svms 0x%p [0x%lx %lx] already restored\n",
3078 svms, prange->start, prange->last);
3079 r = 0;
3080 goto out_unlock_range;
3081 }
3082
3083 /* __do_munmap removed VMA, return success as we are handling stale
3084 * retry fault.
3085 */
3086 vma = vma_lookup(mm, addr << PAGE_SHIFT);
3087 if (!vma) {
3088 pr_debug("address 0x%llx VMA is removed\n", addr);
3089 r = 0;
3090 goto out_unlock_range;
3091 }
3092
3093 if (!svm_fault_allowed(vma, write_fault)) {
3094 pr_debug("fault addr 0x%llx no %s permission\n", addr,
3095 write_fault ? "write" : "read");
3096 r = -EPERM;
3097 goto out_unlock_range;
3098 }
3099
3100 best_loc = svm_range_best_restore_location(prange, node, &gpuidx);
3101 if (best_loc == -1) {
3102 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n",
3103 svms, prange->start, prange->last);
3104 r = -EACCES;
3105 goto out_unlock_range;
3106 }
3107
3108 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n",
3109 svms, prange->start, prange->last, best_loc,
3110 prange->actual_loc);
3111
3112 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr,
3113 write_fault, timestamp);
3114
3115 /* Align migration range start and size to granularity size */
3116 size = 1UL << prange->granularity;
3117 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start);
3118 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last);
3119 if (prange->actual_loc != 0 || best_loc != 0) {
3120 if (best_loc) {
3121 r = svm_migrate_to_vram(prange, best_loc, start, last,
3122 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU);
3123 if (r) {
3124 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n",
3125 r, addr);
3126 /* Fallback to system memory if migration to
3127 * VRAM failed
3128 */
3129 if (prange->actual_loc && prange->actual_loc != best_loc)
3130 r = svm_migrate_vram_to_ram(prange, mm, start, last,
3131 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL);
3132 else
3133 r = 0;
3134 }
3135 } else {
3136 r = svm_migrate_vram_to_ram(prange, mm, start, last,
3137 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL);
3138 }
3139 if (r) {
3140 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n",
3141 r, svms, start, last);
3142 goto out_migrate_fail;
3143 } else {
3144 migration = true;
3145 }
3146 }
3147
3148 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false,
3149 false, false);
3150 if (r)
3151 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n",
3152 r, svms, start, last);
3153
3154 out_migrate_fail:
3155 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr,
3156 migration);
3157
3158 out_unlock_range:
3159 mutex_unlock(&prange->migrate_mutex);
3160 out_unlock_svms:
3161 mutex_unlock(&svms->lock);
3162 mmap_read_unlock(mm);
3163
3164 if (r != -EAGAIN)
3165 svm_range_count_fault(node, p, gpuidx);
3166
3167 mmput(mm);
3168 out:
3169 kfd_unref_process(p);
3170
3171 if (r == -EAGAIN) {
3172 pr_debug("recover vm fault later\n");
3173 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
3174 r = 0;
3175 }
3176 return r;
3177 }
3178
3179 int
svm_range_switch_xnack_reserve_mem(struct kfd_process * p,bool xnack_enabled)3180 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled)
3181 {
3182 struct svm_range *prange, *pchild;
3183 uint64_t reserved_size = 0;
3184 uint64_t size;
3185 int r = 0;
3186
3187 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled);
3188
3189 mutex_lock(&p->svms.lock);
3190
3191 list_for_each_entry(prange, &p->svms.list, list) {
3192 svm_range_lock(prange);
3193 list_for_each_entry(pchild, &prange->child_list, child_list) {
3194 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT;
3195 if (xnack_enabled) {
3196 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3197 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3198 } else {
3199 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3200 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3201 if (r)
3202 goto out_unlock;
3203 reserved_size += size;
3204 }
3205 }
3206
3207 size = (prange->last - prange->start + 1) << PAGE_SHIFT;
3208 if (xnack_enabled) {
3209 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3210 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3211 } else {
3212 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3213 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3214 if (r)
3215 goto out_unlock;
3216 reserved_size += size;
3217 }
3218 out_unlock:
3219 svm_range_unlock(prange);
3220 if (r)
3221 break;
3222 }
3223
3224 if (r)
3225 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size,
3226 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3227 else
3228 /* Change xnack mode must be inside svms lock, to avoid race with
3229 * svm_range_deferred_list_work unreserve memory in parallel.
3230 */
3231 p->xnack_enabled = xnack_enabled;
3232
3233 mutex_unlock(&p->svms.lock);
3234 return r;
3235 }
3236
svm_range_list_fini(struct kfd_process * p)3237 void svm_range_list_fini(struct kfd_process *p)
3238 {
3239 struct svm_range *prange;
3240 struct svm_range *next;
3241
3242 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid,
3243 &p->svms);
3244
3245 cancel_delayed_work_sync(&p->svms.restore_work);
3246
3247 /* Ensure list work is finished before process is destroyed */
3248 flush_work(&p->svms.deferred_list_work);
3249
3250 /*
3251 * Ensure no retry fault comes in afterwards, as page fault handler will
3252 * not find kfd process and take mm lock to recover fault.
3253 * stop kfd page fault handing, then wait pending page faults got drained
3254 */
3255 atomic_set(&p->svms.drain_pagefaults, 1);
3256 svm_range_drain_retry_fault(&p->svms);
3257
3258 list_for_each_entry_safe(prange, next, &p->svms.list, list) {
3259 svm_range_unlink(prange);
3260 svm_range_remove_notifier(prange);
3261 svm_range_free(prange, true);
3262 }
3263
3264 mutex_destroy(&p->svms.lock);
3265
3266 pr_debug("process pid %d svms 0x%p done\n",
3267 p->lead_thread->pid, &p->svms);
3268 }
3269
svm_range_list_init(struct kfd_process * p)3270 int svm_range_list_init(struct kfd_process *p)
3271 {
3272 struct svm_range_list *svms = &p->svms;
3273 int i;
3274
3275 svms->objects = RB_ROOT_CACHED;
3276 mutex_init(&svms->lock);
3277 INIT_LIST_HEAD(&svms->list);
3278 atomic_set(&svms->evicted_ranges, 0);
3279 atomic_set(&svms->drain_pagefaults, 0);
3280 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work);
3281 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work);
3282 INIT_LIST_HEAD(&svms->deferred_range_list);
3283 INIT_LIST_HEAD(&svms->criu_svm_metadata_list);
3284 spin_lock_init(&svms->deferred_list_lock);
3285
3286 for (i = 0; i < p->n_pdds; i++)
3287 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev))
3288 bitmap_set(svms->bitmap_supported, i, 1);
3289
3290 /* Value of default granularity cannot exceed 0x1B, the
3291 * number of pages supported by a 4-level paging table
3292 */
3293 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B);
3294 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity);
3295
3296 return 0;
3297 }
3298
3299 /**
3300 * svm_range_check_vm - check if virtual address range mapped already
3301 * @p: current kfd_process
3302 * @start: range start address, in pages
3303 * @last: range last address, in pages
3304 * @bo_s: mapping start address in pages if address range already mapped
3305 * @bo_l: mapping last address in pages if address range already mapped
3306 *
3307 * The purpose is to avoid virtual address ranges already allocated by
3308 * kfd_ioctl_alloc_memory_of_gpu ioctl.
3309 * It looks for each pdd in the kfd_process.
3310 *
3311 * Context: Process context
3312 *
3313 * Return 0 - OK, if the range is not mapped.
3314 * Otherwise error code:
3315 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu
3316 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by
3317 * a signal. Release all buffer reservations and return to user-space.
3318 */
3319 static int
svm_range_check_vm(struct kfd_process * p,uint64_t start,uint64_t last,uint64_t * bo_s,uint64_t * bo_l)3320 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
3321 uint64_t *bo_s, uint64_t *bo_l)
3322 {
3323 struct amdgpu_bo_va_mapping *mapping;
3324 struct interval_tree_node *node;
3325 uint32_t i;
3326 int r;
3327
3328 for (i = 0; i < p->n_pdds; i++) {
3329 struct amdgpu_vm *vm;
3330
3331 if (!p->pdds[i]->drm_priv)
3332 continue;
3333
3334 vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
3335 r = amdgpu_bo_reserve(vm->root.bo, false);
3336 if (r)
3337 return r;
3338
3339 node = interval_tree_iter_first(&vm->va, start, last);
3340 if (node) {
3341 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n",
3342 start, last);
3343 mapping = container_of((struct rb_node *)node,
3344 struct amdgpu_bo_va_mapping, rb);
3345 if (bo_s && bo_l) {
3346 *bo_s = mapping->start;
3347 *bo_l = mapping->last;
3348 }
3349 amdgpu_bo_unreserve(vm->root.bo);
3350 return -EADDRINUSE;
3351 }
3352 amdgpu_bo_unreserve(vm->root.bo);
3353 }
3354
3355 return 0;
3356 }
3357
3358 /**
3359 * svm_range_is_valid - check if virtual address range is valid
3360 * @p: current kfd_process
3361 * @start: range start address, in pages
3362 * @size: range size, in pages
3363 *
3364 * Valid virtual address range means it belongs to one or more VMAs
3365 *
3366 * Context: Process context
3367 *
3368 * Return:
3369 * 0 - OK, otherwise error code
3370 */
3371 static int
svm_range_is_valid(struct kfd_process * p,uint64_t start,uint64_t size)3372 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size)
3373 {
3374 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP;
3375 struct vm_area_struct *vma;
3376 unsigned long end;
3377 unsigned long start_unchg = start;
3378
3379 start <<= PAGE_SHIFT;
3380 end = start + (size << PAGE_SHIFT);
3381 do {
3382 vma = vma_lookup(p->mm, start);
3383 if (!vma || (vma->vm_flags & device_vma))
3384 return -EFAULT;
3385 start = min(end, vma->vm_end);
3386 } while (start < end);
3387
3388 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL,
3389 NULL);
3390 }
3391
3392 /**
3393 * svm_range_best_prefetch_location - decide the best prefetch location
3394 * @prange: svm range structure
3395 *
3396 * For xnack off:
3397 * If range map to single GPU, the best prefetch location is prefetch_loc, which
3398 * can be CPU or GPU.
3399 *
3400 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on
3401 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise
3402 * the best prefetch location is always CPU, because GPU can not have coherent
3403 * mapping VRAM of other GPUs even with large-BAR PCIe connection.
3404 *
3405 * For xnack on:
3406 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is
3407 * prefetch_loc, other GPU access will generate vm fault and trigger migration.
3408 *
3409 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same
3410 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best
3411 * prefetch location is always CPU.
3412 *
3413 * Context: Process context
3414 *
3415 * Return:
3416 * 0 for CPU or GPU id
3417 */
3418 static uint32_t
svm_range_best_prefetch_location(struct svm_range * prange)3419 svm_range_best_prefetch_location(struct svm_range *prange)
3420 {
3421 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
3422 uint32_t best_loc = prange->prefetch_loc;
3423 struct kfd_process_device *pdd;
3424 struct kfd_node *bo_node;
3425 struct kfd_process *p;
3426 uint32_t gpuidx;
3427
3428 p = container_of(prange->svms, struct kfd_process, svms);
3429
3430 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED)
3431 goto out;
3432
3433 bo_node = svm_range_get_node_by_id(prange, best_loc);
3434 if (!bo_node) {
3435 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc);
3436 best_loc = 0;
3437 goto out;
3438 }
3439
3440 if (bo_node->adev->apu_prefer_gtt) {
3441 best_loc = 0;
3442 goto out;
3443 }
3444
3445 if (p->xnack_enabled)
3446 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
3447 else
3448 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
3449 MAX_GPU_INSTANCE);
3450
3451 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
3452 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
3453 if (!pdd) {
3454 pr_debug("failed to get device by idx 0x%x\n", gpuidx);
3455 continue;
3456 }
3457
3458 if (pdd->dev->adev == bo_node->adev)
3459 continue;
3460
3461 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) {
3462 best_loc = 0;
3463 break;
3464 }
3465 }
3466
3467 out:
3468 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n",
3469 p->xnack_enabled, &p->svms, prange->start, prange->last,
3470 best_loc);
3471
3472 return best_loc;
3473 }
3474
3475 /* svm_range_trigger_migration - start page migration if prefetch loc changed
3476 * @mm: current process mm_struct
3477 * @prange: svm range structure
3478 * @migrated: output, true if migration is triggered
3479 *
3480 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range
3481 * from ram to vram.
3482 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range
3483 * from vram to ram.
3484 *
3485 * If GPU vm fault retry is not enabled, migration interact with MMU notifier
3486 * and restore work:
3487 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict
3488 * stops all queues, schedule restore work
3489 * 2. svm_range_restore_work wait for migration is done by
3490 * a. svm_range_validate_vram takes prange->migrate_mutex
3491 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns
3492 * 3. restore work update mappings of GPU, resume all queues.
3493 *
3494 * Context: Process context
3495 *
3496 * Return:
3497 * 0 - OK, otherwise - error code of migration
3498 */
3499 static int
svm_range_trigger_migration(struct mm_struct * mm,struct svm_range * prange,bool * migrated)3500 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange,
3501 bool *migrated)
3502 {
3503 uint32_t best_loc;
3504 int r = 0;
3505
3506 *migrated = false;
3507 best_loc = svm_range_best_prefetch_location(prange);
3508
3509 /* when best_loc is a gpu node and same as prange->actual_loc
3510 * we still need do migration as prange->actual_loc !=0 does
3511 * not mean all pages in prange are vram. hmm migrate will pick
3512 * up right pages during migration.
3513 */
3514 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) ||
3515 (best_loc == 0 && prange->actual_loc == 0))
3516 return 0;
3517
3518 if (!best_loc) {
3519 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last,
3520 KFD_MIGRATE_TRIGGER_PREFETCH, NULL);
3521 *migrated = !r;
3522 return r;
3523 }
3524
3525 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last,
3526 mm, KFD_MIGRATE_TRIGGER_PREFETCH);
3527 *migrated = !r;
3528
3529 return 0;
3530 }
3531
svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence * fence)3532 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)
3533 {
3534 /* Dereferencing fence->svm_bo is safe here because the fence hasn't
3535 * signaled yet and we're under the protection of the fence->lock.
3536 * After the fence is signaled in svm_range_bo_release, we cannot get
3537 * here any more.
3538 *
3539 * Reference is dropped in svm_range_evict_svm_bo_worker.
3540 */
3541 if (svm_bo_ref_unless_zero(fence->svm_bo)) {
3542 WRITE_ONCE(fence->svm_bo->evicting, 1);
3543 schedule_work(&fence->svm_bo->eviction_work);
3544 }
3545
3546 return 0;
3547 }
3548
svm_range_evict_svm_bo_worker(struct work_struct * work)3549 static void svm_range_evict_svm_bo_worker(struct work_struct *work)
3550 {
3551 struct svm_range_bo *svm_bo;
3552 struct mm_struct *mm;
3553 int r = 0;
3554
3555 svm_bo = container_of(work, struct svm_range_bo, eviction_work);
3556
3557 if (mmget_not_zero(svm_bo->eviction_fence->mm)) {
3558 mm = svm_bo->eviction_fence->mm;
3559 } else {
3560 svm_range_bo_unref(svm_bo);
3561 return;
3562 }
3563
3564 mmap_read_lock(mm);
3565 spin_lock(&svm_bo->list_lock);
3566 while (!list_empty(&svm_bo->range_list) && !r) {
3567 struct svm_range *prange =
3568 list_first_entry(&svm_bo->range_list,
3569 struct svm_range, svm_bo_list);
3570 int retries = 3;
3571
3572 list_del_init(&prange->svm_bo_list);
3573 spin_unlock(&svm_bo->list_lock);
3574
3575 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
3576 prange->start, prange->last);
3577
3578 mutex_lock(&prange->migrate_mutex);
3579 do {
3580 /* migrate all vram pages in this prange to sys ram
3581 * after that prange->actual_loc should be zero
3582 */
3583 r = svm_migrate_vram_to_ram(prange, mm,
3584 prange->start, prange->last,
3585 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL);
3586 } while (!r && prange->actual_loc && --retries);
3587
3588 if (!r && prange->actual_loc)
3589 pr_info_once("Migration failed during eviction");
3590
3591 if (!prange->actual_loc) {
3592 mutex_lock(&prange->lock);
3593 prange->svm_bo = NULL;
3594 mutex_unlock(&prange->lock);
3595 }
3596 mutex_unlock(&prange->migrate_mutex);
3597
3598 spin_lock(&svm_bo->list_lock);
3599 }
3600 spin_unlock(&svm_bo->list_lock);
3601 mmap_read_unlock(mm);
3602 mmput(mm);
3603
3604 dma_fence_signal(&svm_bo->eviction_fence->base);
3605
3606 /* This is the last reference to svm_bo, after svm_range_vram_node_free
3607 * has been called in svm_migrate_vram_to_ram
3608 */
3609 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n");
3610 svm_range_bo_unref(svm_bo);
3611 }
3612
3613 static int
svm_range_set_attr(struct kfd_process * p,struct mm_struct * mm,uint64_t start,uint64_t size,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs)3614 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm,
3615 uint64_t start, uint64_t size, uint32_t nattr,
3616 struct kfd_ioctl_svm_attribute *attrs)
3617 {
3618 struct amdkfd_process_info *process_info = p->kgd_process_info;
3619 struct list_head update_list;
3620 struct list_head insert_list;
3621 struct list_head remove_list;
3622 struct list_head remap_list;
3623 struct svm_range_list *svms;
3624 struct svm_range *prange;
3625 struct svm_range *next;
3626 bool update_mapping = false;
3627 bool flush_tlb;
3628 int r, ret = 0;
3629
3630 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n",
3631 p->lead_thread->pid, &p->svms, start, start + size - 1, size);
3632
3633 r = svm_range_check_attr(p, nattr, attrs);
3634 if (r)
3635 return r;
3636
3637 svms = &p->svms;
3638
3639 mutex_lock(&process_info->lock);
3640
3641 svm_range_list_lock_and_flush_work(svms, mm);
3642
3643 r = svm_range_is_valid(p, start, size);
3644 if (r) {
3645 pr_debug("invalid range r=%d\n", r);
3646 mmap_write_unlock(mm);
3647 goto out;
3648 }
3649
3650 mutex_lock(&svms->lock);
3651
3652 /* Add new range and split existing ranges as needed */
3653 r = svm_range_add(p, start, size, nattr, attrs, &update_list,
3654 &insert_list, &remove_list, &remap_list);
3655 if (r) {
3656 mutex_unlock(&svms->lock);
3657 mmap_write_unlock(mm);
3658 goto out;
3659 }
3660 /* Apply changes as a transaction */
3661 list_for_each_entry_safe(prange, next, &insert_list, list) {
3662 svm_range_add_to_svms(prange);
3663 svm_range_add_notifier_locked(mm, prange);
3664 }
3665 list_for_each_entry(prange, &update_list, update_list) {
3666 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping);
3667 /* TODO: unmap ranges from GPU that lost access */
3668 }
3669 list_for_each_entry_safe(prange, next, &remove_list, update_list) {
3670 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n",
3671 prange->svms, prange, prange->start,
3672 prange->last);
3673 svm_range_unlink(prange);
3674 svm_range_remove_notifier(prange);
3675 svm_range_free(prange, false);
3676 }
3677
3678 mmap_write_downgrade(mm);
3679 /* Trigger migrations and revalidate and map to GPUs as needed. If
3680 * this fails we may be left with partially completed actions. There
3681 * is no clean way of rolling back to the previous state in such a
3682 * case because the rollback wouldn't be guaranteed to work either.
3683 */
3684 list_for_each_entry(prange, &update_list, update_list) {
3685 bool migrated;
3686
3687 mutex_lock(&prange->migrate_mutex);
3688
3689 r = svm_range_trigger_migration(mm, prange, &migrated);
3690 if (r)
3691 goto out_unlock_range;
3692
3693 if (migrated && (!p->xnack_enabled ||
3694 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) &&
3695 prange->mapped_to_gpu) {
3696 pr_debug("restore_work will update mappings of GPUs\n");
3697 mutex_unlock(&prange->migrate_mutex);
3698 continue;
3699 }
3700
3701 if (!migrated && !update_mapping) {
3702 mutex_unlock(&prange->migrate_mutex);
3703 continue;
3704 }
3705
3706 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu;
3707
3708 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange,
3709 MAX_GPU_INSTANCE, true, true, flush_tlb);
3710 if (r)
3711 pr_debug("failed %d to map svm range\n", r);
3712
3713 out_unlock_range:
3714 mutex_unlock(&prange->migrate_mutex);
3715 if (r)
3716 ret = r;
3717 }
3718
3719 list_for_each_entry(prange, &remap_list, update_list) {
3720 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n",
3721 prange, prange->start, prange->last);
3722 mutex_lock(&prange->migrate_mutex);
3723 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange,
3724 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu);
3725 if (r)
3726 pr_debug("failed %d on remap svm range\n", r);
3727 mutex_unlock(&prange->migrate_mutex);
3728 if (r)
3729 ret = r;
3730 }
3731
3732 dynamic_svm_range_dump(svms);
3733
3734 mutex_unlock(&svms->lock);
3735 mmap_read_unlock(mm);
3736 out:
3737 mutex_unlock(&process_info->lock);
3738
3739 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n",
3740 p->lead_thread->pid, &p->svms, start, start + size - 1, r);
3741
3742 return ret ? ret : r;
3743 }
3744
3745 static int
svm_range_get_attr(struct kfd_process * p,struct mm_struct * mm,uint64_t start,uint64_t size,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs)3746 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm,
3747 uint64_t start, uint64_t size, uint32_t nattr,
3748 struct kfd_ioctl_svm_attribute *attrs)
3749 {
3750 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE);
3751 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE);
3752 bool get_preferred_loc = false;
3753 bool get_prefetch_loc = false;
3754 bool get_granularity = false;
3755 bool get_accessible = false;
3756 bool get_flags = false;
3757 uint64_t last = start + size - 1UL;
3758 uint8_t granularity = 0xff;
3759 struct interval_tree_node *node;
3760 struct svm_range_list *svms;
3761 struct svm_range *prange;
3762 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3763 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3764 uint32_t flags_and = 0xffffffff;
3765 uint32_t flags_or = 0;
3766 int gpuidx;
3767 uint32_t i;
3768 int r = 0;
3769
3770 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start,
3771 start + size - 1, nattr);
3772
3773 /* Flush pending deferred work to avoid racing with deferred actions from
3774 * previous memory map changes (e.g. munmap). Concurrent memory map changes
3775 * can still race with get_attr because we don't hold the mmap lock. But that
3776 * would be a race condition in the application anyway, and undefined
3777 * behaviour is acceptable in that case.
3778 */
3779 flush_work(&p->svms.deferred_list_work);
3780
3781 mmap_read_lock(mm);
3782 r = svm_range_is_valid(p, start, size);
3783 mmap_read_unlock(mm);
3784 if (r) {
3785 pr_debug("invalid range r=%d\n", r);
3786 return r;
3787 }
3788
3789 for (i = 0; i < nattr; i++) {
3790 switch (attrs[i].type) {
3791 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3792 get_preferred_loc = true;
3793 break;
3794 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3795 get_prefetch_loc = true;
3796 break;
3797 case KFD_IOCTL_SVM_ATTR_ACCESS:
3798 get_accessible = true;
3799 break;
3800 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3801 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3802 get_flags = true;
3803 break;
3804 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3805 get_granularity = true;
3806 break;
3807 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
3808 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
3809 fallthrough;
3810 default:
3811 pr_debug("get invalid attr type 0x%x\n", attrs[i].type);
3812 return -EINVAL;
3813 }
3814 }
3815
3816 svms = &p->svms;
3817
3818 mutex_lock(&svms->lock);
3819
3820 node = interval_tree_iter_first(&svms->objects, start, last);
3821 if (!node) {
3822 pr_debug("range attrs not found return default values\n");
3823 svm_range_set_default_attributes(svms, &location, &prefetch_loc,
3824 &granularity, &flags_and);
3825 flags_or = flags_and;
3826 if (p->xnack_enabled)
3827 bitmap_copy(bitmap_access, svms->bitmap_supported,
3828 MAX_GPU_INSTANCE);
3829 else
3830 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE);
3831 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE);
3832 goto fill_values;
3833 }
3834 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE);
3835 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE);
3836
3837 while (node) {
3838 struct interval_tree_node *next;
3839
3840 prange = container_of(node, struct svm_range, it_node);
3841 next = interval_tree_iter_next(node, start, last);
3842
3843 if (get_preferred_loc) {
3844 if (prange->preferred_loc ==
3845 KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3846 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3847 location != prange->preferred_loc)) {
3848 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3849 get_preferred_loc = false;
3850 } else {
3851 location = prange->preferred_loc;
3852 }
3853 }
3854 if (get_prefetch_loc) {
3855 if (prange->prefetch_loc ==
3856 KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3857 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3858 prefetch_loc != prange->prefetch_loc)) {
3859 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3860 get_prefetch_loc = false;
3861 } else {
3862 prefetch_loc = prange->prefetch_loc;
3863 }
3864 }
3865 if (get_accessible) {
3866 bitmap_and(bitmap_access, bitmap_access,
3867 prange->bitmap_access, MAX_GPU_INSTANCE);
3868 bitmap_and(bitmap_aip, bitmap_aip,
3869 prange->bitmap_aip, MAX_GPU_INSTANCE);
3870 }
3871 if (get_flags) {
3872 flags_and &= prange->flags;
3873 flags_or |= prange->flags;
3874 }
3875
3876 if (get_granularity && prange->granularity < granularity)
3877 granularity = prange->granularity;
3878
3879 node = next;
3880 }
3881 fill_values:
3882 mutex_unlock(&svms->lock);
3883
3884 for (i = 0; i < nattr; i++) {
3885 switch (attrs[i].type) {
3886 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3887 attrs[i].value = location;
3888 break;
3889 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3890 attrs[i].value = prefetch_loc;
3891 break;
3892 case KFD_IOCTL_SVM_ATTR_ACCESS:
3893 gpuidx = kfd_process_gpuidx_from_gpuid(p,
3894 attrs[i].value);
3895 if (gpuidx < 0) {
3896 pr_debug("invalid gpuid %x\n", attrs[i].value);
3897 return -EINVAL;
3898 }
3899 if (test_bit(gpuidx, bitmap_access))
3900 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS;
3901 else if (test_bit(gpuidx, bitmap_aip))
3902 attrs[i].type =
3903 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE;
3904 else
3905 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS;
3906 break;
3907 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3908 attrs[i].value = flags_and;
3909 break;
3910 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3911 attrs[i].value = ~flags_or;
3912 break;
3913 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3914 attrs[i].value = (uint32_t)granularity;
3915 break;
3916 }
3917 }
3918
3919 return 0;
3920 }
3921
kfd_criu_resume_svm(struct kfd_process * p)3922 int kfd_criu_resume_svm(struct kfd_process *p)
3923 {
3924 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL;
3925 int nattr_common = 4, nattr_accessibility = 1;
3926 struct criu_svm_metadata *criu_svm_md = NULL;
3927 struct svm_range_list *svms = &p->svms;
3928 struct criu_svm_metadata *next = NULL;
3929 uint32_t set_flags = 0xffffffff;
3930 int i, j, num_attrs, ret = 0;
3931 uint64_t set_attr_size;
3932 struct mm_struct *mm;
3933
3934 if (list_empty(&svms->criu_svm_metadata_list)) {
3935 pr_debug("No SVM data from CRIU restore stage 2\n");
3936 return ret;
3937 }
3938
3939 mm = get_task_mm(p->lead_thread);
3940 if (!mm) {
3941 pr_err("failed to get mm for the target process\n");
3942 return -ESRCH;
3943 }
3944
3945 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds);
3946
3947 i = j = 0;
3948 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) {
3949 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n",
3950 i, criu_svm_md->data.start_addr, criu_svm_md->data.size);
3951
3952 for (j = 0; j < num_attrs; j++) {
3953 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n",
3954 i, j, criu_svm_md->data.attrs[j].type,
3955 i, j, criu_svm_md->data.attrs[j].value);
3956 switch (criu_svm_md->data.attrs[j].type) {
3957 /* During Checkpoint operation, the query for
3958 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might
3959 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were
3960 * not used by the range which was checkpointed. Care
3961 * must be taken to not restore with an invalid value
3962 * otherwise the gpuidx value will be invalid and
3963 * set_attr would eventually fail so just replace those
3964 * with another dummy attribute such as
3965 * KFD_IOCTL_SVM_ATTR_SET_FLAGS.
3966 */
3967 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3968 if (criu_svm_md->data.attrs[j].value ==
3969 KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
3970 criu_svm_md->data.attrs[j].type =
3971 KFD_IOCTL_SVM_ATTR_SET_FLAGS;
3972 criu_svm_md->data.attrs[j].value = 0;
3973 }
3974 break;
3975 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3976 set_flags = criu_svm_md->data.attrs[j].value;
3977 break;
3978 default:
3979 break;
3980 }
3981 }
3982
3983 /* CLR_FLAGS is not available via get_attr during checkpoint but
3984 * it needs to be inserted before restoring the ranges so
3985 * allocate extra space for it before calling set_attr
3986 */
3987 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3988 (num_attrs + 1);
3989 set_attr_new = krealloc(set_attr, set_attr_size,
3990 GFP_KERNEL);
3991 if (!set_attr_new) {
3992 ret = -ENOMEM;
3993 goto exit;
3994 }
3995 set_attr = set_attr_new;
3996
3997 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs *
3998 sizeof(struct kfd_ioctl_svm_attribute));
3999 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS;
4000 set_attr[num_attrs].value = ~set_flags;
4001
4002 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr,
4003 criu_svm_md->data.size, num_attrs + 1,
4004 set_attr);
4005 if (ret) {
4006 pr_err("CRIU: failed to set range attributes\n");
4007 goto exit;
4008 }
4009
4010 i++;
4011 }
4012 exit:
4013 kfree(set_attr);
4014 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) {
4015 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n",
4016 criu_svm_md->data.start_addr);
4017 kfree(criu_svm_md);
4018 }
4019
4020 mmput(mm);
4021 return ret;
4022
4023 }
4024
kfd_criu_restore_svm(struct kfd_process * p,uint8_t __user * user_priv_ptr,uint64_t * priv_data_offset,uint64_t max_priv_data_size)4025 int kfd_criu_restore_svm(struct kfd_process *p,
4026 uint8_t __user *user_priv_ptr,
4027 uint64_t *priv_data_offset,
4028 uint64_t max_priv_data_size)
4029 {
4030 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size;
4031 int nattr_common = 4, nattr_accessibility = 1;
4032 struct criu_svm_metadata *criu_svm_md = NULL;
4033 struct svm_range_list *svms = &p->svms;
4034 uint32_t num_devices;
4035 int ret = 0;
4036
4037 num_devices = p->n_pdds;
4038 /* Handle one SVM range object at a time, also the number of gpus are
4039 * assumed to be same on the restore node, checking must be done while
4040 * evaluating the topology earlier
4041 */
4042
4043 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) *
4044 (nattr_common + nattr_accessibility * num_devices);
4045 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size;
4046
4047 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) +
4048 svm_attrs_size;
4049
4050 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL);
4051 if (!criu_svm_md) {
4052 pr_err("failed to allocate memory to store svm metadata\n");
4053 return -ENOMEM;
4054 }
4055 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) {
4056 ret = -EINVAL;
4057 goto exit;
4058 }
4059
4060 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset,
4061 svm_priv_data_size);
4062 if (ret) {
4063 ret = -EFAULT;
4064 goto exit;
4065 }
4066 *priv_data_offset += svm_priv_data_size;
4067
4068 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list);
4069
4070 return 0;
4071
4072
4073 exit:
4074 kfree(criu_svm_md);
4075 return ret;
4076 }
4077
svm_range_get_info(struct kfd_process * p,uint32_t * num_svm_ranges,uint64_t * svm_priv_data_size)4078 void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges,
4079 uint64_t *svm_priv_data_size)
4080 {
4081 uint64_t total_size, accessibility_size, common_attr_size;
4082 int nattr_common = 4, nattr_accessibility = 1;
4083 int num_devices = p->n_pdds;
4084 struct svm_range_list *svms;
4085 struct svm_range *prange;
4086 uint32_t count = 0;
4087
4088 *svm_priv_data_size = 0;
4089
4090 svms = &p->svms;
4091
4092 mutex_lock(&svms->lock);
4093 list_for_each_entry(prange, &svms->list, list) {
4094 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n",
4095 prange, prange->start, prange->npages,
4096 prange->start + prange->npages - 1);
4097 count++;
4098 }
4099 mutex_unlock(&svms->lock);
4100
4101 *num_svm_ranges = count;
4102 /* Only the accessbility attributes need to be queried for all the gpus
4103 * individually, remaining ones are spanned across the entire process
4104 * regardless of the various gpu nodes. Of the remaining attributes,
4105 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved.
4106 *
4107 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC
4108 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC
4109 * KFD_IOCTL_SVM_ATTR_SET_FLAGS
4110 * KFD_IOCTL_SVM_ATTR_GRANULARITY
4111 *
4112 * ** ACCESSBILITY ATTRIBUTES **
4113 * (Considered as one, type is altered during query, value is gpuid)
4114 * KFD_IOCTL_SVM_ATTR_ACCESS
4115 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE
4116 * KFD_IOCTL_SVM_ATTR_NO_ACCESS
4117 */
4118 if (*num_svm_ranges > 0) {
4119 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4120 nattr_common;
4121 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) *
4122 nattr_accessibility * num_devices;
4123
4124 total_size = sizeof(struct kfd_criu_svm_range_priv_data) +
4125 common_attr_size + accessibility_size;
4126
4127 *svm_priv_data_size = *num_svm_ranges * total_size;
4128 }
4129
4130 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges,
4131 *svm_priv_data_size);
4132 }
4133
kfd_criu_checkpoint_svm(struct kfd_process * p,uint8_t __user * user_priv_data,uint64_t * priv_data_offset)4134 int kfd_criu_checkpoint_svm(struct kfd_process *p,
4135 uint8_t __user *user_priv_data,
4136 uint64_t *priv_data_offset)
4137 {
4138 struct kfd_criu_svm_range_priv_data *svm_priv = NULL;
4139 struct kfd_ioctl_svm_attribute *query_attr = NULL;
4140 uint64_t svm_priv_data_size, query_attr_size = 0;
4141 int index, nattr_common = 4, ret = 0;
4142 struct svm_range_list *svms;
4143 int num_devices = p->n_pdds;
4144 struct svm_range *prange;
4145 struct mm_struct *mm;
4146
4147 svms = &p->svms;
4148
4149 mm = get_task_mm(p->lead_thread);
4150 if (!mm) {
4151 pr_err("failed to get mm for the target process\n");
4152 return -ESRCH;
4153 }
4154
4155 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4156 (nattr_common + num_devices);
4157
4158 query_attr = kzalloc(query_attr_size, GFP_KERNEL);
4159 if (!query_attr) {
4160 ret = -ENOMEM;
4161 goto exit;
4162 }
4163
4164 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC;
4165 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC;
4166 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS;
4167 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY;
4168
4169 for (index = 0; index < num_devices; index++) {
4170 struct kfd_process_device *pdd = p->pdds[index];
4171
4172 query_attr[index + nattr_common].type =
4173 KFD_IOCTL_SVM_ATTR_ACCESS;
4174 query_attr[index + nattr_common].value = pdd->user_gpu_id;
4175 }
4176
4177 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size;
4178
4179 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL);
4180 if (!svm_priv) {
4181 ret = -ENOMEM;
4182 goto exit_query;
4183 }
4184
4185 index = 0;
4186 list_for_each_entry(prange, &svms->list, list) {
4187
4188 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE;
4189 svm_priv->start_addr = prange->start;
4190 svm_priv->size = prange->npages;
4191 memcpy(&svm_priv->attrs, query_attr, query_attr_size);
4192 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n",
4193 prange, prange->start, prange->npages,
4194 prange->start + prange->npages - 1,
4195 prange->npages * PAGE_SIZE);
4196
4197 ret = svm_range_get_attr(p, mm, svm_priv->start_addr,
4198 svm_priv->size,
4199 (nattr_common + num_devices),
4200 svm_priv->attrs);
4201 if (ret) {
4202 pr_err("CRIU: failed to obtain range attributes\n");
4203 goto exit_priv;
4204 }
4205
4206 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv,
4207 svm_priv_data_size)) {
4208 pr_err("Failed to copy svm priv to user\n");
4209 ret = -EFAULT;
4210 goto exit_priv;
4211 }
4212
4213 *priv_data_offset += svm_priv_data_size;
4214
4215 }
4216
4217
4218 exit_priv:
4219 kfree(svm_priv);
4220 exit_query:
4221 kfree(query_attr);
4222 exit:
4223 mmput(mm);
4224 return ret;
4225 }
4226
4227 int
svm_ioctl(struct kfd_process * p,enum kfd_ioctl_svm_op op,uint64_t start,uint64_t size,uint32_t nattrs,struct kfd_ioctl_svm_attribute * attrs)4228 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start,
4229 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs)
4230 {
4231 struct mm_struct *mm = current->mm;
4232 int r;
4233
4234 start >>= PAGE_SHIFT;
4235 size >>= PAGE_SHIFT;
4236
4237 switch (op) {
4238 case KFD_IOCTL_SVM_OP_SET_ATTR:
4239 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs);
4240 break;
4241 case KFD_IOCTL_SVM_OP_GET_ATTR:
4242 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs);
4243 break;
4244 default:
4245 r = EINVAL;
4246 break;
4247 }
4248
4249 return r;
4250 }
4251