1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * STMicroelectronics st_lsm6dsx sensor driver
4 *
5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
7 * interface standard output.
8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
10 * +-125/+-245/+-500/+-1000/+-2000 dps
11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
12 * allowing dynamic batching of sensor data.
13 * LSM9DSx series is similar but includes an additional magnetometer, handled
14 * by a different driver.
15 *
16 * Supported sensors:
17 *
18 * - LSM6DS3
19 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
20 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
21 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
22 * - FIFO size: 8KB
23 *
24 * - ISM330DLC
25 * - LSM6DS3H
26 * - LSM6DS3TR-C
27 * - LSM6DSL
28 * - LSM6DSM
29 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
30 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
31 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
32 * - FIFO size: 4KB
33 *
34 * - ASM330LHH
35 * - ASM330LHHX
36 * - ASM330LHHXG1
37 * - ISM330DHCX
38 * - ISM330IS
39 * - LSM6DSO
40 * - LSM6DSO16IS
41 * - LSM6DSOP
42 * - LSM6DSOX
43 * - LSM6DSR
44 * - LSM6DST
45 * - LSM6DSTX
46 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
47 * 833
48 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
49 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
50 * - FIFO size: 3KB
51 *
52 * - LSM6DSV
53 * - LSM6DSV16X
54 * - Accelerometer/Gyroscope supported ODR [Hz]: 7.5, 15, 30, 60, 120, 240,
55 * 480, 960
56 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
57 * - Gyroscope supported full-scale [dps]: +-125/+-250/+-500/+-1000/+-2000
58 * - FIFO size: 3KB
59 *
60 * - LSM6DS0
61 * - LSM9DS1
62 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
63 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
64 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
65 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
66 * - FIFO size: 32
67 *
68 * Copyright 2016 STMicroelectronics Inc.
69 *
70 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
71 * Denis Ciocca <denis.ciocca@st.com>
72 */
73
74 #include <linux/kernel.h>
75 #include <linux/module.h>
76 #include <linux/acpi.h>
77 #include <linux/delay.h>
78 #include <linux/iio/events.h>
79 #include <linux/iio/iio.h>
80 #include <linux/iio/sysfs.h>
81 #include <linux/iio/triggered_buffer.h>
82 #include <linux/iio/trigger_consumer.h>
83 #include <linux/interrupt.h>
84 #include <linux/irq.h>
85 #include <linux/minmax.h>
86 #include <linux/pm.h>
87 #include <linux/property.h>
88 #include <linux/regmap.h>
89 #include <linux/bitfield.h>
90
91 #include <linux/platform_data/st_sensors_pdata.h>
92
93 #include "st_lsm6dsx.h"
94
95 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
96
97 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
98 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
99 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
100 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
101 IIO_CHAN_SOFT_TIMESTAMP(3),
102 };
103
104 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
105 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
106 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
107 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
108 IIO_CHAN_SOFT_TIMESTAMP(3),
109 };
110
111 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
112 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
113 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
114 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
115 IIO_CHAN_SOFT_TIMESTAMP(3),
116 };
117
118 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
119 {
120 .reset = {
121 .addr = 0x22,
122 .mask = BIT(0),
123 },
124 .boot = {
125 .addr = 0x22,
126 .mask = BIT(7),
127 },
128 .bdu = {
129 .addr = 0x22,
130 .mask = BIT(6),
131 },
132 .id = {
133 {
134 .hw_id = ST_LSM9DS1_ID,
135 .name = ST_LSM9DS1_DEV_NAME,
136 .wai = 0x68,
137 }, {
138 .hw_id = ST_LSM6DS0_ID,
139 .name = ST_LSM6DS0_DEV_NAME,
140 .wai = 0x68,
141 },
142 },
143 .channels = {
144 [ST_LSM6DSX_ID_ACC] = {
145 .chan = st_lsm6dsx_acc_channels,
146 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
147 },
148 [ST_LSM6DSX_ID_GYRO] = {
149 .chan = st_lsm6ds0_gyro_channels,
150 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
151 },
152 },
153 .odr_table = {
154 [ST_LSM6DSX_ID_ACC] = {
155 .reg = {
156 .addr = 0x20,
157 .mask = GENMASK(7, 5),
158 },
159 .odr_avl[0] = { 10000, 0x01 },
160 .odr_avl[1] = { 50000, 0x02 },
161 .odr_avl[2] = { 119000, 0x03 },
162 .odr_avl[3] = { 238000, 0x04 },
163 .odr_avl[4] = { 476000, 0x05 },
164 .odr_avl[5] = { 952000, 0x06 },
165 .odr_len = 6,
166 },
167 [ST_LSM6DSX_ID_GYRO] = {
168 .reg = {
169 .addr = 0x10,
170 .mask = GENMASK(7, 5),
171 },
172 .odr_avl[0] = { 14900, 0x01 },
173 .odr_avl[1] = { 59500, 0x02 },
174 .odr_avl[2] = { 119000, 0x03 },
175 .odr_avl[3] = { 238000, 0x04 },
176 .odr_avl[4] = { 476000, 0x05 },
177 .odr_avl[5] = { 952000, 0x06 },
178 .odr_len = 6,
179 },
180 },
181 .fs_table = {
182 [ST_LSM6DSX_ID_ACC] = {
183 .reg = {
184 .addr = 0x20,
185 .mask = GENMASK(4, 3),
186 },
187 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
188 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
189 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
190 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
191 .fs_len = 4,
192 },
193 [ST_LSM6DSX_ID_GYRO] = {
194 .reg = {
195 .addr = 0x10,
196 .mask = GENMASK(4, 3),
197 },
198
199 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
200 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
201 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
202 .fs_len = 3,
203 },
204 },
205 .irq_config = {
206 .irq1 = {
207 .addr = 0x0c,
208 .mask = BIT(3),
209 },
210 .irq2 = {
211 .addr = 0x0d,
212 .mask = BIT(3),
213 },
214 .hla = {
215 .addr = 0x22,
216 .mask = BIT(5),
217 },
218 .od = {
219 .addr = 0x22,
220 .mask = BIT(4),
221 },
222 },
223 .fifo_ops = {
224 .max_size = 32,
225 },
226 },
227 {
228 .reset = {
229 .addr = 0x12,
230 .mask = BIT(0),
231 },
232 .boot = {
233 .addr = 0x12,
234 .mask = BIT(7),
235 },
236 .bdu = {
237 .addr = 0x12,
238 .mask = BIT(6),
239 },
240 .id = {
241 {
242 .hw_id = ST_LSM6DS3_ID,
243 .name = ST_LSM6DS3_DEV_NAME,
244 .wai = 0x69,
245 },
246 },
247 .channels = {
248 [ST_LSM6DSX_ID_ACC] = {
249 .chan = st_lsm6dsx_acc_channels,
250 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
251 },
252 [ST_LSM6DSX_ID_GYRO] = {
253 .chan = st_lsm6dsx_gyro_channels,
254 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
255 },
256 },
257 .odr_table = {
258 [ST_LSM6DSX_ID_ACC] = {
259 .reg = {
260 .addr = 0x10,
261 .mask = GENMASK(7, 4),
262 },
263 .odr_avl[0] = { 12500, 0x01 },
264 .odr_avl[1] = { 26000, 0x02 },
265 .odr_avl[2] = { 52000, 0x03 },
266 .odr_avl[3] = { 104000, 0x04 },
267 .odr_avl[4] = { 208000, 0x05 },
268 .odr_avl[5] = { 416000, 0x06 },
269 .odr_len = 6,
270 },
271 [ST_LSM6DSX_ID_GYRO] = {
272 .reg = {
273 .addr = 0x11,
274 .mask = GENMASK(7, 4),
275 },
276 .odr_avl[0] = { 12500, 0x01 },
277 .odr_avl[1] = { 26000, 0x02 },
278 .odr_avl[2] = { 52000, 0x03 },
279 .odr_avl[3] = { 104000, 0x04 },
280 .odr_avl[4] = { 208000, 0x05 },
281 .odr_avl[5] = { 416000, 0x06 },
282 .odr_len = 6,
283 },
284 },
285 .fs_table = {
286 [ST_LSM6DSX_ID_ACC] = {
287 .reg = {
288 .addr = 0x10,
289 .mask = GENMASK(3, 2),
290 },
291 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
292 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
293 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
294 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
295 .fs_len = 4,
296 },
297 [ST_LSM6DSX_ID_GYRO] = {
298 .reg = {
299 .addr = 0x11,
300 .mask = GENMASK(3, 2),
301 },
302 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
303 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
304 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
305 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
306 .fs_len = 4,
307 },
308 },
309 .irq_config = {
310 .irq1 = {
311 .addr = 0x0d,
312 .mask = BIT(3),
313 },
314 .irq2 = {
315 .addr = 0x0e,
316 .mask = BIT(3),
317 },
318 .lir = {
319 .addr = 0x58,
320 .mask = BIT(0),
321 },
322 .irq1_func = {
323 .addr = 0x5e,
324 .mask = BIT(5),
325 },
326 .irq2_func = {
327 .addr = 0x5f,
328 .mask = BIT(5),
329 },
330 .hla = {
331 .addr = 0x12,
332 .mask = BIT(5),
333 },
334 .od = {
335 .addr = 0x12,
336 .mask = BIT(4),
337 },
338 },
339 .decimator = {
340 [ST_LSM6DSX_ID_ACC] = {
341 .addr = 0x08,
342 .mask = GENMASK(2, 0),
343 },
344 [ST_LSM6DSX_ID_GYRO] = {
345 .addr = 0x08,
346 .mask = GENMASK(5, 3),
347 },
348 },
349 .fifo_ops = {
350 .update_fifo = st_lsm6dsx_update_fifo,
351 .read_fifo = st_lsm6dsx_read_fifo,
352 .fifo_th = {
353 .addr = 0x06,
354 .mask = GENMASK(11, 0),
355 },
356 .fifo_diff = {
357 .addr = 0x3a,
358 .mask = GENMASK(11, 0),
359 },
360 .max_size = 1365,
361 .th_wl = 3, /* 1LSB = 2B */
362 },
363 .ts_settings = {
364 .timer_en = {
365 .addr = 0x58,
366 .mask = BIT(7),
367 },
368 .hr_timer = {
369 .addr = 0x5c,
370 .mask = BIT(4),
371 },
372 .fifo_en = {
373 .addr = 0x07,
374 .mask = BIT(7),
375 },
376 .decimator = {
377 .addr = 0x09,
378 .mask = GENMASK(5, 3),
379 },
380 },
381 .event_settings = {
382 .wakeup_reg = {
383 .addr = 0x5B,
384 .mask = GENMASK(5, 0),
385 },
386 .wakeup_src_reg = 0x1b,
387 .wakeup_src_status_mask = BIT(3),
388 .wakeup_src_z_mask = BIT(0),
389 .wakeup_src_y_mask = BIT(1),
390 .wakeup_src_x_mask = BIT(2),
391 },
392 },
393 {
394 .reset = {
395 .addr = 0x12,
396 .mask = BIT(0),
397 },
398 .boot = {
399 .addr = 0x12,
400 .mask = BIT(7),
401 },
402 .bdu = {
403 .addr = 0x12,
404 .mask = BIT(6),
405 },
406 .id = {
407 {
408 .hw_id = ST_LSM6DS3H_ID,
409 .name = ST_LSM6DS3H_DEV_NAME,
410 .wai = 0x69,
411 },
412 },
413 .channels = {
414 [ST_LSM6DSX_ID_ACC] = {
415 .chan = st_lsm6dsx_acc_channels,
416 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
417 },
418 [ST_LSM6DSX_ID_GYRO] = {
419 .chan = st_lsm6dsx_gyro_channels,
420 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
421 },
422 },
423 .odr_table = {
424 [ST_LSM6DSX_ID_ACC] = {
425 .reg = {
426 .addr = 0x10,
427 .mask = GENMASK(7, 4),
428 },
429 .odr_avl[0] = { 12500, 0x01 },
430 .odr_avl[1] = { 26000, 0x02 },
431 .odr_avl[2] = { 52000, 0x03 },
432 .odr_avl[3] = { 104000, 0x04 },
433 .odr_avl[4] = { 208000, 0x05 },
434 .odr_avl[5] = { 416000, 0x06 },
435 .odr_len = 6,
436 },
437 [ST_LSM6DSX_ID_GYRO] = {
438 .reg = {
439 .addr = 0x11,
440 .mask = GENMASK(7, 4),
441 },
442 .odr_avl[0] = { 12500, 0x01 },
443 .odr_avl[1] = { 26000, 0x02 },
444 .odr_avl[2] = { 52000, 0x03 },
445 .odr_avl[3] = { 104000, 0x04 },
446 .odr_avl[4] = { 208000, 0x05 },
447 .odr_avl[5] = { 416000, 0x06 },
448 .odr_len = 6,
449 },
450 },
451 .fs_table = {
452 [ST_LSM6DSX_ID_ACC] = {
453 .reg = {
454 .addr = 0x10,
455 .mask = GENMASK(3, 2),
456 },
457 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
458 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
459 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
460 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
461 .fs_len = 4,
462 },
463 [ST_LSM6DSX_ID_GYRO] = {
464 .reg = {
465 .addr = 0x11,
466 .mask = GENMASK(3, 2),
467 },
468 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
469 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
470 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
471 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
472 .fs_len = 4,
473 },
474 },
475 .irq_config = {
476 .irq1 = {
477 .addr = 0x0d,
478 .mask = BIT(3),
479 },
480 .irq2 = {
481 .addr = 0x0e,
482 .mask = BIT(3),
483 },
484 .lir = {
485 .addr = 0x58,
486 .mask = BIT(0),
487 },
488 .irq1_func = {
489 .addr = 0x5e,
490 .mask = BIT(5),
491 },
492 .irq2_func = {
493 .addr = 0x5f,
494 .mask = BIT(5),
495 },
496 .hla = {
497 .addr = 0x12,
498 .mask = BIT(5),
499 },
500 .od = {
501 .addr = 0x12,
502 .mask = BIT(4),
503 },
504 },
505 .decimator = {
506 [ST_LSM6DSX_ID_ACC] = {
507 .addr = 0x08,
508 .mask = GENMASK(2, 0),
509 },
510 [ST_LSM6DSX_ID_GYRO] = {
511 .addr = 0x08,
512 .mask = GENMASK(5, 3),
513 },
514 },
515 .fifo_ops = {
516 .update_fifo = st_lsm6dsx_update_fifo,
517 .read_fifo = st_lsm6dsx_read_fifo,
518 .fifo_th = {
519 .addr = 0x06,
520 .mask = GENMASK(11, 0),
521 },
522 .fifo_diff = {
523 .addr = 0x3a,
524 .mask = GENMASK(11, 0),
525 },
526 .max_size = 682,
527 .th_wl = 3, /* 1LSB = 2B */
528 },
529 .ts_settings = {
530 .timer_en = {
531 .addr = 0x58,
532 .mask = BIT(7),
533 },
534 .hr_timer = {
535 .addr = 0x5c,
536 .mask = BIT(4),
537 },
538 .fifo_en = {
539 .addr = 0x07,
540 .mask = BIT(7),
541 },
542 .decimator = {
543 .addr = 0x09,
544 .mask = GENMASK(5, 3),
545 },
546 },
547 .event_settings = {
548 .wakeup_reg = {
549 .addr = 0x5B,
550 .mask = GENMASK(5, 0),
551 },
552 .wakeup_src_reg = 0x1b,
553 .wakeup_src_status_mask = BIT(3),
554 .wakeup_src_z_mask = BIT(0),
555 .wakeup_src_y_mask = BIT(1),
556 .wakeup_src_x_mask = BIT(2),
557 },
558 },
559 {
560 .reset = {
561 .addr = 0x12,
562 .mask = BIT(0),
563 },
564 .boot = {
565 .addr = 0x12,
566 .mask = BIT(7),
567 },
568 .bdu = {
569 .addr = 0x12,
570 .mask = BIT(6),
571 },
572 .id = {
573 {
574 .hw_id = ST_LSM6DSL_ID,
575 .name = ST_LSM6DSL_DEV_NAME,
576 .wai = 0x6a,
577 }, {
578 .hw_id = ST_LSM6DSM_ID,
579 .name = ST_LSM6DSM_DEV_NAME,
580 .wai = 0x6a,
581 }, {
582 .hw_id = ST_ISM330DLC_ID,
583 .name = ST_ISM330DLC_DEV_NAME,
584 .wai = 0x6a,
585 }, {
586 .hw_id = ST_LSM6DS3TRC_ID,
587 .name = ST_LSM6DS3TRC_DEV_NAME,
588 .wai = 0x6a,
589 },
590 },
591 .channels = {
592 [ST_LSM6DSX_ID_ACC] = {
593 .chan = st_lsm6dsx_acc_channels,
594 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
595 },
596 [ST_LSM6DSX_ID_GYRO] = {
597 .chan = st_lsm6dsx_gyro_channels,
598 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
599 },
600 },
601 .odr_table = {
602 [ST_LSM6DSX_ID_ACC] = {
603 .reg = {
604 .addr = 0x10,
605 .mask = GENMASK(7, 4),
606 },
607 .odr_avl[0] = { 12500, 0x01 },
608 .odr_avl[1] = { 26000, 0x02 },
609 .odr_avl[2] = { 52000, 0x03 },
610 .odr_avl[3] = { 104000, 0x04 },
611 .odr_avl[4] = { 208000, 0x05 },
612 .odr_avl[5] = { 416000, 0x06 },
613 .odr_len = 6,
614 },
615 [ST_LSM6DSX_ID_GYRO] = {
616 .reg = {
617 .addr = 0x11,
618 .mask = GENMASK(7, 4),
619 },
620 .odr_avl[0] = { 12500, 0x01 },
621 .odr_avl[1] = { 26000, 0x02 },
622 .odr_avl[2] = { 52000, 0x03 },
623 .odr_avl[3] = { 104000, 0x04 },
624 .odr_avl[4] = { 208000, 0x05 },
625 .odr_avl[5] = { 416000, 0x06 },
626 .odr_len = 6,
627 },
628 },
629 .fs_table = {
630 [ST_LSM6DSX_ID_ACC] = {
631 .reg = {
632 .addr = 0x10,
633 .mask = GENMASK(3, 2),
634 },
635 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
636 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
637 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
638 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
639 .fs_len = 4,
640 },
641 [ST_LSM6DSX_ID_GYRO] = {
642 .reg = {
643 .addr = 0x11,
644 .mask = GENMASK(3, 2),
645 },
646 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
647 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
648 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
649 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
650 .fs_len = 4,
651 },
652 },
653 .samples_to_discard = {
654 [ST_LSM6DSX_ID_ACC] = {
655 .val[0] = { 12500, 1 },
656 .val[1] = { 26000, 1 },
657 .val[2] = { 52000, 1 },
658 .val[3] = { 104000, 2 },
659 .val[4] = { 208000, 2 },
660 .val[5] = { 416000, 2 },
661 },
662 [ST_LSM6DSX_ID_GYRO] = {
663 .val[0] = { 12500, 2 },
664 .val[1] = { 26000, 5 },
665 .val[2] = { 52000, 7 },
666 .val[3] = { 104000, 12 },
667 .val[4] = { 208000, 20 },
668 .val[5] = { 416000, 36 },
669 },
670 },
671 .irq_config = {
672 .irq1 = {
673 .addr = 0x0d,
674 .mask = BIT(3),
675 },
676 .irq2 = {
677 .addr = 0x0e,
678 .mask = BIT(3),
679 },
680 .lir = {
681 .addr = 0x58,
682 .mask = BIT(0),
683 },
684 .irq1_func = {
685 .addr = 0x5e,
686 .mask = BIT(5),
687 },
688 .irq2_func = {
689 .addr = 0x5f,
690 .mask = BIT(5),
691 },
692 .hla = {
693 .addr = 0x12,
694 .mask = BIT(5),
695 },
696 .od = {
697 .addr = 0x12,
698 .mask = BIT(4),
699 },
700 },
701 .decimator = {
702 [ST_LSM6DSX_ID_ACC] = {
703 .addr = 0x08,
704 .mask = GENMASK(2, 0),
705 },
706 [ST_LSM6DSX_ID_GYRO] = {
707 .addr = 0x08,
708 .mask = GENMASK(5, 3),
709 },
710 [ST_LSM6DSX_ID_EXT0] = {
711 .addr = 0x09,
712 .mask = GENMASK(2, 0),
713 },
714 },
715 .fifo_ops = {
716 .update_fifo = st_lsm6dsx_update_fifo,
717 .read_fifo = st_lsm6dsx_read_fifo,
718 .fifo_th = {
719 .addr = 0x06,
720 .mask = GENMASK(10, 0),
721 },
722 .fifo_diff = {
723 .addr = 0x3a,
724 .mask = GENMASK(10, 0),
725 },
726 .max_size = 682,
727 .th_wl = 3, /* 1LSB = 2B */
728 },
729 .ts_settings = {
730 .timer_en = {
731 .addr = 0x19,
732 .mask = BIT(5),
733 },
734 .hr_timer = {
735 .addr = 0x5c,
736 .mask = BIT(4),
737 },
738 .fifo_en = {
739 .addr = 0x07,
740 .mask = BIT(7),
741 },
742 .decimator = {
743 .addr = 0x09,
744 .mask = GENMASK(5, 3),
745 },
746 },
747 .shub_settings = {
748 .page_mux = {
749 .addr = 0x01,
750 .mask = BIT(7),
751 },
752 .master_en = {
753 .addr = 0x1a,
754 .mask = BIT(0),
755 },
756 .pullup_en = {
757 .addr = 0x1a,
758 .mask = BIT(3),
759 },
760 .aux_sens = {
761 .addr = 0x04,
762 .mask = GENMASK(5, 4),
763 },
764 .wr_once = {
765 .addr = 0x07,
766 .mask = BIT(5),
767 },
768 .emb_func = {
769 .addr = 0x19,
770 .mask = BIT(2),
771 },
772 .num_ext_dev = 1,
773 .shub_out = {
774 .addr = 0x2e,
775 },
776 .slv0_addr = 0x02,
777 .dw_slv0_addr = 0x0e,
778 .pause = 0x7,
779 },
780 .event_settings = {
781 .enable_reg = {
782 .addr = 0x58,
783 .mask = BIT(7),
784 },
785 .wakeup_reg = {
786 .addr = 0x5B,
787 .mask = GENMASK(5, 0),
788 },
789 .wakeup_src_reg = 0x1b,
790 .wakeup_src_status_mask = BIT(3),
791 .wakeup_src_z_mask = BIT(0),
792 .wakeup_src_y_mask = BIT(1),
793 .wakeup_src_x_mask = BIT(2),
794 },
795 },
796 {
797 .reset = {
798 .addr = 0x12,
799 .mask = BIT(0),
800 },
801 .boot = {
802 .addr = 0x12,
803 .mask = BIT(7),
804 },
805 .bdu = {
806 .addr = 0x12,
807 .mask = BIT(6),
808 },
809 .id = {
810 {
811 .hw_id = ST_LSM6DSR_ID,
812 .name = ST_LSM6DSR_DEV_NAME,
813 .wai = 0x6b,
814 }, {
815 .hw_id = ST_ISM330DHCX_ID,
816 .name = ST_ISM330DHCX_DEV_NAME,
817 .wai = 0x6b,
818 }, {
819 .hw_id = ST_LSM6DSRX_ID,
820 .name = ST_LSM6DSRX_DEV_NAME,
821 .wai = 0x6b,
822 }, {
823 .hw_id = ST_LSM6DSO_ID,
824 .name = ST_LSM6DSO_DEV_NAME,
825 .wai = 0x6c,
826 }, {
827 .hw_id = ST_LSM6DSOX_ID,
828 .name = ST_LSM6DSOX_DEV_NAME,
829 .wai = 0x6c,
830 }, {
831 .hw_id = ST_LSM6DST_ID,
832 .name = ST_LSM6DST_DEV_NAME,
833 .wai = 0x6d,
834 }, {
835 .hw_id = ST_ASM330LHHX_ID,
836 .name = ST_ASM330LHHX_DEV_NAME,
837 .wai = 0x6b,
838 }, {
839 .hw_id = ST_ASM330LHHXG1_ID,
840 .name = ST_ASM330LHHXG1_DEV_NAME,
841 .wai = 0x6b,
842 }, {
843 .hw_id = ST_LSM6DSTX_ID,
844 .name = ST_LSM6DSTX_DEV_NAME,
845 .wai = 0x6d,
846 },
847 },
848 .channels = {
849 [ST_LSM6DSX_ID_ACC] = {
850 .chan = st_lsm6dsx_acc_channels,
851 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
852 },
853 [ST_LSM6DSX_ID_GYRO] = {
854 .chan = st_lsm6dsx_gyro_channels,
855 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
856 },
857 },
858 .drdy_mask = {
859 .addr = 0x13,
860 .mask = BIT(3),
861 },
862 .odr_table = {
863 [ST_LSM6DSX_ID_ACC] = {
864 .reg = {
865 .addr = 0x10,
866 .mask = GENMASK(7, 4),
867 },
868 .odr_avl[0] = { 12500, 0x01 },
869 .odr_avl[1] = { 26000, 0x02 },
870 .odr_avl[2] = { 52000, 0x03 },
871 .odr_avl[3] = { 104000, 0x04 },
872 .odr_avl[4] = { 208000, 0x05 },
873 .odr_avl[5] = { 416000, 0x06 },
874 .odr_avl[6] = { 833000, 0x07 },
875 .odr_len = 7,
876 },
877 [ST_LSM6DSX_ID_GYRO] = {
878 .reg = {
879 .addr = 0x11,
880 .mask = GENMASK(7, 4),
881 },
882 .odr_avl[0] = { 12500, 0x01 },
883 .odr_avl[1] = { 26000, 0x02 },
884 .odr_avl[2] = { 52000, 0x03 },
885 .odr_avl[3] = { 104000, 0x04 },
886 .odr_avl[4] = { 208000, 0x05 },
887 .odr_avl[5] = { 416000, 0x06 },
888 .odr_avl[6] = { 833000, 0x07 },
889 .odr_len = 7,
890 },
891 },
892 .fs_table = {
893 [ST_LSM6DSX_ID_ACC] = {
894 .reg = {
895 .addr = 0x10,
896 .mask = GENMASK(3, 2),
897 },
898 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
899 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
900 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
901 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
902 .fs_len = 4,
903 },
904 [ST_LSM6DSX_ID_GYRO] = {
905 .reg = {
906 .addr = 0x11,
907 .mask = GENMASK(3, 2),
908 },
909 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
910 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
911 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
912 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
913 .fs_len = 4,
914 },
915 },
916 .irq_config = {
917 .irq1 = {
918 .addr = 0x0d,
919 .mask = BIT(3),
920 },
921 .irq2 = {
922 .addr = 0x0e,
923 .mask = BIT(3),
924 },
925 .lir = {
926 .addr = 0x56,
927 .mask = BIT(0),
928 },
929 .clear_on_read = {
930 .addr = 0x56,
931 .mask = BIT(6),
932 },
933 .irq1_func = {
934 .addr = 0x5e,
935 .mask = BIT(5),
936 },
937 .irq2_func = {
938 .addr = 0x5f,
939 .mask = BIT(5),
940 },
941 .hla = {
942 .addr = 0x12,
943 .mask = BIT(5),
944 },
945 .od = {
946 .addr = 0x12,
947 .mask = BIT(4),
948 },
949 },
950 .batch = {
951 [ST_LSM6DSX_ID_ACC] = {
952 .addr = 0x09,
953 .mask = GENMASK(3, 0),
954 },
955 [ST_LSM6DSX_ID_GYRO] = {
956 .addr = 0x09,
957 .mask = GENMASK(7, 4),
958 },
959 },
960 .fifo_ops = {
961 .update_fifo = st_lsm6dsx_update_fifo,
962 .read_fifo = st_lsm6dsx_read_tagged_fifo,
963 .fifo_th = {
964 .addr = 0x07,
965 .mask = GENMASK(8, 0),
966 },
967 .fifo_diff = {
968 .addr = 0x3a,
969 .mask = GENMASK(9, 0),
970 },
971 .max_size = 512,
972 .th_wl = 1,
973 },
974 .ts_settings = {
975 .timer_en = {
976 .addr = 0x19,
977 .mask = BIT(5),
978 },
979 .decimator = {
980 .addr = 0x0a,
981 .mask = GENMASK(7, 6),
982 },
983 .freq_fine = 0x63,
984 .ts_sensitivity = 25000,
985 .ts_trim_coeff = 37500,
986 },
987 .shub_settings = {
988 .page_mux = {
989 .addr = 0x01,
990 .mask = BIT(6),
991 },
992 .master_en = {
993 .sec_page = true,
994 .addr = 0x14,
995 .mask = BIT(2),
996 },
997 .pullup_en = {
998 .sec_page = true,
999 .addr = 0x14,
1000 .mask = BIT(3),
1001 },
1002 .aux_sens = {
1003 .addr = 0x14,
1004 .mask = GENMASK(1, 0),
1005 },
1006 .wr_once = {
1007 .addr = 0x14,
1008 .mask = BIT(6),
1009 },
1010 .num_ext_dev = 3,
1011 .shub_out = {
1012 .sec_page = true,
1013 .addr = 0x02,
1014 },
1015 .slv0_addr = 0x15,
1016 .dw_slv0_addr = 0x21,
1017 .batch_en = BIT(3),
1018 },
1019 .event_settings = {
1020 .enable_reg = {
1021 .addr = 0x58,
1022 .mask = BIT(7),
1023 },
1024 .wakeup_reg = {
1025 .addr = 0x5b,
1026 .mask = GENMASK(5, 0),
1027 },
1028 .wakeup_src_reg = 0x1b,
1029 .wakeup_src_status_mask = BIT(3),
1030 .wakeup_src_z_mask = BIT(0),
1031 .wakeup_src_y_mask = BIT(1),
1032 .wakeup_src_x_mask = BIT(2),
1033 },
1034 },
1035 {
1036 .reset = {
1037 .addr = 0x12,
1038 .mask = BIT(0),
1039 },
1040 .boot = {
1041 .addr = 0x12,
1042 .mask = BIT(7),
1043 },
1044 .bdu = {
1045 .addr = 0x12,
1046 .mask = BIT(6),
1047 },
1048 .id = {
1049 {
1050 .hw_id = ST_ASM330LHH_ID,
1051 .name = ST_ASM330LHH_DEV_NAME,
1052 .wai = 0x6b,
1053 }, {
1054 .hw_id = ST_LSM6DSOP_ID,
1055 .name = ST_LSM6DSOP_DEV_NAME,
1056 .wai = 0x6c,
1057 }, {
1058 .hw_id = ST_ASM330LHB_ID,
1059 .name = ST_ASM330LHB_DEV_NAME,
1060 .wai = 0x6b,
1061 },
1062 },
1063 .channels = {
1064 [ST_LSM6DSX_ID_ACC] = {
1065 .chan = st_lsm6dsx_acc_channels,
1066 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1067 },
1068 [ST_LSM6DSX_ID_GYRO] = {
1069 .chan = st_lsm6dsx_gyro_channels,
1070 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1071 },
1072 },
1073 .drdy_mask = {
1074 .addr = 0x13,
1075 .mask = BIT(3),
1076 },
1077 .odr_table = {
1078 [ST_LSM6DSX_ID_ACC] = {
1079 .reg = {
1080 .addr = 0x10,
1081 .mask = GENMASK(7, 4),
1082 },
1083 .odr_avl[0] = { 12500, 0x01 },
1084 .odr_avl[1] = { 26000, 0x02 },
1085 .odr_avl[2] = { 52000, 0x03 },
1086 .odr_avl[3] = { 104000, 0x04 },
1087 .odr_avl[4] = { 208000, 0x05 },
1088 .odr_avl[5] = { 416000, 0x06 },
1089 .odr_avl[6] = { 833000, 0x07 },
1090 .odr_len = 7,
1091 },
1092 [ST_LSM6DSX_ID_GYRO] = {
1093 .reg = {
1094 .addr = 0x11,
1095 .mask = GENMASK(7, 4),
1096 },
1097 .odr_avl[0] = { 12500, 0x01 },
1098 .odr_avl[1] = { 26000, 0x02 },
1099 .odr_avl[2] = { 52000, 0x03 },
1100 .odr_avl[3] = { 104000, 0x04 },
1101 .odr_avl[4] = { 208000, 0x05 },
1102 .odr_avl[5] = { 416000, 0x06 },
1103 .odr_avl[6] = { 833000, 0x07 },
1104 .odr_len = 7,
1105 },
1106 },
1107 .fs_table = {
1108 [ST_LSM6DSX_ID_ACC] = {
1109 .reg = {
1110 .addr = 0x10,
1111 .mask = GENMASK(3, 2),
1112 },
1113 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1114 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1115 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1116 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1117 .fs_len = 4,
1118 },
1119 [ST_LSM6DSX_ID_GYRO] = {
1120 .reg = {
1121 .addr = 0x11,
1122 .mask = GENMASK(3, 2),
1123 },
1124 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1125 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1126 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1127 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1128 .fs_len = 4,
1129 },
1130 },
1131 .irq_config = {
1132 .irq1 = {
1133 .addr = 0x0d,
1134 .mask = BIT(3),
1135 },
1136 .irq2 = {
1137 .addr = 0x0e,
1138 .mask = BIT(3),
1139 },
1140 .lir = {
1141 .addr = 0x56,
1142 .mask = BIT(0),
1143 },
1144 .clear_on_read = {
1145 .addr = 0x56,
1146 .mask = BIT(6),
1147 },
1148 .irq1_func = {
1149 .addr = 0x5e,
1150 .mask = BIT(5),
1151 },
1152 .irq2_func = {
1153 .addr = 0x5f,
1154 .mask = BIT(5),
1155 },
1156 .hla = {
1157 .addr = 0x12,
1158 .mask = BIT(5),
1159 },
1160 .od = {
1161 .addr = 0x12,
1162 .mask = BIT(4),
1163 },
1164 },
1165 .batch = {
1166 [ST_LSM6DSX_ID_ACC] = {
1167 .addr = 0x09,
1168 .mask = GENMASK(3, 0),
1169 },
1170 [ST_LSM6DSX_ID_GYRO] = {
1171 .addr = 0x09,
1172 .mask = GENMASK(7, 4),
1173 },
1174 },
1175 .fifo_ops = {
1176 .update_fifo = st_lsm6dsx_update_fifo,
1177 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1178 .fifo_th = {
1179 .addr = 0x07,
1180 .mask = GENMASK(8, 0),
1181 },
1182 .fifo_diff = {
1183 .addr = 0x3a,
1184 .mask = GENMASK(9, 0),
1185 },
1186 .max_size = 512,
1187 .th_wl = 1,
1188 },
1189 .ts_settings = {
1190 .timer_en = {
1191 .addr = 0x19,
1192 .mask = BIT(5),
1193 },
1194 .decimator = {
1195 .addr = 0x0a,
1196 .mask = GENMASK(7, 6),
1197 },
1198 .freq_fine = 0x63,
1199 .ts_sensitivity = 25000,
1200 .ts_trim_coeff = 37500,
1201 },
1202 .event_settings = {
1203 .enable_reg = {
1204 .addr = 0x58,
1205 .mask = BIT(7),
1206 },
1207 .wakeup_reg = {
1208 .addr = 0x5B,
1209 .mask = GENMASK(5, 0),
1210 },
1211 .wakeup_src_reg = 0x1b,
1212 .wakeup_src_status_mask = BIT(3),
1213 .wakeup_src_z_mask = BIT(0),
1214 .wakeup_src_y_mask = BIT(1),
1215 .wakeup_src_x_mask = BIT(2),
1216 },
1217 },
1218 {
1219 .reset = {
1220 .addr = 0x12,
1221 .mask = BIT(0),
1222 },
1223 .boot = {
1224 .addr = 0x12,
1225 .mask = BIT(7),
1226 },
1227 .bdu = {
1228 .addr = 0x12,
1229 .mask = BIT(6),
1230 },
1231 .id = {
1232 {
1233 .hw_id = ST_LSM6DSV_ID,
1234 .name = ST_LSM6DSV_DEV_NAME,
1235 .wai = 0x70,
1236 }, {
1237 .hw_id = ST_LSM6DSV16X_ID,
1238 .name = ST_LSM6DSV16X_DEV_NAME,
1239 .wai = 0x70,
1240 },
1241 },
1242 .channels = {
1243 [ST_LSM6DSX_ID_ACC] = {
1244 .chan = st_lsm6dsx_acc_channels,
1245 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1246 },
1247 [ST_LSM6DSX_ID_GYRO] = {
1248 .chan = st_lsm6dsx_gyro_channels,
1249 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1250 },
1251 },
1252 .drdy_mask = {
1253 .addr = 0x13,
1254 .mask = BIT(3),
1255 },
1256 .odr_table = {
1257 [ST_LSM6DSX_ID_ACC] = {
1258 .reg = {
1259 .addr = 0x10,
1260 .mask = GENMASK(3, 0),
1261 },
1262 .odr_avl[0] = { 7500, 0x02 },
1263 .odr_avl[1] = { 15000, 0x03 },
1264 .odr_avl[2] = { 30000, 0x04 },
1265 .odr_avl[3] = { 60000, 0x05 },
1266 .odr_avl[4] = { 120000, 0x06 },
1267 .odr_avl[5] = { 240000, 0x07 },
1268 .odr_avl[6] = { 480000, 0x08 },
1269 .odr_avl[7] = { 960000, 0x09 },
1270 .odr_len = 8,
1271 },
1272 [ST_LSM6DSX_ID_GYRO] = {
1273 .reg = {
1274 .addr = 0x11,
1275 .mask = GENMASK(3, 0),
1276 },
1277 .odr_avl[0] = { 7500, 0x02 },
1278 .odr_avl[1] = { 15000, 0x03 },
1279 .odr_avl[2] = { 30000, 0x04 },
1280 .odr_avl[3] = { 60000, 0x05 },
1281 .odr_avl[4] = { 120000, 0x06 },
1282 .odr_avl[5] = { 240000, 0x07 },
1283 .odr_avl[6] = { 480000, 0x08 },
1284 .odr_avl[7] = { 960000, 0x09 },
1285 .odr_len = 8,
1286 },
1287 },
1288 .fs_table = {
1289 [ST_LSM6DSX_ID_ACC] = {
1290 .reg = {
1291 .addr = 0x17,
1292 .mask = GENMASK(1, 0),
1293 },
1294 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1295 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x1 },
1296 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x2 },
1297 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x3 },
1298 .fs_len = 4,
1299 },
1300 [ST_LSM6DSX_ID_GYRO] = {
1301 .reg = {
1302 .addr = 0x15,
1303 .mask = GENMASK(3, 0),
1304 },
1305 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x1 },
1306 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x2 },
1307 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x3 },
1308 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x4 },
1309 .fs_len = 4,
1310 },
1311 },
1312 .irq_config = {
1313 .irq1 = {
1314 .addr = 0x0d,
1315 .mask = BIT(3),
1316 },
1317 .irq2 = {
1318 .addr = 0x0e,
1319 .mask = BIT(3),
1320 },
1321 .lir = {
1322 .addr = 0x56,
1323 .mask = BIT(0),
1324 },
1325 .irq1_func = {
1326 .addr = 0x5e,
1327 .mask = BIT(5),
1328 },
1329 .irq2_func = {
1330 .addr = 0x5f,
1331 .mask = BIT(5),
1332 },
1333 .hla = {
1334 .addr = 0x03,
1335 .mask = BIT(4),
1336 },
1337 .od = {
1338 .addr = 0x03,
1339 .mask = BIT(3),
1340 },
1341 },
1342 .batch = {
1343 [ST_LSM6DSX_ID_ACC] = {
1344 .addr = 0x09,
1345 .mask = GENMASK(3, 0),
1346 },
1347 [ST_LSM6DSX_ID_GYRO] = {
1348 .addr = 0x09,
1349 .mask = GENMASK(7, 4),
1350 },
1351 },
1352 .fifo_ops = {
1353 .update_fifo = st_lsm6dsx_update_fifo,
1354 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1355 .fifo_th = {
1356 .addr = 0x07,
1357 .mask = GENMASK(7, 0),
1358 },
1359 .fifo_diff = {
1360 .addr = 0x1b,
1361 .mask = GENMASK(8, 0),
1362 },
1363 .max_size = 512,
1364 .th_wl = 1,
1365 },
1366 .ts_settings = {
1367 .timer_en = {
1368 .addr = 0x50,
1369 .mask = BIT(6),
1370 },
1371 .decimator = {
1372 .addr = 0x0a,
1373 .mask = GENMASK(7, 6),
1374 },
1375 .freq_fine = 0x4f,
1376 .ts_sensitivity = 21701,
1377 .ts_trim_coeff = 28212,
1378 },
1379 .shub_settings = {
1380 .page_mux = {
1381 .addr = 0x01,
1382 .mask = BIT(6),
1383 },
1384 .master_en = {
1385 .sec_page = true,
1386 .addr = 0x14,
1387 .mask = BIT(2),
1388 },
1389 .pullup_en = {
1390 .addr = 0x03,
1391 .mask = BIT(6),
1392 },
1393 .aux_sens = {
1394 .addr = 0x14,
1395 .mask = GENMASK(1, 0),
1396 },
1397 .wr_once = {
1398 .addr = 0x14,
1399 .mask = BIT(6),
1400 },
1401 .num_ext_dev = 3,
1402 .shub_out = {
1403 .sec_page = true,
1404 .addr = 0x02,
1405 },
1406 .slv0_addr = 0x15,
1407 .dw_slv0_addr = 0x21,
1408 .batch_en = BIT(3),
1409 },
1410 .event_settings = {
1411 .enable_reg = {
1412 .addr = 0x50,
1413 .mask = BIT(7),
1414 },
1415 .wakeup_reg = {
1416 .addr = 0x5b,
1417 .mask = GENMASK(5, 0),
1418 },
1419 .wakeup_src_reg = 0x45,
1420 .wakeup_src_status_mask = BIT(3),
1421 .wakeup_src_z_mask = BIT(0),
1422 .wakeup_src_y_mask = BIT(1),
1423 .wakeup_src_x_mask = BIT(2),
1424 },
1425 },
1426 {
1427 .reset = {
1428 .addr = 0x12,
1429 .mask = BIT(0),
1430 },
1431 .boot = {
1432 .addr = 0x12,
1433 .mask = BIT(7),
1434 },
1435 .bdu = {
1436 .addr = 0x12,
1437 .mask = BIT(6),
1438 },
1439 .id = {
1440 {
1441 .hw_id = ST_LSM6DSO16IS_ID,
1442 .name = ST_LSM6DSO16IS_DEV_NAME,
1443 .wai = 0x22,
1444 }, {
1445 .hw_id = ST_ISM330IS_ID,
1446 .name = ST_ISM330IS_DEV_NAME,
1447 .wai = 0x22,
1448 }
1449 },
1450 .channels = {
1451 [ST_LSM6DSX_ID_ACC] = {
1452 .chan = st_lsm6dsx_acc_channels,
1453 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1454 },
1455 [ST_LSM6DSX_ID_GYRO] = {
1456 .chan = st_lsm6dsx_gyro_channels,
1457 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1458 },
1459 },
1460 .odr_table = {
1461 [ST_LSM6DSX_ID_ACC] = {
1462 .reg = {
1463 .addr = 0x10,
1464 .mask = GENMASK(7, 4),
1465 },
1466 .odr_avl[0] = { 12500, 0x01 },
1467 .odr_avl[1] = { 26000, 0x02 },
1468 .odr_avl[2] = { 52000, 0x03 },
1469 .odr_avl[3] = { 104000, 0x04 },
1470 .odr_avl[4] = { 208000, 0x05 },
1471 .odr_avl[5] = { 416000, 0x06 },
1472 .odr_avl[6] = { 833000, 0x07 },
1473 .odr_len = 7,
1474 },
1475 [ST_LSM6DSX_ID_GYRO] = {
1476 .reg = {
1477 .addr = 0x11,
1478 .mask = GENMASK(7, 4),
1479 },
1480 .odr_avl[0] = { 12500, 0x01 },
1481 .odr_avl[1] = { 26000, 0x02 },
1482 .odr_avl[2] = { 52000, 0x03 },
1483 .odr_avl[3] = { 104000, 0x04 },
1484 .odr_avl[4] = { 208000, 0x05 },
1485 .odr_avl[5] = { 416000, 0x06 },
1486 .odr_avl[6] = { 833000, 0x07 },
1487 .odr_len = 7,
1488 },
1489 },
1490 .fs_table = {
1491 [ST_LSM6DSX_ID_ACC] = {
1492 .reg = {
1493 .addr = 0x10,
1494 .mask = GENMASK(3, 2),
1495 },
1496 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1497 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1498 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1499 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1500 .fs_len = 4,
1501 },
1502 [ST_LSM6DSX_ID_GYRO] = {
1503 .reg = {
1504 .addr = 0x11,
1505 .mask = GENMASK(3, 2),
1506 },
1507 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1508 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1509 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1510 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1511 .fs_len = 4,
1512 },
1513 },
1514 .irq_config = {
1515 .hla = {
1516 .addr = 0x12,
1517 .mask = BIT(5),
1518 },
1519 .od = {
1520 .addr = 0x12,
1521 .mask = BIT(4),
1522 },
1523 },
1524 .shub_settings = {
1525 .page_mux = {
1526 .addr = 0x01,
1527 .mask = BIT(6),
1528 },
1529 .master_en = {
1530 .sec_page = true,
1531 .addr = 0x14,
1532 .mask = BIT(2),
1533 },
1534 .pullup_en = {
1535 .sec_page = true,
1536 .addr = 0x14,
1537 .mask = BIT(3),
1538 },
1539 .aux_sens = {
1540 .addr = 0x14,
1541 .mask = GENMASK(1, 0),
1542 },
1543 .wr_once = {
1544 .addr = 0x14,
1545 .mask = BIT(6),
1546 },
1547 .num_ext_dev = 3,
1548 .shub_out = {
1549 .sec_page = true,
1550 .addr = 0x02,
1551 },
1552 .slv0_addr = 0x15,
1553 .dw_slv0_addr = 0x21,
1554 },
1555 },
1556 };
1557
st_lsm6dsx_set_page(struct st_lsm6dsx_hw * hw,bool enable)1558 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1559 {
1560 const struct st_lsm6dsx_shub_settings *hub_settings;
1561 unsigned int data;
1562 int err;
1563
1564 hub_settings = &hw->settings->shub_settings;
1565 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1566 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1567 hub_settings->page_mux.mask, data);
1568 usleep_range(100, 150);
1569
1570 return err;
1571 }
1572
st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw * hw,int id,const char ** name)1573 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1574 const char **name)
1575 {
1576 int err, i, j, data;
1577
1578 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1579 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1580 if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1581 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1582 break;
1583 }
1584 if (j < ST_LSM6DSX_MAX_ID)
1585 break;
1586 }
1587
1588 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1589 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1590 return -ENODEV;
1591 }
1592
1593 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1594 if (err < 0) {
1595 dev_err(hw->dev, "failed to read whoami register\n");
1596 return err;
1597 }
1598
1599 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
1600 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1601 return -ENODEV;
1602 }
1603
1604 *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1605 hw->settings = &st_lsm6dsx_sensor_settings[i];
1606
1607 return 0;
1608 }
1609
st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor * sensor,u32 gain)1610 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1611 u32 gain)
1612 {
1613 const struct st_lsm6dsx_fs_table_entry *fs_table;
1614 unsigned int data;
1615 int i, err;
1616
1617 fs_table = &sensor->hw->settings->fs_table[sensor->id];
1618 for (i = 0; i < fs_table->fs_len; i++) {
1619 if (fs_table->fs_avl[i].gain == gain)
1620 break;
1621 }
1622
1623 if (i == fs_table->fs_len)
1624 return -EINVAL;
1625
1626 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1627 fs_table->reg.mask);
1628 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1629 fs_table->reg.mask, data);
1630 if (err < 0)
1631 return err;
1632
1633 sensor->gain = gain;
1634
1635 return 0;
1636 }
1637
st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor * sensor,u32 odr,u8 * val)1638 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1639 {
1640 const struct st_lsm6dsx_odr_table_entry *odr_table;
1641 int i;
1642
1643 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1644 for (i = 0; i < odr_table->odr_len; i++) {
1645 /*
1646 * ext devices can run at different odr respect to
1647 * accel sensor
1648 */
1649 if (odr_table->odr_avl[i].milli_hz >= odr)
1650 break;
1651 }
1652
1653 if (i == odr_table->odr_len)
1654 return -EINVAL;
1655
1656 *val = odr_table->odr_avl[i].val;
1657 return odr_table->odr_avl[i].milli_hz;
1658 }
1659
1660 static int
st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw * hw,u32 odr,enum st_lsm6dsx_sensor_id id)1661 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1662 enum st_lsm6dsx_sensor_id id)
1663 {
1664 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1665
1666 if (odr > 0) {
1667 if (hw->enable_mask & BIT(id))
1668 return max_t(u32, ref->odr, odr);
1669 else
1670 return odr;
1671 } else {
1672 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1673 }
1674 }
1675
1676 static int
st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor * sensor,u32 req_odr)1677 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1678 {
1679 struct st_lsm6dsx_sensor *ref_sensor = sensor;
1680 struct st_lsm6dsx_hw *hw = sensor->hw;
1681 const struct st_lsm6dsx_reg *reg;
1682 unsigned int data;
1683 u8 val = 0;
1684 int err;
1685
1686 switch (sensor->id) {
1687 case ST_LSM6DSX_ID_GYRO:
1688 break;
1689 case ST_LSM6DSX_ID_EXT0:
1690 case ST_LSM6DSX_ID_EXT1:
1691 case ST_LSM6DSX_ID_EXT2:
1692 case ST_LSM6DSX_ID_ACC: {
1693 u32 odr;
1694 int i;
1695
1696 /*
1697 * i2c embedded controller relies on the accelerometer sensor as
1698 * bus read/write trigger so we need to enable accel device
1699 * at odr = max(accel_odr, ext_odr) in order to properly
1700 * communicate with i2c slave devices
1701 */
1702 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1703 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1704 if (!hw->iio_devs[i] || i == sensor->id)
1705 continue;
1706
1707 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1708 if (odr != req_odr)
1709 /* device already configured */
1710 return 0;
1711 }
1712 break;
1713 }
1714 default: /* should never occur */
1715 return -EINVAL;
1716 }
1717
1718 if (req_odr > 0) {
1719 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1720 if (err < 0)
1721 return err;
1722 }
1723
1724 reg = &hw->settings->odr_table[ref_sensor->id].reg;
1725 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1726 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1727 }
1728
1729 static int
__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1730 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1731 bool enable)
1732 {
1733 struct st_lsm6dsx_hw *hw = sensor->hw;
1734 u32 odr = enable ? sensor->odr : 0;
1735 int err;
1736
1737 err = st_lsm6dsx_set_odr(sensor, odr);
1738 if (err < 0)
1739 return err;
1740
1741 if (enable)
1742 hw->enable_mask |= BIT(sensor->id);
1743 else
1744 hw->enable_mask &= ~BIT(sensor->id);
1745
1746 return 0;
1747 }
1748
1749 static int
st_lsm6dsx_check_events(struct st_lsm6dsx_sensor * sensor,bool enable)1750 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1751 {
1752 struct st_lsm6dsx_hw *hw = sensor->hw;
1753
1754 if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1755 return 0;
1756
1757 return hw->enable_event;
1758 }
1759
st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1760 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1761 bool enable)
1762 {
1763 if (st_lsm6dsx_check_events(sensor, enable))
1764 return 0;
1765
1766 return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1767 }
1768
st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor * sensor,u8 addr,int * val)1769 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1770 u8 addr, int *val)
1771 {
1772 struct st_lsm6dsx_hw *hw = sensor->hw;
1773 int err, delay;
1774 __le16 data;
1775
1776 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1777 if (err < 0)
1778 return err;
1779
1780 /*
1781 * we need to wait for sensor settling time before
1782 * reading data in order to avoid corrupted samples
1783 */
1784 delay = 1000000000 / sensor->odr;
1785 usleep_range(3 * delay, 4 * delay);
1786
1787 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1788 if (err < 0)
1789 return err;
1790
1791 if (!hw->enable_event) {
1792 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1793 if (err < 0)
1794 return err;
1795 }
1796
1797 *val = (s16)le16_to_cpu(data);
1798
1799 return IIO_VAL_INT;
1800 }
1801
st_lsm6dsx_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)1802 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1803 struct iio_chan_spec const *ch,
1804 int *val, int *val2, long mask)
1805 {
1806 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1807 int ret;
1808
1809 switch (mask) {
1810 case IIO_CHAN_INFO_RAW:
1811 if (!iio_device_claim_direct(iio_dev))
1812 return -EBUSY;
1813
1814 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1815 iio_device_release_direct(iio_dev);
1816 break;
1817 case IIO_CHAN_INFO_SAMP_FREQ:
1818 *val = sensor->odr / 1000;
1819 *val2 = (sensor->odr % 1000) * 1000;
1820 ret = IIO_VAL_INT_PLUS_MICRO;
1821 break;
1822 case IIO_CHAN_INFO_SCALE:
1823 *val = 0;
1824 *val2 = sensor->gain;
1825 ret = IIO_VAL_INT_PLUS_NANO;
1826 break;
1827 default:
1828 ret = -EINVAL;
1829 break;
1830 }
1831
1832 return ret;
1833 }
1834
st_lsm6dsx_write_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)1835 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1836 struct iio_chan_spec const *chan,
1837 int val, int val2, long mask)
1838 {
1839 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1840 int err = 0;
1841
1842 if (!iio_device_claim_direct(iio_dev))
1843 return -EBUSY;
1844
1845 switch (mask) {
1846 case IIO_CHAN_INFO_SCALE:
1847 err = st_lsm6dsx_set_full_scale(sensor, val2);
1848 break;
1849 case IIO_CHAN_INFO_SAMP_FREQ: {
1850 u8 data;
1851
1852 val = val * 1000 + val2 / 1000;
1853 val = st_lsm6dsx_check_odr(sensor, val, &data);
1854 if (val < 0)
1855 err = val;
1856 else
1857 sensor->odr = val;
1858 break;
1859 }
1860 default:
1861 err = -EINVAL;
1862 break;
1863 }
1864
1865 iio_device_release_direct(iio_dev);
1866
1867 return err;
1868 }
1869
st_lsm6dsx_event_setup(struct st_lsm6dsx_hw * hw,bool state)1870 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state)
1871 {
1872 const struct st_lsm6dsx_reg *reg;
1873 unsigned int data;
1874 int err;
1875
1876 if (!hw->settings->irq_config.irq1_func.addr)
1877 return -ENOTSUPP;
1878
1879 reg = &hw->settings->event_settings.enable_reg;
1880 if (reg->addr) {
1881 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1882 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1883 reg->mask, data);
1884 if (err < 0)
1885 return err;
1886 }
1887
1888 /* Enable wakeup interrupt */
1889 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1890 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1891 hw->irq_routing->mask, data);
1892 }
1893
st_lsm6dsx_read_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1894 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1895 const struct iio_chan_spec *chan,
1896 enum iio_event_type type,
1897 enum iio_event_direction dir,
1898 enum iio_event_info info,
1899 int *val, int *val2)
1900 {
1901 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1902 struct st_lsm6dsx_hw *hw = sensor->hw;
1903
1904 if (type != IIO_EV_TYPE_THRESH)
1905 return -EINVAL;
1906
1907 *val2 = 0;
1908 *val = hw->event_threshold;
1909
1910 return IIO_VAL_INT;
1911 }
1912
1913 static int
st_lsm6dsx_write_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1914 st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1915 const struct iio_chan_spec *chan,
1916 enum iio_event_type type,
1917 enum iio_event_direction dir,
1918 enum iio_event_info info,
1919 int val, int val2)
1920 {
1921 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1922 struct st_lsm6dsx_hw *hw = sensor->hw;
1923 const struct st_lsm6dsx_reg *reg;
1924 unsigned int data;
1925 int err;
1926
1927 if (type != IIO_EV_TYPE_THRESH)
1928 return -EINVAL;
1929
1930 if (val < 0 || val > 31)
1931 return -EINVAL;
1932
1933 reg = &hw->settings->event_settings.wakeup_reg;
1934 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1935 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1936 reg->mask, data);
1937 if (err < 0)
1938 return -EINVAL;
1939
1940 hw->event_threshold = val;
1941
1942 return 0;
1943 }
1944
1945 static int
st_lsm6dsx_read_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1946 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1947 const struct iio_chan_spec *chan,
1948 enum iio_event_type type,
1949 enum iio_event_direction dir)
1950 {
1951 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1952 struct st_lsm6dsx_hw *hw = sensor->hw;
1953
1954 if (type != IIO_EV_TYPE_THRESH)
1955 return -EINVAL;
1956
1957 return !!(hw->enable_event & BIT(chan->channel2));
1958 }
1959
1960 static int
st_lsm6dsx_write_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,bool state)1961 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1962 const struct iio_chan_spec *chan,
1963 enum iio_event_type type,
1964 enum iio_event_direction dir, bool state)
1965 {
1966 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1967 struct st_lsm6dsx_hw *hw = sensor->hw;
1968 u8 enable_event;
1969 int err;
1970
1971 if (type != IIO_EV_TYPE_THRESH)
1972 return -EINVAL;
1973
1974 if (state) {
1975 enable_event = hw->enable_event | BIT(chan->channel2);
1976
1977 /* do not enable events if they are already enabled */
1978 if (hw->enable_event)
1979 goto out;
1980 } else {
1981 enable_event = hw->enable_event & ~BIT(chan->channel2);
1982
1983 /* only turn off sensor if no events is enabled */
1984 if (enable_event)
1985 goto out;
1986 }
1987
1988 /* stop here if no changes have been made */
1989 if (hw->enable_event == enable_event)
1990 return 0;
1991
1992 err = st_lsm6dsx_event_setup(hw, state);
1993 if (err < 0)
1994 return err;
1995
1996 mutex_lock(&hw->conf_lock);
1997 if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
1998 err = __st_lsm6dsx_sensor_set_enable(sensor, state);
1999 mutex_unlock(&hw->conf_lock);
2000 if (err < 0)
2001 return err;
2002
2003 out:
2004 hw->enable_event = enable_event;
2005
2006 return 0;
2007 }
2008
st_lsm6dsx_set_watermark(struct iio_dev * iio_dev,unsigned int val)2009 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
2010 {
2011 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2012 struct st_lsm6dsx_hw *hw = sensor->hw;
2013 int err;
2014
2015 val = clamp_val(val, 1, hw->settings->fifo_ops.max_size);
2016
2017 mutex_lock(&hw->conf_lock);
2018
2019 err = st_lsm6dsx_update_watermark(sensor, val);
2020
2021 mutex_unlock(&hw->conf_lock);
2022
2023 if (err < 0)
2024 return err;
2025
2026 sensor->watermark = val;
2027
2028 return 0;
2029 }
2030
2031 static ssize_t
st_lsm6dsx_sysfs_sampling_frequency_avail(struct device * dev,struct device_attribute * attr,char * buf)2032 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
2033 struct device_attribute *attr,
2034 char *buf)
2035 {
2036 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
2037 const struct st_lsm6dsx_odr_table_entry *odr_table;
2038 int i, len = 0;
2039
2040 odr_table = &sensor->hw->settings->odr_table[sensor->id];
2041 for (i = 0; i < odr_table->odr_len; i++)
2042 len += sysfs_emit_at(buf, len, "%d.%03d%c",
2043 odr_table->odr_avl[i].milli_hz / 1000,
2044 odr_table->odr_avl[i].milli_hz % 1000,
2045 (i == odr_table->odr_len - 1) ? '\n' : ' ');
2046
2047 return len;
2048 }
2049
st_lsm6dsx_sysfs_scale_avail(struct device * dev,struct device_attribute * attr,char * buf)2050 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
2051 struct device_attribute *attr,
2052 char *buf)
2053 {
2054 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
2055 const struct st_lsm6dsx_fs_table_entry *fs_table;
2056 struct st_lsm6dsx_hw *hw = sensor->hw;
2057 int i, len = 0;
2058
2059 fs_table = &hw->settings->fs_table[sensor->id];
2060 for (i = 0; i < fs_table->fs_len; i++)
2061 len += sysfs_emit_at(buf, len, "0.%09u%c",
2062 fs_table->fs_avl[i].gain,
2063 (i == fs_table->fs_len - 1) ? '\n' : ' ');
2064
2065 return len;
2066 }
2067
st_lsm6dsx_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)2068 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
2069 struct iio_chan_spec const *chan,
2070 long mask)
2071 {
2072 switch (mask) {
2073 case IIO_CHAN_INFO_SCALE:
2074 switch (chan->type) {
2075 case IIO_ANGL_VEL:
2076 case IIO_ACCEL:
2077 return IIO_VAL_INT_PLUS_NANO;
2078 default:
2079 return IIO_VAL_INT_PLUS_MICRO;
2080 }
2081 default:
2082 return IIO_VAL_INT_PLUS_MICRO;
2083 }
2084 }
2085
2086 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
2087 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
2088 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
2089 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
2090 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
2091
2092 static struct attribute *st_lsm6dsx_acc_attributes[] = {
2093 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
2094 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
2095 NULL,
2096 };
2097
2098 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
2099 .attrs = st_lsm6dsx_acc_attributes,
2100 };
2101
2102 static const struct iio_info st_lsm6dsx_acc_info = {
2103 .attrs = &st_lsm6dsx_acc_attribute_group,
2104 .read_raw = st_lsm6dsx_read_raw,
2105 .write_raw = st_lsm6dsx_write_raw,
2106 .read_event_value = st_lsm6dsx_read_event,
2107 .write_event_value = st_lsm6dsx_write_event,
2108 .read_event_config = st_lsm6dsx_read_event_config,
2109 .write_event_config = st_lsm6dsx_write_event_config,
2110 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
2111 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
2112 };
2113
2114 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
2115 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
2116 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
2117 NULL,
2118 };
2119
2120 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
2121 .attrs = st_lsm6dsx_gyro_attributes,
2122 };
2123
2124 static const struct iio_info st_lsm6dsx_gyro_info = {
2125 .attrs = &st_lsm6dsx_gyro_attribute_group,
2126 .read_raw = st_lsm6dsx_read_raw,
2127 .write_raw = st_lsm6dsx_write_raw,
2128 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
2129 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
2130 };
2131
2132 static int
st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw * hw,const struct st_lsm6dsx_reg ** drdy_reg)2133 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
2134 const struct st_lsm6dsx_reg **drdy_reg)
2135 {
2136 struct device *dev = hw->dev;
2137 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2138 int err = 0, drdy_pin;
2139
2140 if (device_property_read_u32(dev, "st,drdy-int-pin", &drdy_pin) < 0)
2141 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
2142
2143 switch (drdy_pin) {
2144 case 1:
2145 hw->irq_routing = &hw->settings->irq_config.irq1_func;
2146 *drdy_reg = &hw->settings->irq_config.irq1;
2147 break;
2148 case 2:
2149 hw->irq_routing = &hw->settings->irq_config.irq2_func;
2150 *drdy_reg = &hw->settings->irq_config.irq2;
2151 break;
2152 default:
2153 dev_err(hw->dev, "unsupported data ready pin\n");
2154 err = -EINVAL;
2155 break;
2156 }
2157
2158 return err;
2159 }
2160
st_lsm6dsx_init_shub(struct st_lsm6dsx_hw * hw)2161 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
2162 {
2163 const struct st_lsm6dsx_shub_settings *hub_settings;
2164 struct device *dev = hw->dev;
2165 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2166 unsigned int data;
2167 int err = 0;
2168
2169 hub_settings = &hw->settings->shub_settings;
2170
2171 if (device_property_read_bool(dev, "st,pullups") ||
2172 (pdata && pdata->pullups)) {
2173 if (hub_settings->pullup_en.sec_page) {
2174 err = st_lsm6dsx_set_page(hw, true);
2175 if (err < 0)
2176 return err;
2177 }
2178
2179 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
2180 err = regmap_update_bits(hw->regmap,
2181 hub_settings->pullup_en.addr,
2182 hub_settings->pullup_en.mask, data);
2183
2184 if (hub_settings->pullup_en.sec_page)
2185 st_lsm6dsx_set_page(hw, false);
2186
2187 if (err < 0)
2188 return err;
2189 }
2190
2191 if (hub_settings->aux_sens.addr) {
2192 /* configure aux sensors */
2193 err = st_lsm6dsx_set_page(hw, true);
2194 if (err < 0)
2195 return err;
2196
2197 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
2198 err = regmap_update_bits(hw->regmap,
2199 hub_settings->aux_sens.addr,
2200 hub_settings->aux_sens.mask, data);
2201
2202 st_lsm6dsx_set_page(hw, false);
2203
2204 if (err < 0)
2205 return err;
2206 }
2207
2208 if (hub_settings->emb_func.addr) {
2209 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
2210 err = regmap_update_bits(hw->regmap,
2211 hub_settings->emb_func.addr,
2212 hub_settings->emb_func.mask, data);
2213 }
2214
2215 return err;
2216 }
2217
st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw * hw)2218 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
2219 {
2220 const struct st_lsm6dsx_hw_ts_settings *ts_settings;
2221 int err, val;
2222
2223 ts_settings = &hw->settings->ts_settings;
2224 /* enable hw timestamp generation if necessary */
2225 if (ts_settings->timer_en.addr) {
2226 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
2227 err = regmap_update_bits(hw->regmap,
2228 ts_settings->timer_en.addr,
2229 ts_settings->timer_en.mask, val);
2230 if (err < 0)
2231 return err;
2232 }
2233
2234 /* enable high resolution for hw ts timer if necessary */
2235 if (ts_settings->hr_timer.addr) {
2236 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
2237 err = regmap_update_bits(hw->regmap,
2238 ts_settings->hr_timer.addr,
2239 ts_settings->hr_timer.mask, val);
2240 if (err < 0)
2241 return err;
2242 }
2243
2244 /* enable ts queueing in FIFO if necessary */
2245 if (ts_settings->fifo_en.addr) {
2246 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
2247 err = regmap_update_bits(hw->regmap,
2248 ts_settings->fifo_en.addr,
2249 ts_settings->fifo_en.mask, val);
2250 if (err < 0)
2251 return err;
2252 }
2253
2254 /* calibrate timestamp sensitivity */
2255 hw->ts_gain = ts_settings->ts_sensitivity;
2256 if (ts_settings->freq_fine) {
2257 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
2258 if (err < 0)
2259 return err;
2260
2261 hw->ts_gain -= ((s8)val * ts_settings->ts_trim_coeff) / 1000;
2262 }
2263
2264 return 0;
2265 }
2266
st_lsm6dsx_reset_device(struct st_lsm6dsx_hw * hw)2267 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
2268 {
2269 const struct st_lsm6dsx_reg *reg;
2270 int err;
2271
2272 /*
2273 * flush hw FIFO before device reset in order to avoid
2274 * possible races on interrupt line 1. If the first interrupt
2275 * line is asserted during hw reset the device will work in
2276 * I3C-only mode (if it is supported)
2277 */
2278 err = st_lsm6dsx_flush_fifo(hw);
2279 if (err < 0 && err != -ENOTSUPP)
2280 return err;
2281
2282 /* device sw reset */
2283 reg = &hw->settings->reset;
2284 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2285 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2286 if (err < 0)
2287 return err;
2288
2289 msleep(50);
2290
2291 /* reload trimming parameter */
2292 reg = &hw->settings->boot;
2293 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2294 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2295 if (err < 0)
2296 return err;
2297
2298 msleep(50);
2299
2300 return 0;
2301 }
2302
st_lsm6dsx_init_device(struct st_lsm6dsx_hw * hw)2303 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
2304 {
2305 const struct st_lsm6dsx_reg *reg;
2306 int err;
2307
2308 err = st_lsm6dsx_reset_device(hw);
2309 if (err < 0)
2310 return err;
2311
2312 /* enable Block Data Update */
2313 reg = &hw->settings->bdu;
2314 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2315 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2316 if (err < 0)
2317 return err;
2318
2319 /* enable FIFO watermak interrupt */
2320 err = st_lsm6dsx_get_drdy_reg(hw, ®);
2321 if (err < 0)
2322 return err;
2323
2324 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2325 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2326 if (err < 0)
2327 return err;
2328
2329 /* enable Latched interrupts for device events */
2330 if (hw->settings->irq_config.lir.addr) {
2331 reg = &hw->settings->irq_config.lir;
2332 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2333 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2334 if (err < 0)
2335 return err;
2336
2337 /* enable clear on read for latched interrupts */
2338 if (hw->settings->irq_config.clear_on_read.addr) {
2339 reg = &hw->settings->irq_config.clear_on_read;
2340 err = regmap_update_bits(hw->regmap,
2341 reg->addr, reg->mask,
2342 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2343 if (err < 0)
2344 return err;
2345 }
2346 }
2347
2348 /* enable drdy-mas if available */
2349 if (hw->settings->drdy_mask.addr) {
2350 reg = &hw->settings->drdy_mask;
2351 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2352 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2353 if (err < 0)
2354 return err;
2355 }
2356
2357 err = st_lsm6dsx_init_shub(hw);
2358 if (err < 0)
2359 return err;
2360
2361 return st_lsm6dsx_init_hw_timer(hw);
2362 }
2363
st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_sensor_id id,const char * name)2364 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
2365 enum st_lsm6dsx_sensor_id id,
2366 const char *name)
2367 {
2368 struct st_lsm6dsx_sensor *sensor;
2369 struct iio_dev *iio_dev;
2370
2371 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
2372 if (!iio_dev)
2373 return NULL;
2374
2375 iio_dev->modes = INDIO_DIRECT_MODE;
2376 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
2377 iio_dev->channels = hw->settings->channels[id].chan;
2378 iio_dev->num_channels = hw->settings->channels[id].len;
2379
2380 sensor = iio_priv(iio_dev);
2381 sensor->id = id;
2382 sensor->hw = hw;
2383 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2384 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2385 sensor->watermark = 1;
2386
2387 switch (id) {
2388 case ST_LSM6DSX_ID_ACC:
2389 iio_dev->info = &st_lsm6dsx_acc_info;
2390 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2391 name);
2392 break;
2393 case ST_LSM6DSX_ID_GYRO:
2394 iio_dev->info = &st_lsm6dsx_gyro_info;
2395 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2396 name);
2397 break;
2398 default:
2399 return NULL;
2400 }
2401 iio_dev->name = sensor->name;
2402
2403 return iio_dev;
2404 }
2405
2406 static bool
st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw * hw)2407 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2408 {
2409 const struct st_lsm6dsx_event_settings *event_settings;
2410 int err, data;
2411 s64 timestamp;
2412
2413 if (!hw->enable_event)
2414 return false;
2415
2416 event_settings = &hw->settings->event_settings;
2417 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2418 &data, sizeof(data));
2419 if (err < 0)
2420 return false;
2421
2422 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2423 if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2424 (hw->enable_event & BIT(IIO_MOD_Z)))
2425 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2426 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2427 0,
2428 IIO_MOD_Z,
2429 IIO_EV_TYPE_THRESH,
2430 IIO_EV_DIR_EITHER),
2431 timestamp);
2432
2433 if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2434 (hw->enable_event & BIT(IIO_MOD_Y)))
2435 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2436 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2437 0,
2438 IIO_MOD_Y,
2439 IIO_EV_TYPE_THRESH,
2440 IIO_EV_DIR_EITHER),
2441 timestamp);
2442
2443 if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2444 (hw->enable_event & BIT(IIO_MOD_X)))
2445 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2446 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2447 0,
2448 IIO_MOD_X,
2449 IIO_EV_TYPE_THRESH,
2450 IIO_EV_DIR_EITHER),
2451 timestamp);
2452
2453 return data & event_settings->wakeup_src_status_mask;
2454 }
2455
st_lsm6dsx_handler_thread(int irq,void * private)2456 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2457 {
2458 struct st_lsm6dsx_hw *hw = private;
2459 int fifo_len = 0, len;
2460 bool event;
2461
2462 event = st_lsm6dsx_report_motion_event(hw);
2463
2464 if (!hw->settings->fifo_ops.read_fifo)
2465 return event ? IRQ_HANDLED : IRQ_NONE;
2466
2467 /*
2468 * If we are using edge IRQs, new samples can arrive while
2469 * processing current interrupt since there are no hw
2470 * guarantees the irq line stays "low" long enough to properly
2471 * detect the new interrupt. In this case the new sample will
2472 * be missed.
2473 * Polling FIFO status register allow us to read new
2474 * samples even if the interrupt arrives while processing
2475 * previous data and the timeslot where the line is "low" is
2476 * too short to be properly detected.
2477 */
2478 do {
2479 mutex_lock(&hw->fifo_lock);
2480 len = hw->settings->fifo_ops.read_fifo(hw);
2481 mutex_unlock(&hw->fifo_lock);
2482
2483 if (len > 0)
2484 fifo_len += len;
2485 } while (len > 0);
2486
2487 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
2488 }
2489
st_lsm6dsx_sw_trigger_handler_thread(int irq,void * private)2490 static irqreturn_t st_lsm6dsx_sw_trigger_handler_thread(int irq,
2491 void *private)
2492 {
2493 struct iio_poll_func *pf = private;
2494 struct iio_dev *iio_dev = pf->indio_dev;
2495 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2496 struct st_lsm6dsx_hw *hw = sensor->hw;
2497
2498 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2499 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2500 sensor->id == ST_LSM6DSX_ID_EXT2)
2501 st_lsm6dsx_shub_read_output(hw,
2502 (u8 *)hw->scan[sensor->id].channels,
2503 sizeof(hw->scan[sensor->id].channels));
2504 else
2505 st_lsm6dsx_read_locked(hw, iio_dev->channels[0].address,
2506 hw->scan[sensor->id].channels,
2507 sizeof(hw->scan[sensor->id].channels));
2508
2509 iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan[sensor->id],
2510 iio_get_time_ns(iio_dev));
2511 iio_trigger_notify_done(iio_dev->trig);
2512
2513 return IRQ_HANDLED;
2514 }
2515
st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw * hw)2516 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2517 {
2518 const struct st_lsm6dsx_reg *reg;
2519 struct device *dev = hw->dev;
2520 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2521 unsigned long irq_type;
2522 bool irq_active_low;
2523 int err;
2524
2525 irq_type = irq_get_trigger_type(hw->irq);
2526 switch (irq_type) {
2527 case IRQF_TRIGGER_HIGH:
2528 case IRQF_TRIGGER_RISING:
2529 irq_active_low = false;
2530 break;
2531 case IRQF_TRIGGER_LOW:
2532 case IRQF_TRIGGER_FALLING:
2533 irq_active_low = true;
2534 break;
2535 default:
2536 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2537 return -EINVAL;
2538 }
2539
2540 reg = &hw->settings->irq_config.hla;
2541 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2542 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2543 reg->mask));
2544 if (err < 0)
2545 return err;
2546
2547 if (device_property_read_bool(dev, "drive-open-drain") ||
2548 (pdata && pdata->open_drain)) {
2549 reg = &hw->settings->irq_config.od;
2550 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2551 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2552 if (err < 0)
2553 return err;
2554
2555 irq_type |= IRQF_SHARED;
2556 }
2557
2558 err = devm_request_threaded_irq(hw->dev, hw->irq,
2559 NULL,
2560 st_lsm6dsx_handler_thread,
2561 irq_type | IRQF_ONESHOT,
2562 "lsm6dsx", hw);
2563 if (err) {
2564 dev_err(hw->dev, "failed to request trigger irq %d\n",
2565 hw->irq);
2566 return err;
2567 }
2568
2569 return 0;
2570 }
2571
st_lsm6dsx_sw_buffer_preenable(struct iio_dev * iio_dev)2572 static int st_lsm6dsx_sw_buffer_preenable(struct iio_dev *iio_dev)
2573 {
2574 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2575
2576 return st_lsm6dsx_device_set_enable(sensor, true);
2577 }
2578
st_lsm6dsx_sw_buffer_postdisable(struct iio_dev * iio_dev)2579 static int st_lsm6dsx_sw_buffer_postdisable(struct iio_dev *iio_dev)
2580 {
2581 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2582
2583 return st_lsm6dsx_device_set_enable(sensor, false);
2584 }
2585
2586 static const struct iio_buffer_setup_ops st_lsm6dsx_sw_buffer_ops = {
2587 .preenable = st_lsm6dsx_sw_buffer_preenable,
2588 .postdisable = st_lsm6dsx_sw_buffer_postdisable,
2589 };
2590
st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw * hw)2591 static int st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw *hw)
2592 {
2593 int i;
2594
2595 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2596 int err;
2597
2598 if (!hw->iio_devs[i])
2599 continue;
2600
2601 err = devm_iio_triggered_buffer_setup(hw->dev,
2602 hw->iio_devs[i], NULL,
2603 st_lsm6dsx_sw_trigger_handler_thread,
2604 &st_lsm6dsx_sw_buffer_ops);
2605 if (err)
2606 return err;
2607 }
2608
2609 return 0;
2610 }
2611
st_lsm6dsx_init_regulators(struct device * dev)2612 static int st_lsm6dsx_init_regulators(struct device *dev)
2613 {
2614 /* vdd-vddio power regulators */
2615 static const char * const regulators[] = { "vdd", "vddio" };
2616 int err;
2617
2618 err = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
2619 regulators);
2620 if (err)
2621 return dev_err_probe(dev, err, "failed to enable regulators\n");
2622
2623 msleep(50);
2624
2625 return 0;
2626 }
2627
st_lsm6dsx_probe(struct device * dev,int irq,int hw_id,struct regmap * regmap)2628 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2629 struct regmap *regmap)
2630 {
2631 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2632 const struct st_lsm6dsx_shub_settings *hub_settings;
2633 struct st_lsm6dsx_hw *hw;
2634 const char *name = NULL;
2635 int i, err;
2636
2637 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2638 if (!hw)
2639 return -ENOMEM;
2640
2641 dev_set_drvdata(dev, hw);
2642
2643 mutex_init(&hw->fifo_lock);
2644 mutex_init(&hw->conf_lock);
2645 mutex_init(&hw->page_lock);
2646
2647 err = st_lsm6dsx_init_regulators(dev);
2648 if (err)
2649 return err;
2650
2651 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2652 if (!hw->buff)
2653 return -ENOMEM;
2654
2655 hw->dev = dev;
2656 hw->irq = irq;
2657 hw->regmap = regmap;
2658
2659 err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2660 if (err < 0)
2661 return err;
2662
2663 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2664 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2665 if (!hw->iio_devs[i])
2666 return -ENOMEM;
2667 }
2668
2669 err = st_lsm6dsx_init_device(hw);
2670 if (err < 0)
2671 return err;
2672
2673 hub_settings = &hw->settings->shub_settings;
2674 if (hub_settings->master_en.addr &&
2675 !device_property_read_bool(dev, "st,disable-sensor-hub")) {
2676 err = st_lsm6dsx_shub_probe(hw, name);
2677 if (err < 0)
2678 return err;
2679 }
2680
2681 if (hw->irq > 0) {
2682 err = st_lsm6dsx_irq_setup(hw);
2683 if (err < 0)
2684 return err;
2685
2686 err = st_lsm6dsx_fifo_setup(hw);
2687 if (err < 0)
2688 return err;
2689 }
2690
2691 if (!hw->irq || !hw->settings->fifo_ops.read_fifo) {
2692 /*
2693 * Rely on sw triggers (e.g. hr-timers) if irq pin is not
2694 * connected of if the device does not support HW FIFO
2695 */
2696 err = st_lsm6dsx_sw_buffers_setup(hw);
2697 if (err)
2698 return err;
2699 }
2700
2701 if (!iio_read_acpi_mount_matrix(hw->dev, &hw->orientation, "ROTM")) {
2702 err = iio_read_mount_matrix(hw->dev, &hw->orientation);
2703 if (err)
2704 return err;
2705 }
2706
2707 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2708 if (!hw->iio_devs[i])
2709 continue;
2710
2711 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2712 if (err)
2713 return err;
2714 }
2715
2716 if (device_property_read_bool(dev, "wakeup-source") ||
2717 (pdata && pdata->wakeup_source)) {
2718 err = devm_device_init_wakeup(dev);
2719 if (err)
2720 return dev_err_probe(dev, err, "Failed to init wakeup\n");
2721 }
2722
2723 return 0;
2724 }
2725 EXPORT_SYMBOL_NS(st_lsm6dsx_probe, "IIO_LSM6DSX");
2726
st_lsm6dsx_suspend(struct device * dev)2727 static int st_lsm6dsx_suspend(struct device *dev)
2728 {
2729 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2730 struct st_lsm6dsx_sensor *sensor;
2731 int i, err = 0;
2732
2733 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2734 if (!hw->iio_devs[i])
2735 continue;
2736
2737 sensor = iio_priv(hw->iio_devs[i]);
2738 if (!(hw->enable_mask & BIT(sensor->id)))
2739 continue;
2740
2741 if (device_may_wakeup(dev) &&
2742 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2743 /* Enable wake from IRQ */
2744 enable_irq_wake(hw->irq);
2745 continue;
2746 }
2747
2748 err = st_lsm6dsx_device_set_enable(sensor, false);
2749 if (err < 0)
2750 return err;
2751
2752 hw->suspend_mask |= BIT(sensor->id);
2753 }
2754
2755 if (hw->fifo_mask)
2756 err = st_lsm6dsx_flush_fifo(hw);
2757
2758 return err;
2759 }
2760
st_lsm6dsx_resume(struct device * dev)2761 static int st_lsm6dsx_resume(struct device *dev)
2762 {
2763 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2764 struct st_lsm6dsx_sensor *sensor;
2765 int i, err = 0;
2766
2767 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2768 if (!hw->iio_devs[i])
2769 continue;
2770
2771 sensor = iio_priv(hw->iio_devs[i]);
2772 if (device_may_wakeup(dev) &&
2773 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2774 disable_irq_wake(hw->irq);
2775
2776 if (!(hw->suspend_mask & BIT(sensor->id)))
2777 continue;
2778
2779 err = st_lsm6dsx_device_set_enable(sensor, true);
2780 if (err < 0)
2781 return err;
2782
2783 hw->suspend_mask &= ~BIT(sensor->id);
2784 }
2785
2786 if (hw->fifo_mask)
2787 err = st_lsm6dsx_resume_fifo(hw);
2788
2789 return err;
2790 }
2791
2792 EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend,
2793 st_lsm6dsx_resume, IIO_LSM6DSX);
2794
2795 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2796 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2797 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2798 MODULE_LICENSE("GPL v2");
2799