1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Fast Path Operators 37 */ 38 39 #define dev_fmt(fmt) "QPLIB: " fmt 40 41 #include <linux/interrupt.h> 42 #include <linux/spinlock.h> 43 #include <linux/sched.h> 44 #include <linux/slab.h> 45 #include <linux/pci.h> 46 #include <linux/delay.h> 47 #include <linux/prefetch.h> 48 #include <linux/if_ether.h> 49 #include <linux/bnxt/ulp.h> 50 #include <rdma/ib_mad.h> 51 52 #include "roce_hsi.h" 53 54 #include "qplib_res.h" 55 #include "qplib_rcfw.h" 56 #include "qplib_sp.h" 57 #include "qplib_fp.h" 58 #include <rdma/ib_addr.h> 59 #include "bnxt_re.h" 60 #include "ib_verbs.h" 61 62 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp); 63 64 static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp) 65 { 66 qp->sq.condition = false; 67 qp->sq.send_phantom = false; 68 qp->sq.single = false; 69 } 70 71 /* Flush list */ 72 static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp) 73 { 74 struct bnxt_qplib_cq *scq, *rcq; 75 76 scq = qp->scq; 77 rcq = qp->rcq; 78 79 if (!qp->sq.flushed) { 80 dev_dbg(&scq->hwq.pdev->dev, 81 "FP: Adding to SQ Flush list = %p\n", qp); 82 bnxt_qplib_cancel_phantom_processing(qp); 83 list_add_tail(&qp->sq_flush, &scq->sqf_head); 84 qp->sq.flushed = true; 85 } 86 if (!qp->srq) { 87 if (!qp->rq.flushed) { 88 dev_dbg(&rcq->hwq.pdev->dev, 89 "FP: Adding to RQ Flush list = %p\n", qp); 90 list_add_tail(&qp->rq_flush, &rcq->rqf_head); 91 qp->rq.flushed = true; 92 } 93 } 94 } 95 96 static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp, 97 unsigned long *flags) 98 __acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock) 99 { 100 spin_lock_irqsave(&qp->scq->flush_lock, *flags); 101 if (qp->scq == qp->rcq) 102 __acquire(&qp->rcq->flush_lock); 103 else 104 spin_lock(&qp->rcq->flush_lock); 105 } 106 107 static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp, 108 unsigned long *flags) 109 __releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock) 110 { 111 if (qp->scq == qp->rcq) 112 __release(&qp->rcq->flush_lock); 113 else 114 spin_unlock(&qp->rcq->flush_lock); 115 spin_unlock_irqrestore(&qp->scq->flush_lock, *flags); 116 } 117 118 void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp) 119 { 120 unsigned long flags; 121 122 bnxt_qplib_acquire_cq_flush_locks(qp, &flags); 123 __bnxt_qplib_add_flush_qp(qp); 124 bnxt_qplib_release_cq_flush_locks(qp, &flags); 125 } 126 127 static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp) 128 { 129 if (qp->sq.flushed) { 130 qp->sq.flushed = false; 131 list_del(&qp->sq_flush); 132 } 133 if (!qp->srq) { 134 if (qp->rq.flushed) { 135 qp->rq.flushed = false; 136 list_del(&qp->rq_flush); 137 } 138 } 139 } 140 141 void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp) 142 { 143 unsigned long flags; 144 145 bnxt_qplib_acquire_cq_flush_locks(qp, &flags); 146 __clean_cq(qp->scq, (u64)(unsigned long)qp); 147 qp->sq.hwq.prod = 0; 148 qp->sq.hwq.cons = 0; 149 __clean_cq(qp->rcq, (u64)(unsigned long)qp); 150 qp->rq.hwq.prod = 0; 151 qp->rq.hwq.cons = 0; 152 153 __bnxt_qplib_del_flush_qp(qp); 154 bnxt_qplib_release_cq_flush_locks(qp, &flags); 155 } 156 157 static void bnxt_qpn_cqn_sched_task(struct work_struct *work) 158 { 159 struct bnxt_qplib_nq_work *nq_work = 160 container_of(work, struct bnxt_qplib_nq_work, work); 161 162 struct bnxt_qplib_cq *cq = nq_work->cq; 163 struct bnxt_qplib_nq *nq = nq_work->nq; 164 165 if (cq && nq) { 166 spin_lock_bh(&cq->compl_lock); 167 if (atomic_read(&cq->arm_state) && nq->cqn_handler) { 168 dev_dbg(&nq->pdev->dev, 169 "%s:Trigger cq = %p event nq = %p\n", 170 __func__, cq, nq); 171 nq->cqn_handler(nq, cq); 172 } 173 spin_unlock_bh(&cq->compl_lock); 174 } 175 kfree(nq_work); 176 } 177 178 static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res, 179 struct bnxt_qplib_qp *qp) 180 { 181 struct bnxt_qplib_q *rq = &qp->rq; 182 struct bnxt_qplib_q *sq = &qp->sq; 183 184 if (qp->rq_hdr_buf) 185 dma_free_coherent(&res->pdev->dev, 186 rq->max_wqe * qp->rq_hdr_buf_size, 187 qp->rq_hdr_buf, qp->rq_hdr_buf_map); 188 if (qp->sq_hdr_buf) 189 dma_free_coherent(&res->pdev->dev, 190 sq->max_wqe * qp->sq_hdr_buf_size, 191 qp->sq_hdr_buf, qp->sq_hdr_buf_map); 192 qp->rq_hdr_buf = NULL; 193 qp->sq_hdr_buf = NULL; 194 qp->rq_hdr_buf_map = 0; 195 qp->sq_hdr_buf_map = 0; 196 qp->sq_hdr_buf_size = 0; 197 qp->rq_hdr_buf_size = 0; 198 } 199 200 static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res, 201 struct bnxt_qplib_qp *qp) 202 { 203 struct bnxt_qplib_q *rq = &qp->rq; 204 struct bnxt_qplib_q *sq = &qp->sq; 205 int rc = 0; 206 207 if (qp->sq_hdr_buf_size && sq->max_wqe) { 208 qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev, 209 sq->max_wqe * qp->sq_hdr_buf_size, 210 &qp->sq_hdr_buf_map, GFP_KERNEL); 211 if (!qp->sq_hdr_buf) { 212 rc = -ENOMEM; 213 dev_err(&res->pdev->dev, 214 "Failed to create sq_hdr_buf\n"); 215 goto fail; 216 } 217 } 218 219 if (qp->rq_hdr_buf_size && rq->max_wqe) { 220 qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev, 221 rq->max_wqe * 222 qp->rq_hdr_buf_size, 223 &qp->rq_hdr_buf_map, 224 GFP_KERNEL); 225 if (!qp->rq_hdr_buf) { 226 rc = -ENOMEM; 227 dev_err(&res->pdev->dev, 228 "Failed to create rq_hdr_buf\n"); 229 goto fail; 230 } 231 } 232 return 0; 233 234 fail: 235 bnxt_qplib_free_qp_hdr_buf(res, qp); 236 return rc; 237 } 238 239 static void clean_nq(struct bnxt_qplib_nq *nq, struct bnxt_qplib_cq *cq) 240 { 241 struct bnxt_qplib_hwq *hwq = &nq->hwq; 242 struct nq_base *nqe, **nq_ptr; 243 int budget = nq->budget; 244 uintptr_t q_handle; 245 u16 type; 246 247 spin_lock_bh(&hwq->lock); 248 /* Service the NQ until empty */ 249 while (budget--) { 250 nq_ptr = (struct nq_base **)hwq->pbl_ptr; 251 nqe = &nq_ptr[NQE_PG(hwq->cons)][NQE_IDX(hwq->cons)]; 252 if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags)) 253 break; 254 255 /* 256 * The valid test of the entry must be done first before 257 * reading any further. 258 */ 259 dma_rmb(); 260 261 type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK; 262 switch (type) { 263 case NQ_BASE_TYPE_CQ_NOTIFICATION: 264 { 265 struct nq_cn *nqcne = (struct nq_cn *)nqe; 266 267 q_handle = le32_to_cpu(nqcne->cq_handle_low); 268 q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) 269 << 32; 270 if ((unsigned long)cq == q_handle) { 271 nqcne->cq_handle_low = 0; 272 nqcne->cq_handle_high = 0; 273 cq->cnq_events++; 274 } 275 break; 276 } 277 default: 278 break; 279 } 280 bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons, 281 1, &nq->nq_db.dbinfo.flags); 282 } 283 spin_unlock_bh(&hwq->lock); 284 } 285 286 /* Wait for receiving all NQEs for this CQ and clean the NQEs associated with 287 * this CQ. 288 */ 289 static void __wait_for_all_nqes(struct bnxt_qplib_cq *cq, u16 cnq_events) 290 { 291 u32 retry_cnt = 100; 292 293 while (retry_cnt--) { 294 if (cnq_events == cq->cnq_events) 295 return; 296 usleep_range(50, 100); 297 clean_nq(cq->nq, cq); 298 } 299 } 300 301 static void bnxt_qplib_service_nq(struct tasklet_struct *t) 302 { 303 struct bnxt_qplib_nq *nq = from_tasklet(nq, t, nq_tasklet); 304 struct bnxt_qplib_hwq *hwq = &nq->hwq; 305 struct bnxt_qplib_cq *cq; 306 int budget = nq->budget; 307 struct nq_base *nqe; 308 uintptr_t q_handle; 309 u32 hw_polled = 0; 310 u16 type; 311 312 spin_lock_bh(&hwq->lock); 313 /* Service the NQ until empty */ 314 while (budget--) { 315 nqe = bnxt_qplib_get_qe(hwq, hwq->cons, NULL); 316 if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags)) 317 break; 318 319 /* 320 * The valid test of the entry must be done first before 321 * reading any further. 322 */ 323 dma_rmb(); 324 325 type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK; 326 switch (type) { 327 case NQ_BASE_TYPE_CQ_NOTIFICATION: 328 { 329 struct nq_cn *nqcne = (struct nq_cn *)nqe; 330 struct bnxt_re_cq *cq_p; 331 332 q_handle = le32_to_cpu(nqcne->cq_handle_low); 333 q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) 334 << 32; 335 cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle; 336 if (!cq) 337 break; 338 cq->toggle = (le16_to_cpu(nqe->info10_type) & 339 NQ_CN_TOGGLE_MASK) >> NQ_CN_TOGGLE_SFT; 340 cq->dbinfo.toggle = cq->toggle; 341 cq_p = container_of(cq, struct bnxt_re_cq, qplib_cq); 342 if (cq_p->uctx_cq_page) 343 *((u32 *)cq_p->uctx_cq_page) = cq->toggle; 344 345 bnxt_qplib_armen_db(&cq->dbinfo, 346 DBC_DBC_TYPE_CQ_ARMENA); 347 spin_lock_bh(&cq->compl_lock); 348 atomic_set(&cq->arm_state, 0); 349 if (nq->cqn_handler(nq, (cq))) 350 dev_warn(&nq->pdev->dev, 351 "cqn - type 0x%x not handled\n", type); 352 cq->cnq_events++; 353 spin_unlock_bh(&cq->compl_lock); 354 break; 355 } 356 case NQ_BASE_TYPE_SRQ_EVENT: 357 { 358 struct bnxt_qplib_srq *srq; 359 struct bnxt_re_srq *srq_p; 360 struct nq_srq_event *nqsrqe = 361 (struct nq_srq_event *)nqe; 362 363 q_handle = le32_to_cpu(nqsrqe->srq_handle_low); 364 q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high) 365 << 32; 366 srq = (struct bnxt_qplib_srq *)q_handle; 367 srq->toggle = (le16_to_cpu(nqe->info10_type) & NQ_CN_TOGGLE_MASK) 368 >> NQ_CN_TOGGLE_SFT; 369 srq->dbinfo.toggle = srq->toggle; 370 srq_p = container_of(srq, struct bnxt_re_srq, qplib_srq); 371 if (srq_p->uctx_srq_page) 372 *((u32 *)srq_p->uctx_srq_page) = srq->toggle; 373 bnxt_qplib_armen_db(&srq->dbinfo, 374 DBC_DBC_TYPE_SRQ_ARMENA); 375 if (nq->srqn_handler(nq, 376 (struct bnxt_qplib_srq *)q_handle, 377 nqsrqe->event)) 378 dev_warn(&nq->pdev->dev, 379 "SRQ event 0x%x not handled\n", 380 nqsrqe->event); 381 break; 382 } 383 case NQ_BASE_TYPE_DBQ_EVENT: 384 break; 385 default: 386 dev_warn(&nq->pdev->dev, 387 "nqe with type = 0x%x not handled\n", type); 388 break; 389 } 390 hw_polled++; 391 bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons, 392 1, &nq->nq_db.dbinfo.flags); 393 } 394 if (hw_polled) 395 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, true); 396 spin_unlock_bh(&hwq->lock); 397 } 398 399 /* bnxt_re_synchronize_nq - self polling notification queue. 400 * @nq - notification queue pointer 401 * 402 * This function will start polling entries of a given notification queue 403 * for all pending entries. 404 * This function is useful to synchronize notification entries while resources 405 * are going away. 406 */ 407 408 void bnxt_re_synchronize_nq(struct bnxt_qplib_nq *nq) 409 { 410 int budget = nq->budget; 411 412 nq->budget = nq->hwq.max_elements; 413 bnxt_qplib_service_nq(&nq->nq_tasklet); 414 nq->budget = budget; 415 } 416 417 static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance) 418 { 419 struct bnxt_qplib_nq *nq = dev_instance; 420 struct bnxt_qplib_hwq *hwq = &nq->hwq; 421 u32 sw_cons; 422 423 /* Prefetch the NQ element */ 424 sw_cons = HWQ_CMP(hwq->cons, hwq); 425 prefetch(bnxt_qplib_get_qe(hwq, sw_cons, NULL)); 426 427 /* Fan out to CPU affinitized kthreads? */ 428 tasklet_schedule(&nq->nq_tasklet); 429 430 return IRQ_HANDLED; 431 } 432 433 void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill) 434 { 435 if (!nq->requested) 436 return; 437 438 nq->requested = false; 439 /* Mask h/w interrupt */ 440 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, false); 441 /* Sync with last running IRQ handler */ 442 synchronize_irq(nq->msix_vec); 443 irq_set_affinity_hint(nq->msix_vec, NULL); 444 free_irq(nq->msix_vec, nq); 445 kfree(nq->name); 446 nq->name = NULL; 447 448 if (kill) 449 tasklet_kill(&nq->nq_tasklet); 450 tasklet_disable(&nq->nq_tasklet); 451 } 452 453 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq) 454 { 455 if (nq->cqn_wq) { 456 destroy_workqueue(nq->cqn_wq); 457 nq->cqn_wq = NULL; 458 } 459 460 /* Make sure the HW is stopped! */ 461 bnxt_qplib_nq_stop_irq(nq, true); 462 463 if (nq->nq_db.reg.bar_reg) { 464 iounmap(nq->nq_db.reg.bar_reg); 465 nq->nq_db.reg.bar_reg = NULL; 466 } 467 468 nq->cqn_handler = NULL; 469 nq->srqn_handler = NULL; 470 nq->msix_vec = 0; 471 } 472 473 int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx, 474 int msix_vector, bool need_init) 475 { 476 struct bnxt_qplib_res *res = nq->res; 477 int rc; 478 479 if (nq->requested) 480 return -EFAULT; 481 482 nq->msix_vec = msix_vector; 483 if (need_init) 484 tasklet_setup(&nq->nq_tasklet, bnxt_qplib_service_nq); 485 else 486 tasklet_enable(&nq->nq_tasklet); 487 488 nq->name = kasprintf(GFP_KERNEL, "bnxt_re-nq-%d@pci:%s", 489 nq_indx, pci_name(res->pdev)); 490 if (!nq->name) 491 return -ENOMEM; 492 rc = request_irq(nq->msix_vec, bnxt_qplib_nq_irq, 0, nq->name, nq); 493 if (rc) { 494 kfree(nq->name); 495 nq->name = NULL; 496 tasklet_disable(&nq->nq_tasklet); 497 return rc; 498 } 499 500 cpumask_clear(&nq->mask); 501 cpumask_set_cpu(nq_indx, &nq->mask); 502 rc = irq_set_affinity_hint(nq->msix_vec, &nq->mask); 503 if (rc) { 504 dev_warn(&nq->pdev->dev, 505 "set affinity failed; vector: %d nq_idx: %d\n", 506 nq->msix_vec, nq_indx); 507 } 508 nq->requested = true; 509 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true); 510 511 return rc; 512 } 513 514 static int bnxt_qplib_map_nq_db(struct bnxt_qplib_nq *nq, u32 reg_offt) 515 { 516 resource_size_t reg_base; 517 struct bnxt_qplib_nq_db *nq_db; 518 struct pci_dev *pdev; 519 520 pdev = nq->pdev; 521 nq_db = &nq->nq_db; 522 523 nq_db->dbinfo.flags = 0; 524 nq_db->reg.bar_id = NQ_CONS_PCI_BAR_REGION; 525 nq_db->reg.bar_base = pci_resource_start(pdev, nq_db->reg.bar_id); 526 if (!nq_db->reg.bar_base) { 527 dev_err(&pdev->dev, "QPLIB: NQ BAR region %d resc start is 0!", 528 nq_db->reg.bar_id); 529 return -ENOMEM; 530 } 531 532 reg_base = nq_db->reg.bar_base + reg_offt; 533 /* Unconditionally map 8 bytes to support 57500 series */ 534 nq_db->reg.len = 8; 535 nq_db->reg.bar_reg = ioremap(reg_base, nq_db->reg.len); 536 if (!nq_db->reg.bar_reg) { 537 dev_err(&pdev->dev, "QPLIB: NQ BAR region %d mapping failed", 538 nq_db->reg.bar_id); 539 return -ENOMEM; 540 } 541 542 nq_db->dbinfo.db = nq_db->reg.bar_reg; 543 nq_db->dbinfo.hwq = &nq->hwq; 544 nq_db->dbinfo.xid = nq->ring_id; 545 546 return 0; 547 } 548 549 int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq, 550 int nq_idx, int msix_vector, int bar_reg_offset, 551 cqn_handler_t cqn_handler, 552 srqn_handler_t srqn_handler) 553 { 554 int rc; 555 556 nq->pdev = pdev; 557 nq->cqn_handler = cqn_handler; 558 nq->srqn_handler = srqn_handler; 559 nq->load = 0; 560 561 /* Have a task to schedule CQ notifiers in post send case */ 562 nq->cqn_wq = create_singlethread_workqueue("bnxt_qplib_nq"); 563 if (!nq->cqn_wq) 564 return -ENOMEM; 565 566 rc = bnxt_qplib_map_nq_db(nq, bar_reg_offset); 567 if (rc) 568 goto fail; 569 570 rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true); 571 if (rc) { 572 dev_err(&nq->pdev->dev, 573 "Failed to request irq for nq-idx %d\n", nq_idx); 574 goto fail; 575 } 576 577 return 0; 578 fail: 579 bnxt_qplib_disable_nq(nq); 580 return rc; 581 } 582 583 void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq) 584 { 585 if (nq->hwq.max_elements) { 586 bnxt_qplib_free_hwq(nq->res, &nq->hwq); 587 nq->hwq.max_elements = 0; 588 } 589 } 590 591 int bnxt_qplib_alloc_nq(struct bnxt_qplib_res *res, struct bnxt_qplib_nq *nq) 592 { 593 struct bnxt_qplib_hwq_attr hwq_attr = {}; 594 struct bnxt_qplib_sg_info sginfo = {}; 595 596 nq->pdev = res->pdev; 597 nq->res = res; 598 if (!nq->hwq.max_elements || 599 nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT) 600 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT; 601 602 sginfo.pgsize = PAGE_SIZE; 603 sginfo.pgshft = PAGE_SHIFT; 604 hwq_attr.res = res; 605 hwq_attr.sginfo = &sginfo; 606 hwq_attr.depth = nq->hwq.max_elements; 607 hwq_attr.stride = sizeof(struct nq_base); 608 hwq_attr.type = bnxt_qplib_get_hwq_type(nq->res); 609 if (bnxt_qplib_alloc_init_hwq(&nq->hwq, &hwq_attr)) { 610 dev_err(&nq->pdev->dev, "FP NQ allocation failed"); 611 return -ENOMEM; 612 } 613 nq->budget = 8; 614 return 0; 615 } 616 617 /* SRQ */ 618 void bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res, 619 struct bnxt_qplib_srq *srq) 620 { 621 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 622 struct creq_destroy_srq_resp resp = {}; 623 struct bnxt_qplib_cmdqmsg msg = {}; 624 struct cmdq_destroy_srq req = {}; 625 int rc; 626 627 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 628 CMDQ_BASE_OPCODE_DESTROY_SRQ, 629 sizeof(req)); 630 631 /* Configure the request */ 632 req.srq_cid = cpu_to_le32(srq->id); 633 634 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 635 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 636 kfree(srq->swq); 637 if (rc) 638 return; 639 bnxt_qplib_free_hwq(res, &srq->hwq); 640 } 641 642 int bnxt_qplib_create_srq(struct bnxt_qplib_res *res, 643 struct bnxt_qplib_srq *srq) 644 { 645 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 646 struct bnxt_qplib_hwq_attr hwq_attr = {}; 647 struct creq_create_srq_resp resp = {}; 648 struct bnxt_qplib_cmdqmsg msg = {}; 649 struct cmdq_create_srq req = {}; 650 struct bnxt_qplib_pbl *pbl; 651 u16 pg_sz_lvl; 652 int rc, idx; 653 654 hwq_attr.res = res; 655 hwq_attr.sginfo = &srq->sg_info; 656 hwq_attr.depth = srq->max_wqe; 657 hwq_attr.stride = srq->wqe_size; 658 hwq_attr.type = HWQ_TYPE_QUEUE; 659 rc = bnxt_qplib_alloc_init_hwq(&srq->hwq, &hwq_attr); 660 if (rc) 661 return rc; 662 srq->dbinfo.flags = 0; 663 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 664 CMDQ_BASE_OPCODE_CREATE_SRQ, 665 sizeof(req)); 666 667 /* Configure the request */ 668 req.dpi = cpu_to_le32(srq->dpi->dpi); 669 req.srq_handle = cpu_to_le64((uintptr_t)srq); 670 671 req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements); 672 pbl = &srq->hwq.pbl[PBL_LVL_0]; 673 pg_sz_lvl = ((u16)bnxt_qplib_base_pg_size(&srq->hwq) << 674 CMDQ_CREATE_SRQ_PG_SIZE_SFT); 675 pg_sz_lvl |= (srq->hwq.level & CMDQ_CREATE_SRQ_LVL_MASK) << 676 CMDQ_CREATE_SRQ_LVL_SFT; 677 req.pg_size_lvl = cpu_to_le16(pg_sz_lvl); 678 req.pbl = cpu_to_le64(pbl->pg_map_arr[0]); 679 req.pd_id = cpu_to_le32(srq->pd->id); 680 req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id); 681 682 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 683 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 684 if (rc) 685 goto fail; 686 687 spin_lock_init(&srq->lock); 688 srq->start_idx = 0; 689 srq->last_idx = srq->hwq.max_elements - 1; 690 if (!srq->hwq.is_user) { 691 srq->swq = kzalloc_objs(*srq->swq, srq->hwq.max_elements); 692 if (!srq->swq) { 693 rc = -ENOMEM; 694 goto fail; 695 } 696 for (idx = 0; idx < srq->hwq.max_elements; idx++) 697 srq->swq[idx].next_idx = idx + 1; 698 srq->swq[srq->last_idx].next_idx = -1; 699 } 700 701 srq->id = le32_to_cpu(resp.xid); 702 srq->dbinfo.hwq = &srq->hwq; 703 srq->dbinfo.xid = srq->id; 704 srq->dbinfo.db = srq->dpi->dbr; 705 srq->dbinfo.max_slot = 1; 706 srq->dbinfo.priv_db = res->dpi_tbl.priv_db; 707 bnxt_qplib_armen_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ_ARMENA); 708 709 return 0; 710 fail: 711 bnxt_qplib_free_hwq(res, &srq->hwq); 712 kfree(srq->swq); 713 714 return rc; 715 } 716 717 int bnxt_qplib_query_srq(struct bnxt_qplib_res *res, 718 struct bnxt_qplib_srq *srq) 719 { 720 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 721 struct creq_query_srq_resp resp = {}; 722 struct bnxt_qplib_cmdqmsg msg = {}; 723 struct bnxt_qplib_rcfw_sbuf sbuf; 724 struct creq_query_srq_resp_sb *sb; 725 struct cmdq_query_srq req = {}; 726 int rc; 727 728 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 729 CMDQ_BASE_OPCODE_QUERY_SRQ, 730 sizeof(req)); 731 732 /* Configure the request */ 733 sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS); 734 sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size, 735 &sbuf.dma_addr, GFP_KERNEL); 736 if (!sbuf.sb) 737 return -ENOMEM; 738 req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS; 739 req.srq_cid = cpu_to_le32(srq->id); 740 sb = sbuf.sb; 741 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req), 742 sizeof(resp), 0); 743 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 744 if (!rc) 745 srq->threshold = le16_to_cpu(sb->srq_limit); 746 dma_free_coherent(&rcfw->pdev->dev, sbuf.size, 747 sbuf.sb, sbuf.dma_addr); 748 749 return rc; 750 } 751 752 int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq, 753 struct bnxt_qplib_swqe *wqe) 754 { 755 struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; 756 struct rq_wqe *srqe; 757 struct sq_sge *hw_sge; 758 int i, next; 759 760 spin_lock(&srq_hwq->lock); 761 if (srq->start_idx == srq->last_idx) { 762 dev_err(&srq_hwq->pdev->dev, 763 "FP: SRQ (0x%x) is full!\n", srq->id); 764 spin_unlock(&srq_hwq->lock); 765 return -EINVAL; 766 } 767 next = srq->start_idx; 768 srq->start_idx = srq->swq[next].next_idx; 769 spin_unlock(&srq_hwq->lock); 770 771 srqe = bnxt_qplib_get_qe(srq_hwq, srq_hwq->prod, NULL); 772 memset(srqe, 0, srq->wqe_size); 773 /* Calculate wqe_size16 and data_len */ 774 for (i = 0, hw_sge = (struct sq_sge *)srqe->data; 775 i < wqe->num_sge; i++, hw_sge++) { 776 hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr); 777 hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey); 778 hw_sge->size = cpu_to_le32(wqe->sg_list[i].size); 779 } 780 srqe->wqe_type = wqe->type; 781 srqe->flags = wqe->flags; 782 srqe->wqe_size = wqe->num_sge + 783 ((offsetof(typeof(*srqe), data) + 15) >> 4); 784 srqe->wr_id[0] = cpu_to_le32((u32)next); 785 srq->swq[next].wr_id = wqe->wr_id; 786 787 bnxt_qplib_hwq_incr_prod(&srq->dbinfo, srq_hwq, srq->dbinfo.max_slot); 788 789 /* Ring DB */ 790 bnxt_qplib_ring_prod_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ); 791 792 return 0; 793 } 794 795 static int bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q *que) 796 { 797 int indx; 798 799 que->swq = kzalloc_objs(*que->swq, que->max_sw_wqe); 800 if (!que->swq) 801 return -ENOMEM; 802 803 que->swq_start = 0; 804 que->swq_last = que->max_sw_wqe - 1; 805 for (indx = 0; indx < que->max_sw_wqe; indx++) 806 que->swq[indx].next_idx = indx + 1; 807 que->swq[que->swq_last].next_idx = 0; /* Make it circular */ 808 que->swq_last = 0; 809 810 return 0; 811 } 812 813 static int bnxt_re_setup_qp_swqs(struct bnxt_qplib_qp *qplqp) 814 { 815 struct bnxt_qplib_q *sq = &qplqp->sq; 816 struct bnxt_qplib_q *rq = &qplqp->rq; 817 int rc; 818 819 if (qplqp->is_user) 820 return 0; 821 822 rc = bnxt_qplib_alloc_init_swq(sq); 823 if (rc) 824 return rc; 825 826 if (!qplqp->srq) { 827 rc = bnxt_qplib_alloc_init_swq(rq); 828 if (rc) 829 goto free_sq_swq; 830 } 831 832 return 0; 833 free_sq_swq: 834 kfree(sq->swq); 835 return rc; 836 } 837 838 static void bnxt_qp_init_dbinfo(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 839 { 840 struct bnxt_qplib_q *sq = &qp->sq; 841 struct bnxt_qplib_q *rq = &qp->rq; 842 843 sq->dbinfo.hwq = &sq->hwq; 844 sq->dbinfo.xid = qp->id; 845 sq->dbinfo.db = qp->dpi->dbr; 846 sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode); 847 sq->dbinfo.flags = 0; 848 if (rq->max_wqe) { 849 rq->dbinfo.hwq = &rq->hwq; 850 rq->dbinfo.xid = qp->id; 851 rq->dbinfo.db = qp->dpi->dbr; 852 rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size); 853 rq->dbinfo.flags = 0; 854 } 855 } 856 857 static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size) 858 { 859 struct bnxt_qplib_hwq *sq_hwq; 860 struct bnxt_qplib_q *sq; 861 u64 fpsne, psn_pg; 862 u16 indx_pad = 0; 863 864 sq = &qp->sq; 865 sq_hwq = &sq->hwq; 866 /* First psn entry */ 867 fpsne = (u64)bnxt_qplib_get_qe(sq_hwq, sq_hwq->depth, &psn_pg); 868 if (!IS_ALIGNED(fpsne, PAGE_SIZE)) 869 indx_pad = (fpsne & ~PAGE_MASK) / size; 870 sq_hwq->pad_pgofft = indx_pad; 871 sq_hwq->pad_pg = (u64 *)psn_pg; 872 sq_hwq->pad_stride = size; 873 } 874 875 /* QP */ 876 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 877 { 878 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 879 struct creq_create_qp1_resp resp = {}; 880 struct bnxt_qplib_cmdqmsg msg = {}; 881 struct bnxt_qplib_q *sq = &qp->sq; 882 struct bnxt_qplib_q *rq = &qp->rq; 883 struct cmdq_create_qp1 req = {}; 884 struct bnxt_qplib_pbl *pbl; 885 u32 qp_flags = 0; 886 u32 tbl_indx; 887 int rc; 888 889 sq->dbinfo.flags = 0; 890 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 891 CMDQ_BASE_OPCODE_CREATE_QP1, 892 sizeof(req)); 893 /* General */ 894 req.type = qp->type; 895 req.dpi = cpu_to_le32(qp->dpi->dpi); 896 req.qp_handle = cpu_to_le64(qp->qp_handle); 897 898 /* SQ */ 899 sq->max_sw_wqe = bnxt_qplib_get_depth(sq, qp->wqe_mode, true); 900 req.sq_size = cpu_to_le32(sq->max_sw_wqe); 901 req.sq_pg_size_sq_lvl = sq->hwq.pg_sz_lvl; 902 903 pbl = &sq->hwq.pbl[PBL_LVL_0]; 904 req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 905 req.sq_fwo_sq_sge = 906 cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) << 907 CMDQ_CREATE_QP1_SQ_SGE_SFT); 908 req.scq_cid = cpu_to_le32(qp->scq->id); 909 910 /* RQ */ 911 if (rq->max_wqe) { 912 rq->dbinfo.flags = 0; 913 req.rq_size = cpu_to_le32(rq->max_wqe); 914 pbl = &rq->hwq.pbl[PBL_LVL_0]; 915 req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 916 req.rq_pg_size_rq_lvl = rq->hwq.pg_sz_lvl; 917 req.rq_fwo_rq_sge = 918 cpu_to_le16((rq->max_sge & 919 CMDQ_CREATE_QP1_RQ_SGE_MASK) << 920 CMDQ_CREATE_QP1_RQ_SGE_SFT); 921 } 922 req.rcq_cid = cpu_to_le32(qp->rcq->id); 923 /* Header buffer - allow hdr_buf pass in */ 924 rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp); 925 if (rc) { 926 rc = -ENOMEM; 927 return rc; 928 } 929 qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE; 930 req.qp_flags = cpu_to_le32(qp_flags); 931 req.pd_id = cpu_to_le32(qp->pd->id); 932 933 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 934 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 935 if (rc) 936 goto fail; 937 938 qp->id = le32_to_cpu(resp.xid); 939 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; 940 941 rc = bnxt_re_setup_qp_swqs(qp); 942 if (rc) 943 goto destroy_qp; 944 bnxt_qp_init_dbinfo(res, qp); 945 946 tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw); 947 rcfw->qp_tbl[tbl_indx].qp_id = qp->id; 948 rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp; 949 950 return 0; 951 952 destroy_qp: 953 bnxt_qplib_destroy_qp(res, qp); 954 fail: 955 bnxt_qplib_free_qp_hdr_buf(res, qp); 956 return rc; 957 } 958 959 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 960 { 961 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 962 struct creq_create_qp_resp resp = {}; 963 struct bnxt_qplib_cmdqmsg msg = {}; 964 struct bnxt_qplib_q *sq = &qp->sq; 965 struct bnxt_qplib_q *rq = &qp->rq; 966 struct cmdq_create_qp req = {}; 967 struct bnxt_qplib_pbl *pbl; 968 u32 qp_flags = 0; 969 u32 tbl_indx; 970 u16 nsge; 971 int rc; 972 973 sq->dbinfo.flags = 0; 974 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 975 CMDQ_BASE_OPCODE_CREATE_QP, 976 sizeof(req)); 977 978 /* General */ 979 req.type = qp->type; 980 req.dpi = cpu_to_le32(qp->dpi->dpi); 981 req.qp_handle = cpu_to_le64(qp->qp_handle); 982 983 /* SQ */ 984 req.sq_size = cpu_to_le32(sq->max_sw_wqe); 985 pbl = &sq->hwq.pbl[PBL_LVL_0]; 986 req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 987 req.sq_pg_size_sq_lvl = sq->hwq.pg_sz_lvl; 988 req.sq_fwo_sq_sge = 989 cpu_to_le16(((sq->max_sge & CMDQ_CREATE_QP_SQ_SGE_MASK) << 990 CMDQ_CREATE_QP_SQ_SGE_SFT) | 0); 991 req.scq_cid = cpu_to_le32(qp->scq->id); 992 993 /* RQ */ 994 if (!qp->srq) { 995 rq->dbinfo.flags = 0; 996 req.rq_size = cpu_to_le32(rq->max_wqe); 997 pbl = &rq->hwq.pbl[PBL_LVL_0]; 998 req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 999 req.rq_pg_size_rq_lvl = rq->hwq.pg_sz_lvl; 1000 nsge = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ? 1001 6 : rq->max_sge; 1002 req.rq_fwo_rq_sge = 1003 cpu_to_le16(((nsge & 1004 CMDQ_CREATE_QP_RQ_SGE_MASK) << 1005 CMDQ_CREATE_QP_RQ_SGE_SFT) | 0); 1006 } else { 1007 /* SRQ */ 1008 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED; 1009 req.srq_cid = cpu_to_le32(qp->srq->id); 1010 } 1011 req.rcq_cid = cpu_to_le32(qp->rcq->id); 1012 1013 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE; 1014 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED; 1015 if (qp->sig_type) 1016 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION; 1017 if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE) 1018 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_VARIABLE_SIZED_WQE_ENABLED; 1019 if (bnxt_ext_stats_supported(res->cctx, res->dattr->dev_cap_flags, res->is_vf)) 1020 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_EXT_STATS_ENABLED; 1021 1022 req.qp_flags = cpu_to_le32(qp_flags); 1023 1024 /* ORRQ and IRRQ */ 1025 if (qp->psn_sz) { 1026 req.orrq_addr = cpu_to_le64(bnxt_qplib_get_base_addr(&qp->orrq)); 1027 req.irrq_addr = cpu_to_le64(bnxt_qplib_get_base_addr(&qp->irrq)); 1028 } 1029 req.pd_id = cpu_to_le32(qp->pd->id); 1030 1031 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 1032 sizeof(resp), 0); 1033 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1034 if (rc) 1035 return rc; 1036 1037 qp->id = le32_to_cpu(resp.xid); 1038 1039 if (!qp->is_user) { 1040 rc = bnxt_re_setup_qp_swqs(qp); 1041 if (rc) 1042 goto destroy_qp; 1043 } 1044 bnxt_qp_init_dbinfo(res, qp); 1045 if (qp->psn_sz) 1046 bnxt_qplib_init_psn_ptr(qp, qp->psn_sz); 1047 1048 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; 1049 INIT_LIST_HEAD(&qp->sq_flush); 1050 INIT_LIST_HEAD(&qp->rq_flush); 1051 qp->cctx = res->cctx; 1052 spin_lock_bh(&rcfw->tbl_lock); 1053 tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw); 1054 rcfw->qp_tbl[tbl_indx].qp_id = qp->id; 1055 rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp; 1056 spin_unlock_bh(&rcfw->tbl_lock); 1057 1058 return 0; 1059 destroy_qp: 1060 bnxt_qplib_destroy_qp(res, qp); 1061 return rc; 1062 } 1063 1064 static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp) 1065 { 1066 switch (qp->state) { 1067 case CMDQ_MODIFY_QP_NEW_STATE_RTR: 1068 /* INIT->RTR, configure the path_mtu to the default 1069 * 2048 if not being requested 1070 */ 1071 if (!(qp->modify_flags & 1072 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) { 1073 qp->modify_flags |= 1074 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU; 1075 qp->path_mtu = 1076 CMDQ_MODIFY_QP_PATH_MTU_MTU_2048; 1077 } 1078 /* Bono FW require the max_dest_rd_atomic to be >= 1 */ 1079 if (qp->max_dest_rd_atomic < 1) 1080 qp->max_dest_rd_atomic = 1; 1081 qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC; 1082 /* Bono FW 20.6.5 requires SGID_INDEX configuration */ 1083 if (!(qp->modify_flags & 1084 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) { 1085 qp->modify_flags |= 1086 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX; 1087 qp->ah.sgid_index = 0; 1088 } 1089 break; 1090 default: 1091 break; 1092 } 1093 } 1094 1095 static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp) 1096 { 1097 switch (qp->state) { 1098 case CMDQ_MODIFY_QP_NEW_STATE_RTS: 1099 /* Bono FW requires the max_rd_atomic to be >= 1 */ 1100 if (qp->max_rd_atomic < 1) 1101 qp->max_rd_atomic = 1; 1102 /* Bono FW does not allow PKEY_INDEX, 1103 * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT, 1104 * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN, 1105 * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID 1106 * modification 1107 */ 1108 qp->modify_flags &= 1109 ~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY | 1110 CMDQ_MODIFY_QP_MODIFY_MASK_DGID | 1111 CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL | 1112 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX | 1113 CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT | 1114 CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS | 1115 CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC | 1116 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU | 1117 CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN | 1118 CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER | 1119 CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC | 1120 CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID); 1121 break; 1122 default: 1123 break; 1124 } 1125 } 1126 1127 static void __filter_modify_flags(struct bnxt_qplib_qp *qp) 1128 { 1129 switch (qp->cur_qp_state) { 1130 case CMDQ_MODIFY_QP_NEW_STATE_RESET: 1131 break; 1132 case CMDQ_MODIFY_QP_NEW_STATE_INIT: 1133 __modify_flags_from_init_state(qp); 1134 break; 1135 case CMDQ_MODIFY_QP_NEW_STATE_RTR: 1136 __modify_flags_from_rtr_state(qp); 1137 break; 1138 case CMDQ_MODIFY_QP_NEW_STATE_RTS: 1139 break; 1140 case CMDQ_MODIFY_QP_NEW_STATE_SQD: 1141 break; 1142 case CMDQ_MODIFY_QP_NEW_STATE_SQE: 1143 break; 1144 case CMDQ_MODIFY_QP_NEW_STATE_ERR: 1145 break; 1146 default: 1147 break; 1148 } 1149 } 1150 1151 static void bnxt_set_mandatory_attributes(struct bnxt_qplib_res *res, 1152 struct bnxt_qplib_qp *qp, 1153 struct cmdq_modify_qp *req) 1154 { 1155 u32 mandatory_flags = 0; 1156 1157 if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC) 1158 mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS; 1159 1160 if (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_INIT && 1161 qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTR) { 1162 if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC && qp->srq) 1163 req->flags = cpu_to_le16(CMDQ_MODIFY_QP_FLAGS_SRQ_USED); 1164 mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_PKEY; 1165 } 1166 1167 if (_is_min_rnr_in_rtr_rts_mandatory(res->dattr->dev_cap_flags2) && 1168 (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_RTR && 1169 qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTS)) { 1170 if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC) 1171 mandatory_flags |= 1172 CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER; 1173 } 1174 1175 if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_UD || 1176 qp->type == CMDQ_MODIFY_QP_QP_TYPE_GSI) 1177 mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_QKEY; 1178 1179 qp->modify_flags |= mandatory_flags; 1180 req->qp_type = qp->type; 1181 } 1182 1183 static bool is_optimized_state_transition(struct bnxt_qplib_qp *qp) 1184 { 1185 if ((qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_INIT && 1186 qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTR) || 1187 (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_RTR && 1188 qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTS)) 1189 return true; 1190 1191 return false; 1192 } 1193 1194 int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 1195 { 1196 struct bnxt_qplib_sgid_tbl *sgid_tbl = &res->sgid_tbl; 1197 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1198 struct creq_modify_qp_resp resp = {}; 1199 struct bnxt_qplib_cmdqmsg msg = {}; 1200 struct cmdq_modify_qp req = {}; 1201 u16 vlan_pcp_vlan_dei_vlan_id; 1202 u32 bmask, bmask_ext; 1203 u32 temp32[4]; 1204 int rc; 1205 1206 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 1207 CMDQ_BASE_OPCODE_MODIFY_QP, 1208 sizeof(req)); 1209 1210 /* Filter out the qp_attr_mask based on the state->new transition */ 1211 __filter_modify_flags(qp); 1212 if (qp->modify_flags & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) { 1213 /* Set mandatory attributes for INIT -> RTR and RTR -> RTS transition */ 1214 if (_is_optimize_modify_qp_supported(res->dattr->dev_cap_flags2) && 1215 is_optimized_state_transition(qp)) 1216 bnxt_set_mandatory_attributes(res, qp, &req); 1217 } 1218 1219 bmask = qp->modify_flags; 1220 req.modify_mask = cpu_to_le32(qp->modify_flags); 1221 bmask_ext = qp->ext_modify_flags; 1222 req.ext_modify_mask = cpu_to_le32(qp->ext_modify_flags); 1223 req.qp_cid = cpu_to_le32(qp->id); 1224 1225 if (bmask_ext & CMDQ_MODIFY_QP_EXT_MODIFY_MASK_RATE_LIMIT_VALID) 1226 req.rate_limit = cpu_to_le32(qp->rate_limit); 1227 1228 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) { 1229 req.network_type_en_sqd_async_notify_new_state = 1230 (qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) | 1231 (qp->en_sqd_async_notify ? 1232 CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0); 1233 } 1234 req.network_type_en_sqd_async_notify_new_state |= qp->nw_type; 1235 1236 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS) 1237 req.access = qp->access; 1238 1239 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY) 1240 req.pkey = cpu_to_le16(IB_DEFAULT_PKEY_FULL); 1241 1242 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY) 1243 req.qkey = cpu_to_le32(qp->qkey); 1244 1245 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) { 1246 memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid)); 1247 req.dgid[0] = cpu_to_le32(temp32[0]); 1248 req.dgid[1] = cpu_to_le32(temp32[1]); 1249 req.dgid[2] = cpu_to_le32(temp32[2]); 1250 req.dgid[3] = cpu_to_le32(temp32[3]); 1251 } 1252 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL) 1253 req.flow_label = cpu_to_le32(qp->ah.flow_label); 1254 1255 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX) { 1256 if (qp->type == CMDQ_CREATE_QP_TYPE_RAW_ETHERTYPE) 1257 req.sgid_index = 1258 cpu_to_le16(sgid_tbl->hw_id[qp->ugid_index]); 1259 else 1260 req.sgid_index = 1261 cpu_to_le16(sgid_tbl->hw_id[qp->ah.sgid_index]); 1262 } 1263 1264 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT) 1265 req.hop_limit = qp->ah.hop_limit; 1266 1267 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS) 1268 req.traffic_class = qp->ah.traffic_class; 1269 1270 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC) 1271 memcpy(req.dest_mac, qp->ah.dmac, 6); 1272 1273 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU) 1274 req.path_mtu_pingpong_push_enable |= qp->path_mtu; 1275 1276 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT) 1277 req.timeout = qp->timeout; 1278 1279 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT) 1280 req.retry_cnt = qp->retry_cnt; 1281 1282 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY) 1283 req.rnr_retry = qp->rnr_retry; 1284 1285 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER) 1286 req.min_rnr_timer = qp->min_rnr_timer; 1287 1288 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN) 1289 req.rq_psn = cpu_to_le32(qp->rq.psn); 1290 1291 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN) 1292 req.sq_psn = cpu_to_le32(qp->sq.psn); 1293 1294 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC) 1295 req.max_rd_atomic = 1296 ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic); 1297 1298 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC) 1299 req.max_dest_rd_atomic = 1300 IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic); 1301 1302 req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements); 1303 req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements); 1304 req.sq_sge = cpu_to_le16(qp->sq.max_sge); 1305 req.rq_sge = cpu_to_le16(qp->rq.max_sge); 1306 req.max_inline_data = cpu_to_le32(qp->max_inline_data); 1307 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID) 1308 req.dest_qp_id = cpu_to_le32(qp->dest_qpn); 1309 1310 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID) { 1311 vlan_pcp_vlan_dei_vlan_id = 1312 ((res->sgid_tbl.tbl[qp->ah.sgid_index].vlan_id << 1313 CMDQ_MODIFY_QP_VLAN_ID_SFT) & 1314 CMDQ_MODIFY_QP_VLAN_ID_MASK); 1315 vlan_pcp_vlan_dei_vlan_id |= 1316 ((qp->ah.sl << CMDQ_MODIFY_QP_VLAN_PCP_SFT) & 1317 CMDQ_MODIFY_QP_VLAN_PCP_MASK); 1318 req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(vlan_pcp_vlan_dei_vlan_id); 1319 } 1320 1321 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 1322 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1323 if (rc) 1324 return rc; 1325 1326 if (bmask_ext & CMDQ_MODIFY_QP_EXT_MODIFY_MASK_RATE_LIMIT_VALID) 1327 qp->shaper_allocation_status = resp.shaper_allocation_status; 1328 qp->cur_qp_state = qp->state; 1329 return 0; 1330 } 1331 1332 int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 1333 { 1334 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1335 struct creq_query_qp_resp resp = {}; 1336 struct bnxt_qplib_cmdqmsg msg = {}; 1337 struct bnxt_qplib_rcfw_sbuf sbuf; 1338 struct creq_query_qp_resp_sb *sb; 1339 struct cmdq_query_qp req = {}; 1340 u32 temp32[4]; 1341 int i, rc; 1342 1343 sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS); 1344 sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size, 1345 &sbuf.dma_addr, GFP_KERNEL); 1346 if (!sbuf.sb) 1347 return -ENOMEM; 1348 sb = sbuf.sb; 1349 1350 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 1351 CMDQ_BASE_OPCODE_QUERY_QP, 1352 sizeof(req)); 1353 1354 req.qp_cid = cpu_to_le32(qp->id); 1355 req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS; 1356 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req), 1357 sizeof(resp), 0); 1358 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1359 if (rc) 1360 goto bail; 1361 /* Extract the context from the side buffer */ 1362 qp->state = sb->en_sqd_async_notify_state & 1363 CREQ_QUERY_QP_RESP_SB_STATE_MASK; 1364 qp->en_sqd_async_notify = sb->en_sqd_async_notify_state & 1365 CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY; 1366 qp->access = sb->access; 1367 qp->pkey_index = le16_to_cpu(sb->pkey); 1368 qp->qkey = le32_to_cpu(sb->qkey); 1369 qp->udp_sport = le16_to_cpu(sb->udp_src_port); 1370 1371 temp32[0] = le32_to_cpu(sb->dgid[0]); 1372 temp32[1] = le32_to_cpu(sb->dgid[1]); 1373 temp32[2] = le32_to_cpu(sb->dgid[2]); 1374 temp32[3] = le32_to_cpu(sb->dgid[3]); 1375 memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data)); 1376 1377 qp->ah.flow_label = le32_to_cpu(sb->flow_label); 1378 1379 qp->ah.sgid_index = 0; 1380 for (i = 0; i < res->sgid_tbl.max; i++) { 1381 if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) { 1382 qp->ah.sgid_index = i; 1383 break; 1384 } 1385 } 1386 if (i == res->sgid_tbl.max) 1387 dev_warn(&res->pdev->dev, "SGID not found??\n"); 1388 1389 qp->ah.hop_limit = sb->hop_limit; 1390 qp->ah.traffic_class = sb->traffic_class; 1391 memcpy(qp->ah.dmac, sb->dest_mac, 6); 1392 qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) & 1393 CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >> 1394 CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT; 1395 qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) & 1396 CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >> 1397 CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT; 1398 qp->timeout = sb->timeout; 1399 qp->retry_cnt = sb->retry_cnt; 1400 qp->rnr_retry = sb->rnr_retry; 1401 qp->min_rnr_timer = sb->min_rnr_timer; 1402 qp->rq.psn = le32_to_cpu(sb->rq_psn); 1403 qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic); 1404 qp->sq.psn = le32_to_cpu(sb->sq_psn); 1405 qp->max_dest_rd_atomic = 1406 IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic); 1407 qp->sq.max_wqe = qp->sq.hwq.max_elements; 1408 qp->rq.max_wqe = qp->rq.hwq.max_elements; 1409 qp->sq.max_sge = le16_to_cpu(sb->sq_sge); 1410 qp->rq.max_sge = le16_to_cpu(sb->rq_sge); 1411 qp->max_inline_data = le32_to_cpu(sb->max_inline_data); 1412 qp->dest_qpn = le32_to_cpu(sb->dest_qp_id); 1413 memcpy(qp->smac, sb->src_mac, 6); 1414 qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id); 1415 qp->port_id = le16_to_cpu(sb->port_id); 1416 bail: 1417 dma_free_coherent(&rcfw->pdev->dev, sbuf.size, 1418 sbuf.sb, sbuf.dma_addr); 1419 return rc; 1420 } 1421 1422 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp) 1423 { 1424 struct bnxt_qplib_hwq *cq_hwq = &cq->hwq; 1425 u32 peek_flags, peek_cons; 1426 struct cq_base *hw_cqe; 1427 int i; 1428 1429 peek_flags = cq->dbinfo.flags; 1430 peek_cons = cq_hwq->cons; 1431 for (i = 0; i < cq_hwq->max_elements; i++) { 1432 hw_cqe = bnxt_qplib_get_qe(cq_hwq, peek_cons, NULL); 1433 if (!CQE_CMP_VALID(hw_cqe, peek_flags)) 1434 continue; 1435 /* 1436 * The valid test of the entry must be done first before 1437 * reading any further. 1438 */ 1439 dma_rmb(); 1440 switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) { 1441 case CQ_BASE_CQE_TYPE_REQ: 1442 case CQ_BASE_CQE_TYPE_TERMINAL: 1443 { 1444 struct cq_req *cqe = (struct cq_req *)hw_cqe; 1445 1446 if (qp == le64_to_cpu(cqe->qp_handle)) 1447 cqe->qp_handle = 0; 1448 break; 1449 } 1450 case CQ_BASE_CQE_TYPE_RES_RC: 1451 case CQ_BASE_CQE_TYPE_RES_UD: 1452 case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1: 1453 { 1454 struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe; 1455 1456 if (qp == le64_to_cpu(cqe->qp_handle)) 1457 cqe->qp_handle = 0; 1458 break; 1459 } 1460 default: 1461 break; 1462 } 1463 bnxt_qplib_hwq_incr_cons(cq_hwq->max_elements, &peek_cons, 1464 1, &peek_flags); 1465 } 1466 } 1467 1468 int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res, 1469 struct bnxt_qplib_qp *qp) 1470 { 1471 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1472 struct creq_destroy_qp_resp resp = {}; 1473 struct bnxt_qplib_cmdqmsg msg = {}; 1474 struct cmdq_destroy_qp req = {}; 1475 u32 tbl_indx; 1476 int rc; 1477 1478 spin_lock_bh(&rcfw->tbl_lock); 1479 tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw); 1480 rcfw->qp_tbl[tbl_indx].qp_id = BNXT_QPLIB_QP_ID_INVALID; 1481 rcfw->qp_tbl[tbl_indx].qp_handle = NULL; 1482 spin_unlock_bh(&rcfw->tbl_lock); 1483 1484 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 1485 CMDQ_BASE_OPCODE_DESTROY_QP, 1486 sizeof(req)); 1487 1488 req.qp_cid = cpu_to_le32(qp->id); 1489 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 1490 sizeof(resp), 0); 1491 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1492 if (rc) { 1493 spin_lock_bh(&rcfw->tbl_lock); 1494 rcfw->qp_tbl[tbl_indx].qp_id = qp->id; 1495 rcfw->qp_tbl[tbl_indx].qp_handle = qp; 1496 spin_unlock_bh(&rcfw->tbl_lock); 1497 return rc; 1498 } 1499 1500 return 0; 1501 } 1502 1503 void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res, 1504 struct bnxt_qplib_qp *qp) 1505 { 1506 bnxt_qplib_free_qp_hdr_buf(res, qp); 1507 bnxt_qplib_free_hwq(res, &qp->sq.hwq); 1508 kfree(qp->sq.swq); 1509 1510 bnxt_qplib_free_hwq(res, &qp->rq.hwq); 1511 kfree(qp->rq.swq); 1512 1513 if (qp->irrq.max_elements) 1514 bnxt_qplib_free_hwq(res, &qp->irrq); 1515 if (qp->orrq.max_elements) 1516 bnxt_qplib_free_hwq(res, &qp->orrq); 1517 1518 } 1519 1520 void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp, 1521 struct bnxt_qplib_sge *sge) 1522 { 1523 struct bnxt_qplib_q *sq = &qp->sq; 1524 u32 sw_prod; 1525 1526 memset(sge, 0, sizeof(*sge)); 1527 1528 if (qp->sq_hdr_buf) { 1529 sw_prod = sq->swq_start; 1530 sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map + 1531 sw_prod * qp->sq_hdr_buf_size); 1532 sge->lkey = 0xFFFFFFFF; 1533 sge->size = qp->sq_hdr_buf_size; 1534 return qp->sq_hdr_buf + sw_prod * sge->size; 1535 } 1536 return NULL; 1537 } 1538 1539 u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp) 1540 { 1541 struct bnxt_qplib_q *rq = &qp->rq; 1542 1543 return rq->swq_start; 1544 } 1545 1546 dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index) 1547 { 1548 return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size); 1549 } 1550 1551 void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp, 1552 struct bnxt_qplib_sge *sge) 1553 { 1554 struct bnxt_qplib_q *rq = &qp->rq; 1555 u32 sw_prod; 1556 1557 memset(sge, 0, sizeof(*sge)); 1558 1559 if (qp->rq_hdr_buf) { 1560 sw_prod = rq->swq_start; 1561 sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map + 1562 sw_prod * qp->rq_hdr_buf_size); 1563 sge->lkey = 0xFFFFFFFF; 1564 sge->size = qp->rq_hdr_buf_size; 1565 return qp->rq_hdr_buf + sw_prod * sge->size; 1566 } 1567 return NULL; 1568 } 1569 1570 /* Fil the MSN table into the next psn row */ 1571 static void bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp *qp, 1572 struct bnxt_qplib_swqe *wqe, 1573 struct bnxt_qplib_swq *swq) 1574 { 1575 struct sq_msn_search *msns; 1576 u32 start_psn, next_psn; 1577 u16 start_idx; 1578 1579 msns = (struct sq_msn_search *)swq->psn_search; 1580 msns->start_idx_next_psn_start_psn = 0; 1581 1582 start_psn = swq->start_psn; 1583 next_psn = swq->next_psn; 1584 start_idx = swq->slot_idx; 1585 msns->start_idx_next_psn_start_psn |= 1586 bnxt_re_update_msn_tbl(start_idx, next_psn, start_psn); 1587 qp->msn++; 1588 qp->msn %= qp->msn_tbl_sz; 1589 } 1590 1591 static void bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp *qp, 1592 struct bnxt_qplib_swqe *wqe, 1593 struct bnxt_qplib_swq *swq) 1594 { 1595 struct sq_psn_search_ext *psns_ext; 1596 struct sq_psn_search *psns; 1597 u32 flg_npsn; 1598 u32 op_spsn; 1599 1600 if (!swq->psn_search) 1601 return; 1602 /* Handle MSN differently on cap flags */ 1603 if (qp->is_host_msn_tbl) { 1604 bnxt_qplib_fill_msn_search(qp, wqe, swq); 1605 return; 1606 } 1607 psns = (struct sq_psn_search *)swq->psn_search; 1608 psns = swq->psn_search; 1609 psns_ext = swq->psn_ext; 1610 1611 op_spsn = ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) & 1612 SQ_PSN_SEARCH_START_PSN_MASK); 1613 op_spsn |= ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) & 1614 SQ_PSN_SEARCH_OPCODE_MASK); 1615 flg_npsn = ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) & 1616 SQ_PSN_SEARCH_NEXT_PSN_MASK); 1617 1618 if (bnxt_qplib_is_chip_gen_p5_p7(qp->cctx)) { 1619 psns_ext->opcode_start_psn = cpu_to_le32(op_spsn); 1620 psns_ext->flags_next_psn = cpu_to_le32(flg_npsn); 1621 psns_ext->start_slot_idx = cpu_to_le16(swq->slot_idx); 1622 } else { 1623 psns->opcode_start_psn = cpu_to_le32(op_spsn); 1624 psns->flags_next_psn = cpu_to_le32(flg_npsn); 1625 } 1626 } 1627 1628 static unsigned int bnxt_qplib_put_inline(struct bnxt_qplib_qp *qp, 1629 struct bnxt_qplib_swqe *wqe, 1630 u32 *idx) 1631 { 1632 struct bnxt_qplib_hwq *hwq; 1633 int len, t_len, offt; 1634 bool pull_dst = true; 1635 void *il_dst = NULL; 1636 void *il_src = NULL; 1637 int t_cplen, cplen; 1638 int indx; 1639 1640 hwq = &qp->sq.hwq; 1641 t_len = 0; 1642 for (indx = 0; indx < wqe->num_sge; indx++) { 1643 len = wqe->sg_list[indx].size; 1644 il_src = (void *)wqe->sg_list[indx].addr; 1645 t_len += len; 1646 if (t_len > qp->max_inline_data) 1647 return BNXT_RE_INVAL_MSG_SIZE; 1648 while (len) { 1649 if (pull_dst) { 1650 pull_dst = false; 1651 il_dst = bnxt_qplib_get_prod_qe(hwq, *idx); 1652 (*idx)++; 1653 t_cplen = 0; 1654 offt = 0; 1655 } 1656 cplen = min_t(int, len, sizeof(struct sq_sge)); 1657 cplen = min_t(int, cplen, 1658 (sizeof(struct sq_sge) - offt)); 1659 memcpy(il_dst, il_src, cplen); 1660 t_cplen += cplen; 1661 il_src += cplen; 1662 il_dst += cplen; 1663 offt += cplen; 1664 len -= cplen; 1665 if (t_cplen == sizeof(struct sq_sge)) 1666 pull_dst = true; 1667 } 1668 } 1669 1670 return t_len; 1671 } 1672 1673 static unsigned int bnxt_qplib_put_sges(struct bnxt_qplib_hwq *hwq, 1674 struct bnxt_qplib_sge *ssge, 1675 u32 nsge, u32 *idx) 1676 { 1677 struct sq_sge *dsge; 1678 int indx, len = 0; 1679 1680 for (indx = 0; indx < nsge; indx++, (*idx)++) { 1681 dsge = bnxt_qplib_get_prod_qe(hwq, *idx); 1682 dsge->va_or_pa = cpu_to_le64(ssge[indx].addr); 1683 dsge->l_key = cpu_to_le32(ssge[indx].lkey); 1684 dsge->size = cpu_to_le32(ssge[indx].size); 1685 len += ssge[indx].size; 1686 } 1687 1688 return len; 1689 } 1690 1691 static u16 bnxt_qplib_required_slots(struct bnxt_qplib_qp *qp, 1692 struct bnxt_qplib_swqe *wqe, 1693 u16 *wqe_sz, u16 *qdf, u8 mode) 1694 { 1695 u32 ilsize, bytes; 1696 u16 nsge; 1697 u16 slot; 1698 1699 nsge = wqe->num_sge; 1700 /* Adding sq_send_hdr is a misnomer, for rq also hdr size is same. */ 1701 bytes = sizeof(struct sq_send_hdr) + nsge * sizeof(struct sq_sge); 1702 if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) { 1703 ilsize = bnxt_qplib_calc_ilsize(wqe, qp->max_inline_data); 1704 bytes = ALIGN(ilsize, sizeof(struct sq_sge)); 1705 bytes += sizeof(struct sq_send_hdr); 1706 } 1707 1708 *qdf = __xlate_qfd(qp->sq.q_full_delta, bytes); 1709 slot = bytes >> 4; 1710 *wqe_sz = slot; 1711 if (mode == BNXT_QPLIB_WQE_MODE_STATIC) 1712 slot = 8; 1713 return slot; 1714 } 1715 1716 static void bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp *qp, struct bnxt_qplib_q *sq, 1717 struct bnxt_qplib_swq *swq, bool hw_retx) 1718 { 1719 struct bnxt_qplib_hwq *hwq; 1720 u32 pg_num, pg_indx; 1721 void *buff; 1722 u32 tail; 1723 1724 hwq = &sq->hwq; 1725 if (!hwq->pad_pg) 1726 return; 1727 tail = swq->slot_idx / sq->dbinfo.max_slot; 1728 if (hw_retx) { 1729 /* For HW retx use qp msn index */ 1730 tail = qp->msn; 1731 tail %= qp->msn_tbl_sz; 1732 } 1733 pg_num = (tail + hwq->pad_pgofft) / (PAGE_SIZE / hwq->pad_stride); 1734 pg_indx = (tail + hwq->pad_pgofft) % (PAGE_SIZE / hwq->pad_stride); 1735 buff = (void *)(hwq->pad_pg[pg_num] + pg_indx * hwq->pad_stride); 1736 swq->psn_ext = buff; 1737 swq->psn_search = buff; 1738 } 1739 1740 void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp) 1741 { 1742 struct bnxt_qplib_q *sq = &qp->sq; 1743 1744 bnxt_qplib_ring_prod_db(&sq->dbinfo, DBC_DBC_TYPE_SQ); 1745 } 1746 1747 int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, 1748 struct bnxt_qplib_swqe *wqe) 1749 { 1750 struct bnxt_qplib_nq_work *nq_work = NULL; 1751 int i, rc = 0, data_len = 0, pkt_num = 0; 1752 struct bnxt_qplib_q *sq = &qp->sq; 1753 struct bnxt_qplib_hwq *hwq; 1754 struct bnxt_qplib_swq *swq; 1755 bool sch_handler = false; 1756 u32 wqe_idx, slots, idx; 1757 u16 wqe_sz, qdf = 0; 1758 bool msn_update; 1759 void *base_hdr; 1760 void *ext_hdr; 1761 __le32 temp32; 1762 1763 hwq = &sq->hwq; 1764 if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS && 1765 qp->state != CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1766 dev_err(&hwq->pdev->dev, 1767 "QPLIB: FP: QP (0x%x) is in the 0x%x state", 1768 qp->id, qp->state); 1769 rc = -EINVAL; 1770 goto done; 1771 } 1772 1773 slots = bnxt_qplib_required_slots(qp, wqe, &wqe_sz, &qdf, qp->wqe_mode); 1774 if (bnxt_qplib_queue_full(sq, slots + qdf)) { 1775 dev_err(&hwq->pdev->dev, 1776 "prod = %#x cons = %#x qdepth = %#x delta = %#x\n", 1777 hwq->prod, hwq->cons, hwq->depth, sq->q_full_delta); 1778 rc = -ENOMEM; 1779 goto done; 1780 } 1781 1782 swq = bnxt_qplib_get_swqe(sq, &wqe_idx); 1783 bnxt_qplib_pull_psn_buff(qp, sq, swq, qp->is_host_msn_tbl); 1784 1785 idx = 0; 1786 swq->slot_idx = hwq->prod; 1787 swq->slots = slots; 1788 swq->wr_id = wqe->wr_id; 1789 swq->type = wqe->type; 1790 swq->flags = wqe->flags; 1791 swq->start_psn = sq->psn & BTH_PSN_MASK; 1792 if (qp->sig_type) 1793 swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP; 1794 1795 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1796 sch_handler = true; 1797 dev_dbg(&hwq->pdev->dev, 1798 "%s Error QP. Scheduling for poll_cq\n", __func__); 1799 goto queue_err; 1800 } 1801 1802 base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++); 1803 ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++); 1804 memset(base_hdr, 0, sizeof(struct sq_sge)); 1805 memset(ext_hdr, 0, sizeof(struct sq_sge)); 1806 1807 if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) 1808 /* Copy the inline data */ 1809 data_len = bnxt_qplib_put_inline(qp, wqe, &idx); 1810 else 1811 data_len = bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge, 1812 &idx); 1813 if (data_len > BNXT_RE_MAX_MSG_SIZE) { 1814 rc = -EINVAL; 1815 goto done; 1816 } 1817 /* Make sure we update MSN table only for wired wqes */ 1818 msn_update = true; 1819 /* Specifics */ 1820 switch (wqe->type) { 1821 case BNXT_QPLIB_SWQE_TYPE_SEND: 1822 if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) { 1823 struct sq_send_raweth_qp1_hdr *sqe = base_hdr; 1824 struct sq_raw_ext_hdr *ext_sqe = ext_hdr; 1825 /* Assemble info for Raw Ethertype QPs */ 1826 1827 sqe->wqe_type = wqe->type; 1828 sqe->flags = wqe->flags; 1829 sqe->wqe_size = wqe_sz; 1830 sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action); 1831 sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags); 1832 sqe->length = cpu_to_le32(data_len); 1833 ext_sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta & 1834 SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) << 1835 SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT); 1836 1837 break; 1838 } 1839 fallthrough; 1840 case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM: 1841 case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV: 1842 { 1843 struct sq_ud_ext_hdr *ext_sqe = ext_hdr; 1844 struct sq_send_hdr *sqe = base_hdr; 1845 1846 sqe->wqe_type = wqe->type; 1847 sqe->flags = wqe->flags; 1848 sqe->wqe_size = wqe_sz; 1849 sqe->inv_key_or_imm_data = cpu_to_le32(wqe->send.inv_key); 1850 if (qp->type == CMDQ_CREATE_QP_TYPE_UD || 1851 qp->type == CMDQ_CREATE_QP_TYPE_GSI) { 1852 sqe->q_key = cpu_to_le32(wqe->send.q_key); 1853 sqe->length = cpu_to_le32(data_len); 1854 sq->psn = (sq->psn + 1) & BTH_PSN_MASK; 1855 ext_sqe->dst_qp = cpu_to_le32(wqe->send.dst_qp & 1856 SQ_SEND_DST_QP_MASK); 1857 ext_sqe->avid = cpu_to_le32(wqe->send.avid & 1858 SQ_SEND_AVID_MASK); 1859 msn_update = false; 1860 } else { 1861 sqe->length = cpu_to_le32(data_len); 1862 if (qp->mtu) 1863 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1864 if (!pkt_num) 1865 pkt_num = 1; 1866 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1867 } 1868 break; 1869 } 1870 case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE: 1871 case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM: 1872 case BNXT_QPLIB_SWQE_TYPE_RDMA_READ: 1873 { 1874 struct sq_rdma_ext_hdr *ext_sqe = ext_hdr; 1875 struct sq_rdma_hdr *sqe = base_hdr; 1876 1877 sqe->wqe_type = wqe->type; 1878 sqe->flags = wqe->flags; 1879 sqe->wqe_size = wqe_sz; 1880 sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key); 1881 sqe->length = cpu_to_le32((u32)data_len); 1882 ext_sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va); 1883 ext_sqe->remote_key = cpu_to_le32(wqe->rdma.r_key); 1884 if (qp->mtu) 1885 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1886 if (!pkt_num) 1887 pkt_num = 1; 1888 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1889 break; 1890 } 1891 case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP: 1892 case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD: 1893 { 1894 struct sq_atomic_ext_hdr *ext_sqe = ext_hdr; 1895 struct sq_atomic_hdr *sqe = base_hdr; 1896 1897 sqe->wqe_type = wqe->type; 1898 sqe->flags = wqe->flags; 1899 sqe->remote_key = cpu_to_le32(wqe->atomic.r_key); 1900 sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va); 1901 ext_sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data); 1902 ext_sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data); 1903 if (qp->mtu) 1904 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1905 if (!pkt_num) 1906 pkt_num = 1; 1907 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1908 break; 1909 } 1910 case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV: 1911 { 1912 struct sq_localinvalidate *sqe = base_hdr; 1913 1914 sqe->wqe_type = wqe->type; 1915 sqe->flags = wqe->flags; 1916 sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key); 1917 msn_update = false; 1918 break; 1919 } 1920 case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR: 1921 { 1922 struct sq_fr_pmr_ext_hdr *ext_sqe = ext_hdr; 1923 struct sq_fr_pmr_hdr *sqe = base_hdr; 1924 1925 sqe->wqe_type = wqe->type; 1926 sqe->flags = wqe->flags; 1927 sqe->access_cntl = wqe->frmr.access_cntl | 1928 SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE; 1929 sqe->zero_based_page_size_log = 1930 (wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) << 1931 SQ_FR_PMR_PAGE_SIZE_LOG_SFT | 1932 (wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0); 1933 sqe->l_key = cpu_to_le32(wqe->frmr.l_key); 1934 temp32 = cpu_to_le32(wqe->frmr.length); 1935 memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length)); 1936 sqe->numlevels_pbl_page_size_log = 1937 ((wqe->frmr.pbl_pg_sz_log << 1938 SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) & 1939 SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) | 1940 ((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) & 1941 SQ_FR_PMR_NUMLEVELS_MASK); 1942 1943 for (i = 0; i < wqe->frmr.page_list_len; i++) 1944 wqe->frmr.pbl_ptr[i] = cpu_to_le64( 1945 wqe->frmr.page_list[i] | 1946 PTU_PTE_VALID); 1947 ext_sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr); 1948 ext_sqe->va = cpu_to_le64(wqe->frmr.va); 1949 msn_update = false; 1950 1951 break; 1952 } 1953 case BNXT_QPLIB_SWQE_TYPE_BIND_MW: 1954 { 1955 struct sq_bind_ext_hdr *ext_sqe = ext_hdr; 1956 struct sq_bind_hdr *sqe = base_hdr; 1957 1958 sqe->wqe_type = wqe->type; 1959 sqe->flags = wqe->flags; 1960 sqe->access_cntl = wqe->bind.access_cntl; 1961 sqe->mw_type_zero_based = wqe->bind.mw_type | 1962 (wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0); 1963 sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key); 1964 sqe->l_key = cpu_to_le32(wqe->bind.r_key); 1965 ext_sqe->va = cpu_to_le64(wqe->bind.va); 1966 ext_sqe->length_lo = cpu_to_le32(wqe->bind.length); 1967 msn_update = false; 1968 break; 1969 } 1970 default: 1971 /* Bad wqe, return error */ 1972 rc = -EINVAL; 1973 goto done; 1974 } 1975 if (!qp->is_host_msn_tbl || msn_update) { 1976 swq->next_psn = sq->psn & BTH_PSN_MASK; 1977 bnxt_qplib_fill_psn_search(qp, wqe, swq); 1978 } 1979 queue_err: 1980 bnxt_qplib_swq_mod_start(sq, wqe_idx); 1981 bnxt_qplib_hwq_incr_prod(&sq->dbinfo, hwq, swq->slots); 1982 qp->wqe_cnt++; 1983 done: 1984 if (sch_handler) { 1985 nq_work = kzalloc_obj(*nq_work, GFP_ATOMIC); 1986 if (nq_work) { 1987 nq_work->cq = qp->scq; 1988 nq_work->nq = qp->scq->nq; 1989 INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task); 1990 queue_work(qp->scq->nq->cqn_wq, &nq_work->work); 1991 } else { 1992 dev_err(&hwq->pdev->dev, 1993 "FP: Failed to allocate SQ nq_work!\n"); 1994 rc = -ENOMEM; 1995 } 1996 } 1997 return rc; 1998 } 1999 2000 void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp) 2001 { 2002 struct bnxt_qplib_q *rq = &qp->rq; 2003 2004 bnxt_qplib_ring_prod_db(&rq->dbinfo, DBC_DBC_TYPE_RQ); 2005 } 2006 2007 int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp, 2008 struct bnxt_qplib_swqe *wqe) 2009 { 2010 struct bnxt_qplib_nq_work *nq_work = NULL; 2011 struct bnxt_qplib_q *rq = &qp->rq; 2012 struct rq_wqe_hdr *base_hdr; 2013 struct rq_ext_hdr *ext_hdr; 2014 struct bnxt_qplib_hwq *hwq; 2015 struct bnxt_qplib_swq *swq; 2016 bool sch_handler = false; 2017 u32 wqe_idx, idx; 2018 u16 wqe_sz; 2019 int rc = 0; 2020 2021 hwq = &rq->hwq; 2022 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_RESET) { 2023 dev_err(&hwq->pdev->dev, 2024 "QPLIB: FP: QP (0x%x) is in the 0x%x state", 2025 qp->id, qp->state); 2026 rc = -EINVAL; 2027 goto done; 2028 } 2029 2030 if (bnxt_qplib_queue_full(rq, rq->dbinfo.max_slot)) { 2031 dev_err(&hwq->pdev->dev, 2032 "FP: QP (0x%x) RQ is full!\n", qp->id); 2033 rc = -EINVAL; 2034 goto done; 2035 } 2036 2037 swq = bnxt_qplib_get_swqe(rq, &wqe_idx); 2038 swq->wr_id = wqe->wr_id; 2039 swq->slots = rq->dbinfo.max_slot; 2040 2041 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 2042 sch_handler = true; 2043 dev_dbg(&hwq->pdev->dev, 2044 "%s: Error QP. Scheduling for poll_cq\n", __func__); 2045 goto queue_err; 2046 } 2047 2048 idx = 0; 2049 base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++); 2050 ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++); 2051 memset(base_hdr, 0, sizeof(struct sq_sge)); 2052 memset(ext_hdr, 0, sizeof(struct sq_sge)); 2053 wqe_sz = (sizeof(struct rq_wqe_hdr) + 2054 wqe->num_sge * sizeof(struct sq_sge)) >> 4; 2055 bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge, &idx); 2056 if (!wqe->num_sge) { 2057 struct sq_sge *sge; 2058 2059 sge = bnxt_qplib_get_prod_qe(hwq, idx++); 2060 sge->size = 0; 2061 wqe_sz++; 2062 } 2063 base_hdr->wqe_type = wqe->type; 2064 base_hdr->flags = wqe->flags; 2065 base_hdr->wqe_size = wqe_sz; 2066 base_hdr->wr_id[0] = cpu_to_le32(wqe_idx); 2067 queue_err: 2068 bnxt_qplib_swq_mod_start(rq, wqe_idx); 2069 bnxt_qplib_hwq_incr_prod(&rq->dbinfo, hwq, swq->slots); 2070 done: 2071 if (sch_handler) { 2072 nq_work = kzalloc_obj(*nq_work, GFP_ATOMIC); 2073 if (nq_work) { 2074 nq_work->cq = qp->rcq; 2075 nq_work->nq = qp->rcq->nq; 2076 INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task); 2077 queue_work(qp->rcq->nq->cqn_wq, &nq_work->work); 2078 } else { 2079 dev_err(&hwq->pdev->dev, 2080 "FP: Failed to allocate RQ nq_work!\n"); 2081 rc = -ENOMEM; 2082 } 2083 } 2084 2085 return rc; 2086 } 2087 2088 /* CQ */ 2089 int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) 2090 { 2091 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 2092 struct bnxt_qplib_hwq_attr hwq_attr = {}; 2093 struct creq_create_cq_resp resp = {}; 2094 struct bnxt_qplib_cmdqmsg msg = {}; 2095 struct cmdq_create_cq req = {}; 2096 struct bnxt_qplib_pbl *pbl; 2097 u32 coalescing = 0; 2098 u32 pg_sz_lvl; 2099 int rc; 2100 2101 if (!cq->dpi) { 2102 dev_err(&rcfw->pdev->dev, 2103 "FP: CREATE_CQ failed due to NULL DPI\n"); 2104 return -EINVAL; 2105 } 2106 2107 cq->dbinfo.flags = 0; 2108 hwq_attr.res = res; 2109 hwq_attr.depth = cq->max_wqe; 2110 hwq_attr.stride = sizeof(struct cq_base); 2111 hwq_attr.type = HWQ_TYPE_QUEUE; 2112 hwq_attr.sginfo = &cq->sg_info; 2113 rc = bnxt_qplib_alloc_init_hwq(&cq->hwq, &hwq_attr); 2114 if (rc) 2115 return rc; 2116 2117 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 2118 CMDQ_BASE_OPCODE_CREATE_CQ, 2119 sizeof(req)); 2120 2121 req.dpi = cpu_to_le32(cq->dpi->dpi); 2122 req.cq_handle = cpu_to_le64(cq->cq_handle); 2123 req.cq_size = cpu_to_le32(cq->max_wqe); 2124 2125 if (_is_cq_coalescing_supported(res->dattr->dev_cap_flags2) && 2126 cq->coalescing->enable) { 2127 req.flags |= cpu_to_le16(CMDQ_CREATE_CQ_FLAGS_COALESCING_VALID); 2128 coalescing |= ((cq->coalescing->buf_maxtime << 2129 CMDQ_CREATE_CQ_BUF_MAXTIME_SFT) & 2130 CMDQ_CREATE_CQ_BUF_MAXTIME_MASK); 2131 coalescing |= ((cq->coalescing->normal_maxbuf << 2132 CMDQ_CREATE_CQ_NORMAL_MAXBUF_SFT) & 2133 CMDQ_CREATE_CQ_NORMAL_MAXBUF_MASK); 2134 coalescing |= ((cq->coalescing->during_maxbuf << 2135 CMDQ_CREATE_CQ_DURING_MAXBUF_SFT) & 2136 CMDQ_CREATE_CQ_DURING_MAXBUF_MASK); 2137 if (cq->coalescing->en_ring_idle_mode) 2138 coalescing |= CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE; 2139 else 2140 coalescing &= ~CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE; 2141 req.coalescing = cpu_to_le32(coalescing); 2142 } 2143 2144 pbl = &cq->hwq.pbl[PBL_LVL_0]; 2145 pg_sz_lvl = (bnxt_qplib_base_pg_size(&cq->hwq) << 2146 CMDQ_CREATE_CQ_PG_SIZE_SFT); 2147 pg_sz_lvl |= (cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK); 2148 req.pg_size_lvl = cpu_to_le32(pg_sz_lvl); 2149 req.pbl = cpu_to_le64(pbl->pg_map_arr[0]); 2150 req.cq_fco_cnq_id = cpu_to_le32( 2151 (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) << 2152 CMDQ_CREATE_CQ_CNQ_ID_SFT); 2153 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 2154 sizeof(resp), 0); 2155 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 2156 if (rc) 2157 goto fail; 2158 2159 cq->id = le32_to_cpu(resp.xid); 2160 cq->period = BNXT_QPLIB_QUEUE_START_PERIOD; 2161 init_waitqueue_head(&cq->waitq); 2162 INIT_LIST_HEAD(&cq->sqf_head); 2163 INIT_LIST_HEAD(&cq->rqf_head); 2164 spin_lock_init(&cq->compl_lock); 2165 spin_lock_init(&cq->flush_lock); 2166 2167 cq->dbinfo.hwq = &cq->hwq; 2168 cq->dbinfo.xid = cq->id; 2169 cq->dbinfo.db = cq->dpi->dbr; 2170 cq->dbinfo.priv_db = res->dpi_tbl.priv_db; 2171 cq->dbinfo.flags = 0; 2172 cq->dbinfo.toggle = 0; 2173 2174 bnxt_qplib_armen_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMENA); 2175 2176 return 0; 2177 2178 fail: 2179 bnxt_qplib_free_hwq(res, &cq->hwq); 2180 return rc; 2181 } 2182 2183 void bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res *res, 2184 struct bnxt_qplib_cq *cq) 2185 { 2186 bnxt_qplib_free_hwq(res, &cq->hwq); 2187 memcpy(&cq->hwq, &cq->resize_hwq, sizeof(cq->hwq)); 2188 /* Reset only the cons bit in the flags */ 2189 cq->dbinfo.flags &= ~(1UL << BNXT_QPLIB_FLAG_EPOCH_CONS_SHIFT); 2190 } 2191 2192 int bnxt_qplib_resize_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq, 2193 int new_cqes) 2194 { 2195 struct bnxt_qplib_hwq_attr hwq_attr = {}; 2196 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 2197 struct creq_resize_cq_resp resp = {}; 2198 struct bnxt_qplib_cmdqmsg msg = {}; 2199 struct cmdq_resize_cq req = {}; 2200 struct bnxt_qplib_pbl *pbl; 2201 u32 pg_sz, lvl, new_sz; 2202 int rc; 2203 2204 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 2205 CMDQ_BASE_OPCODE_RESIZE_CQ, 2206 sizeof(req)); 2207 hwq_attr.sginfo = &cq->sg_info; 2208 hwq_attr.res = res; 2209 hwq_attr.depth = new_cqes; 2210 hwq_attr.stride = sizeof(struct cq_base); 2211 hwq_attr.type = HWQ_TYPE_QUEUE; 2212 rc = bnxt_qplib_alloc_init_hwq(&cq->resize_hwq, &hwq_attr); 2213 if (rc) 2214 return rc; 2215 2216 req.cq_cid = cpu_to_le32(cq->id); 2217 pbl = &cq->resize_hwq.pbl[PBL_LVL_0]; 2218 pg_sz = bnxt_qplib_base_pg_size(&cq->resize_hwq); 2219 lvl = (cq->resize_hwq.level << CMDQ_RESIZE_CQ_LVL_SFT) & 2220 CMDQ_RESIZE_CQ_LVL_MASK; 2221 new_sz = (new_cqes << CMDQ_RESIZE_CQ_NEW_CQ_SIZE_SFT) & 2222 CMDQ_RESIZE_CQ_NEW_CQ_SIZE_MASK; 2223 req.new_cq_size_pg_size_lvl = cpu_to_le32(new_sz | pg_sz | lvl); 2224 req.new_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 2225 2226 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 2227 sizeof(resp), 0); 2228 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 2229 return rc; 2230 } 2231 2232 int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) 2233 { 2234 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 2235 struct creq_destroy_cq_resp resp = {}; 2236 struct bnxt_qplib_cmdqmsg msg = {}; 2237 struct cmdq_destroy_cq req = {}; 2238 u16 total_cnq_events; 2239 int rc; 2240 2241 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 2242 CMDQ_BASE_OPCODE_DESTROY_CQ, 2243 sizeof(req)); 2244 2245 req.cq_cid = cpu_to_le32(cq->id); 2246 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 2247 sizeof(resp), 0); 2248 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 2249 if (rc) 2250 return rc; 2251 total_cnq_events = le16_to_cpu(resp.total_cnq_events); 2252 __wait_for_all_nqes(cq, total_cnq_events); 2253 bnxt_qplib_free_hwq(res, &cq->hwq); 2254 return 0; 2255 } 2256 2257 static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp, 2258 struct bnxt_qplib_cqe **pcqe, int *budget) 2259 { 2260 struct bnxt_qplib_cqe *cqe; 2261 u32 start, last; 2262 int rc = 0; 2263 2264 /* Now complete all outstanding SQEs with FLUSHED_ERR */ 2265 start = sq->swq_start; 2266 cqe = *pcqe; 2267 while (*budget) { 2268 last = sq->swq_last; 2269 if (start == last) 2270 break; 2271 /* Skip the FENCE WQE completions */ 2272 if (sq->swq[last].wr_id == BNXT_QPLIB_FENCE_WRID) { 2273 bnxt_qplib_cancel_phantom_processing(qp); 2274 goto skip_compl; 2275 } 2276 memset(cqe, 0, sizeof(*cqe)); 2277 cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR; 2278 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2279 cqe->qp_handle = (u64)(unsigned long)qp; 2280 cqe->wr_id = sq->swq[last].wr_id; 2281 cqe->src_qp = qp->id; 2282 cqe->type = sq->swq[last].type; 2283 cqe++; 2284 (*budget)--; 2285 skip_compl: 2286 bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons, 2287 sq->swq[last].slots, &sq->dbinfo.flags); 2288 sq->swq_last = sq->swq[last].next_idx; 2289 } 2290 *pcqe = cqe; 2291 if (!(*budget) && sq->swq_last != start) 2292 /* Out of budget */ 2293 rc = -EAGAIN; 2294 2295 return rc; 2296 } 2297 2298 static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp, 2299 struct bnxt_qplib_cqe **pcqe, int *budget) 2300 { 2301 struct bnxt_qplib_cqe *cqe; 2302 u32 start, last; 2303 int opcode = 0; 2304 int rc = 0; 2305 2306 switch (qp->type) { 2307 case CMDQ_CREATE_QP1_TYPE_GSI: 2308 opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1; 2309 break; 2310 case CMDQ_CREATE_QP_TYPE_RC: 2311 opcode = CQ_BASE_CQE_TYPE_RES_RC; 2312 break; 2313 case CMDQ_CREATE_QP_TYPE_UD: 2314 case CMDQ_CREATE_QP_TYPE_GSI: 2315 opcode = CQ_BASE_CQE_TYPE_RES_UD; 2316 break; 2317 } 2318 2319 /* Flush the rest of the RQ */ 2320 start = rq->swq_start; 2321 cqe = *pcqe; 2322 while (*budget) { 2323 last = rq->swq_last; 2324 if (last == start) 2325 break; 2326 memset(cqe, 0, sizeof(*cqe)); 2327 cqe->status = 2328 CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR; 2329 cqe->opcode = opcode; 2330 cqe->qp_handle = (unsigned long)qp; 2331 cqe->wr_id = rq->swq[last].wr_id; 2332 cqe++; 2333 (*budget)--; 2334 bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons, 2335 rq->swq[last].slots, &rq->dbinfo.flags); 2336 rq->swq_last = rq->swq[last].next_idx; 2337 } 2338 *pcqe = cqe; 2339 if (!*budget && rq->swq_last != start) 2340 /* Out of budget */ 2341 rc = -EAGAIN; 2342 2343 return rc; 2344 } 2345 2346 void bnxt_qplib_mark_qp_error(void *qp_handle) 2347 { 2348 struct bnxt_qplib_qp *qp = qp_handle; 2349 2350 if (!qp) 2351 return; 2352 2353 /* Must block new posting of SQ and RQ */ 2354 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2355 bnxt_qplib_cancel_phantom_processing(qp); 2356 } 2357 2358 /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive) 2359 * CQE is track from sw_cq_cons to max_element but valid only if VALID=1 2360 */ 2361 static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq, 2362 u32 cq_cons, u32 swq_last, u32 cqe_sq_cons) 2363 { 2364 u32 peek_sw_cq_cons, peek_sq_cons_idx, peek_flags; 2365 struct bnxt_qplib_q *sq = &qp->sq; 2366 struct cq_req *peek_req_hwcqe; 2367 struct bnxt_qplib_qp *peek_qp; 2368 struct bnxt_qplib_q *peek_sq; 2369 struct bnxt_qplib_swq *swq; 2370 struct cq_base *peek_hwcqe; 2371 int i, rc = 0; 2372 2373 /* Normal mode */ 2374 /* Check for the psn_search marking before completing */ 2375 swq = &sq->swq[swq_last]; 2376 if (swq->psn_search && 2377 le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) { 2378 /* Unmark */ 2379 swq->psn_search->flags_next_psn = cpu_to_le32 2380 (le32_to_cpu(swq->psn_search->flags_next_psn) 2381 & ~0x80000000); 2382 dev_dbg(&cq->hwq.pdev->dev, 2383 "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n", 2384 cq_cons, qp->id, swq_last, cqe_sq_cons); 2385 sq->condition = true; 2386 sq->send_phantom = true; 2387 2388 /* TODO: Only ARM if the previous SQE is ARMALL */ 2389 bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMALL); 2390 rc = -EAGAIN; 2391 goto out; 2392 } 2393 if (sq->condition) { 2394 /* Peek at the completions */ 2395 peek_flags = cq->dbinfo.flags; 2396 peek_sw_cq_cons = cq_cons; 2397 i = cq->hwq.max_elements; 2398 while (i--) { 2399 peek_hwcqe = bnxt_qplib_get_qe(&cq->hwq, 2400 peek_sw_cq_cons, NULL); 2401 /* If the next hwcqe is VALID */ 2402 if (CQE_CMP_VALID(peek_hwcqe, peek_flags)) { 2403 /* 2404 * The valid test of the entry must be done first before 2405 * reading any further. 2406 */ 2407 dma_rmb(); 2408 /* If the next hwcqe is a REQ */ 2409 if ((peek_hwcqe->cqe_type_toggle & 2410 CQ_BASE_CQE_TYPE_MASK) == 2411 CQ_BASE_CQE_TYPE_REQ) { 2412 peek_req_hwcqe = (struct cq_req *) 2413 peek_hwcqe; 2414 peek_qp = (struct bnxt_qplib_qp *) 2415 ((unsigned long) 2416 le64_to_cpu 2417 (peek_req_hwcqe->qp_handle)); 2418 peek_sq = &peek_qp->sq; 2419 peek_sq_cons_idx = 2420 ((le16_to_cpu( 2421 peek_req_hwcqe->sq_cons_idx) 2422 - 1) % sq->max_wqe); 2423 /* If the hwcqe's sq's wr_id matches */ 2424 if (peek_sq == sq && 2425 sq->swq[peek_sq_cons_idx].wr_id == 2426 BNXT_QPLIB_FENCE_WRID) { 2427 /* 2428 * Unbreak only if the phantom 2429 * comes back 2430 */ 2431 dev_dbg(&cq->hwq.pdev->dev, 2432 "FP: Got Phantom CQE\n"); 2433 sq->condition = false; 2434 sq->single = true; 2435 rc = 0; 2436 goto out; 2437 } 2438 } 2439 /* Valid but not the phantom, so keep looping */ 2440 } else { 2441 /* Not valid yet, just exit and wait */ 2442 rc = -EINVAL; 2443 goto out; 2444 } 2445 bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements, 2446 &peek_sw_cq_cons, 2447 1, &peek_flags); 2448 } 2449 dev_err(&cq->hwq.pdev->dev, 2450 "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x\n", 2451 cq_cons, qp->id, swq_last, cqe_sq_cons); 2452 rc = -EINVAL; 2453 } 2454 out: 2455 return rc; 2456 } 2457 2458 static int bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q *sq, u32 cqe_slot) 2459 { 2460 struct bnxt_qplib_hwq *sq_hwq; 2461 struct bnxt_qplib_swq *swq; 2462 int cqe_sq_cons = -1; 2463 u32 start, last; 2464 2465 sq_hwq = &sq->hwq; 2466 2467 start = sq->swq_start; 2468 last = sq->swq_last; 2469 2470 while (last != start) { 2471 swq = &sq->swq[last]; 2472 if (swq->slot_idx == cqe_slot) { 2473 cqe_sq_cons = swq->next_idx; 2474 dev_err(&sq_hwq->pdev->dev, "%s: Found cons wqe = %d slot = %d\n", 2475 __func__, cqe_sq_cons, cqe_slot); 2476 break; 2477 } 2478 2479 last = swq->next_idx; 2480 } 2481 return cqe_sq_cons; 2482 } 2483 2484 static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq, 2485 struct cq_req *hwcqe, 2486 struct bnxt_qplib_cqe **pcqe, int *budget, 2487 u32 cq_cons, struct bnxt_qplib_qp **lib_qp) 2488 { 2489 struct bnxt_qplib_swq *swq; 2490 struct bnxt_qplib_cqe *cqe; 2491 u32 cqe_sq_cons, slot_num; 2492 struct bnxt_qplib_qp *qp; 2493 struct bnxt_qplib_q *sq; 2494 int cqe_cons; 2495 int rc = 0; 2496 2497 qp = (struct bnxt_qplib_qp *)((unsigned long) 2498 le64_to_cpu(hwcqe->qp_handle)); 2499 if (!qp) { 2500 dev_err(&cq->hwq.pdev->dev, 2501 "FP: Process Req qp is NULL\n"); 2502 return -EINVAL; 2503 } 2504 sq = &qp->sq; 2505 2506 cqe_sq_cons = le16_to_cpu(hwcqe->sq_cons_idx) % sq->max_sw_wqe; 2507 if (qp->sq.flushed) { 2508 dev_dbg(&cq->hwq.pdev->dev, 2509 "%s: QP in Flush QP = %p\n", __func__, qp); 2510 goto done; 2511 } 2512 2513 if (__is_err_cqe_for_var_wqe(qp, hwcqe->status)) { 2514 slot_num = le16_to_cpu(hwcqe->sq_cons_idx); 2515 cqe_cons = bnxt_qplib_get_cqe_sq_cons(sq, slot_num); 2516 if (cqe_cons < 0) { 2517 dev_err(&cq->hwq.pdev->dev, "%s: Wrong SQ cons cqe_slot_indx = %d\n", 2518 __func__, slot_num); 2519 goto done; 2520 } 2521 cqe_sq_cons = cqe_cons; 2522 dev_err(&cq->hwq.pdev->dev, "%s: cqe_sq_cons = %d swq_last = %d swq_start = %d\n", 2523 __func__, cqe_sq_cons, sq->swq_last, sq->swq_start); 2524 } 2525 2526 /* Require to walk the sq's swq to fabricate CQEs for all previously 2527 * signaled SWQEs due to CQE aggregation from the current sq cons 2528 * to the cqe_sq_cons 2529 */ 2530 cqe = *pcqe; 2531 while (*budget) { 2532 if (sq->swq_last == cqe_sq_cons) 2533 /* Done */ 2534 break; 2535 2536 swq = &sq->swq[sq->swq_last]; 2537 memset(cqe, 0, sizeof(*cqe)); 2538 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2539 cqe->qp_handle = (u64)(unsigned long)qp; 2540 cqe->src_qp = qp->id; 2541 cqe->wr_id = swq->wr_id; 2542 if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID) 2543 goto skip; 2544 cqe->type = swq->type; 2545 2546 /* For the last CQE, check for status. For errors, regardless 2547 * of the request being signaled or not, it must complete with 2548 * the hwcqe error status 2549 */ 2550 if (swq->next_idx == cqe_sq_cons && 2551 hwcqe->status != CQ_REQ_STATUS_OK) { 2552 cqe->status = hwcqe->status; 2553 dev_err(&cq->hwq.pdev->dev, 2554 "FP: CQ Processed Req wr_id[%d] = 0x%llx with status 0x%x\n", 2555 sq->swq_last, cqe->wr_id, cqe->status); 2556 cqe++; 2557 (*budget)--; 2558 bnxt_qplib_mark_qp_error(qp); 2559 /* Add qp to flush list of the CQ */ 2560 bnxt_qplib_add_flush_qp(qp); 2561 } else { 2562 /* Before we complete, do WA 9060 */ 2563 if (!bnxt_qplib_is_chip_gen_p5_p7(qp->cctx)) { 2564 if (do_wa9060(qp, cq, cq_cons, sq->swq_last, 2565 cqe_sq_cons)) { 2566 *lib_qp = qp; 2567 goto out; 2568 } 2569 } 2570 if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) { 2571 cqe->status = CQ_REQ_STATUS_OK; 2572 cqe++; 2573 (*budget)--; 2574 } 2575 } 2576 skip: 2577 bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons, 2578 swq->slots, &sq->dbinfo.flags); 2579 sq->swq_last = swq->next_idx; 2580 if (sq->single) 2581 break; 2582 } 2583 out: 2584 *pcqe = cqe; 2585 if (sq->swq_last != cqe_sq_cons) { 2586 /* Out of budget */ 2587 rc = -EAGAIN; 2588 goto done; 2589 } 2590 /* 2591 * Back to normal completion mode only after it has completed all of 2592 * the WC for this CQE 2593 */ 2594 sq->single = false; 2595 done: 2596 return rc; 2597 } 2598 2599 static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag) 2600 { 2601 spin_lock(&srq->hwq.lock); 2602 srq->swq[srq->last_idx].next_idx = (int)tag; 2603 srq->last_idx = (int)tag; 2604 srq->swq[srq->last_idx].next_idx = -1; 2605 bnxt_qplib_hwq_incr_cons(srq->hwq.max_elements, &srq->hwq.cons, 2606 srq->dbinfo.max_slot, &srq->dbinfo.flags); 2607 spin_unlock(&srq->hwq.lock); 2608 } 2609 2610 static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq, 2611 struct cq_res_rc *hwcqe, 2612 struct bnxt_qplib_cqe **pcqe, 2613 int *budget) 2614 { 2615 struct bnxt_qplib_srq *srq; 2616 struct bnxt_qplib_cqe *cqe; 2617 struct bnxt_qplib_qp *qp; 2618 struct bnxt_qplib_q *rq; 2619 u32 wr_id_idx; 2620 2621 qp = (struct bnxt_qplib_qp *)((unsigned long) 2622 le64_to_cpu(hwcqe->qp_handle)); 2623 if (!qp) { 2624 dev_err(&cq->hwq.pdev->dev, "process_cq RC qp is NULL\n"); 2625 return -EINVAL; 2626 } 2627 if (qp->rq.flushed) { 2628 dev_dbg(&cq->hwq.pdev->dev, 2629 "%s: QP in Flush QP = %p\n", __func__, qp); 2630 return 0; 2631 } 2632 2633 cqe = *pcqe; 2634 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2635 cqe->length = le32_to_cpu(hwcqe->length); 2636 cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key); 2637 cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle); 2638 cqe->flags = le16_to_cpu(hwcqe->flags); 2639 cqe->status = hwcqe->status; 2640 cqe->qp_handle = (u64)(unsigned long)qp; 2641 2642 wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) & 2643 CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK; 2644 if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) { 2645 srq = qp->srq; 2646 if (!srq) 2647 return -EINVAL; 2648 if (wr_id_idx >= srq->hwq.max_elements) { 2649 dev_err(&cq->hwq.pdev->dev, 2650 "FP: CQ Process RC wr_id idx 0x%x exceeded SRQ max 0x%x\n", 2651 wr_id_idx, srq->hwq.max_elements); 2652 return -EINVAL; 2653 } 2654 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2655 bnxt_qplib_release_srqe(srq, wr_id_idx); 2656 cqe++; 2657 (*budget)--; 2658 *pcqe = cqe; 2659 } else { 2660 struct bnxt_qplib_swq *swq; 2661 2662 rq = &qp->rq; 2663 if (wr_id_idx > (rq->max_wqe - 1)) { 2664 dev_err(&cq->hwq.pdev->dev, 2665 "FP: CQ Process RC wr_id idx 0x%x exceeded RQ max 0x%x\n", 2666 wr_id_idx, rq->max_wqe); 2667 return -EINVAL; 2668 } 2669 if (wr_id_idx != rq->swq_last) 2670 return -EINVAL; 2671 swq = &rq->swq[rq->swq_last]; 2672 cqe->wr_id = swq->wr_id; 2673 cqe++; 2674 (*budget)--; 2675 bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons, 2676 swq->slots, &rq->dbinfo.flags); 2677 rq->swq_last = swq->next_idx; 2678 *pcqe = cqe; 2679 2680 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2681 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2682 /* Add qp to flush list of the CQ */ 2683 bnxt_qplib_add_flush_qp(qp); 2684 } 2685 } 2686 2687 return 0; 2688 } 2689 2690 static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq, 2691 struct cq_res_ud *hwcqe, 2692 struct bnxt_qplib_cqe **pcqe, 2693 int *budget) 2694 { 2695 struct bnxt_qplib_srq *srq; 2696 struct bnxt_qplib_cqe *cqe; 2697 struct bnxt_qplib_qp *qp; 2698 struct bnxt_qplib_q *rq; 2699 u32 wr_id_idx; 2700 2701 qp = (struct bnxt_qplib_qp *)((unsigned long) 2702 le64_to_cpu(hwcqe->qp_handle)); 2703 if (!qp) { 2704 dev_err(&cq->hwq.pdev->dev, "process_cq UD qp is NULL\n"); 2705 return -EINVAL; 2706 } 2707 if (qp->rq.flushed) { 2708 dev_dbg(&cq->hwq.pdev->dev, 2709 "%s: QP in Flush QP = %p\n", __func__, qp); 2710 return 0; 2711 } 2712 cqe = *pcqe; 2713 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2714 cqe->length = le16_to_cpu(hwcqe->length) & CQ_RES_UD_LENGTH_MASK; 2715 cqe->cfa_meta = le16_to_cpu(hwcqe->cfa_metadata); 2716 cqe->invrkey = le32_to_cpu(hwcqe->imm_data); 2717 cqe->flags = le16_to_cpu(hwcqe->flags); 2718 cqe->status = hwcqe->status; 2719 cqe->qp_handle = (u64)(unsigned long)qp; 2720 /*FIXME: Endianness fix needed for smace */ 2721 memcpy(cqe->smac, hwcqe->src_mac, ETH_ALEN); 2722 wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id) 2723 & CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK; 2724 cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) | 2725 ((le32_to_cpu( 2726 hwcqe->src_qp_high_srq_or_rq_wr_id) & 2727 CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8); 2728 2729 if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) { 2730 srq = qp->srq; 2731 if (!srq) 2732 return -EINVAL; 2733 2734 if (wr_id_idx >= srq->hwq.max_elements) { 2735 dev_err(&cq->hwq.pdev->dev, 2736 "FP: CQ Process UD wr_id idx 0x%x exceeded SRQ max 0x%x\n", 2737 wr_id_idx, srq->hwq.max_elements); 2738 return -EINVAL; 2739 } 2740 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2741 bnxt_qplib_release_srqe(srq, wr_id_idx); 2742 cqe++; 2743 (*budget)--; 2744 *pcqe = cqe; 2745 } else { 2746 struct bnxt_qplib_swq *swq; 2747 2748 rq = &qp->rq; 2749 if (wr_id_idx > (rq->max_wqe - 1)) { 2750 dev_err(&cq->hwq.pdev->dev, 2751 "FP: CQ Process UD wr_id idx 0x%x exceeded RQ max 0x%x\n", 2752 wr_id_idx, rq->max_wqe); 2753 return -EINVAL; 2754 } 2755 2756 if (rq->swq_last != wr_id_idx) 2757 return -EINVAL; 2758 swq = &rq->swq[rq->swq_last]; 2759 cqe->wr_id = swq->wr_id; 2760 cqe++; 2761 (*budget)--; 2762 bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons, 2763 swq->slots, &rq->dbinfo.flags); 2764 rq->swq_last = swq->next_idx; 2765 *pcqe = cqe; 2766 2767 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2768 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2769 /* Add qp to flush list of the CQ */ 2770 bnxt_qplib_add_flush_qp(qp); 2771 } 2772 } 2773 2774 return 0; 2775 } 2776 2777 bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq) 2778 { 2779 struct cq_base *hw_cqe; 2780 bool rc = true; 2781 2782 hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL); 2783 /* Check for Valid bit. If the CQE is valid, return false */ 2784 rc = !CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags); 2785 return rc; 2786 } 2787 2788 static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq, 2789 struct cq_res_raweth_qp1 *hwcqe, 2790 struct bnxt_qplib_cqe **pcqe, 2791 int *budget) 2792 { 2793 struct bnxt_qplib_qp *qp; 2794 struct bnxt_qplib_q *rq; 2795 struct bnxt_qplib_srq *srq; 2796 struct bnxt_qplib_cqe *cqe; 2797 u32 wr_id_idx; 2798 2799 qp = (struct bnxt_qplib_qp *)((unsigned long) 2800 le64_to_cpu(hwcqe->qp_handle)); 2801 if (!qp) { 2802 dev_err(&cq->hwq.pdev->dev, "process_cq Raw/QP1 qp is NULL\n"); 2803 return -EINVAL; 2804 } 2805 if (qp->rq.flushed) { 2806 dev_dbg(&cq->hwq.pdev->dev, 2807 "%s: QP in Flush QP = %p\n", __func__, qp); 2808 return 0; 2809 } 2810 cqe = *pcqe; 2811 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2812 cqe->flags = le16_to_cpu(hwcqe->flags); 2813 cqe->qp_handle = (u64)(unsigned long)qp; 2814 2815 wr_id_idx = 2816 le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id) 2817 & CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK; 2818 cqe->src_qp = qp->id; 2819 if (qp->id == 1 && !cqe->length) { 2820 /* Add workaround for the length misdetection */ 2821 cqe->length = 296; 2822 } else { 2823 cqe->length = le16_to_cpu(hwcqe->length); 2824 } 2825 cqe->pkey_index = qp->pkey_index; 2826 memcpy(cqe->smac, qp->smac, 6); 2827 2828 cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags); 2829 cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2); 2830 cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata); 2831 2832 if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) { 2833 srq = qp->srq; 2834 if (!srq) { 2835 dev_err(&cq->hwq.pdev->dev, 2836 "FP: SRQ used but not defined??\n"); 2837 return -EINVAL; 2838 } 2839 if (wr_id_idx >= srq->hwq.max_elements) { 2840 dev_err(&cq->hwq.pdev->dev, 2841 "FP: CQ Process Raw/QP1 wr_id idx 0x%x exceeded SRQ max 0x%x\n", 2842 wr_id_idx, srq->hwq.max_elements); 2843 return -EINVAL; 2844 } 2845 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2846 bnxt_qplib_release_srqe(srq, wr_id_idx); 2847 cqe++; 2848 (*budget)--; 2849 *pcqe = cqe; 2850 } else { 2851 struct bnxt_qplib_swq *swq; 2852 2853 rq = &qp->rq; 2854 if (wr_id_idx > (rq->max_wqe - 1)) { 2855 dev_err(&cq->hwq.pdev->dev, 2856 "FP: CQ Process Raw/QP1 RQ wr_id idx 0x%x exceeded RQ max 0x%x\n", 2857 wr_id_idx, rq->max_wqe); 2858 return -EINVAL; 2859 } 2860 if (rq->swq_last != wr_id_idx) 2861 return -EINVAL; 2862 swq = &rq->swq[rq->swq_last]; 2863 cqe->wr_id = swq->wr_id; 2864 cqe++; 2865 (*budget)--; 2866 bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons, 2867 swq->slots, &rq->dbinfo.flags); 2868 rq->swq_last = swq->next_idx; 2869 *pcqe = cqe; 2870 2871 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2872 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2873 /* Add qp to flush list of the CQ */ 2874 bnxt_qplib_add_flush_qp(qp); 2875 } 2876 } 2877 2878 return 0; 2879 } 2880 2881 static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq, 2882 struct cq_terminal *hwcqe, 2883 struct bnxt_qplib_cqe **pcqe, 2884 int *budget) 2885 { 2886 struct bnxt_qplib_qp *qp; 2887 struct bnxt_qplib_q *sq, *rq; 2888 struct bnxt_qplib_cqe *cqe; 2889 u32 swq_last = 0, cqe_cons; 2890 int rc = 0; 2891 2892 /* Check the Status */ 2893 if (hwcqe->status != CQ_TERMINAL_STATUS_OK) 2894 dev_warn(&cq->hwq.pdev->dev, 2895 "FP: CQ Process Terminal Error status = 0x%x\n", 2896 hwcqe->status); 2897 2898 qp = (struct bnxt_qplib_qp *)((unsigned long) 2899 le64_to_cpu(hwcqe->qp_handle)); 2900 if (!qp) 2901 return -EINVAL; 2902 2903 /* Must block new posting of SQ and RQ */ 2904 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2905 2906 sq = &qp->sq; 2907 rq = &qp->rq; 2908 2909 cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx); 2910 if (cqe_cons == 0xFFFF) 2911 goto do_rq; 2912 cqe_cons %= sq->max_sw_wqe; 2913 2914 if (qp->sq.flushed) { 2915 dev_dbg(&cq->hwq.pdev->dev, 2916 "%s: QP in Flush QP = %p\n", __func__, qp); 2917 goto sq_done; 2918 } 2919 2920 /* Terminal CQE can also include aggregated successful CQEs prior. 2921 * So we must complete all CQEs from the current sq's cons to the 2922 * cq_cons with status OK 2923 */ 2924 cqe = *pcqe; 2925 while (*budget) { 2926 swq_last = sq->swq_last; 2927 if (swq_last == cqe_cons) 2928 break; 2929 if (sq->swq[swq_last].flags & SQ_SEND_FLAGS_SIGNAL_COMP) { 2930 memset(cqe, 0, sizeof(*cqe)); 2931 cqe->status = CQ_REQ_STATUS_OK; 2932 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2933 cqe->qp_handle = (u64)(unsigned long)qp; 2934 cqe->src_qp = qp->id; 2935 cqe->wr_id = sq->swq[swq_last].wr_id; 2936 cqe->type = sq->swq[swq_last].type; 2937 cqe++; 2938 (*budget)--; 2939 } 2940 bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons, 2941 sq->swq[swq_last].slots, &sq->dbinfo.flags); 2942 sq->swq_last = sq->swq[swq_last].next_idx; 2943 } 2944 *pcqe = cqe; 2945 if (!(*budget) && swq_last != cqe_cons) { 2946 /* Out of budget */ 2947 rc = -EAGAIN; 2948 goto sq_done; 2949 } 2950 sq_done: 2951 if (rc) 2952 return rc; 2953 do_rq: 2954 cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx); 2955 if (cqe_cons == 0xFFFF) { 2956 goto done; 2957 } else if (cqe_cons > rq->max_wqe - 1) { 2958 dev_err(&cq->hwq.pdev->dev, 2959 "FP: CQ Processed terminal reported rq_cons_idx 0x%x exceeds max 0x%x\n", 2960 cqe_cons, rq->max_wqe); 2961 rc = -EINVAL; 2962 goto done; 2963 } 2964 2965 if (qp->rq.flushed) { 2966 dev_dbg(&cq->hwq.pdev->dev, 2967 "%s: QP in Flush QP = %p\n", __func__, qp); 2968 rc = 0; 2969 goto done; 2970 } 2971 2972 /* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR 2973 * from the current rq->cons to the rq->prod regardless what the 2974 * rq->cons the terminal CQE indicates 2975 */ 2976 2977 /* Add qp to flush list of the CQ */ 2978 bnxt_qplib_add_flush_qp(qp); 2979 done: 2980 return rc; 2981 } 2982 2983 static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq, 2984 struct cq_cutoff *hwcqe) 2985 { 2986 /* Check the Status */ 2987 if (hwcqe->status != CQ_CUTOFF_STATUS_OK) { 2988 dev_err(&cq->hwq.pdev->dev, 2989 "FP: CQ Process Cutoff Error status = 0x%x\n", 2990 hwcqe->status); 2991 return -EINVAL; 2992 } 2993 clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags); 2994 wake_up_interruptible(&cq->waitq); 2995 2996 return 0; 2997 } 2998 2999 int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq, 3000 struct bnxt_qplib_cqe *cqe, 3001 int num_cqes) 3002 { 3003 struct bnxt_qplib_qp *qp = NULL; 3004 u32 budget = num_cqes; 3005 unsigned long flags; 3006 3007 spin_lock_irqsave(&cq->flush_lock, flags); 3008 list_for_each_entry(qp, &cq->sqf_head, sq_flush) { 3009 dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing SQ QP= %p\n", qp); 3010 __flush_sq(&qp->sq, qp, &cqe, &budget); 3011 } 3012 3013 list_for_each_entry(qp, &cq->rqf_head, rq_flush) { 3014 dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing RQ QP= %p\n", qp); 3015 __flush_rq(&qp->rq, qp, &cqe, &budget); 3016 } 3017 spin_unlock_irqrestore(&cq->flush_lock, flags); 3018 3019 return num_cqes - budget; 3020 } 3021 3022 int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe, 3023 int num_cqes, struct bnxt_qplib_qp **lib_qp) 3024 { 3025 struct cq_base *hw_cqe; 3026 int budget, rc = 0; 3027 u32 hw_polled = 0; 3028 u8 type; 3029 3030 budget = num_cqes; 3031 3032 while (budget) { 3033 hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL); 3034 3035 /* Check for Valid bit */ 3036 if (!CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags)) 3037 break; 3038 3039 /* 3040 * The valid test of the entry must be done first before 3041 * reading any further. 3042 */ 3043 dma_rmb(); 3044 /* From the device's respective CQE format to qplib_wc*/ 3045 type = hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 3046 switch (type) { 3047 case CQ_BASE_CQE_TYPE_REQ: 3048 rc = bnxt_qplib_cq_process_req(cq, 3049 (struct cq_req *)hw_cqe, 3050 &cqe, &budget, 3051 cq->hwq.cons, lib_qp); 3052 break; 3053 case CQ_BASE_CQE_TYPE_RES_RC: 3054 rc = bnxt_qplib_cq_process_res_rc(cq, 3055 (struct cq_res_rc *) 3056 hw_cqe, &cqe, 3057 &budget); 3058 break; 3059 case CQ_BASE_CQE_TYPE_RES_UD: 3060 rc = bnxt_qplib_cq_process_res_ud 3061 (cq, (struct cq_res_ud *)hw_cqe, &cqe, 3062 &budget); 3063 break; 3064 case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1: 3065 rc = bnxt_qplib_cq_process_res_raweth_qp1 3066 (cq, (struct cq_res_raweth_qp1 *) 3067 hw_cqe, &cqe, &budget); 3068 break; 3069 case CQ_BASE_CQE_TYPE_TERMINAL: 3070 rc = bnxt_qplib_cq_process_terminal 3071 (cq, (struct cq_terminal *)hw_cqe, 3072 &cqe, &budget); 3073 break; 3074 case CQ_BASE_CQE_TYPE_CUT_OFF: 3075 bnxt_qplib_cq_process_cutoff 3076 (cq, (struct cq_cutoff *)hw_cqe); 3077 /* Done processing this CQ */ 3078 goto exit; 3079 default: 3080 dev_err(&cq->hwq.pdev->dev, 3081 "process_cq unknown type 0x%lx\n", 3082 hw_cqe->cqe_type_toggle & 3083 CQ_BASE_CQE_TYPE_MASK); 3084 rc = -EINVAL; 3085 break; 3086 } 3087 if (rc < 0) { 3088 if (rc == -EAGAIN) 3089 break; 3090 /* Error while processing the CQE, just skip to the 3091 * next one 3092 */ 3093 if (type != CQ_BASE_CQE_TYPE_TERMINAL) 3094 dev_err(&cq->hwq.pdev->dev, 3095 "process_cqe error rc = 0x%x\n", rc); 3096 } 3097 hw_polled++; 3098 bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements, &cq->hwq.cons, 3099 1, &cq->dbinfo.flags); 3100 3101 } 3102 if (hw_polled) 3103 bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ); 3104 exit: 3105 return num_cqes - budget; 3106 } 3107 3108 void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type) 3109 { 3110 cq->dbinfo.toggle = cq->toggle; 3111 if (arm_type) 3112 bnxt_qplib_ring_db(&cq->dbinfo, arm_type); 3113 /* Using cq->arm_state variable to track whether to issue cq handler */ 3114 atomic_set(&cq->arm_state, 1); 3115 } 3116 3117 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp) 3118 { 3119 flush_workqueue(qp->scq->nq->cqn_wq); 3120 if (qp->scq != qp->rcq) 3121 flush_workqueue(qp->rcq->nq->cqn_wq); 3122 } 3123