1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018 Exceet Electronics GmbH
4 * Copyright (C) 2018 Bootlin
5 *
6 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
7 */
8 #include <linux/dmaengine.h>
9 #include <linux/iopoll.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/spi/spi.h>
12 #include <linux/spi/spi-mem.h>
13 #include <linux/sched/task_stack.h>
14
15 #define CREATE_TRACE_POINTS
16 #include <trace/events/spi-mem.h>
17
18 #include "internals.h"
19
20 #define SPI_MEM_MAX_BUSWIDTH 8
21
22 /**
23 * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
24 * memory operation
25 * @ctlr: the SPI controller requesting this dma_map()
26 * @op: the memory operation containing the buffer to map
27 * @sgt: a pointer to a non-initialized sg_table that will be filled by this
28 * function
29 *
30 * Some controllers might want to do DMA on the data buffer embedded in @op.
31 * This helper prepares everything for you and provides a ready-to-use
32 * sg_table. This function is not intended to be called from spi drivers.
33 * Only SPI controller drivers should use it.
34 * Note that the caller must ensure the memory region pointed by
35 * op->data.buf.{in,out} is DMA-able before calling this function.
36 *
37 * Return: 0 in case of success, a negative error code otherwise.
38 */
spi_controller_dma_map_mem_op_data(struct spi_controller * ctlr,const struct spi_mem_op * op,struct sg_table * sgt)39 int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
40 const struct spi_mem_op *op,
41 struct sg_table *sgt)
42 {
43 struct device *dmadev;
44
45 if (!op->data.nbytes)
46 return -EINVAL;
47
48 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
49 dmadev = ctlr->dma_tx->device->dev;
50 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
51 dmadev = ctlr->dma_rx->device->dev;
52 else
53 dmadev = ctlr->dev.parent;
54
55 if (!dmadev)
56 return -EINVAL;
57
58 return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
59 op->data.dir == SPI_MEM_DATA_IN ?
60 DMA_FROM_DEVICE : DMA_TO_DEVICE);
61 }
62 EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
63
64 /**
65 * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
66 * memory operation
67 * @ctlr: the SPI controller requesting this dma_unmap()
68 * @op: the memory operation containing the buffer to unmap
69 * @sgt: a pointer to an sg_table previously initialized by
70 * spi_controller_dma_map_mem_op_data()
71 *
72 * Some controllers might want to do DMA on the data buffer embedded in @op.
73 * This helper prepares things so that the CPU can access the
74 * op->data.buf.{in,out} buffer again.
75 *
76 * This function is not intended to be called from SPI drivers. Only SPI
77 * controller drivers should use it.
78 *
79 * This function should be called after the DMA operation has finished and is
80 * only valid if the previous spi_controller_dma_map_mem_op_data() call
81 * returned 0.
82 *
83 * Return: 0 in case of success, a negative error code otherwise.
84 */
spi_controller_dma_unmap_mem_op_data(struct spi_controller * ctlr,const struct spi_mem_op * op,struct sg_table * sgt)85 void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
86 const struct spi_mem_op *op,
87 struct sg_table *sgt)
88 {
89 struct device *dmadev;
90
91 if (!op->data.nbytes)
92 return;
93
94 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
95 dmadev = ctlr->dma_tx->device->dev;
96 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
97 dmadev = ctlr->dma_rx->device->dev;
98 else
99 dmadev = ctlr->dev.parent;
100
101 spi_unmap_buf(ctlr, dmadev, sgt,
102 op->data.dir == SPI_MEM_DATA_IN ?
103 DMA_FROM_DEVICE : DMA_TO_DEVICE);
104 }
105 EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
106
spi_check_buswidth_req(struct spi_mem * mem,u8 buswidth,bool tx)107 static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
108 {
109 u32 mode = mem->spi->mode;
110
111 switch (buswidth) {
112 case 1:
113 return 0;
114
115 case 2:
116 if ((tx &&
117 (mode & (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL))) ||
118 (!tx &&
119 (mode & (SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL))))
120 return 0;
121
122 break;
123
124 case 4:
125 if ((tx && (mode & (SPI_TX_QUAD | SPI_TX_OCTAL))) ||
126 (!tx && (mode & (SPI_RX_QUAD | SPI_RX_OCTAL))))
127 return 0;
128
129 break;
130
131 case 8:
132 if ((tx && (mode & SPI_TX_OCTAL)) ||
133 (!tx && (mode & SPI_RX_OCTAL)))
134 return 0;
135
136 break;
137
138 default:
139 break;
140 }
141
142 return -ENOTSUPP;
143 }
144
spi_mem_check_buswidth(struct spi_mem * mem,const struct spi_mem_op * op)145 static bool spi_mem_check_buswidth(struct spi_mem *mem,
146 const struct spi_mem_op *op)
147 {
148 if (spi_check_buswidth_req(mem, op->cmd.buswidth, true))
149 return false;
150
151 if (op->addr.nbytes &&
152 spi_check_buswidth_req(mem, op->addr.buswidth, true))
153 return false;
154
155 if (op->dummy.nbytes &&
156 spi_check_buswidth_req(mem, op->dummy.buswidth, true))
157 return false;
158
159 if (op->data.dir != SPI_MEM_NO_DATA &&
160 spi_check_buswidth_req(mem, op->data.buswidth,
161 op->data.dir == SPI_MEM_DATA_OUT))
162 return false;
163
164 return true;
165 }
166
spi_mem_default_supports_op(struct spi_mem * mem,const struct spi_mem_op * op)167 bool spi_mem_default_supports_op(struct spi_mem *mem,
168 const struct spi_mem_op *op)
169 {
170 struct spi_controller *ctlr = mem->spi->controller;
171 bool op_is_dtr =
172 op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr;
173
174 if (op_is_dtr) {
175 if (!spi_mem_controller_is_capable(ctlr, dtr))
176 return false;
177
178 if (op->data.swap16 && !spi_mem_controller_is_capable(ctlr, swap16))
179 return false;
180
181 /* Extra 8D-8D-8D limitations */
182 if (op->cmd.dtr && op->cmd.buswidth == 8) {
183 if (op->cmd.nbytes != 2)
184 return false;
185
186 if ((op->addr.nbytes % 2) ||
187 (op->dummy.nbytes % 2) ||
188 (op->data.nbytes % 2)) {
189 dev_err(&ctlr->dev,
190 "Even byte numbers not allowed in octal DTR operations\n");
191 return false;
192 }
193 }
194 } else {
195 if (op->cmd.nbytes != 1)
196 return false;
197 }
198
199 if (op->data.ecc) {
200 if (!spi_mem_controller_is_capable(ctlr, ecc))
201 return false;
202 }
203
204 if (op->max_freq && mem->spi->controller->min_speed_hz &&
205 op->max_freq < mem->spi->controller->min_speed_hz)
206 return false;
207
208 if (op->max_freq &&
209 op->max_freq < mem->spi->max_speed_hz) {
210 if (!spi_mem_controller_is_capable(ctlr, per_op_freq))
211 return false;
212 }
213
214 return spi_mem_check_buswidth(mem, op);
215 }
216 EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
217
spi_mem_buswidth_is_valid(u8 buswidth)218 static bool spi_mem_buswidth_is_valid(u8 buswidth)
219 {
220 if (hweight8(buswidth) > 1 || buswidth > SPI_MEM_MAX_BUSWIDTH)
221 return false;
222
223 return true;
224 }
225
spi_mem_check_op(const struct spi_mem_op * op)226 static int spi_mem_check_op(const struct spi_mem_op *op)
227 {
228 if (!op->cmd.buswidth || !op->cmd.nbytes)
229 return -EINVAL;
230
231 if ((op->addr.nbytes && !op->addr.buswidth) ||
232 (op->dummy.nbytes && !op->dummy.buswidth) ||
233 (op->data.nbytes && !op->data.buswidth))
234 return -EINVAL;
235
236 if (!spi_mem_buswidth_is_valid(op->cmd.buswidth) ||
237 !spi_mem_buswidth_is_valid(op->addr.buswidth) ||
238 !spi_mem_buswidth_is_valid(op->dummy.buswidth) ||
239 !spi_mem_buswidth_is_valid(op->data.buswidth))
240 return -EINVAL;
241
242 /* Buffers must be DMA-able. */
243 if (WARN_ON_ONCE(op->data.dir == SPI_MEM_DATA_IN &&
244 object_is_on_stack(op->data.buf.in)))
245 return -EINVAL;
246
247 if (WARN_ON_ONCE(op->data.dir == SPI_MEM_DATA_OUT &&
248 object_is_on_stack(op->data.buf.out)))
249 return -EINVAL;
250
251 return 0;
252 }
253
spi_mem_internal_supports_op(struct spi_mem * mem,const struct spi_mem_op * op)254 static bool spi_mem_internal_supports_op(struct spi_mem *mem,
255 const struct spi_mem_op *op)
256 {
257 struct spi_controller *ctlr = mem->spi->controller;
258
259 if (ctlr->mem_ops && ctlr->mem_ops->supports_op)
260 return ctlr->mem_ops->supports_op(mem, op);
261
262 return spi_mem_default_supports_op(mem, op);
263 }
264
265 /**
266 * spi_mem_supports_op() - Check if a memory device and the controller it is
267 * connected to support a specific memory operation
268 * @mem: the SPI memory
269 * @op: the memory operation to check
270 *
271 * Some controllers are only supporting Single or Dual IOs, others might only
272 * support specific opcodes, or it can even be that the controller and device
273 * both support Quad IOs but the hardware prevents you from using it because
274 * only 2 IO lines are connected.
275 *
276 * This function checks whether a specific operation is supported.
277 *
278 * Return: true if @op is supported, false otherwise.
279 */
spi_mem_supports_op(struct spi_mem * mem,const struct spi_mem_op * op)280 bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op)
281 {
282 struct spi_mem_op eval_op = *op;
283
284 /*
285 * Work on a local copy; this is a pure capability check and must
286 * not modify the caller's op. Stored templates with max_freq == 0
287 * must remain unset so their frequency is always re-capped to the
288 * current device maximum at execution time.
289 */
290 spi_mem_adjust_op_freq(mem, &eval_op);
291
292 if (spi_mem_check_op(&eval_op))
293 return false;
294
295 return spi_mem_internal_supports_op(mem, &eval_op);
296 }
297 EXPORT_SYMBOL_GPL(spi_mem_supports_op);
298
spi_mem_access_start(struct spi_mem * mem)299 static int spi_mem_access_start(struct spi_mem *mem)
300 {
301 struct spi_controller *ctlr = mem->spi->controller;
302
303 /*
304 * Flush the message queue before executing our SPI memory
305 * operation to prevent preemption of regular SPI transfers.
306 */
307 spi_flush_queue(ctlr);
308
309 if (ctlr->auto_runtime_pm) {
310 int ret;
311
312 ret = pm_runtime_resume_and_get(ctlr->dev.parent);
313 if (ret < 0) {
314 dev_err(&ctlr->dev, "Failed to power device: %d\n",
315 ret);
316 return ret;
317 }
318 }
319
320 mutex_lock(&ctlr->bus_lock_mutex);
321 mutex_lock(&ctlr->io_mutex);
322
323 return 0;
324 }
325
spi_mem_access_end(struct spi_mem * mem)326 static void spi_mem_access_end(struct spi_mem *mem)
327 {
328 struct spi_controller *ctlr = mem->spi->controller;
329
330 mutex_unlock(&ctlr->io_mutex);
331 mutex_unlock(&ctlr->bus_lock_mutex);
332
333 if (ctlr->auto_runtime_pm)
334 pm_runtime_put(ctlr->dev.parent);
335 }
336
spi_mem_add_op_stats(struct spi_statistics __percpu * pcpu_stats,const struct spi_mem_op * op,int exec_op_ret)337 static void spi_mem_add_op_stats(struct spi_statistics __percpu *pcpu_stats,
338 const struct spi_mem_op *op, int exec_op_ret)
339 {
340 struct spi_statistics *stats;
341 u64 len, l2len;
342
343 get_cpu();
344 stats = this_cpu_ptr(pcpu_stats);
345 u64_stats_update_begin(&stats->syncp);
346
347 /*
348 * We do not have the concept of messages or transfers. Let's consider
349 * that one operation is equivalent to one message and one transfer.
350 */
351 u64_stats_inc(&stats->messages);
352 u64_stats_inc(&stats->transfers);
353
354 /* Use the sum of all lengths as bytes count and histogram value. */
355 len = op->cmd.nbytes + op->addr.nbytes;
356 len += op->dummy.nbytes + op->data.nbytes;
357 u64_stats_add(&stats->bytes, len);
358 l2len = min(fls(len), SPI_STATISTICS_HISTO_SIZE) - 1;
359 u64_stats_inc(&stats->transfer_bytes_histo[l2len]);
360
361 /* Only account for data bytes as transferred bytes. */
362 if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT)
363 u64_stats_add(&stats->bytes_tx, op->data.nbytes);
364 if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_IN)
365 u64_stats_add(&stats->bytes_rx, op->data.nbytes);
366
367 /*
368 * A timeout is not an error, following the same behavior as
369 * spi_transfer_one_message().
370 */
371 if (exec_op_ret == -ETIMEDOUT)
372 u64_stats_inc(&stats->timedout);
373 else if (exec_op_ret)
374 u64_stats_inc(&stats->errors);
375
376 u64_stats_update_end(&stats->syncp);
377 put_cpu();
378 }
379
380 /**
381 * spi_mem_exec_op() - Execute a memory operation
382 * @mem: the SPI memory
383 * @op: the memory operation to execute
384 *
385 * Executes a memory operation.
386 *
387 * This function first checks that @op is supported and then tries to execute
388 * it.
389 *
390 * Return: 0 in case of success, a negative error code otherwise.
391 */
spi_mem_exec_op(struct spi_mem * mem,const struct spi_mem_op * op)392 int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
393 {
394 unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0;
395 struct spi_controller *ctlr = mem->spi->controller;
396 struct spi_transfer xfers[4] = { };
397 struct spi_message msg;
398 u8 *tmpbuf;
399 int ret;
400
401 /* Make sure the operation frequency is correct before going futher */
402 spi_mem_adjust_op_freq(mem, (struct spi_mem_op *)op);
403
404 dev_vdbg(&mem->spi->dev, "[cmd: 0x%02x][%dB addr: %#8llx][%2dB dummy][%4dB data %s] %d%c-%d%c-%d%c-%d%c @ %uHz\n",
405 op->cmd.opcode,
406 op->addr.nbytes, (op->addr.nbytes ? op->addr.val : 0),
407 op->dummy.nbytes,
408 op->data.nbytes, (op->data.nbytes ? (op->data.dir == SPI_MEM_DATA_IN ? " read" : "write") : " "),
409 op->cmd.buswidth, op->cmd.dtr ? 'D' : 'S',
410 op->addr.buswidth, op->addr.dtr ? 'D' : 'S',
411 op->dummy.buswidth, op->dummy.dtr ? 'D' : 'S',
412 op->data.buswidth, op->data.dtr ? 'D' : 'S',
413 op->max_freq ? op->max_freq : mem->spi->max_speed_hz);
414
415 ret = spi_mem_check_op(op);
416 if (ret)
417 return ret;
418
419 if (!spi_mem_internal_supports_op(mem, op))
420 return -EOPNOTSUPP;
421
422 if (ctlr->mem_ops && ctlr->mem_ops->exec_op && !spi_get_csgpiod(mem->spi, 0)) {
423 ret = spi_mem_access_start(mem);
424 if (ret)
425 return ret;
426
427 trace_spi_mem_start_op(mem, op);
428 ret = ctlr->mem_ops->exec_op(mem, op);
429 trace_spi_mem_stop_op(mem, op);
430
431 spi_mem_access_end(mem);
432
433 /*
434 * Some controllers only optimize specific paths (typically the
435 * read path) and expect the core to use the regular SPI
436 * interface in other cases.
437 */
438 if (!ret || (ret != -ENOTSUPP && ret != -EOPNOTSUPP)) {
439 spi_mem_add_op_stats(ctlr->pcpu_statistics, op, ret);
440 spi_mem_add_op_stats(mem->spi->pcpu_statistics, op, ret);
441
442 return ret;
443 }
444 }
445
446 tmpbufsize = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
447
448 /*
449 * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
450 * we're guaranteed that this buffer is DMA-able, as required by the
451 * SPI layer.
452 */
453 tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
454 if (!tmpbuf)
455 return -ENOMEM;
456
457 spi_message_init(&msg);
458
459 tmpbuf[0] = op->cmd.opcode;
460 xfers[xferpos].tx_buf = tmpbuf;
461 xfers[xferpos].len = op->cmd.nbytes;
462 xfers[xferpos].tx_nbits = op->cmd.buswidth;
463 xfers[xferpos].speed_hz = op->max_freq;
464 spi_message_add_tail(&xfers[xferpos], &msg);
465 xferpos++;
466 totalxferlen++;
467
468 if (op->addr.nbytes) {
469 int i;
470
471 for (i = 0; i < op->addr.nbytes; i++)
472 tmpbuf[i + 1] = op->addr.val >>
473 (8 * (op->addr.nbytes - i - 1));
474
475 xfers[xferpos].tx_buf = tmpbuf + 1;
476 xfers[xferpos].len = op->addr.nbytes;
477 xfers[xferpos].tx_nbits = op->addr.buswidth;
478 xfers[xferpos].speed_hz = op->max_freq;
479 spi_message_add_tail(&xfers[xferpos], &msg);
480 xferpos++;
481 totalxferlen += op->addr.nbytes;
482 }
483
484 if (op->dummy.nbytes) {
485 memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
486 xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
487 xfers[xferpos].len = op->dummy.nbytes;
488 xfers[xferpos].tx_nbits = op->dummy.buswidth;
489 xfers[xferpos].dummy_data = 1;
490 xfers[xferpos].speed_hz = op->max_freq;
491 spi_message_add_tail(&xfers[xferpos], &msg);
492 xferpos++;
493 totalxferlen += op->dummy.nbytes;
494 }
495
496 if (op->data.nbytes) {
497 if (op->data.dir == SPI_MEM_DATA_IN) {
498 xfers[xferpos].rx_buf = op->data.buf.in;
499 xfers[xferpos].rx_nbits = op->data.buswidth;
500 } else {
501 xfers[xferpos].tx_buf = op->data.buf.out;
502 xfers[xferpos].tx_nbits = op->data.buswidth;
503 }
504
505 xfers[xferpos].len = op->data.nbytes;
506 xfers[xferpos].speed_hz = op->max_freq;
507 spi_message_add_tail(&xfers[xferpos], &msg);
508 xferpos++;
509 totalxferlen += op->data.nbytes;
510 }
511
512 ret = spi_sync(mem->spi, &msg);
513
514 kfree(tmpbuf);
515
516 if (ret)
517 return ret;
518
519 if (msg.actual_length != totalxferlen)
520 return -EIO;
521
522 return 0;
523 }
524 EXPORT_SYMBOL_GPL(spi_mem_exec_op);
525
526 /**
527 * spi_mem_get_name() - Return the SPI mem device name to be used by the
528 * upper layer if necessary
529 * @mem: the SPI memory
530 *
531 * This function allows SPI mem users to retrieve the SPI mem device name.
532 * It is useful if the upper layer needs to expose a custom name for
533 * compatibility reasons.
534 *
535 * Return: a string containing the name of the memory device to be used
536 * by the SPI mem user
537 */
spi_mem_get_name(struct spi_mem * mem)538 const char *spi_mem_get_name(struct spi_mem *mem)
539 {
540 return mem->name;
541 }
542 EXPORT_SYMBOL_GPL(spi_mem_get_name);
543
544 /**
545 * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
546 * match controller limitations
547 * @mem: the SPI memory
548 * @op: the operation to adjust
549 *
550 * Some controllers have FIFO limitations and must split a data transfer
551 * operation into multiple ones, others require a specific alignment for
552 * optimized accesses. This function allows SPI mem drivers to split a single
553 * operation into multiple sub-operations when required.
554 *
555 * Return: a negative error code if the controller can't properly adjust @op,
556 * 0 otherwise. Note that @op->data.nbytes will be updated if @op
557 * can't be handled in a single step.
558 */
spi_mem_adjust_op_size(struct spi_mem * mem,struct spi_mem_op * op)559 int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
560 {
561 struct spi_controller *ctlr = mem->spi->controller;
562 size_t len;
563
564 if (ctlr->mem_ops && ctlr->mem_ops->adjust_op_size)
565 return ctlr->mem_ops->adjust_op_size(mem, op);
566
567 if (!ctlr->mem_ops || !ctlr->mem_ops->exec_op) {
568 len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
569
570 if (len > spi_max_transfer_size(mem->spi))
571 return -EINVAL;
572
573 op->data.nbytes = min3((size_t)op->data.nbytes,
574 spi_max_transfer_size(mem->spi),
575 spi_max_message_size(mem->spi) -
576 len);
577 if (!op->data.nbytes)
578 return -EINVAL;
579 }
580
581 return 0;
582 }
583 EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
584
585 /**
586 * spi_mem_adjust_op_freq() - Adjust the frequency of a SPI mem operation to
587 * match controller, PCB and chip limitations
588 * @mem: the SPI memory
589 * @op: the operation to adjust
590 *
591 * Some chips have per-op frequency limitations and must adapt the maximum
592 * speed. This function allows SPI mem drivers to set @op->max_freq to the
593 * maximum supported value.
594 */
spi_mem_adjust_op_freq(struct spi_mem * mem,struct spi_mem_op * op)595 void spi_mem_adjust_op_freq(struct spi_mem *mem, struct spi_mem_op *op)
596 {
597 if (!op->max_freq || op->max_freq > mem->spi->max_speed_hz)
598 op->max_freq = mem->spi->max_speed_hz;
599 }
600 EXPORT_SYMBOL_GPL(spi_mem_adjust_op_freq);
601
602 /**
603 * spi_mem_calc_op_duration() - Derives the theoretical length (in ns) of an
604 * operation. This helps finding the best variant
605 * among a list of possible choices.
606 * @mem: the SPI memory
607 * @op: the operation to benchmark
608 *
609 * Some chips have per-op frequency limitations, PCBs usually have their own
610 * limitations as well, and controllers can support dual, quad or even octal
611 * modes, sometimes in DTR. All these combinations make it impossible to
612 * statically list the best combination for all situations. If we want something
613 * accurate, all these combinations should be rated (eg. with a time estimate)
614 * and the best pick should be taken based on these calculations.
615 *
616 * Returns a ns estimate for the time this op would take, except if no
617 * frequency limit has been set, in this case we return the number of
618 * cycles nevertheless to allow callers to distinguish which operation
619 * would be the fastest at iso-frequency.
620 */
spi_mem_calc_op_duration(struct spi_mem * mem,struct spi_mem_op * op)621 u64 spi_mem_calc_op_duration(struct spi_mem *mem, struct spi_mem_op *op)
622 {
623 u64 ncycles = 0;
624 u64 ps_per_cycles, duration;
625
626 spi_mem_adjust_op_freq(mem, op);
627
628 if (op->max_freq) {
629 ps_per_cycles = 1000000000000ULL;
630 do_div(ps_per_cycles, op->max_freq);
631 } else {
632 /* In this case, the unit is no longer a time unit */
633 ps_per_cycles = 1;
634 }
635
636 ncycles += ((op->cmd.nbytes * 8) / op->cmd.buswidth) / (op->cmd.dtr ? 2 : 1);
637 ncycles += ((op->addr.nbytes * 8) / op->addr.buswidth) / (op->addr.dtr ? 2 : 1);
638
639 /* Dummy bytes are optional for some SPI flash memory operations */
640 if (op->dummy.nbytes)
641 ncycles += ((op->dummy.nbytes * 8) / op->dummy.buswidth) / (op->dummy.dtr ? 2 : 1);
642
643 ncycles += ((op->data.nbytes * 8) / op->data.buswidth) / (op->data.dtr ? 2 : 1);
644
645 /* Derive the duration in ps */
646 duration = ncycles * ps_per_cycles;
647 /* Convert into ns */
648 do_div(duration, 1000);
649
650 return duration;
651 }
652 EXPORT_SYMBOL_GPL(spi_mem_calc_op_duration);
653
spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc * desc,u64 offs,size_t len,void * buf)654 static ssize_t spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc *desc,
655 u64 offs, size_t len, void *buf)
656 {
657 struct spi_mem_op op = desc->info.op_tmpl;
658 int ret;
659
660 op.addr.val = desc->info.offset + offs;
661 op.data.buf.in = buf;
662 op.data.nbytes = len;
663 ret = spi_mem_adjust_op_size(desc->mem, &op);
664 if (ret)
665 return ret;
666
667 ret = spi_mem_exec_op(desc->mem, &op);
668 if (ret)
669 return ret;
670
671 return op.data.nbytes;
672 }
673
spi_mem_no_dirmap_write(struct spi_mem_dirmap_desc * desc,u64 offs,size_t len,const void * buf)674 static ssize_t spi_mem_no_dirmap_write(struct spi_mem_dirmap_desc *desc,
675 u64 offs, size_t len, const void *buf)
676 {
677 struct spi_mem_op op = desc->info.op_tmpl;
678 int ret;
679
680 op.addr.val = desc->info.offset + offs;
681 op.data.buf.out = buf;
682 op.data.nbytes = len;
683 ret = spi_mem_adjust_op_size(desc->mem, &op);
684 if (ret)
685 return ret;
686
687 ret = spi_mem_exec_op(desc->mem, &op);
688 if (ret)
689 return ret;
690
691 return op.data.nbytes;
692 }
693
694 /**
695 * spi_mem_dirmap_create() - Create a direct mapping descriptor
696 * @mem: SPI mem device this direct mapping should be created for
697 * @info: direct mapping information
698 *
699 * This function is creating a direct mapping descriptor which can then be used
700 * to access the memory using spi_mem_dirmap_read() or spi_mem_dirmap_write().
701 * If the SPI controller driver does not support direct mapping, this function
702 * falls back to an implementation using spi_mem_exec_op(), so that the caller
703 * doesn't have to bother implementing a fallback on his own.
704 *
705 * Return: a valid pointer in case of success, and ERR_PTR() otherwise.
706 */
707 struct spi_mem_dirmap_desc *
spi_mem_dirmap_create(struct spi_mem * mem,const struct spi_mem_dirmap_info * info)708 spi_mem_dirmap_create(struct spi_mem *mem,
709 const struct spi_mem_dirmap_info *info)
710 {
711 struct spi_controller *ctlr = mem->spi->controller;
712 struct spi_mem_dirmap_desc *desc;
713 int ret = -ENOTSUPP;
714
715 /* Make sure the number of address cycles is between 1 and 8 bytes. */
716 if (!info->op_tmpl.addr.nbytes || info->op_tmpl.addr.nbytes > 8)
717 return ERR_PTR(-EINVAL);
718
719 /* data.dir should either be SPI_MEM_DATA_IN or SPI_MEM_DATA_OUT. */
720 if (info->op_tmpl.data.dir == SPI_MEM_NO_DATA)
721 return ERR_PTR(-EINVAL);
722
723 desc = kzalloc_obj(*desc);
724 if (!desc)
725 return ERR_PTR(-ENOMEM);
726
727 desc->mem = mem;
728 desc->info = *info;
729 if (ctlr->mem_ops && ctlr->mem_ops->dirmap_create) {
730 ret = spi_mem_access_start(mem);
731 if (ret) {
732 kfree(desc);
733 return ERR_PTR(ret);
734 }
735
736 ret = ctlr->mem_ops->dirmap_create(desc);
737
738 spi_mem_access_end(mem);
739 }
740
741 if (ret) {
742 desc->nodirmap = true;
743 if (!spi_mem_supports_op(desc->mem, &desc->info.op_tmpl))
744 ret = -EOPNOTSUPP;
745 else
746 ret = 0;
747 }
748
749 if (ret) {
750 kfree(desc);
751 return ERR_PTR(ret);
752 }
753
754 return desc;
755 }
756 EXPORT_SYMBOL_GPL(spi_mem_dirmap_create);
757
758 /**
759 * spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor
760 * @desc: the direct mapping descriptor to destroy
761 *
762 * This function destroys a direct mapping descriptor previously created by
763 * spi_mem_dirmap_create().
764 */
spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc * desc)765 void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc)
766 {
767 struct spi_controller *ctlr = desc->mem->spi->controller;
768
769 if (!desc->nodirmap && ctlr->mem_ops && ctlr->mem_ops->dirmap_destroy)
770 ctlr->mem_ops->dirmap_destroy(desc);
771
772 kfree(desc);
773 }
774 EXPORT_SYMBOL_GPL(spi_mem_dirmap_destroy);
775
devm_spi_mem_dirmap_release(struct device * dev,void * res)776 static void devm_spi_mem_dirmap_release(struct device *dev, void *res)
777 {
778 struct spi_mem_dirmap_desc *desc = *(struct spi_mem_dirmap_desc **)res;
779
780 spi_mem_dirmap_destroy(desc);
781 }
782
783 /**
784 * devm_spi_mem_dirmap_create() - Create a direct mapping descriptor and attach
785 * it to a device
786 * @dev: device the dirmap desc will be attached to
787 * @mem: SPI mem device this direct mapping should be created for
788 * @info: direct mapping information
789 *
790 * devm_ variant of the spi_mem_dirmap_create() function. See
791 * spi_mem_dirmap_create() for more details.
792 *
793 * Return: a valid pointer in case of success, and ERR_PTR() otherwise.
794 */
795 struct spi_mem_dirmap_desc *
devm_spi_mem_dirmap_create(struct device * dev,struct spi_mem * mem,const struct spi_mem_dirmap_info * info)796 devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem,
797 const struct spi_mem_dirmap_info *info)
798 {
799 struct spi_mem_dirmap_desc **ptr, *desc;
800
801 ptr = devres_alloc(devm_spi_mem_dirmap_release, sizeof(*ptr),
802 GFP_KERNEL);
803 if (!ptr)
804 return ERR_PTR(-ENOMEM);
805
806 desc = spi_mem_dirmap_create(mem, info);
807 if (IS_ERR(desc)) {
808 devres_free(ptr);
809 } else {
810 *ptr = desc;
811 devres_add(dev, ptr);
812 }
813
814 return desc;
815 }
816 EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_create);
817
devm_spi_mem_dirmap_match(struct device * dev,void * res,void * data)818 static int devm_spi_mem_dirmap_match(struct device *dev, void *res, void *data)
819 {
820 struct spi_mem_dirmap_desc **ptr = res;
821
822 if (WARN_ON(!ptr || !*ptr))
823 return 0;
824
825 return *ptr == data;
826 }
827
828 /**
829 * devm_spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor attached
830 * to a device
831 * @dev: device the dirmap desc is attached to
832 * @desc: the direct mapping descriptor to destroy
833 *
834 * devm_ variant of the spi_mem_dirmap_destroy() function. See
835 * spi_mem_dirmap_destroy() for more details.
836 */
devm_spi_mem_dirmap_destroy(struct device * dev,struct spi_mem_dirmap_desc * desc)837 void devm_spi_mem_dirmap_destroy(struct device *dev,
838 struct spi_mem_dirmap_desc *desc)
839 {
840 devres_release(dev, devm_spi_mem_dirmap_release,
841 devm_spi_mem_dirmap_match, desc);
842 }
843 EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_destroy);
844
845 /**
846 * spi_mem_dirmap_read() - Read data through a direct mapping
847 * @desc: direct mapping descriptor
848 * @offs: offset to start reading from. Note that this is not an absolute
849 * offset, but the offset within the direct mapping which already has
850 * its own offset
851 * @len: length in bytes
852 * @buf: destination buffer. This buffer must be DMA-able
853 *
854 * This function reads data from a memory device using a direct mapping
855 * previously instantiated with spi_mem_dirmap_create().
856 *
857 * Return: the amount of data read from the memory device or a negative error
858 * code. Note that the returned size might be smaller than @len, and the caller
859 * is responsible for calling spi_mem_dirmap_read() again when that happens.
860 */
spi_mem_dirmap_read(struct spi_mem_dirmap_desc * desc,u64 offs,size_t len,void * buf)861 ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc,
862 u64 offs, size_t len, void *buf)
863 {
864 struct spi_controller *ctlr = desc->mem->spi->controller;
865 ssize_t ret;
866
867 if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN)
868 return -EINVAL;
869
870 if (!len)
871 return 0;
872
873 if (desc->nodirmap) {
874 ret = spi_mem_no_dirmap_read(desc, offs, len, buf);
875 } else if (ctlr->mem_ops && ctlr->mem_ops->dirmap_read) {
876 ret = spi_mem_access_start(desc->mem);
877 if (ret)
878 return ret;
879
880 ret = ctlr->mem_ops->dirmap_read(desc, offs, len, buf);
881
882 spi_mem_access_end(desc->mem);
883 } else {
884 ret = -ENOTSUPP;
885 }
886
887 return ret;
888 }
889 EXPORT_SYMBOL_GPL(spi_mem_dirmap_read);
890
891 /**
892 * spi_mem_dirmap_write() - Write data through a direct mapping
893 * @desc: direct mapping descriptor
894 * @offs: offset to start writing from. Note that this is not an absolute
895 * offset, but the offset within the direct mapping which already has
896 * its own offset
897 * @len: length in bytes
898 * @buf: source buffer. This buffer must be DMA-able
899 *
900 * This function writes data to a memory device using a direct mapping
901 * previously instantiated with spi_mem_dirmap_create().
902 *
903 * Return: the amount of data written to the memory device or a negative error
904 * code. Note that the returned size might be smaller than @len, and the caller
905 * is responsible for calling spi_mem_dirmap_write() again when that happens.
906 */
spi_mem_dirmap_write(struct spi_mem_dirmap_desc * desc,u64 offs,size_t len,const void * buf)907 ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
908 u64 offs, size_t len, const void *buf)
909 {
910 struct spi_controller *ctlr = desc->mem->spi->controller;
911 ssize_t ret;
912
913 if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_OUT)
914 return -EINVAL;
915
916 if (!len)
917 return 0;
918
919 if (desc->nodirmap) {
920 ret = spi_mem_no_dirmap_write(desc, offs, len, buf);
921 } else if (ctlr->mem_ops && ctlr->mem_ops->dirmap_write) {
922 ret = spi_mem_access_start(desc->mem);
923 if (ret)
924 return ret;
925
926 ret = ctlr->mem_ops->dirmap_write(desc, offs, len, buf);
927
928 spi_mem_access_end(desc->mem);
929 } else {
930 ret = -ENOTSUPP;
931 }
932
933 return ret;
934 }
935 EXPORT_SYMBOL_GPL(spi_mem_dirmap_write);
936
to_spi_mem_drv(struct device_driver * drv)937 static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
938 {
939 return container_of(drv, struct spi_mem_driver, spidrv.driver);
940 }
941
spi_mem_read_status(struct spi_mem * mem,const struct spi_mem_op * op,u16 * status)942 static int spi_mem_read_status(struct spi_mem *mem,
943 const struct spi_mem_op *op,
944 u16 *status)
945 {
946 const u8 *bytes = (u8 *)op->data.buf.in;
947 int ret;
948
949 ret = spi_mem_exec_op(mem, op);
950 if (ret)
951 return ret;
952
953 if (op->data.nbytes > 1)
954 *status = ((u16)bytes[0] << 8) | bytes[1];
955 else
956 *status = bytes[0];
957
958 return 0;
959 }
960
961 /**
962 * spi_mem_poll_status() - Poll memory device status
963 * @mem: SPI memory device
964 * @op: the memory operation to execute
965 * @mask: status bitmask to ckeck
966 * @match: (status & mask) expected value
967 * @initial_delay_us: delay in us before starting to poll
968 * @polling_delay_us: time to sleep between reads in us
969 * @timeout_ms: timeout in milliseconds
970 *
971 * This function polls a status register and returns when
972 * (status & mask) == match or when the timeout has expired.
973 *
974 * Return: 0 in case of success, -ETIMEDOUT in case of error,
975 * -EOPNOTSUPP if not supported.
976 */
spi_mem_poll_status(struct spi_mem * mem,const struct spi_mem_op * op,u16 mask,u16 match,unsigned long initial_delay_us,unsigned long polling_delay_us,u16 timeout_ms)977 int spi_mem_poll_status(struct spi_mem *mem,
978 const struct spi_mem_op *op,
979 u16 mask, u16 match,
980 unsigned long initial_delay_us,
981 unsigned long polling_delay_us,
982 u16 timeout_ms)
983 {
984 struct spi_controller *ctlr = mem->spi->controller;
985 int ret = -EOPNOTSUPP;
986 int read_status_ret;
987 u16 status;
988
989 if (op->data.nbytes < 1 || op->data.nbytes > 2 ||
990 op->data.dir != SPI_MEM_DATA_IN)
991 return -EINVAL;
992
993 if (ctlr->mem_ops && ctlr->mem_ops->poll_status && !spi_get_csgpiod(mem->spi, 0)) {
994 ret = spi_mem_access_start(mem);
995 if (ret)
996 return ret;
997
998 ret = ctlr->mem_ops->poll_status(mem, op, mask, match,
999 initial_delay_us, polling_delay_us,
1000 timeout_ms);
1001
1002 spi_mem_access_end(mem);
1003 }
1004
1005 if (ret == -EOPNOTSUPP) {
1006 if (!spi_mem_supports_op(mem, op))
1007 return ret;
1008
1009 if (initial_delay_us < 10)
1010 udelay(initial_delay_us);
1011 else
1012 usleep_range((initial_delay_us >> 2) + 1,
1013 initial_delay_us);
1014
1015 ret = read_poll_timeout(spi_mem_read_status, read_status_ret,
1016 (read_status_ret || ((status) & mask) == match),
1017 polling_delay_us, timeout_ms * 1000, false, mem,
1018 op, &status);
1019 if (read_status_ret)
1020 return read_status_ret;
1021 }
1022
1023 return ret;
1024 }
1025 EXPORT_SYMBOL_GPL(spi_mem_poll_status);
1026
spi_mem_probe(struct spi_device * spi)1027 static int spi_mem_probe(struct spi_device *spi)
1028 {
1029 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
1030 struct spi_controller *ctlr = spi->controller;
1031 struct spi_mem *mem;
1032
1033 mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
1034 if (!mem)
1035 return -ENOMEM;
1036
1037 mem->spi = spi;
1038
1039 if (ctlr->mem_ops && ctlr->mem_ops->get_name)
1040 mem->name = ctlr->mem_ops->get_name(mem);
1041 else
1042 mem->name = dev_name(&spi->dev);
1043
1044 if (IS_ERR_OR_NULL(mem->name))
1045 return PTR_ERR_OR_ZERO(mem->name);
1046
1047 spi_set_drvdata(spi, mem);
1048
1049 return memdrv->probe(mem);
1050 }
1051
spi_mem_remove(struct spi_device * spi)1052 static void spi_mem_remove(struct spi_device *spi)
1053 {
1054 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
1055 struct spi_mem *mem = spi_get_drvdata(spi);
1056
1057 if (memdrv->remove)
1058 memdrv->remove(mem);
1059 }
1060
spi_mem_shutdown(struct spi_device * spi)1061 static void spi_mem_shutdown(struct spi_device *spi)
1062 {
1063 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
1064 struct spi_mem *mem = spi_get_drvdata(spi);
1065
1066 if (memdrv->shutdown)
1067 memdrv->shutdown(mem);
1068 }
1069
1070 /**
1071 * spi_mem_driver_register_with_owner() - Register a SPI memory driver
1072 * @memdrv: the SPI memory driver to register
1073 * @owner: the owner of this driver
1074 *
1075 * Registers a SPI memory driver.
1076 *
1077 * Return: 0 in case of success, a negative error core otherwise.
1078 */
1079
spi_mem_driver_register_with_owner(struct spi_mem_driver * memdrv,struct module * owner)1080 int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
1081 struct module *owner)
1082 {
1083 memdrv->spidrv.probe = spi_mem_probe;
1084 memdrv->spidrv.remove = spi_mem_remove;
1085 memdrv->spidrv.shutdown = spi_mem_shutdown;
1086
1087 return __spi_register_driver(owner, &memdrv->spidrv);
1088 }
1089 EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
1090
1091 /**
1092 * spi_mem_driver_unregister() - Unregister a SPI memory driver
1093 * @memdrv: the SPI memory driver to unregister
1094 *
1095 * Unregisters a SPI memory driver.
1096 */
spi_mem_driver_unregister(struct spi_mem_driver * memdrv)1097 void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
1098 {
1099 spi_unregister_driver(&memdrv->spidrv);
1100 }
1101 EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
1102