xref: /freebsd/tools/tools/cxgbtool/reg_defs_t3.c (revision 42b388439bd3795e09258c57a74ce9eec3651c7b)
1 /*
2  */
3 
4 
5 /* This file is automatically generated --- do not edit */
6 
7 struct reg_info sge3_regs[] = {
8 	{ "SG_CONTROL", 0x0, 0 },
9 		{ "EgrEnUpBp", 21, 1 },
10 		{ "DropPkt", 20, 1 },
11 		{ "EgrGenCtrl", 19, 1 },
12 		{ "UserSpaceSize", 14, 5 },
13 		{ "HostPageSize", 11, 3 },
14 		{ "PCIRelax", 10, 1 },
15 		{ "FLMode", 9, 1 },
16 		{ "PktShift", 6, 3 },
17 		{ "OneIntMultQ", 5, 1 },
18 		{ "FLPickAvail", 4, 1 },
19 		{ "BigEndianEgress", 3, 1 },
20 		{ "BigEndianIngress", 2, 1 },
21 		{ "IscsiCoalescing", 1, 1 },
22 		{ "GlobalEnable", 0, 1 },
23 	{ "SG_KDOORBELL", 0x4, 0 },
24 		{ "SelEgrCntx", 31, 1 },
25 		{ "EgrCntx", 0, 16 },
26 	{ "SG_GTS", 0x8, 0 },
27 		{ "RspQ", 29, 3 },
28 		{ "NewTimer", 16, 13 },
29 		{ "NewIndex", 0, 16 },
30 	{ "SG_CONTEXT_CMD", 0xc, 0 },
31 		{ "Opcode", 28, 4 },
32 		{ "Busy", 27, 1 },
33 		{ "CQ_credit", 20, 7 },
34 		{ "CQ", 19, 1 },
35 		{ "RspQ", 18, 1 },
36 		{ "Egress", 17, 1 },
37 		{ "FreeList", 16, 1 },
38 		{ "Context", 0, 16 },
39 	{ "SG_CONTEXT_DATA0", 0x10, 0 },
40 	{ "SG_CONTEXT_DATA1", 0x14, 0 },
41 	{ "SG_CONTEXT_DATA2", 0x18, 0 },
42 	{ "SG_CONTEXT_DATA3", 0x1c, 0 },
43 	{ "SG_CONTEXT_MASK0", 0x20, 0 },
44 	{ "SG_CONTEXT_MASK1", 0x24, 0 },
45 	{ "SG_CONTEXT_MASK2", 0x28, 0 },
46 	{ "SG_CONTEXT_MASK3", 0x2c, 0 },
47 	{ "SG_RSPQ_CREDIT_RETURN", 0x30, 0 },
48 		{ "RspQ", 29, 3 },
49 		{ "Data", 0, 16 },
50 	{ "SG_HI_DRB_HI_THRSH", 0x38, 0 },
51 		{ "HiDrbHiThrsh", 0, 10 },
52 	{ "SG_HI_DRB_LO_THRSH", 0x3c, 0 },
53 		{ "HiDrbLoThrsh", 0, 10 },
54 	{ "SG_LO_DRB_HI_THRSH", 0x40, 0 },
55 		{ "LoDrbHiThrsh", 0, 10 },
56 	{ "SG_LO_DRB_LO_THRSH", 0x44, 0 },
57 		{ "LoDrbLoThrsh", 0, 10 },
58 	{ "SG_ONE_INT_MULT_Q_COALESCING_TIMER", 0x48, 0 },
59 	{ "SG_RSPQ_FL_STATUS", 0x4c, 0 },
60 		{ "RspQ0Starved", 0, 1 },
61 		{ "RspQ1Starved", 1, 1 },
62 		{ "RspQ2Starved", 2, 1 },
63 		{ "RspQ3Starved", 3, 1 },
64 		{ "RspQ4Starved", 4, 1 },
65 		{ "RspQ5Starved", 5, 1 },
66 		{ "RspQ6Starved", 6, 1 },
67 		{ "RspQ7Starved", 7, 1 },
68 		{ "RspQ0Disabled", 8, 1 },
69 		{ "RspQ1Disabled", 9, 1 },
70 		{ "RspQ2Disabled", 10, 1 },
71 		{ "RspQ3Disabled", 11, 1 },
72 		{ "RspQ4Disabled", 12, 1 },
73 		{ "RspQ5Disabled", 13, 1 },
74 		{ "RspQ6Disabled", 14, 1 },
75 		{ "RspQ7Disabled", 15, 1 },
76 		{ "FL0Empty", 16, 1 },
77 		{ "FL1Empty", 17, 1 },
78 		{ "FL2Empty", 18, 1 },
79 		{ "FL3Empty", 19, 1 },
80 		{ "FL4Empty", 20, 1 },
81 		{ "FL5Empty", 21, 1 },
82 		{ "FL6Empty", 22, 1 },
83 		{ "FL7Empty", 23, 1 },
84 		{ "FL8Empty", 24, 1 },
85 		{ "FL9Empty", 25, 1 },
86 		{ "FL10Empty", 26, 1 },
87 		{ "FL11Empty", 27, 1 },
88 		{ "FL12Empty", 28, 1 },
89 		{ "FL13Empty", 29, 1 },
90 		{ "FL14Empty", 30, 1 },
91 		{ "FL15Empty", 31, 1 },
92 	{ "SG_EGR_PRI_CNT", 0x50, 0 },
93 		{ "EgrPriCnt", 0, 5 },
94 	{ "SG_EGR_RCQ_DRB_THRSH", 0x54, 0 },
95 		{ "HiRcqDrbThrsh", 16, 11 },
96 		{ "LoRcqDrbThrsh", 0, 11 },
97 	{ "SG_EGR_CNTX_BADDR", 0x58, 0 },
98 		{ "EgrCntxBAddr", 5, 27 },
99 	{ "SG_INT_CAUSE", 0x5c, 0 },
100 		{ "HiCtlDrbDropErr", 13, 1 },
101 		{ "LoCtlDrbDropErr", 12, 1 },
102 		{ "HiPioDrbDropErr", 11, 1 },
103 		{ "LoPioDrbDropErr", 10, 1 },
104 		{ "HiCrdtUndFlowErr", 9, 1 },
105 		{ "LoCrdtUndFlowErr", 8, 1 },
106 		{ "HiPriorityDBFull", 7, 1 },
107 		{ "HiPriorityDBEmpty", 6, 1 },
108 		{ "LoPriorityDBFull", 5, 1 },
109 		{ "LoPriorityDBEmpty", 4, 1 },
110 		{ "RspQDisabled", 3, 1 },
111 		{ "RspQCreditOverfow", 2, 1 },
112 		{ "FlEmpty", 1, 1 },
113 		{ "RspQStarve", 0, 1 },
114 	{ "SG_INT_ENABLE", 0x60, 0 },
115 		{ "HiCtlDrbDropErr", 13, 1 },
116 		{ "LoCtlDrbDropErr", 12, 1 },
117 		{ "HiPioDrbDropErr", 11, 1 },
118 		{ "LoPioDrbDropErr", 10, 1 },
119 		{ "HiCrdtUndFlowErr", 9, 1 },
120 		{ "LoCrdtUndFlowErr", 8, 1 },
121 		{ "HiPriorityDBFull", 7, 1 },
122 		{ "HiPriorityDBEmpty", 6, 1 },
123 		{ "LoPriorityDBFull", 5, 1 },
124 		{ "LoPriorityDBEmpty", 4, 1 },
125 		{ "RspQDisabled", 3, 1 },
126 		{ "RspQCreditOverfow", 2, 1 },
127 		{ "FlEmpty", 1, 1 },
128 		{ "RspQStarve", 0, 1 },
129 	{ "SG_CMDQ_CREDIT_TH", 0x64, 0 },
130 		{ "Timeout", 8, 24 },
131 		{ "Threshold", 0, 8 },
132 	{ "SG_TIMER_TICK", 0x68, 0 },
133 	{ "SG_CQ_CONTEXT_BADDR", 0x6c, 0 },
134 		{ "baseAddr", 5, 27 },
135 	{ "SG_OCO_BASE", 0x70, 0 },
136 		{ "Base1", 16, 16 },
137 		{ "Base0", 0, 16 },
138 	{ "SG_DRB_PRI_THRESH", 0x74, 0 },
139 		{ "DrbPriThrsh", 0, 16 },
140 	{ "SG_DEBUG_INDEX", 0x78, 0 },
141 	{ "SG_DEBUG_DATA", 0x7c, 0 },
142 	{ NULL, 0, 0 }
143 };
144 
145 struct reg_info pcix1_regs[] = {
146 	{ "PCIX_INT_ENABLE", 0x80, 0 },
147 		{ "MSIXParErr", 22, 3 },
148 		{ "CFParErr", 18, 4 },
149 		{ "RFParErr", 14, 4 },
150 		{ "WFParErr", 12, 2 },
151 		{ "PIOParErr", 11, 1 },
152 		{ "DetUncECCErr", 10, 1 },
153 		{ "DetCorECCErr", 9, 1 },
154 		{ "RcvSplCmpErr", 8, 1 },
155 		{ "UnxSplCmp", 7, 1 },
156 		{ "SplCmpDis", 6, 1 },
157 		{ "DetParErr", 5, 1 },
158 		{ "SigSysErr", 4, 1 },
159 		{ "RcvMstAbt", 3, 1 },
160 		{ "RcvTarAbt", 2, 1 },
161 		{ "SigTarAbt", 1, 1 },
162 		{ "MstDetParErr", 0, 1 },
163 	{ "PCIX_INT_CAUSE", 0x84, 0 },
164 		{ "MSIXParErr", 22, 3 },
165 		{ "CFParErr", 18, 4 },
166 		{ "RFParErr", 14, 4 },
167 		{ "WFParErr", 12, 2 },
168 		{ "PIOParErr", 11, 1 },
169 		{ "DetUncECCErr", 10, 1 },
170 		{ "DetCorECCErr", 9, 1 },
171 		{ "RcvSplCmpErr", 8, 1 },
172 		{ "UnxSplCmp", 7, 1 },
173 		{ "SplCmpDis", 6, 1 },
174 		{ "DetParErr", 5, 1 },
175 		{ "SigSysErr", 4, 1 },
176 		{ "RcvMstAbt", 3, 1 },
177 		{ "RcvTarAbt", 2, 1 },
178 		{ "SigTarAbt", 1, 1 },
179 		{ "MstDetParErr", 0, 1 },
180 	{ "PCIX_CFG", 0x88, 0 },
181 		{ "CLIDecEn", 18, 1 },
182 		{ "LatTmrDis", 17, 1 },
183 		{ "LowPwrEn", 16, 1 },
184 		{ "AsyncIntVec", 11, 5 },
185 		{ "MaxSplTrnC", 8, 3 },
186 		{ "MaxSplTrnR", 5, 3 },
187 		{ "MaxWrByteCnt", 3, 2 },
188 		{ "WrReqAtomicEn", 2, 1 },
189 		{ "CRstWrmMode", 1, 1 },
190 		{ "PIOAck64En", 0, 1 },
191 	{ "PCIX_MODE", 0x8c, 0 },
192 		{ "PClkRange", 6, 2 },
193 		{ "PCIXInitPat", 2, 4 },
194 		{ "66MHz", 1, 1 },
195 		{ "64Bit", 0, 1 },
196 	{ "PCIX_CAL", 0x90, 0 },
197 		{ "Busy", 31, 1 },
198 		{ "PerCalDiv", 22, 8 },
199 		{ "PerCalEn", 21, 1 },
200 		{ "SglCalEn", 20, 1 },
201 		{ "ZInUpdMode", 19, 1 },
202 		{ "ZInSel", 18, 1 },
203 		{ "ZPDMan", 15, 3 },
204 		{ "ZPUMan", 12, 3 },
205 		{ "ZPDOut", 9, 3 },
206 		{ "ZPUOut", 6, 3 },
207 		{ "ZPDIn", 3, 3 },
208 		{ "ZPUIn", 0, 3 },
209 	{ "PCIX_WOL", 0x94, 0 },
210 		{ "WakeUp1", 3, 1 },
211 		{ "WakeUp0", 2, 1 },
212 		{ "SleepMode1", 1, 1 },
213 		{ "SleepMode0", 0, 1 },
214 	{ NULL, 0, 0 }
215 };
216 
217 struct reg_info pcie0_regs[] = {
218 	{ "PCIE_INT_ENABLE", 0x80, 0 },
219 		{ "BISTErr", 15, 8 },
220 		{ "MSIXParErr", 12, 3 },
221 		{ "CFParErr", 11, 1 },
222 		{ "RFParErr", 10, 1 },
223 		{ "WFParErr", 9, 1 },
224 		{ "PIOParErr", 8, 1 },
225 		{ "UnxSplCplErrC", 7, 1 },
226 		{ "UnxSplCplErrR", 6, 1 },
227 		{ "VPDAddrChng", 5, 1 },
228 		{ "BusMstrEn", 4, 1 },
229 		{ "PMStChng", 3, 1 },
230 		{ "PEXMsg", 2, 1 },
231 		{ "ZeroLenRd", 1, 1 },
232 		{ "PEXErr", 0, 1 },
233 	{ "PCIE_INT_CAUSE", 0x84, 0 },
234 		{ "BISTErr", 15, 8 },
235 		{ "MSIXParErr", 12, 3 },
236 		{ "CFParErr", 11, 1 },
237 		{ "RFParErr", 10, 1 },
238 		{ "WFParErr", 9, 1 },
239 		{ "PIOParErr", 8, 1 },
240 		{ "UnxSplCplErrC", 7, 1 },
241 		{ "UnxSplCplErrR", 6, 1 },
242 		{ "VPDAddrChng", 5, 1 },
243 		{ "BusMstrEn", 4, 1 },
244 		{ "PMStChng", 3, 1 },
245 		{ "PEXMsg", 2, 1 },
246 		{ "ZeroLenRd", 1, 1 },
247 		{ "PEXErr", 0, 1 },
248 	{ "PCIE_CFG", 0x88, 0 },
249 		{ "EnableLinkDwnDRst", 21, 1 },
250 		{ "EnableLinkDownRst", 20, 1 },
251 		{ "EnableHotRst", 19, 1 },
252 		{ "IniWaitForGnt", 18, 1 },
253 		{ "IniBEDis", 17, 1 },
254 		{ "CLIDecEn", 16, 1 },
255 		{ "AsyncIntVec", 11, 5 },
256 		{ "MaxSplTrnC", 7, 4 },
257 		{ "MaxSplTrnR", 1, 6 },
258 		{ "CRstWrmMode", 0, 1 },
259 	{ "PCIE_MODE", 0x8c, 0 },
260 		{ "LnkCntlState", 2, 8 },
261 		{ "VC0Up", 1, 1 },
262 		{ "LnkInitial", 0, 1 },
263 	{ "PCIE_CAL", 0x90, 0 },
264 		{ "CalBusy", 31, 1 },
265 		{ "CalFault", 30, 1 },
266 		{ "ZInSel", 11, 1 },
267 		{ "ZMan", 8, 3 },
268 		{ "ZOut", 3, 5 },
269 		{ "ZIn", 0, 3 },
270 	{ "PCIE_WOL", 0x94, 0 },
271 		{ "WakeUp1", 3, 1 },
272 		{ "WakeUp0", 2, 1 },
273 		{ "SleepMode1", 1, 1 },
274 		{ "SleepMode0", 0, 1 },
275 	{ "PCIE_PEX_CTRL0", 0x98, 0 },
276 		{ "NumFstTrnSeq", 22, 8 },
277 		{ "ReplayLmt", 2, 20 },
278 		{ "TxPndChkEn", 1, 1 },
279 		{ "CplPndChkEn", 0, 1 },
280 	{ "PCIE_PEX_CTRL1", 0x9c, 0 },
281 		{ "DLLPTimeoutLmt", 11, 20 },
282 		{ "AckLat", 0, 11 },
283 	{ "PCIE_PEX_CTRL2", 0xa0, 0 },
284 		{ "PMExitL1Req", 29, 1 },
285 		{ "PMTxIdle", 28, 1 },
286 		{ "PCIModeLoop", 27, 1 },
287 		{ "L1ASPMTxRxL0sTime", 15, 12 },
288 		{ "L0sIdleTime", 4, 11 },
289 		{ "EnterL23", 3, 1 },
290 		{ "EnterL1ASPMEn", 2, 1 },
291 		{ "EnterL1En", 1, 1 },
292 		{ "EnterL0sEn", 0, 1 },
293 	{ "PCIE_PEX_ERR", 0xa4, 0 },
294 		{ "FlowCtlOFlowErr", 17, 1 },
295 		{ "ReplayTimeout", 16, 1 },
296 		{ "ReplayRollover", 15, 1 },
297 		{ "BadDLLP", 14, 1 },
298 		{ "DLLPErr", 13, 1 },
299 		{ "FlowCtlProtErr", 12, 1 },
300 		{ "CplTimeout", 11, 1 },
301 		{ "PHYRcvErr", 10, 1 },
302 		{ "DisTLP", 9, 1 },
303 		{ "BadECRC", 8, 1 },
304 		{ "BadTLP", 7, 1 },
305 		{ "MalTLP", 6, 1 },
306 		{ "UnxCpl", 5, 1 },
307 		{ "UnsReq", 4, 1 },
308 		{ "PsnReq", 3, 1 },
309 		{ "UnsCpl", 2, 1 },
310 		{ "CplAbt", 1, 1 },
311 		{ "PsnCpl", 0, 1 },
312 	{ "PCIE_PIPE_CTRL", 0xa8, 0 },
313 		{ "RecDetUsec", 19, 3 },
314 		{ "PLLLckCyc", 6, 13 },
315 		{ "ElecIdleDetCyc", 3, 3 },
316 		{ "UseCDRLOS", 2, 1 },
317 		{ "PClkReqInP1", 1, 1 },
318 		{ "PClkOffInP1", 0, 1 },
319 	{ "PCIE_SERDES_CTRL", 0xac, 0 },
320 		{ "ManMode", 31, 1 },
321 		{ "ManLpbkEn", 29, 2 },
322 		{ "ManTxRecDetEn", 28, 1 },
323 		{ "ManTxBeacon", 27, 1 },
324 		{ "ManTxEI", 26, 1 },
325 		{ "ManRxPolarity", 25, 1 },
326 		{ "ManTxRst", 24, 1 },
327 		{ "ManRxRst", 23, 1 },
328 		{ "ManTxEn", 22, 1 },
329 		{ "ManRxEn", 21, 1 },
330 		{ "ManEn", 20, 1 },
331 		{ "CMURange", 17, 3 },
332 		{ "BGEnb", 16, 1 },
333 		{ "EnSkpDrop", 15, 1 },
334 		{ "EnComma", 14, 1 },
335 		{ "En8B10B", 13, 1 },
336 		{ "EnElBuf", 12, 1 },
337 		{ "Gain", 7, 5 },
338 		{ "BandGap", 3, 4 },
339 		{ "RxComAdj", 2, 1 },
340 		{ "PreEmph", 0, 2 },
341 	{ "PCIE_SERDES_STATUS0", 0xb0, 0 },
342 		{ "RxErrLane7", 21, 3 },
343 		{ "RxErrLane6", 18, 3 },
344 		{ "RxErrLane5", 15, 3 },
345 		{ "RxErrLane4", 12, 3 },
346 		{ "RxErrLane3", 9, 3 },
347 		{ "RxErrLane2", 6, 3 },
348 		{ "RxErrLane1", 3, 3 },
349 		{ "RxErrLane0", 0, 3 },
350 	{ "PCIE_SERDES_STATUS1", 0xb4, 0 },
351 		{ "CMULock", 31, 1 },
352 		{ "RxKLockLane7", 23, 1 },
353 		{ "RxKLockLane6", 22, 1 },
354 		{ "RxKLockLane5", 21, 1 },
355 		{ "RxKLockLane4", 20, 1 },
356 		{ "RxKLockLane3", 19, 1 },
357 		{ "RxKLockLane2", 18, 1 },
358 		{ "RxKLockLane1", 17, 1 },
359 		{ "RxKLockLane0", 16, 1 },
360 		{ "RxUFlowLane7", 15, 1 },
361 		{ "RxUFlowLane6", 14, 1 },
362 		{ "RxUFlowLane5", 13, 1 },
363 		{ "RxUFlowLane4", 12, 1 },
364 		{ "RxUFlowLane3", 11, 1 },
365 		{ "RxUFlowLane2", 10, 1 },
366 		{ "RxUFlowLane1", 9, 1 },
367 		{ "RxUFlowLane0", 8, 1 },
368 		{ "RxOFlowLane7", 7, 1 },
369 		{ "RxOFlowLane6", 6, 1 },
370 		{ "RxOFlowLane5", 5, 1 },
371 		{ "RxOFlowLane4", 4, 1 },
372 		{ "RxOFlowLane3", 3, 1 },
373 		{ "RxOFlowLane2", 2, 1 },
374 		{ "RxOFlowLane1", 1, 1 },
375 		{ "RxOFlowLane0", 0, 1 },
376 	{ "PCIE_SERDES_STATUS2", 0xb8, 0 },
377 		{ "TxRecDetLane7", 31, 1 },
378 		{ "TxRecDetLane6", 30, 1 },
379 		{ "TxRecDetLane5", 29, 1 },
380 		{ "TxRecDetLane4", 28, 1 },
381 		{ "TxRecDetLane3", 27, 1 },
382 		{ "TxRecDetLane2", 26, 1 },
383 		{ "TxRecDetLane1", 25, 1 },
384 		{ "TxRecDetLane0", 24, 1 },
385 		{ "RxEIDLane7", 23, 1 },
386 		{ "RxEIDLane6", 22, 1 },
387 		{ "RxEIDLane5", 21, 1 },
388 		{ "RxEIDLane4", 20, 1 },
389 		{ "RxEIDLane3", 19, 1 },
390 		{ "RxEIDLane2", 18, 1 },
391 		{ "RxEIDLane1", 17, 1 },
392 		{ "RxEIDLane0", 16, 1 },
393 		{ "RxRemSkipLane7", 15, 1 },
394 		{ "RxRemSkipLane6", 14, 1 },
395 		{ "RxRemSkipLane5", 13, 1 },
396 		{ "RxRemSkipLane4", 12, 1 },
397 		{ "RxRemSkipLane3", 11, 1 },
398 		{ "RxRemSkipLane2", 10, 1 },
399 		{ "RxRemSkipLane1", 9, 1 },
400 		{ "RxRemSkipLane0", 8, 1 },
401 		{ "RxAddSkipLane7", 7, 1 },
402 		{ "RxAddSkipLane6", 6, 1 },
403 		{ "RxAddSkipLane5", 5, 1 },
404 		{ "RxAddSkipLane4", 4, 1 },
405 		{ "RxAddSkipLane3", 3, 1 },
406 		{ "RxAddSkipLane2", 2, 1 },
407 		{ "RxAddSkipLane1", 1, 1 },
408 		{ "RxAddSkipLane0", 0, 1 },
409 	{ "PCIE_SERDES_BIST", 0xbc, 0 },
410 		{ "BISTDone", 24, 8 },
411 		{ "BISTCycleThresh", 3, 16 },
412 		{ "BISTMode", 0, 3 },
413 	{ NULL, 0, 0 }
414 };
415 
416 struct reg_info t3dbg_regs[] = {
417 	{ "T3DBG_DBG0_CFG", 0xc0, 0 },
418 		{ "RegSelect", 9, 8 },
419 		{ "ModuleSelect", 4, 5 },
420 		{ "ClkSelect", 0, 4 },
421 	{ "T3DBG_DBG0_EN", 0xc4, 0 },
422 		{ "SDRByte0", 8, 1 },
423 		{ "DDREn", 4, 1 },
424 		{ "PortEn", 0, 1 },
425 	{ "T3DBG_DBG1_CFG", 0xc8, 0 },
426 		{ "RegSelect", 9, 8 },
427 		{ "ModuleSelect", 4, 5 },
428 		{ "ClkSelect", 0, 4 },
429 	{ "T3DBG_DBG1_EN", 0xcc, 0 },
430 		{ "SDRByte0", 8, 1 },
431 		{ "DDREn", 4, 1 },
432 		{ "PortEn", 0, 1 },
433 	{ "T3DBG_GPIO_EN", 0xd0, 0 },
434 		{ "GPIO11_OEn", 27, 1 },
435 		{ "GPIO10_OEn", 26, 1 },
436 		{ "GPIO9_OEn", 25, 1 },
437 		{ "GPIO8_OEn", 24, 1 },
438 		{ "GPIO7_OEn", 23, 1 },
439 		{ "GPIO6_OEn", 22, 1 },
440 		{ "GPIO5_OEn", 21, 1 },
441 		{ "GPIO4_OEn", 20, 1 },
442 		{ "GPIO3_OEn", 19, 1 },
443 		{ "GPIO2_OEn", 18, 1 },
444 		{ "GPIO1_OEn", 17, 1 },
445 		{ "GPIO0_OEn", 16, 1 },
446 		{ "GPIO11_Out_Val", 11, 1 },
447 		{ "GPIO10_Out_Val", 10, 1 },
448 		{ "GPIO9_Out_Val", 9, 1 },
449 		{ "GPIO8_Out_Val", 8, 1 },
450 		{ "GPIO7_Out_Val", 7, 1 },
451 		{ "GPIO6_Out_Val", 6, 1 },
452 		{ "GPIO5_Out_Val", 5, 1 },
453 		{ "GPIO4_Out_Val", 4, 1 },
454 		{ "GPIO3_Out_Val", 3, 1 },
455 		{ "GPIO2_Out_Val", 2, 1 },
456 		{ "GPIO1_Out_Val", 1, 1 },
457 		{ "GPIO0_Out_Val", 0, 1 },
458 	{ "T3DBG_GPIO_IN", 0xd4, 0 },
459 		{ "GPIO11_IN", 11, 1 },
460 		{ "GPIO10_IN", 10, 1 },
461 		{ "GPIO9_IN", 9, 1 },
462 		{ "GPIO8_IN", 8, 1 },
463 		{ "GPIO7_IN", 7, 1 },
464 		{ "GPIO6_IN", 6, 1 },
465 		{ "GPIO5_IN", 5, 1 },
466 		{ "GPIO4_IN", 4, 1 },
467 		{ "GPIO3_IN", 3, 1 },
468 		{ "GPIO2_IN", 2, 1 },
469 		{ "GPIO1_IN", 1, 1 },
470 		{ "GPIO0_IN", 0, 1 },
471 	{ "T3DBG_INT_ENABLE", 0xd8, 0 },
472 		{ "C_LOCK", 21, 1 },
473 		{ "M_LOCK", 20, 1 },
474 		{ "U_LOCK", 19, 1 },
475 		{ "R_LOCK", 18, 1 },
476 		{ "PX_LOCK", 17, 1 },
477 		{ "PE_LOCK", 16, 1 },
478 		{ "GPIO11", 11, 1 },
479 		{ "GPIO10", 10, 1 },
480 		{ "GPIO9", 9, 1 },
481 		{ "GPIO8", 8, 1 },
482 		{ "GPIO7", 7, 1 },
483 		{ "GPIO6", 6, 1 },
484 		{ "GPIO5", 5, 1 },
485 		{ "GPIO4", 4, 1 },
486 		{ "GPIO3", 3, 1 },
487 		{ "GPIO2", 2, 1 },
488 		{ "GPIO1", 1, 1 },
489 		{ "GPIO0", 0, 1 },
490 	{ "T3DBG_INT_CAUSE", 0xdc, 0 },
491 		{ "C_LOCK", 21, 1 },
492 		{ "M_LOCK", 20, 1 },
493 		{ "U_LOCK", 19, 1 },
494 		{ "R_LOCK", 18, 1 },
495 		{ "PX_LOCK", 17, 1 },
496 		{ "PE_LOCK", 16, 1 },
497 		{ "GPIO11", 11, 1 },
498 		{ "GPIO10", 10, 1 },
499 		{ "GPIO9", 9, 1 },
500 		{ "GPIO8", 8, 1 },
501 		{ "GPIO7", 7, 1 },
502 		{ "GPIO6", 6, 1 },
503 		{ "GPIO5", 5, 1 },
504 		{ "GPIO4", 4, 1 },
505 		{ "GPIO3", 3, 1 },
506 		{ "GPIO2", 2, 1 },
507 		{ "GPIO1", 1, 1 },
508 		{ "GPIO0", 0, 1 },
509 	{ "T3DBG_DBG0_RST_VALUE", 0xe0, 0 },
510 		{ "DebugData", 0, 1 },
511 	{ "T3DBG_PLL_OCLK_PAD_EN", 0xe4, 0 },
512 		{ "PCIE_OCLK_En", 20, 1 },
513 		{ "PCIX_OCLK_En", 16, 1 },
514 		{ "U_OCLK_En", 12, 1 },
515 		{ "R_OCLK_En", 8, 1 },
516 		{ "M_OCLK_En", 4, 1 },
517 		{ "C_OCLK_En", 0, 1 },
518 	{ "T3DBG_PLL_LOCK", 0xe8, 0 },
519 		{ "PCIE_LOCK", 20, 1 },
520 		{ "PCIX_LOCK", 16, 1 },
521 		{ "U_LOCK", 12, 1 },
522 		{ "R_LOCK", 8, 1 },
523 		{ "M_LOCK", 4, 1 },
524 		{ "C_LOCK", 0, 1 },
525 	{ "T3DBG_SERDES_RBC_CFG", 0xec, 0 },
526 		{ "X_RBC_Lane_Sel", 16, 1 },
527 		{ "X_RBC_Dbg_En", 12, 1 },
528 		{ "X_Serdes_Sel", 8, 1 },
529 		{ "PE_RBC_Lane_Sel", 4, 1 },
530 		{ "PE_RBC_Dbg_En", 0, 1 },
531 	{ "T3DBG_GPIO_ACT_LOW", 0xf0, 0 },
532 		{ "C_LOCK_ACT_LOW", 21, 1 },
533 		{ "M_LOCK_ACT_LOW", 20, 1 },
534 		{ "U_LOCK_ACT_LOW", 19, 1 },
535 		{ "R_LOCK_ACT_LOW", 18, 1 },
536 		{ "PX_LOCK_ACT_LOW", 17, 1 },
537 		{ "PE_LOCK_ACT_LOW", 16, 1 },
538 		{ "GPIO11_ACT_LOW", 11, 1 },
539 		{ "GPIO10_ACT_LOW", 10, 1 },
540 		{ "GPIO9_ACT_LOW", 9, 1 },
541 		{ "GPIO8_ACT_LOW", 8, 1 },
542 		{ "GPIO7_ACT_LOW", 7, 1 },
543 		{ "GPIO6_ACT_LOW", 6, 1 },
544 		{ "GPIO5_ACT_LOW", 5, 1 },
545 		{ "GPIO4_ACT_LOW", 4, 1 },
546 		{ "GPIO3_ACT_LOW", 3, 1 },
547 		{ "GPIO2_ACT_LOW", 2, 1 },
548 		{ "GPIO1_ACT_LOW", 1, 1 },
549 		{ "GPIO0_ACT_LOW", 0, 1 },
550 	{ "T3DBG_PMON_CFG", 0xf4, 0 },
551 		{ "PMON_DONE", 29, 1 },
552 		{ "PMON_FAIL", 28, 1 },
553 		{ "PMON_FDEL_AUTO", 22, 1 },
554 		{ "PMON_CDEL_AUTO", 16, 1 },
555 		{ "PMON_FDEL_MANUAL", 10, 1 },
556 		{ "PMON_CDEL_MANUAL", 4, 1 },
557 		{ "PMON_MANUAL", 1, 1 },
558 		{ "PMON_AUTO", 0, 1 },
559 	{ NULL, 0, 0 }
560 };
561 
562 struct reg_info mc7_pmrx_regs[] = {
563 	{ "MC7_CFG", 0x100, 0 },
564 		{ "ImpSetUpdate", 14, 1 },
565 		{ "IFEn", 13, 1 },
566 		{ "TERM300", 12, 1 },
567 		{ "TERM150", 11, 1 },
568 		{ "Slow", 10, 1 },
569 		{ "Width", 8, 2 },
570 		{ "ODTEn", 7, 1 },
571 		{ "Bks", 6, 1 },
572 		{ "Org", 5, 1 },
573 		{ "Den", 2, 3 },
574 		{ "Rdy", 1, 1 },
575 		{ "ClkEn", 0, 1 },
576 	{ "MC7_MODE", 0x104, 0 },
577 		{ "Busy", 31, 1 },
578 		{ "Mode", 0, 16 },
579 	{ "MC7_EXT_MODE1", 0x108, 0 },
580 		{ "Busy", 31, 1 },
581 		{ "OCDAdjustMode", 20, 1 },
582 		{ "OCDCode", 16, 4 },
583 		{ "ExtMode1", 0, 16 },
584 	{ "MC7_EXT_MODE2", 0x10c, 0 },
585 		{ "Busy", 31, 1 },
586 		{ "ExtMode2", 0, 16 },
587 	{ "MC7_EXT_MODE3", 0x110, 0 },
588 		{ "Busy", 31, 1 },
589 		{ "ExtMode3", 0, 16 },
590 	{ "MC7_PRE", 0x114, 0 },
591 		{ "Busy", 31, 1 },
592 	{ "MC7_REF", 0x118, 0 },
593 		{ "Busy", 31, 1 },
594 		{ "PreRefDiv", 1, 14 },
595 		{ "PerRefEn", 0, 1 },
596 	{ "MC7_DLL", 0x11c, 0 },
597 		{ "DLLLock", 31, 1 },
598 		{ "DLLDelta", 24, 7 },
599 		{ "ManDelta", 3, 7 },
600 		{ "DLLDeltaSel", 2, 1 },
601 		{ "DLLEnb", 1, 1 },
602 		{ "DLLRst", 0, 1 },
603 	{ "MC7_PARM", 0x120, 0 },
604 		{ "ActToPreDly", 26, 4 },
605 		{ "ActToRdWrDly", 23, 3 },
606 		{ "PreCyc", 20, 3 },
607 		{ "RefCyc", 13, 7 },
608 		{ "BkCyc", 8, 5 },
609 		{ "WrToRdDly", 4, 4 },
610 		{ "RdToWrDly", 0, 4 },
611 	{ "MC7_HWM_WRR", 0x124, 0 },
612 		{ "MEM_HWM", 26, 6 },
613 		{ "ULP_HWM", 22, 4 },
614 		{ "TOT_RLD_WT", 14, 8 },
615 		{ "MEM_RLD_WT", 7, 7 },
616 		{ "ULP_RLD_WT", 0, 7 },
617 	{ "MC7_CAL", 0x128, 0 },
618 		{ "BUSY", 31, 1 },
619 		{ "CAL_FAULT", 30, 1 },
620 		{ "PER_CAL_DIV", 22, 8 },
621 		{ "PER_CAL_EN", 21, 1 },
622 		{ "SGL_CAL_EN", 20, 1 },
623 		{ "IMP_UPD_MODE", 19, 1 },
624 		{ "IMP_SEL", 18, 1 },
625 		{ "IMP_MAN_PD", 15, 3 },
626 		{ "IMP_MAN_PU", 12, 3 },
627 		{ "IMP_CAL_PD", 9, 3 },
628 		{ "IMP_CAL_PU", 6, 3 },
629 		{ "IMP_SET_PD", 3, 3 },
630 		{ "IMP_SET_PU", 0, 3 },
631 	{ "MC7_ECC", 0x130, 0 },
632 		{ "UECnt", 10, 8 },
633 		{ "CECnt", 2, 8 },
634 		{ "ECCChkEn", 1, 1 },
635 		{ "ECCGenEn", 0, 1 },
636 	{ "MC7_CE_ADDR", 0x134, 0 },
637 	{ "MC7_CE_DATA0", 0x138, 0 },
638 	{ "MC7_CE_DATA1", 0x13c, 0 },
639 	{ "MC7_CE_DATA2", 0x140, 0 },
640 		{ "Data", 0, 8 },
641 	{ "MC7_UE_ADDR", 0x144, 0 },
642 	{ "MC7_UE_DATA0", 0x148, 0 },
643 	{ "MC7_UE_DATA1", 0x14c, 0 },
644 	{ "MC7_UE_DATA2", 0x150, 0 },
645 		{ "Data", 0, 8 },
646 	{ "MC7_BD_ADDR", 0x154, 0 },
647 		{ "Addr", 3, 29 },
648 	{ "MC7_BD_DATA0", 0x158, 0 },
649 	{ "MC7_BD_DATA1", 0x15c, 0 },
650 	{ "MC7_BD_DATA2", 0x160, 0 },
651 		{ "Data", 0, 8 },
652 	{ "MC7_BD_OP", 0x164, 0 },
653 		{ "Busy", 31, 1 },
654 		{ "Op", 0, 1 },
655 	{ "MC7_BIST_ADDR_BEG", 0x168, 0 },
656 		{ "AddrBeg", 5, 27 },
657 	{ "MC7_BIST_ADDR_END", 0x16c, 0 },
658 		{ "AddrEnd", 5, 27 },
659 	{ "MC7_BIST_DATA", 0x170, 0 },
660 	{ "MC7_BIST_OP", 0x174, 0 },
661 		{ "Busy", 31, 1 },
662 		{ "Gap", 4, 5 },
663 		{ "Cont", 3, 1 },
664 		{ "DataPat", 1, 2 },
665 		{ "Op", 0, 1 },
666 	{ "MC7_INT_ENABLE", 0x178, 0 },
667 		{ "AE", 17, 1 },
668 		{ "PE", 2, 15 },
669 		{ "UE", 1, 1 },
670 		{ "CE", 0, 1 },
671 	{ "MC7_INT_CAUSE", 0x17c, 0 },
672 		{ "AE", 17, 1 },
673 		{ "PE", 2, 15 },
674 		{ "UE", 1, 1 },
675 		{ "CE", 0, 1 },
676 	{ NULL, 0, 0 }
677 };
678 
679 struct reg_info mc7_pmtx_regs[] = {
680 	{ "MC7_CFG", 0x180, 0 },
681 		{ "ImpSetUpdate", 14, 1 },
682 		{ "IFEn", 13, 1 },
683 		{ "TERM300", 12, 1 },
684 		{ "TERM150", 11, 1 },
685 		{ "Slow", 10, 1 },
686 		{ "Width", 8, 2 },
687 		{ "ODTEn", 7, 1 },
688 		{ "Bks", 6, 1 },
689 		{ "Org", 5, 1 },
690 		{ "Den", 2, 3 },
691 		{ "Rdy", 1, 1 },
692 		{ "ClkEn", 0, 1 },
693 	{ "MC7_MODE", 0x184, 0 },
694 		{ "Busy", 31, 1 },
695 		{ "Mode", 0, 16 },
696 	{ "MC7_EXT_MODE1", 0x188, 0 },
697 		{ "Busy", 31, 1 },
698 		{ "OCDAdjustMode", 20, 1 },
699 		{ "OCDCode", 16, 4 },
700 		{ "ExtMode1", 0, 16 },
701 	{ "MC7_EXT_MODE2", 0x18c, 0 },
702 		{ "Busy", 31, 1 },
703 		{ "ExtMode2", 0, 16 },
704 	{ "MC7_EXT_MODE3", 0x190, 0 },
705 		{ "Busy", 31, 1 },
706 		{ "ExtMode3", 0, 16 },
707 	{ "MC7_PRE", 0x194, 0 },
708 		{ "Busy", 31, 1 },
709 	{ "MC7_REF", 0x198, 0 },
710 		{ "Busy", 31, 1 },
711 		{ "PreRefDiv", 1, 14 },
712 		{ "PerRefEn", 0, 1 },
713 	{ "MC7_DLL", 0x19c, 0 },
714 		{ "DLLLock", 31, 1 },
715 		{ "DLLDelta", 24, 7 },
716 		{ "ManDelta", 3, 7 },
717 		{ "DLLDeltaSel", 2, 1 },
718 		{ "DLLEnb", 1, 1 },
719 		{ "DLLRst", 0, 1 },
720 	{ "MC7_PARM", 0x1a0, 0 },
721 		{ "ActToPreDly", 26, 4 },
722 		{ "ActToRdWrDly", 23, 3 },
723 		{ "PreCyc", 20, 3 },
724 		{ "RefCyc", 13, 7 },
725 		{ "BkCyc", 8, 5 },
726 		{ "WrToRdDly", 4, 4 },
727 		{ "RdToWrDly", 0, 4 },
728 	{ "MC7_HWM_WRR", 0x1a4, 0 },
729 		{ "MEM_HWM", 26, 6 },
730 		{ "ULP_HWM", 22, 4 },
731 		{ "TOT_RLD_WT", 14, 8 },
732 		{ "MEM_RLD_WT", 7, 7 },
733 		{ "ULP_RLD_WT", 0, 7 },
734 	{ "MC7_CAL", 0x1a8, 0 },
735 		{ "BUSY", 31, 1 },
736 		{ "CAL_FAULT", 30, 1 },
737 		{ "PER_CAL_DIV", 22, 8 },
738 		{ "PER_CAL_EN", 21, 1 },
739 		{ "SGL_CAL_EN", 20, 1 },
740 		{ "IMP_UPD_MODE", 19, 1 },
741 		{ "IMP_SEL", 18, 1 },
742 		{ "IMP_MAN_PD", 15, 3 },
743 		{ "IMP_MAN_PU", 12, 3 },
744 		{ "IMP_CAL_PD", 9, 3 },
745 		{ "IMP_CAL_PU", 6, 3 },
746 		{ "IMP_SET_PD", 3, 3 },
747 		{ "IMP_SET_PU", 0, 3 },
748 	{ "MC7_ECC", 0x1b0, 0 },
749 		{ "UECnt", 10, 8 },
750 		{ "CECnt", 2, 8 },
751 		{ "ECCChkEn", 1, 1 },
752 		{ "ECCGenEn", 0, 1 },
753 	{ "MC7_CE_ADDR", 0x1b4, 0 },
754 	{ "MC7_CE_DATA0", 0x1b8, 0 },
755 	{ "MC7_CE_DATA1", 0x1bc, 0 },
756 	{ "MC7_CE_DATA2", 0x1c0, 0 },
757 		{ "Data", 0, 8 },
758 	{ "MC7_UE_ADDR", 0x1c4, 0 },
759 	{ "MC7_UE_DATA0", 0x1c8, 0 },
760 	{ "MC7_UE_DATA1", 0x1cc, 0 },
761 	{ "MC7_UE_DATA2", 0x1d0, 0 },
762 		{ "Data", 0, 8 },
763 	{ "MC7_BD_ADDR", 0x1d4, 0 },
764 		{ "Addr", 3, 29 },
765 	{ "MC7_BD_DATA0", 0x1d8, 0 },
766 	{ "MC7_BD_DATA1", 0x1dc, 0 },
767 	{ "MC7_BD_DATA2", 0x1e0, 0 },
768 		{ "Data", 0, 8 },
769 	{ "MC7_BD_OP", 0x1e4, 0 },
770 		{ "Busy", 31, 1 },
771 		{ "Op", 0, 1 },
772 	{ "MC7_BIST_ADDR_BEG", 0x1e8, 0 },
773 		{ "AddrBeg", 5, 27 },
774 	{ "MC7_BIST_ADDR_END", 0x1ec, 0 },
775 		{ "AddrEnd", 5, 27 },
776 	{ "MC7_BIST_DATA", 0x1f0, 0 },
777 	{ "MC7_BIST_OP", 0x1f4, 0 },
778 		{ "Busy", 31, 1 },
779 		{ "Gap", 4, 5 },
780 		{ "Cont", 3, 1 },
781 		{ "DataPat", 1, 2 },
782 		{ "Op", 0, 1 },
783 	{ "MC7_INT_ENABLE", 0x1f8, 0 },
784 		{ "AE", 17, 1 },
785 		{ "PE", 2, 15 },
786 		{ "UE", 1, 1 },
787 		{ "CE", 0, 1 },
788 	{ "MC7_INT_CAUSE", 0x1fc, 0 },
789 		{ "AE", 17, 1 },
790 		{ "PE", 2, 15 },
791 		{ "UE", 1, 1 },
792 		{ "CE", 0, 1 },
793 	{ NULL, 0, 0 }
794 };
795 
796 struct reg_info mc7_cm_regs[] = {
797 	{ "MC7_CFG", 0x200, 0 },
798 		{ "ImpSetUpdate", 14, 1 },
799 		{ "IFEn", 13, 1 },
800 		{ "TERM300", 12, 1 },
801 		{ "TERM150", 11, 1 },
802 		{ "Slow", 10, 1 },
803 		{ "Width", 8, 2 },
804 		{ "ODTEn", 7, 1 },
805 		{ "Bks", 6, 1 },
806 		{ "Org", 5, 1 },
807 		{ "Den", 2, 3 },
808 		{ "Rdy", 1, 1 },
809 		{ "ClkEn", 0, 1 },
810 	{ "MC7_MODE", 0x204, 0 },
811 		{ "Busy", 31, 1 },
812 		{ "Mode", 0, 16 },
813 	{ "MC7_EXT_MODE1", 0x208, 0 },
814 		{ "Busy", 31, 1 },
815 		{ "OCDAdjustMode", 20, 1 },
816 		{ "OCDCode", 16, 4 },
817 		{ "ExtMode1", 0, 16 },
818 	{ "MC7_EXT_MODE2", 0x20c, 0 },
819 		{ "Busy", 31, 1 },
820 		{ "ExtMode2", 0, 16 },
821 	{ "MC7_EXT_MODE3", 0x210, 0 },
822 		{ "Busy", 31, 1 },
823 		{ "ExtMode3", 0, 16 },
824 	{ "MC7_PRE", 0x214, 0 },
825 		{ "Busy", 31, 1 },
826 	{ "MC7_REF", 0x218, 0 },
827 		{ "Busy", 31, 1 },
828 		{ "PreRefDiv", 1, 14 },
829 		{ "PerRefEn", 0, 1 },
830 	{ "MC7_DLL", 0x21c, 0 },
831 		{ "DLLLock", 31, 1 },
832 		{ "DLLDelta", 24, 7 },
833 		{ "ManDelta", 3, 7 },
834 		{ "DLLDeltaSel", 2, 1 },
835 		{ "DLLEnb", 1, 1 },
836 		{ "DLLRst", 0, 1 },
837 	{ "MC7_PARM", 0x220, 0 },
838 		{ "ActToPreDly", 26, 4 },
839 		{ "ActToRdWrDly", 23, 3 },
840 		{ "PreCyc", 20, 3 },
841 		{ "RefCyc", 13, 7 },
842 		{ "BkCyc", 8, 5 },
843 		{ "WrToRdDly", 4, 4 },
844 		{ "RdToWrDly", 0, 4 },
845 	{ "MC7_HWM_WRR", 0x224, 0 },
846 		{ "MEM_HWM", 26, 6 },
847 		{ "ULP_HWM", 22, 4 },
848 		{ "TOT_RLD_WT", 14, 8 },
849 		{ "MEM_RLD_WT", 7, 7 },
850 		{ "ULP_RLD_WT", 0, 7 },
851 	{ "MC7_CAL", 0x228, 0 },
852 		{ "BUSY", 31, 1 },
853 		{ "CAL_FAULT", 30, 1 },
854 		{ "PER_CAL_DIV", 22, 8 },
855 		{ "PER_CAL_EN", 21, 1 },
856 		{ "SGL_CAL_EN", 20, 1 },
857 		{ "IMP_UPD_MODE", 19, 1 },
858 		{ "IMP_SEL", 18, 1 },
859 		{ "IMP_MAN_PD", 15, 3 },
860 		{ "IMP_MAN_PU", 12, 3 },
861 		{ "IMP_CAL_PD", 9, 3 },
862 		{ "IMP_CAL_PU", 6, 3 },
863 		{ "IMP_SET_PD", 3, 3 },
864 		{ "IMP_SET_PU", 0, 3 },
865 	{ "MC7_ECC", 0x230, 0 },
866 		{ "UECnt", 10, 8 },
867 		{ "CECnt", 2, 8 },
868 		{ "ECCChkEn", 1, 1 },
869 		{ "ECCGenEn", 0, 1 },
870 	{ "MC7_CE_ADDR", 0x234, 0 },
871 	{ "MC7_CE_DATA0", 0x238, 0 },
872 	{ "MC7_CE_DATA1", 0x23c, 0 },
873 	{ "MC7_CE_DATA2", 0x240, 0 },
874 		{ "Data", 0, 8 },
875 	{ "MC7_UE_ADDR", 0x244, 0 },
876 	{ "MC7_UE_DATA0", 0x248, 0 },
877 	{ "MC7_UE_DATA1", 0x24c, 0 },
878 	{ "MC7_UE_DATA2", 0x250, 0 },
879 		{ "Data", 0, 8 },
880 	{ "MC7_BD_ADDR", 0x254, 0 },
881 		{ "Addr", 3, 29 },
882 	{ "MC7_BD_DATA0", 0x258, 0 },
883 	{ "MC7_BD_DATA1", 0x25c, 0 },
884 	{ "MC7_BD_DATA2", 0x260, 0 },
885 		{ "Data", 0, 8 },
886 	{ "MC7_BD_OP", 0x264, 0 },
887 		{ "Busy", 31, 1 },
888 		{ "Op", 0, 1 },
889 	{ "MC7_BIST_ADDR_BEG", 0x268, 0 },
890 		{ "AddrBeg", 5, 27 },
891 	{ "MC7_BIST_ADDR_END", 0x26c, 0 },
892 		{ "AddrEnd", 5, 27 },
893 	{ "MC7_BIST_DATA", 0x270, 0 },
894 	{ "MC7_BIST_OP", 0x274, 0 },
895 		{ "Busy", 31, 1 },
896 		{ "Gap", 4, 5 },
897 		{ "Cont", 3, 1 },
898 		{ "DataPat", 1, 2 },
899 		{ "Op", 0, 1 },
900 	{ "MC7_INT_ENABLE", 0x278, 0 },
901 		{ "AE", 17, 1 },
902 		{ "PE", 2, 15 },
903 		{ "UE", 1, 1 },
904 		{ "CE", 0, 1 },
905 	{ "MC7_INT_CAUSE", 0x27c, 0 },
906 		{ "AE", 17, 1 },
907 		{ "PE", 2, 15 },
908 		{ "UE", 1, 1 },
909 		{ "CE", 0, 1 },
910 	{ NULL, 0, 0 }
911 };
912 
913 struct reg_info cim_regs[] = {
914 	{ "CIM_BOOT_CFG", 0x280, 0 },
915 		{ "BootAddr", 2, 30 },
916 		{ "BootSdram", 1, 1 },
917 		{ "uPCRst", 0, 1 },
918 	{ "CIM_FLASH_BASE_ADDR", 0x284, 0 },
919 		{ "FlashBaseAddr", 2, 22 },
920 	{ "CIM_FLASH_ADDR_SIZE", 0x288, 0 },
921 		{ "FlashAddrSize", 2, 22 },
922 	{ "CIM_SDRAM_BASE_ADDR", 0x28c, 0 },
923 		{ "SdramBaseAddr", 2, 30 },
924 	{ "CIM_SDRAM_ADDR_SIZE", 0x290, 0 },
925 		{ "SdramAddrSize", 2, 30 },
926 	{ "CIM_UP_SPARE_INT", 0x294, 0 },
927 		{ "uPSpareInt", 0, 3 },
928 	{ "CIM_HOST_INT_ENABLE", 0x298, 0 },
929 		{ "Timer1IntEn", 15, 1 },
930 		{ "Timer0IntEn", 14, 1 },
931 		{ "PrefDropIntEn", 13, 1 },
932 		{ "BlkWrPlIntEn", 12, 1 },
933 		{ "BlkRdPlIntEn", 11, 1 },
934 		{ "BlkWrCtlIntEn", 10, 1 },
935 		{ "BlkRdCtlIntEn", 9, 1 },
936 		{ "BlkWrFlashIntEn", 8, 1 },
937 		{ "BlkRdFlashIntEn", 7, 1 },
938 		{ "SglWrFlashIntEn", 6, 1 },
939 		{ "WrBlkFlashIntEn", 5, 1 },
940 		{ "BlkWrBootIntEn", 4, 1 },
941 		{ "BlkRdBootIntEn", 3, 1 },
942 		{ "FlashRangeIntEn", 2, 1 },
943 		{ "SdramRangeIntEn", 1, 1 },
944 		{ "RsvdSpaceIntEn", 0, 1 },
945 	{ "CIM_HOST_INT_CAUSE", 0x29c, 0 },
946 		{ "Timer1Int", 15, 1 },
947 		{ "Timer0Int", 14, 1 },
948 		{ "PrefDropInt", 13, 1 },
949 		{ "BlkWrPlInt", 12, 1 },
950 		{ "BlkRdPlInt", 11, 1 },
951 		{ "BlkWrCtlInt", 10, 1 },
952 		{ "BlkRdCtlInt", 9, 1 },
953 		{ "BlkWrFlashInt", 8, 1 },
954 		{ "BlkRdFlashInt", 7, 1 },
955 		{ "SglWrFlashInt", 6, 1 },
956 		{ "WrBlkFlashInt", 5, 1 },
957 		{ "BlkWrBootInt", 4, 1 },
958 		{ "BlkRdBootInt", 3, 1 },
959 		{ "FlashRangeInt", 2, 1 },
960 		{ "SdramRangeInt", 1, 1 },
961 		{ "RsvdSpaceInt", 0, 1 },
962 	{ "CIM_UP_INT_ENABLE", 0x2a0, 0 },
963 		{ "MstPlIntEn", 16, 1 },
964 		{ "Timer1IntEn", 15, 1 },
965 		{ "Timer0IntEn", 14, 1 },
966 		{ "PrefDropIntEn", 13, 1 },
967 		{ "BlkWrPlIntEn", 12, 1 },
968 		{ "BlkRdPlIntEn", 11, 1 },
969 		{ "BlkWrCtlIntEn", 10, 1 },
970 		{ "BlkRdCtlIntEn", 9, 1 },
971 		{ "BlkWrFlashIntEn", 8, 1 },
972 		{ "BlkRdFlashIntEn", 7, 1 },
973 		{ "SglWrFlashIntEn", 6, 1 },
974 		{ "WrBlkFlashIntEn", 5, 1 },
975 		{ "BlkWrBootIntEn", 4, 1 },
976 		{ "BlkRdBootIntEn", 3, 1 },
977 		{ "FlashRangeIntEn", 2, 1 },
978 		{ "SdramRangeIntEn", 1, 1 },
979 		{ "RsvdSpaceIntEn", 0, 1 },
980 	{ "CIM_UP_INT_CAUSE", 0x2a4, 0 },
981 		{ "MstPlInt", 16, 1 },
982 		{ "Timer1Int", 15, 1 },
983 		{ "Timer0Int", 14, 1 },
984 		{ "PrefDropInt", 13, 1 },
985 		{ "BlkWrPlInt", 12, 1 },
986 		{ "BlkRdPlInt", 11, 1 },
987 		{ "BlkWrCtlInt", 10, 1 },
988 		{ "BlkRdCtlInt", 9, 1 },
989 		{ "BlkWrFlashInt", 8, 1 },
990 		{ "BlkRdFlashInt", 7, 1 },
991 		{ "SglWrFlashInt", 6, 1 },
992 		{ "WrBlkFlashInt", 5, 1 },
993 		{ "BlkWrBootInt", 4, 1 },
994 		{ "BlkRdBootInt", 3, 1 },
995 		{ "FlashRangeInt", 2, 1 },
996 		{ "SdramRangeInt", 1, 1 },
997 		{ "RsvdSpaceInt", 0, 1 },
998 	{ "CIM_IBQ_FULLA_THRSH", 0x2a8, 0 },
999 		{ "Ibq0FullThrsh", 0, 9 },
1000 		{ "Ibq1FullThrsh", 16, 9 },
1001 	{ "CIM_IBQ_FULLB_THRSH", 0x2ac, 0 },
1002 		{ "Ibq2FullThrsh", 0, 9 },
1003 		{ "Ibq3FullThrsh", 16, 9 },
1004 	{ "CIM_HOST_ACC_CTRL", 0x2b0, 0 },
1005 		{ "HostBusy", 17, 1 },
1006 		{ "HostWrite", 16, 1 },
1007 		{ "HostAddr", 0, 16 },
1008 	{ "CIM_HOST_ACC_DATA", 0x2b4, 0 },
1009 	{ "CIM_IBQ_DBG_CFG", 0x2c0, 0 },
1010 		{ "IbqDbgAddr", 16, 9 },
1011 		{ "IbqDbgQID", 3, 2 },
1012 		{ "IbqDbgWr", 2, 1 },
1013 		{ "IbqDbgBusy", 1, 1 },
1014 		{ "IbqDbgEn", 0, 1 },
1015 	{ "CIM_OBQ_DBG_CFG", 0x2c4, 0 },
1016 		{ "ObqDbgAddr", 16, 9 },
1017 		{ "ObqDbgQID", 3, 2 },
1018 		{ "ObqDbgWr", 2, 1 },
1019 		{ "ObqDbgBusy", 1, 1 },
1020 		{ "ObqDbgEn", 0, 1 },
1021 	{ "CIM_IBQ_DBG_DATA", 0x2c8, 0 },
1022 	{ "CIM_OBQ_DBG_DATA", 0x2cc, 0 },
1023 	{ "CIM_CDEBUGDATA", 0x2d0, 0 },
1024 		{ "CDebugDataH", 16, 16 },
1025 		{ "CDebugDataL", 0, 16 },
1026 	{ NULL, 0, 0 }
1027 };
1028 
1029 struct reg_info tp1_regs[] = {
1030 	{ "TP_IN_CONFIG", 0x300, 0 },
1031 		{ "RXFbArbPrio", 25, 1 },
1032 		{ "TXFbArbPrio", 24, 1 },
1033 		{ "DBMaxOpCnt", 16, 8 },
1034 		{ "NICMode", 14, 1 },
1035 		{ "EChecksumCheckTCP", 13, 1 },
1036 		{ "EChecksumCheckIP", 12, 1 },
1037 		{ "ECPL", 10, 1 },
1038 		{ "EEthernet", 8, 1 },
1039 		{ "ETunnel", 7, 1 },
1040 		{ "CChecksumCheckTCP", 6, 1 },
1041 		{ "CChecksumCheckIP", 5, 1 },
1042 		{ "CCPL", 3, 1 },
1043 		{ "CEthernet", 1, 1 },
1044 		{ "CTunnel", 0, 1 },
1045 	{ "TP_OUT_CONFIG", 0x304, 0 },
1046 		{ "VLANExtractionEnable", 12, 1 },
1047 		{ "EChecksumGenerateTCP", 11, 1 },
1048 		{ "EChecksumGenerateIP", 10, 1 },
1049 		{ "ECPL", 8, 1 },
1050 		{ "EEthernet", 6, 1 },
1051 		{ "CChecksumGenerateTCP", 5, 1 },
1052 		{ "CChecksumGenerateIP", 4, 1 },
1053 		{ "CCPL", 2, 1 },
1054 		{ "CEthernet", 0, 1 },
1055 	{ "TP_GLOBAL_CONFIG", 0x308, 0 },
1056 		{ "RXFlowControlDisable", 25, 1 },
1057 		{ "TXPacingEnable", 24, 1 },
1058 		{ "AttackFilterEnable", 23, 1 },
1059 		{ "SYNCookieNoOptions", 22, 1 },
1060 		{ "ProtectedMode", 21, 1 },
1061 		{ "PingDrop", 20, 1 },
1062 		{ "FragmentDrop", 19, 1 },
1063 		{ "FiveTupleLookup", 17, 2 },
1064 		{ "PathMTU", 15, 1 },
1065 		{ "IPIdentSplit", 14, 1 },
1066 		{ "IPChecksumOffload", 13, 1 },
1067 		{ "UDPChecksumOffload", 12, 1 },
1068 		{ "TCPChecksumOffload", 11, 1 },
1069 		{ "QOSMapping", 10, 1 },
1070 		{ "TCAMServerUse", 8, 2 },
1071 		{ "IPTTL", 0, 8 },
1072 	{ "TP_GLOBAL_RX_CREDIT", 0x30c, 0 },
1073 	{ "TP_CMM_SIZE", 0x310, 0 },
1074 		{ "CMMemMgrSize", 0, 28 },
1075 	{ "TP_CMM_MM_BASE", 0x314, 0 },
1076 		{ "CMMemMgrBase", 0, 28 },
1077 	{ "TP_CMM_TIMER_BASE", 0x318, 0 },
1078 		{ "CMTimerBase", 0, 28 },
1079 	{ "TP_PMM_SIZE", 0x31c, 0 },
1080 		{ "PMSize", 0, 28 },
1081 	{ "TP_PMM_TX_BASE", 0x320, 0 },
1082 	{ "TP_PMM_DEFRAG_BASE", 0x324, 0 },
1083 	{ "TP_PMM_RX_BASE", 0x328, 0 },
1084 	{ "TP_PMM_RX_PAGE_SIZE", 0x32c, 0 },
1085 	{ "TP_PMM_RX_MAX_PAGE", 0x330, 0 },
1086 		{ "PMRxMaxPage", 0, 21 },
1087 	{ "TP_PMM_TX_PAGE_SIZE", 0x334, 0 },
1088 	{ "TP_PMM_TX_MAX_PAGE", 0x338, 0 },
1089 		{ "PMTxMaxPage", 0, 21 },
1090 	{ "TP_TCP_OPTIONS", 0x340, 0 },
1091 		{ "MTUDefault", 16, 16 },
1092 		{ "MTUEnable", 10, 1 },
1093 		{ "SACKTx", 9, 1 },
1094 		{ "SACKRx", 8, 1 },
1095 		{ "SACKMode", 4, 2 },
1096 		{ "WindowScaleMode", 2, 2 },
1097 		{ "TimestampsMode", 0, 2 },
1098 	{ "TP_DACK_CONFIG", 0x344, 0 },
1099 		{ "AutoState3", 30, 2 },
1100 		{ "AutoState2", 28, 2 },
1101 		{ "AutoState1", 26, 2 },
1102 		{ "ByteThreshold", 5, 20 },
1103 		{ "MSSThreshold", 3, 2 },
1104 		{ "AutoCareful", 2, 1 },
1105 		{ "AutoEnable", 1, 1 },
1106 		{ "Mode", 0, 1 },
1107 	{ "TP_PC_CONFIG", 0x348, 0 },
1108 		{ "TxTosQueueMapMode", 26, 1 },
1109 		{ "RddpCongEn", 25, 1 },
1110 		{ "EnableOnFlyPDU", 24, 1 },
1111 		{ "EnableEPCMDAFull", 23, 1 },
1112 		{ "ModulateUnionMode", 22, 1 },
1113 		{ "TxDataAckRateEnable", 21, 1 },
1114 		{ "TxDeferEnable", 20, 1 },
1115 		{ "RxCongestionMode", 19, 1 },
1116 		{ "HearbeatOnceDACK", 18, 1 },
1117 		{ "HearbeatOnceHeap", 17, 1 },
1118 		{ "HearbeatDACK", 16, 1 },
1119 		{ "TxCongestionMode", 15, 1 },
1120 		{ "AcceptLatestRcvAdv", 14, 1 },
1121 		{ "DisableSYNData", 13, 1 },
1122 		{ "DisableWindowPSH", 12, 1 },
1123 		{ "DisableFINOldData", 11, 1 },
1124 		{ "EnableFLMError", 10, 1 },
1125 		{ "DisableFINOldDataFix", 9, 1 },
1126 		{ "FilterPeerFIN", 8, 1 },
1127 		{ "EnableFeedbackSend", 7, 1 },
1128 		{ "EnableRDMAError", 6, 1 },
1129 		{ "EnableDDPFlowControl", 5, 1 },
1130 		{ "DisableHeldData", 4, 1 },
1131 		{ "TableLatencyDelta", 0, 4 },
1132 	{ "TP_TCP_BACKOFF_REG0", 0x350, 0 },
1133 		{ "TimerBackoffIndex3", 24, 8 },
1134 		{ "TimerBackoffIndex2", 16, 8 },
1135 		{ "TimerBackoffIndex1", 8, 8 },
1136 		{ "TimerBackoffIndex0", 0, 8 },
1137 	{ "TP_TCP_BACKOFF_REG1", 0x354, 0 },
1138 		{ "TimerBackoffIndex7", 24, 8 },
1139 		{ "TimerBackoffIndex6", 16, 8 },
1140 		{ "TimerBackoffIndex5", 8, 8 },
1141 		{ "TimerBackoffIndex4", 0, 8 },
1142 	{ "TP_TCP_BACKOFF_REG2", 0x358, 0 },
1143 		{ "TimerBackoffIndex11", 24, 8 },
1144 		{ "TimerBackoffIndex10", 16, 8 },
1145 		{ "TimerBackoffIndex9", 8, 8 },
1146 		{ "TimerBackoffIndex8", 0, 8 },
1147 	{ "TP_TCP_BACKOFF_REG3", 0x35c, 0 },
1148 		{ "TimerBackoffIndex15", 24, 8 },
1149 		{ "TimerBackoffIndex14", 16, 8 },
1150 		{ "TimerBackoffIndex13", 8, 8 },
1151 		{ "TimerBackoffIndex12", 0, 8 },
1152 	{ "TP_PARA_REG0", 0x360, 0 },
1153 		{ "InitCwnd", 24, 3 },
1154 		{ "DupAckThresh", 20, 4 },
1155 	{ "TP_PARA_REG1", 0x364, 0 },
1156 		{ "InitRwnd", 16, 16 },
1157 		{ "InitialSSThresh", 0, 16 },
1158 	{ "TP_PARA_REG2", 0x368, 0 },
1159 		{ "MaxRxData", 16, 16 },
1160 		{ "RxCoalesceSize", 0, 16 },
1161 	{ "TP_PARA_REG3", 0x36c, 0 },
1162 		{ "TunnelCngDrop1", 21, 1 },
1163 		{ "TunnelCngDrop0", 20, 1 },
1164 		{ "TxDataAckIdx", 16, 4 },
1165 		{ "RxFragEnable", 12, 3 },
1166 		{ "TxPaceFixedStrict", 11, 1 },
1167 		{ "TxPaceAutoStrict", 10, 1 },
1168 		{ "TxPaceFixed", 9, 1 },
1169 		{ "TxPaceAuto", 8, 1 },
1170 		{ "RxUrgMode", 5, 1 },
1171 		{ "TxUrgMode", 4, 1 },
1172 		{ "CngCtrlMode", 2, 2 },
1173 		{ "RxCoalesceEnable", 1, 1 },
1174 		{ "RxCoalescePshEn", 0, 1 },
1175 	{ "TP_PARA_REG4", 0x370, 0 },
1176 		{ "HighSpeedCfg", 24, 8 },
1177 		{ "NewRenoCfg", 16, 8 },
1178 		{ "TahoeCfg", 8, 8 },
1179 		{ "RenoCfg", 0, 8 },
1180 	{ "TP_PARA_REG5", 0x374, 0 },
1181 		{ "IndicateSize", 16, 16 },
1182 		{ "SchdEnable", 8, 1 },
1183 		{ "OnFlyDDPEnable", 2, 1 },
1184 		{ "DackTimerSpin", 1, 1 },
1185 		{ "PushTimerEnable", 0, 1 },
1186 	{ "TP_PARA_REG6", 0x378, 0 },
1187 		{ "TxPDUSizeAdj", 16, 8 },
1188 		{ "EnableEPDU", 14, 1 },
1189 		{ "EnableESnd", 13, 1 },
1190 		{ "EnableCSnd", 12, 1 },
1191 		{ "EnableDeferACK", 9, 1 },
1192 		{ "EnablePDUC", 8, 1 },
1193 		{ "EnablePDUI", 7, 1 },
1194 		{ "EnablePDUE", 6, 1 },
1195 		{ "EnableDefer", 5, 1 },
1196 		{ "EnableClearRxmtOos", 4, 1 },
1197 		{ "DisablePDUCng", 3, 1 },
1198 		{ "DisablePDUTimeout", 2, 1 },
1199 		{ "DisablePDURxmt", 1, 1 },
1200 		{ "DisablePDUxmt", 0, 1 },
1201 	{ "TP_PARA_REG7", 0x37c, 0 },
1202 		{ "PMMaxXferLen1", 16, 16 },
1203 		{ "PMMaxXferLen0", 0, 16 },
1204 	{ "TP_TIMER_RESOLUTION", 0x390, 0 },
1205 		{ "TimerResolution", 16, 8 },
1206 		{ "TimestampResolution", 8, 8 },
1207 		{ "DelayedACKResolution", 0, 8 },
1208 	{ "TP_MSL", 0x394, 0 },
1209 		{ "MSL", 0, 30 },
1210 	{ "TP_RXT_MIN", 0x398, 0 },
1211 		{ "RxtMin", 0, 30 },
1212 	{ "TP_RXT_MAX", 0x39c, 0 },
1213 		{ "RxtMax", 0, 30 },
1214 	{ "TP_PERS_MIN", 0x3a0, 0 },
1215 		{ "PersMin", 0, 30 },
1216 	{ "TP_PERS_MAX", 0x3a4, 0 },
1217 		{ "PersMax", 0, 30 },
1218 	{ "TP_KEEP_IDLE", 0x3a8, 0 },
1219 		{ "KeepaliveIdle", 0, 30 },
1220 	{ "TP_KEEP_INTVL", 0x3ac, 0 },
1221 		{ "KeepaliveIntvl", 0, 30 },
1222 	{ "TP_INIT_SRTT", 0x3b0, 0 },
1223 		{ "InitSrtt", 0, 16 },
1224 	{ "TP_DACK_TIMER", 0x3b4, 0 },
1225 		{ "DackTime", 0, 12 },
1226 	{ "TP_FINWAIT2_TIMER", 0x3b8, 0 },
1227 		{ "Finwait2Time", 0, 30 },
1228 	{ "TP_FAST_FINWAIT2_TIMER", 0x3bc, 0 },
1229 		{ "FastFinwait2Time", 0, 30 },
1230 	{ "TP_SHIFT_CNT", 0x3c0, 0 },
1231 		{ "SynShiftMax", 24, 8 },
1232 		{ "RxtShiftMaxR1", 20, 4 },
1233 		{ "RxtShiftMaxR2", 16, 4 },
1234 		{ "PerShiftBackoffMax", 12, 4 },
1235 		{ "PerShiftMax", 8, 4 },
1236 		{ "KeepaliveMax", 0, 8 },
1237 	{ "TP_TIME_HI", 0x3c8, 0 },
1238 	{ "TP_TIME_LO", 0x3cc, 0 },
1239 	{ "TP_ULP_TABLE", 0x3d4, 0 },
1240 		{ "ULPType7Field", 28, 4 },
1241 		{ "ULPType6Field", 24, 4 },
1242 		{ "ULPType5Field", 20, 4 },
1243 		{ "ULPType4Field", 16, 4 },
1244 		{ "ULPType3Field", 12, 4 },
1245 		{ "ULPType2Field", 8, 4 },
1246 		{ "ULPType1Field", 4, 4 },
1247 		{ "ULPType0Field", 0, 4 },
1248 	{ "TP_PACE_TABLE", 0x3d8, 0 },
1249 	{ "TP_CCTRL_TABLE", 0x3dc, 0 },
1250 	{ "TP_TOS_TABLE", 0x3e0, 0 },
1251 	{ "TP_MTU_TABLE", 0x3e4, 0 },
1252 	{ "TP_RSS_MAP_TABLE", 0x3e8, 0 },
1253 	{ "TP_RSS_LKP_TABLE", 0x3ec, 0 },
1254 	{ "TP_RSS_CONFIG", 0x3f0, 0 },
1255 		{ "TNL4tupEn", 29, 1 },
1256 		{ "TNL2tupEn", 28, 1 },
1257 		{ "TNLprtEn", 26, 1 },
1258 		{ "TNLMapEn", 25, 1 },
1259 		{ "TNLLkpEn", 24, 1 },
1260 		{ "OFD4tupEn", 21, 1 },
1261 		{ "OFD2tupEn", 20, 1 },
1262 		{ "OFDMapEn", 17, 1 },
1263 		{ "OFDLkpEn", 16, 1 },
1264 		{ "SYN4tupEn", 13, 1 },
1265 		{ "SYN2tupEn", 12, 1 },
1266 		{ "SYNMapEn", 9, 1 },
1267 		{ "SYNLkpEn", 8, 1 },
1268 		{ "RRCPLMapEn", 7, 1 },
1269 		{ "RRCPLCPUSIZE", 4, 3 },
1270 		{ "RQFeedbackEnable", 3, 1 },
1271 		{ "HashToeplitz", 2, 1 },
1272 		{ "HashSave", 1, 1 },
1273 		{ "Disable", 0, 1 },
1274 	{ "TP_RSS_CONFIG_TNL", 0x3f4, 0 },
1275 		{ "MaskSize", 28, 3 },
1276 		{ "DefaultCPUBase", 22, 6 },
1277 		{ "DefaultCPU", 16, 6 },
1278 		{ "DefaultQueue", 0, 16 },
1279 	{ "TP_RSS_CONFIG_OFD", 0x3f8, 0 },
1280 		{ "MaskSize", 28, 3 },
1281 		{ "DefaultCPUBase", 22, 6 },
1282 		{ "DefaultCPU", 16, 6 },
1283 		{ "DefaultQueue", 0, 16 },
1284 	{ "TP_RSS_CONFIG_SYN", 0x3fc, 0 },
1285 		{ "MaskSize", 28, 3 },
1286 		{ "DefaultCPUBase", 22, 6 },
1287 		{ "DefaultCPU", 16, 6 },
1288 		{ "DefaultQueue", 0, 16 },
1289 	{ "TP_RSS_SECRET_KEY0", 0x400, 0 },
1290 	{ "TP_RSS_SECRET_KEY1", 0x404, 0 },
1291 	{ "TP_RSS_SECRET_KEY2", 0x408, 0 },
1292 	{ "TP_RSS_SECRET_KEY3", 0x40c, 0 },
1293 	{ "TP_TM_PIO_ADDR", 0x418, 0 },
1294 	{ "TP_TM_PIO_DATA", 0x41c, 0 },
1295 	{ "TP_TX_MOD_QUE_TABLE", 0x420, 0 },
1296 	{ "TP_TX_RESOURCE_LIMIT", 0x424, 0 },
1297 		{ "TX_RESOURCE_LIMIT_CH1_PC", 24, 8 },
1298 		{ "TX_RESOURCE_LIMIT_CH1_NON_PC", 16, 8 },
1299 		{ "TX_RESOURCE_LIMIT_CH0_PC", 8, 8 },
1300 		{ "TX_RESOURCE_LIMIT_CH0_NON_PC", 0, 8 },
1301 	{ "TP_TX_MOD_QUEUE_REQ_MAP", 0x428, 0 },
1302 		{ "RX_MOD_WEIGHT", 24, 8 },
1303 		{ "TX_MOD_WEIGHT", 16, 8 },
1304 		{ "TX_MOD_TIMER_MODE", 8, 8 },
1305 		{ "TX_MOD_QUEUE_REQ_MAP", 0, 8 },
1306 	{ "TP_TX_MOD_QUEUE_WEIGHT1", 0x42c, 0 },
1307 		{ "TP_TX_MOD_QUEUE_WEIGHT7", 24, 8 },
1308 		{ "TP_TX_MOD_QUEUE_WEIGHT6", 16, 8 },
1309 		{ "TP_TX_MOD_QUEUE_WEIGHT5", 8, 8 },
1310 		{ "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 },
1311 	{ "TP_TX_MOD_QUEUE_WEIGHT0", 0x430, 0 },
1312 		{ "TP_TX_MOD_QUEUE_WEIGHT3", 24, 8 },
1313 		{ "TP_TX_MOD_QUEUE_WEIGHT2", 16, 8 },
1314 		{ "TP_TX_MOD_QUEUE_WEIGHT1", 8, 8 },
1315 		{ "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 },
1316 	{ "TP_MOD_CHANNEL_WEIGHT", 0x434, 0 },
1317 		{ "RX_MOD_CHANNEL_WEIGHT1", 24, 8 },
1318 		{ "RX_MOD_CHANNEL_WEIGHT0", 16, 8 },
1319 		{ "TX_MOD_CHANNEL_WEIGHT1", 8, 8 },
1320 		{ "TX_MOD_CHANNEL_WEIGHT0", 0, 8 },
1321 	{ "TP_MOD_RATE_LIMIT", 0x438, 0 },
1322 		{ "RX_MOD_RATE_LIMIT_INC", 24, 8 },
1323 		{ "RX_MOD_RATE_LIMIT_TICK", 16, 8 },
1324 		{ "TX_MOD_RATE_LIMIT_INC", 8, 8 },
1325 		{ "TX_MOD_RATE_LIMIT_TICK", 0, 8 },
1326 	{ "TP_PIO_ADDR", 0x440, 0 },
1327 	{ "TP_PIO_DATA", 0x444, 0 },
1328 	{ "TP_RESET", 0x44c, 0 },
1329 		{ "FlstInitEnable", 1, 1 },
1330 		{ "TPReset", 0, 1 },
1331 	{ "TP_MIB_INDEX", 0x450, 0 },
1332 	{ "TP_MIB_RDATA", 0x454, 0 },
1333 	{ "TP_SYNC_TIME_HI", 0x458, 0 },
1334 	{ "TP_SYNC_TIME_LO", 0x45c, 0 },
1335 	{ "TP_CMM_MM_RX_FLST_BASE", 0x460, 0 },
1336 		{ "CMRxFlstBase", 0, 28 },
1337 	{ "TP_CMM_MM_TX_FLST_BASE", 0x464, 0 },
1338 		{ "CMTxFlstBase", 0, 28 },
1339 	{ "TP_CMM_MM_PS_FLST_BASE", 0x468, 0 },
1340 		{ "CMPsFlstBase", 0, 28 },
1341 	{ "TP_CMM_MM_MAX_PSTRUCT", 0x46c, 0 },
1342 		{ "CMMaxPstruct", 0, 21 },
1343 	{ "TP_INT_ENABLE", 0x470, 0 },
1344 	{ "TP_INT_CAUSE", 0x474, 0 },
1345 	{ "TP_FLM_FREE_PS_CNT", 0x480, 0 },
1346 		{ "FreePstructCount", 0, 21 },
1347 	{ "TP_FLM_FREE_RX_CNT", 0x484, 0 },
1348 		{ "FreeRxPageCount", 0, 21 },
1349 	{ "TP_FLM_FREE_TX_CNT", 0x488, 0 },
1350 		{ "FreeTxPageCount", 0, 21 },
1351 	{ "TP_TM_HEAP_PUSH_CNT", 0x48c, 0 },
1352 	{ "TP_TM_HEAP_POP_CNT", 0x490, 0 },
1353 	{ "TP_TM_DACK_PUSH_CNT", 0x494, 0 },
1354 	{ "TP_TM_DACK_POP_CNT", 0x498, 0 },
1355 	{ "TP_TM_MOD_PUSH_CNT", 0x49c, 0 },
1356 	{ "TP_MOD_POP_CNT", 0x4a0, 0 },
1357 	{ "TP_TIMER_SEPARATOR", 0x4a4, 0 },
1358 	{ "TP_DEBUG_SEL", 0x4a8, 0 },
1359 	{ "TP_DEBUG_FLAGS", 0x4ac, 0 },
1360 		{ "RXDebugFlags", 16, 16 },
1361 		{ "TXDebugFlags", 0, 16 },
1362 	{ "TP_CM_FLOW_CNTL_MODE", 0x4b0, 0 },
1363 		{ "CMFlowCacheDisable", 0, 1 },
1364 	{ "TP_PC_CONGESTION_CNTL", 0x4b4, 0 },
1365 		{ "EDropTunnel", 19, 1 },
1366 		{ "CDropTunnel", 18, 1 },
1367 		{ "EThreshold", 12, 6 },
1368 		{ "CThreshold", 6, 6 },
1369 		{ "TxThreshold", 0, 6 },
1370 	{ "TP_TX_DROP_COUNT", 0x4bc, 0 },
1371 	{ "TP_CLEAR_DEBUG", 0x4c0, 0 },
1372 		{ "ClrDebug", 0, 1 },
1373 	{ "TP_DEBUG_VEC", 0x4c4, 0 },
1374 	{ "TP_DEBUG_VEC2", 0x4c8, 0 },
1375 	{ "TP_DEBUG_REG_SEL", 0x4cc, 0 },
1376 	{ "TP_DEBUG", 0x4d0, 0 },
1377 	{ "TP_DBG_LA_CONFIG", 0x4d4, 0 },
1378 	{ "TP_DBG_LA_DATAH", 0x4d8, 0 },
1379 	{ "TP_DBG_LA_DATAL", 0x4dc, 0 },
1380 	{ "TP_EMBED_OP_FIELD0", 0x4e8, 0 },
1381 	{ "TP_EMBED_OP_FIELD1", 0x4ec, 0 },
1382 	{ "TP_EMBED_OP_FIELD2", 0x4f0, 0 },
1383 	{ "TP_EMBED_OP_FIELD3", 0x4f4, 0 },
1384 	{ "TP_EMBED_OP_FIELD4", 0x4f8, 0 },
1385 	{ "TP_EMBED_OP_FIELD5", 0x4fc, 0 },
1386 	{ NULL, 0, 0 }
1387 };
1388 
1389 struct reg_info ulp2_rx_regs[] = {
1390 	{ "ULPRX_CTL", 0x500, 0 },
1391 		{ "PCMD1Threshold", 24, 8 },
1392 		{ "PCMD0Threshold", 16, 8 },
1393 		{ "round_robin", 4, 1 },
1394 		{ "RDMA_permissive_mode", 3, 1 },
1395 		{ "PagePodME", 2, 1 },
1396 		{ "IscsiTagTcb", 1, 1 },
1397 		{ "TddpTagTcb", 0, 1 },
1398 	{ "ULPRX_INT_ENABLE", 0x504, 0 },
1399 		{ "ParErr", 0, 1 },
1400 	{ "ULPRX_INT_CAUSE", 0x508, 0 },
1401 		{ "ParErr", 0, 1 },
1402 	{ "ULPRX_ISCSI_LLIMIT", 0x50c, 0 },
1403 		{ "IscsiLlimit", 6, 26 },
1404 	{ "ULPRX_ISCSI_ULIMIT", 0x510, 0 },
1405 		{ "IscsiUlimit", 6, 26 },
1406 	{ "ULPRX_ISCSI_TAGMASK", 0x514, 0 },
1407 		{ "IscsiTagMask", 6, 26 },
1408 	{ "ULPRX_ISCSI_PSZ", 0x518, 0 },
1409 		{ "Hpz3", 24, 4 },
1410 		{ "Hpz2", 16, 4 },
1411 		{ "Hpz1", 8, 4 },
1412 		{ "Hpz0", 0, 4 },
1413 	{ "ULPRX_TDDP_LLIMIT", 0x51c, 0 },
1414 		{ "TddpLlimit", 6, 26 },
1415 	{ "ULPRX_TDDP_ULIMIT", 0x520, 0 },
1416 		{ "TddpUlimit", 6, 26 },
1417 	{ "ULPRX_TDDP_TAGMASK", 0x524, 0 },
1418 		{ "TddpTagMask", 6, 26 },
1419 	{ "ULPRX_TDDP_PSZ", 0x528, 0 },
1420 		{ "Hpz3", 24, 4 },
1421 		{ "Hpz2", 16, 4 },
1422 		{ "Hpz1", 8, 4 },
1423 		{ "Hpz0", 0, 4 },
1424 	{ "ULPRX_STAG_LLIMIT", 0x52c, 0 },
1425 	{ "ULPRX_STAG_ULIMIT", 0x530, 0 },
1426 	{ "ULPRX_RQ_LLIMIT", 0x534, 0 },
1427 	{ "ULPRX_RQ_ULIMIT", 0x538, 0 },
1428 	{ "ULPRX_PBL_LLIMIT", 0x53c, 0 },
1429 	{ "ULPRX_PBL_ULIMIT", 0x540, 0 },
1430 	{ NULL, 0, 0 }
1431 };
1432 
1433 struct reg_info ulp2_tx_regs[] = {
1434 	{ "ULPTX_CONFIG", 0x580, 0 },
1435 		{ "CFG_RR_ARB", 0, 1 },
1436 	{ "ULPTX_INT_ENABLE", 0x584, 0 },
1437 		{ "Pbl_bound_err_ch1", 1, 1 },
1438 		{ "Pbl_bound_err_ch0", 0, 1 },
1439 	{ "ULPTX_INT_CAUSE", 0x588, 0 },
1440 		{ "Pbl_bound_err_ch1", 1, 1 },
1441 		{ "Pbl_bound_err_ch0", 0, 1 },
1442 	{ "ULPTX_TPT_LLIMIT", 0x58c, 0 },
1443 	{ "ULPTX_TPT_ULIMIT", 0x590, 0 },
1444 	{ "ULPTX_PBL_LLIMIT", 0x594, 0 },
1445 	{ "ULPTX_PBL_ULIMIT", 0x598, 0 },
1446 	{ "ULPTX_CPL_ERR_OFFSET", 0x59c, 0 },
1447 	{ "ULPTX_CPL_ERR_MASK", 0x5a0, 0 },
1448 	{ "ULPTX_CPL_ERR_VALUE", 0x5a4, 0 },
1449 	{ "ULPTX_CPL_PACK_SIZE", 0x5a8, 0 },
1450 		{ "value", 24, 8 },
1451 		{ "Ch1Size2", 24, 8 },
1452 		{ "Ch1Size1", 16, 8 },
1453 		{ "Ch0Size2", 8, 8 },
1454 		{ "Ch0Size1", 0, 8 },
1455 	{ "ULPTX_DMA_WEIGHT", 0x5ac, 0 },
1456 		{ "D1_WEIGHT", 16, 16 },
1457 		{ "D0_WEIGHT", 0, 16 },
1458 	{ NULL, 0, 0 }
1459 };
1460 
1461 struct reg_info pm1_rx_regs[] = {
1462 	{ "PM1_RX_CFG", 0x5c0, 0 },
1463 	{ "PM1_RX_MODE", 0x5c4, 0 },
1464 		{ "stat_channel", 1, 1 },
1465 		{ "priority_ch", 0, 1 },
1466 	{ "PM1_RX_STAT_CONFIG", 0x5c8, 0 },
1467 	{ "PM1_RX_STAT_COUNT", 0x5cc, 0 },
1468 	{ "PM1_RX_STAT_MSB", 0x5d0, 0 },
1469 	{ "PM1_RX_STAT_LSB", 0x5d4, 0 },
1470 	{ "PM1_RX_INT_ENABLE", 0x5d8, 0 },
1471 		{ "zero_e_cmd_error", 18, 1 },
1472 		{ "iespi0_fifo2x_Rx_framing_error", 17, 1 },
1473 		{ "iespi1_fifo2x_Rx_framing_error", 16, 1 },
1474 		{ "iespi0_Rx_framing_error", 15, 1 },
1475 		{ "iespi1_Rx_framing_error", 14, 1 },
1476 		{ "iespi0_Tx_framing_error", 13, 1 },
1477 		{ "iespi1_Tx_framing_error", 12, 1 },
1478 		{ "ocspi0_Rx_framing_error", 11, 1 },
1479 		{ "ocspi1_Rx_framing_error", 10, 1 },
1480 		{ "ocspi0_Tx_framing_error", 9, 1 },
1481 		{ "ocspi1_Tx_framing_error", 8, 1 },
1482 		{ "ocspi0_ofifo2x_Tx_framing_error", 7, 1 },
1483 		{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
1484 		{ "iespi_par_error", 3, 3 },
1485 		{ "ocspi_par_error", 0, 3 },
1486 	{ "PM1_RX_INT_CAUSE", 0x5dc, 0 },
1487 		{ "zero_e_cmd_error", 18, 1 },
1488 		{ "iespi0_fifo2x_Rx_framing_error", 17, 1 },
1489 		{ "iespi1_fifo2x_Rx_framing_error", 16, 1 },
1490 		{ "iespi0_Rx_framing_error", 15, 1 },
1491 		{ "iespi1_Rx_framing_error", 14, 1 },
1492 		{ "iespi0_Tx_framing_error", 13, 1 },
1493 		{ "iespi1_Tx_framing_error", 12, 1 },
1494 		{ "ocspi0_Rx_framing_error", 11, 1 },
1495 		{ "ocspi1_Rx_framing_error", 10, 1 },
1496 		{ "ocspi0_Tx_framing_error", 9, 1 },
1497 		{ "ocspi1_Tx_framing_error", 8, 1 },
1498 		{ "ocspi0_ofifo2x_Tx_framing_error", 7, 1 },
1499 		{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
1500 		{ "iespi_par_error", 3, 3 },
1501 		{ "ocspi_par_error", 0, 3 },
1502 	{ NULL, 0, 0 }
1503 };
1504 
1505 struct reg_info pm1_tx_regs[] = {
1506 	{ "PM1_TX_CFG", 0x5e0, 0 },
1507 	{ "PM1_TX_MODE", 0x5e4, 0 },
1508 		{ "stat_channel", 1, 1 },
1509 		{ "priority_ch", 0, 1 },
1510 	{ "PM1_TX_STAT_CONFIG", 0x5e8, 0 },
1511 	{ "PM1_TX_STAT_COUNT", 0x5ec, 0 },
1512 	{ "PM1_TX_STAT_MSB", 0x5f0, 0 },
1513 	{ "PM1_TX_STAT_LSB", 0x5f4, 0 },
1514 	{ "PM1_TX_INT_ENABLE", 0x5f8, 0 },
1515 		{ "zero_c_cmd_error", 18, 1 },
1516 		{ "icspi0_fifo2x_Rx_framing_error", 17, 1 },
1517 		{ "icspi1_fifo2x_Rx_framing_error", 16, 1 },
1518 		{ "icspi0_Rx_framing_error", 15, 1 },
1519 		{ "icspi1_Rx_framing_error", 14, 1 },
1520 		{ "icspi0_Tx_framing_error", 13, 1 },
1521 		{ "icspi1_Tx_framing_error", 12, 1 },
1522 		{ "oespi0_Rx_framing_error", 11, 1 },
1523 		{ "oespi1_Rx_framing_error", 10, 1 },
1524 		{ "oespi0_Tx_framing_error", 9, 1 },
1525 		{ "oespi1_Tx_framing_error", 8, 1 },
1526 		{ "oespi0_ofifo2x_Tx_framing_error", 7, 1 },
1527 		{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
1528 		{ "icspi_par_error", 3, 3 },
1529 		{ "oespi_par_error", 0, 3 },
1530 	{ "PM1_TX_INT_CAUSE", 0x5fc, 0 },
1531 		{ "zero_c_cmd_error", 18, 1 },
1532 		{ "icspi0_fifo2x_Rx_framing_error", 17, 1 },
1533 		{ "icspi1_fifo2x_Rx_framing_error", 16, 1 },
1534 		{ "icspi0_Rx_framing_error", 15, 1 },
1535 		{ "icspi1_Rx_framing_error", 14, 1 },
1536 		{ "icspi0_Tx_framing_error", 13, 1 },
1537 		{ "icspi1_Tx_framing_error", 12, 1 },
1538 		{ "oespi0_Rx_framing_error", 11, 1 },
1539 		{ "oespi1_Rx_framing_error", 10, 1 },
1540 		{ "oespi0_Tx_framing_error", 9, 1 },
1541 		{ "oespi1_Tx_framing_error", 8, 1 },
1542 		{ "oespi0_ofifo2x_Tx_framing_error", 7, 1 },
1543 		{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
1544 		{ "icspi_par_error", 3, 3 },
1545 		{ "oespi_par_error", 0, 3 },
1546 	{ NULL, 0, 0 }
1547 };
1548 
1549 struct reg_info mps0_regs[] = {
1550 	{ "MPS_CFG", 0x600, 0 },
1551 		{ "SGETPQid", 8, 3 },
1552 		{ "TPRxPortSize", 7, 1 },
1553 		{ "TPTxPort1Size", 6, 1 },
1554 		{ "TPTxPort0Size", 5, 1 },
1555 		{ "TPRxPortEn", 4, 1 },
1556 		{ "TPTxPort1En", 3, 1 },
1557 		{ "TPTxPort0En", 2, 1 },
1558 		{ "Port1Active", 1, 1 },
1559 		{ "Port0Active", 0, 1 },
1560 	{ "MPS_DRR_CFG1", 0x604, 0 },
1561 		{ "RldWtTPD1", 11, 11 },
1562 		{ "RldWtTPD0", 0, 11 },
1563 	{ "MPS_DRR_CFG2", 0x608, 0 },
1564 		{ "RldWtTotal", 0, 12 },
1565 	{ "MPS_MCA_STATUS", 0x60c, 0 },
1566 		{ "MCAPktCnt", 12, 20 },
1567 		{ "MCADepth", 0, 12 },
1568 	{ "MPS_TX0_TP_CNT", 0x610, 0 },
1569 		{ "TX0TPDisCnt", 24, 8 },
1570 		{ "TX0TPCnt", 0, 24 },
1571 	{ "MPS_TX1_TP_CNT", 0x614, 0 },
1572 		{ "TX1TPDisCnt", 24, 8 },
1573 		{ "TX1TPCnt", 0, 24 },
1574 	{ "MPS_RX_TP_CNT", 0x618, 0 },
1575 		{ "RXTPDisCnt", 24, 8 },
1576 		{ "RXTPCnt", 0, 24 },
1577 	{ "MPS_INT_ENABLE", 0x61c, 0 },
1578 		{ "MCAParErrEnb", 6, 3 },
1579 		{ "RXTpParErrEnb", 4, 2 },
1580 		{ "TX1TpParErrEnb", 2, 2 },
1581 		{ "TX0TpParErrEnb", 0, 2 },
1582 	{ "MPS_INT_CAUSE", 0x620, 0 },
1583 		{ "MCAParErr", 6, 3 },
1584 		{ "RXTpParErr", 4, 2 },
1585 		{ "TX1TpParErr", 2, 2 },
1586 		{ "TX0TpParErr", 0, 2 },
1587 	{ NULL, 0, 0 }
1588 };
1589 
1590 struct reg_info cpl_switch_regs[] = {
1591 	{ "CPL_SWITCH_CNTRL", 0x640, 0 },
1592 		{ "cpl_pkt_tid", 8, 24 },
1593 		{ "cpu_no_3F_CIM_enable", 3, 1 },
1594 		{ "switch_table_enable", 2, 1 },
1595 		{ "sge_enable", 1, 1 },
1596 		{ "cim_enable", 0, 1 },
1597 	{ "CPL_SWITCH_TBL_IDX", 0x644, 0 },
1598 		{ "switch_tbl_idx", 0, 4 },
1599 	{ "CPL_SWITCH_TBL_DATA", 0x648, 0 },
1600 	{ "CPL_SWITCH_ZERO_ERROR", 0x64c, 0 },
1601 		{ "zero_cmd", 0, 8 },
1602 	{ "CPL_INTR_ENABLE", 0x650, 0 },
1603 		{ "cim_ovfl_error", 4, 1 },
1604 		{ "tp_framing_error", 3, 1 },
1605 		{ "sge_framing_error", 2, 1 },
1606 		{ "cim_framing_error", 1, 1 },
1607 		{ "zero_switch_error", 0, 1 },
1608 	{ "CPL_INTR_CAUSE", 0x654, 0 },
1609 		{ "cim_ovfl_error", 4, 1 },
1610 		{ "tp_framing_error", 3, 1 },
1611 		{ "sge_framing_error", 2, 1 },
1612 		{ "cim_framing_error", 1, 1 },
1613 		{ "zero_switch_error", 0, 1 },
1614 	{ "CPL_MAP_TBL_IDX", 0x658, 0 },
1615 		{ "cpl_map_tbl_idx", 0, 8 },
1616 	{ "CPL_MAP_TBL_DATA", 0x65c, 0 },
1617 		{ "cpl_map_tbl_data", 0, 8 },
1618 	{ NULL, 0, 0 }
1619 };
1620 
1621 struct reg_info smb0_regs[] = {
1622 	{ "SMB_GLOBAL_TIME_CFG", 0x660, 0 },
1623 		{ "LADbgWrPtr", 24, 8 },
1624 		{ "LADbgRdPtr", 16, 8 },
1625 		{ "LADbgEn", 13, 1 },
1626 		{ "MacroCntCfg", 8, 5 },
1627 		{ "MicroCntCfg", 0, 8 },
1628 	{ "SMB_MST_TIMEOUT_CFG", 0x664, 0 },
1629 		{ "DebugSelH", 28, 4 },
1630 		{ "DebugSelL", 24, 4 },
1631 		{ "MstTimeOutCfg", 0, 24 },
1632 	{ "SMB_MST_CTL_CFG", 0x668, 0 },
1633 		{ "MstFifoDbg", 31, 1 },
1634 		{ "MstFifoDbgClr", 30, 1 },
1635 		{ "MstRxByteCfg", 12, 6 },
1636 		{ "MstTxByteCfg", 6, 6 },
1637 		{ "MstReset", 1, 1 },
1638 		{ "MstCtlEn", 0, 1 },
1639 	{ "SMB_MST_CTL_STS", 0x66c, 0 },
1640 		{ "MstRxByteCnt", 12, 6 },
1641 		{ "MstTxByteCnt", 6, 6 },
1642 		{ "MstBusySts", 0, 1 },
1643 	{ "SMB_MST_TX_FIFO_RDWR", 0x670, 0 },
1644 	{ "SMB_MST_RX_FIFO_RDWR", 0x674, 0 },
1645 	{ "SMB_SLV_TIMEOUT_CFG", 0x678, 0 },
1646 		{ "SlvTimeOutCfg", 0, 24 },
1647 	{ "SMB_SLV_CTL_CFG", 0x67c, 0 },
1648 		{ "SlvFifoDbg", 31, 1 },
1649 		{ "SlvFifoDbgClr", 30, 1 },
1650 		{ "SlvAddrCfg", 4, 7 },
1651 		{ "SlvAlrtSet", 2, 1 },
1652 		{ "SlvReset", 1, 1 },
1653 		{ "SlvCtlEn", 0, 1 },
1654 	{ "SMB_SLV_CTL_STS", 0x680, 0 },
1655 		{ "SlvFifoTxCnt", 12, 6 },
1656 		{ "SlvFifoCnt", 6, 6 },
1657 		{ "SlvAlrtSts", 2, 1 },
1658 		{ "SlvBusySts", 0, 1 },
1659 	{ "SMB_SLV_FIFO_RDWR", 0x684, 0 },
1660 	{ "SMB_SLV_CMD_FIFO_RDWR", 0x688, 0 },
1661 	{ "SMB_INT_ENABLE", 0x68c, 0 },
1662 		{ "SlvTimeOutIntEn", 7, 1 },
1663 		{ "SlvErrIntEn", 6, 1 },
1664 		{ "SlvDoneIntEn", 5, 1 },
1665 		{ "SlvRxRdyIntEn", 4, 1 },
1666 		{ "MstTimeOutIntEn", 3, 1 },
1667 		{ "MstNAckIntEn", 2, 1 },
1668 		{ "MstLostArbIntEn", 1, 1 },
1669 		{ "MstDoneIntEn", 0, 1 },
1670 	{ "SMB_INT_CAUSE", 0x690, 0 },
1671 		{ "SlvTimeOutInt", 7, 1 },
1672 		{ "SlvErrInt", 6, 1 },
1673 		{ "SlvDoneInt", 5, 1 },
1674 		{ "SlvRxRdyInt", 4, 1 },
1675 		{ "MstTimeOutInt", 3, 1 },
1676 		{ "MstNAckInt", 2, 1 },
1677 		{ "MstLostArbInt", 1, 1 },
1678 		{ "MstDoneInt", 0, 1 },
1679 	{ "SMB_DEBUG_DATA", 0x694, 0 },
1680 		{ "DebugDataH", 16, 16 },
1681 		{ "DebugDataL", 0, 16 },
1682 	{ "SMB_DEBUG_LA", 0x69c, 0 },
1683 		{ "DebugLAReqAddr", 0, 10 },
1684 	{ NULL, 0, 0 }
1685 };
1686 
1687 struct reg_info i2cm0_regs[] = {
1688 	{ "I2C_CFG", 0x6a0, 0 },
1689 		{ "ClkDiv", 0, 12 },
1690 	{ "I2C_DATA", 0x6a4, 0 },
1691 		{ "Data", 0, 8 },
1692 	{ "I2C_OP", 0x6a8, 0 },
1693 		{ "Busy", 31, 1 },
1694 		{ "Ack", 30, 1 },
1695 		{ "Cont", 1, 1 },
1696 		{ "Op", 0, 1 },
1697 	{ NULL, 0, 0 }
1698 };
1699 
1700 struct reg_info mi1_regs[] = {
1701 	{ "MI1_CFG", 0x6b0, 0 },
1702 		{ "ClkDiv", 5, 8 },
1703 		{ "St", 3, 2 },
1704 		{ "PreEn", 2, 1 },
1705 		{ "MDIInv", 1, 1 },
1706 		{ "MDIEn", 0, 1 },
1707 	{ "MI1_ADDR", 0x6b4, 0 },
1708 		{ "PhyAddr", 5, 5 },
1709 		{ "RegAddr", 0, 5 },
1710 	{ "MI1_DATA", 0x6b8, 0 },
1711 		{ "Data", 0, 16 },
1712 	{ "MI1_OP", 0x6bc, 0 },
1713 		{ "Busy", 31, 1 },
1714 		{ "Inc", 2, 1 },
1715 		{ "Op", 0, 2 },
1716 	{ NULL, 0, 0 }
1717 };
1718 
1719 struct reg_info jm1_regs[] = {
1720 	{ "JM_CFG", 0x6c0, 0 },
1721 		{ "ClkDiv", 2, 8 },
1722 		{ "TRst", 1, 1 },
1723 		{ "En", 0, 1 },
1724 	{ "JM_MODE", 0x6c4, 0 },
1725 	{ "JM_DATA", 0x6c8, 0 },
1726 	{ "JM_OP", 0x6cc, 0 },
1727 		{ "Busy", 31, 1 },
1728 		{ "Cnt", 0, 5 },
1729 	{ NULL, 0, 0 }
1730 };
1731 
1732 struct reg_info sf1_regs[] = {
1733 	{ "SF_DATA", 0x6d8, 0 },
1734 	{ "SF_OP", 0x6dc, 0 },
1735 		{ "Busy", 31, 1 },
1736 		{ "Cont", 3, 1 },
1737 		{ "ByteCnt", 1, 2 },
1738 		{ "Op", 0, 1 },
1739 	{ NULL, 0, 0 }
1740 };
1741 
1742 struct reg_info pl3_regs[] = {
1743 	{ "PL_INT_ENABLE0", 0x6e0, 0 },
1744 		{ "EXT", 24, 1 },
1745 		{ "T3DBG", 23, 1 },
1746 		{ "XGMAC0_1", 20, 1 },
1747 		{ "XGMAC0_0", 19, 1 },
1748 		{ "MC5A", 18, 1 },
1749 		{ "SF1", 17, 1 },
1750 		{ "SMB0", 15, 1 },
1751 		{ "I2CM0", 14, 1 },
1752 		{ "MI1", 13, 1 },
1753 		{ "CPL_SWITCH", 12, 1 },
1754 		{ "MPS0", 11, 1 },
1755 		{ "PM1_TX", 10, 1 },
1756 		{ "PM1_RX", 9, 1 },
1757 		{ "ULP2_TX", 8, 1 },
1758 		{ "ULP2_RX", 7, 1 },
1759 		{ "TP1", 6, 1 },
1760 		{ "CIM", 5, 1 },
1761 		{ "MC7_CM", 4, 1 },
1762 		{ "MC7_PMTX", 3, 1 },
1763 		{ "MC7_PMRX", 2, 1 },
1764 		{ "PCIM0", 1, 1 },
1765 		{ "SGE3", 0, 1 },
1766 	{ "PL_INT_CAUSE0", 0x6e4, 0 },
1767 		{ "EXT", 24, 1 },
1768 		{ "T3DBG", 23, 1 },
1769 		{ "XGMAC0_1", 20, 1 },
1770 		{ "XGMAC0_0", 19, 1 },
1771 		{ "MC5A", 18, 1 },
1772 		{ "SF1", 17, 1 },
1773 		{ "SMB0", 15, 1 },
1774 		{ "I2CM0", 14, 1 },
1775 		{ "MI1", 13, 1 },
1776 		{ "CPL_SWITCH", 12, 1 },
1777 		{ "MPS0", 11, 1 },
1778 		{ "PM1_TX", 10, 1 },
1779 		{ "PM1_RX", 9, 1 },
1780 		{ "ULP2_TX", 8, 1 },
1781 		{ "ULP2_RX", 7, 1 },
1782 		{ "TP1", 6, 1 },
1783 		{ "CIM", 5, 1 },
1784 		{ "MC7_CM", 4, 1 },
1785 		{ "MC7_PMTX", 3, 1 },
1786 		{ "MC7_PMRX", 2, 1 },
1787 		{ "PCIM0", 1, 1 },
1788 		{ "SGE3", 0, 1 },
1789 	{ "PL_INT_ENABLE1", 0x6e8, 0 },
1790 		{ "EXT", 24, 1 },
1791 		{ "T3DBG", 23, 1 },
1792 		{ "XGMAC0_1", 20, 1 },
1793 		{ "XGMAC0_0", 19, 1 },
1794 		{ "MC5A", 18, 1 },
1795 		{ "SF1", 17, 1 },
1796 		{ "SMB0", 15, 1 },
1797 		{ "I2CM0", 14, 1 },
1798 		{ "MI1", 13, 1 },
1799 		{ "CPL_SWITCH", 12, 1 },
1800 		{ "MPS0", 11, 1 },
1801 		{ "PM1_TX", 10, 1 },
1802 		{ "PM1_RX", 9, 1 },
1803 		{ "ULP2_TX", 8, 1 },
1804 		{ "ULP2_RX", 7, 1 },
1805 		{ "TP1", 6, 1 },
1806 		{ "CIM", 5, 1 },
1807 		{ "MC7_CM", 4, 1 },
1808 		{ "MC7_PMTX", 3, 1 },
1809 		{ "MC7_PMRX", 2, 1 },
1810 		{ "PCIM0", 1, 1 },
1811 		{ "SGE3", 0, 1 },
1812 	{ "PL_INT_CAUSE1", 0x6ec, 0 },
1813 		{ "EXT", 24, 1 },
1814 		{ "T3DBG", 23, 1 },
1815 		{ "XGMAC0_1", 20, 1 },
1816 		{ "XGMAC0_0", 19, 1 },
1817 		{ "MC5A", 18, 1 },
1818 		{ "SF1", 17, 1 },
1819 		{ "SMB0", 15, 1 },
1820 		{ "I2CM0", 14, 1 },
1821 		{ "MI1", 13, 1 },
1822 		{ "CPL_SWITCH", 12, 1 },
1823 		{ "MPS0", 11, 1 },
1824 		{ "PM1_TX", 10, 1 },
1825 		{ "PM1_RX", 9, 1 },
1826 		{ "ULP2_TX", 8, 1 },
1827 		{ "ULP2_RX", 7, 1 },
1828 		{ "TP1", 6, 1 },
1829 		{ "CIM", 5, 1 },
1830 		{ "MC7_CM", 4, 1 },
1831 		{ "MC7_PMTX", 3, 1 },
1832 		{ "MC7_PMRX", 2, 1 },
1833 		{ "PCIM0", 1, 1 },
1834 		{ "SGE3", 0, 1 },
1835 	{ "PL_RST", 0x6f0, 0 },
1836 		{ "CRstWrm", 1, 1 },
1837 		{ "CRstWrmMode", 0, 1 },
1838 	{ "PL_REV", 0x6f4, 0 },
1839 		{ "Rev", 0, 4 },
1840 	{ "PL_CLI", 0x6f8, 0 },
1841 	{ NULL, 0, 0 }
1842 };
1843 
1844 struct reg_info mc5a_regs[] = {
1845 	{ "MC5_BUF_CONFIG", 0x700, 0 },
1846 		{ "term300_240", 31, 1 },
1847 		{ "term150", 30, 1 },
1848 		{ "term60", 29, 1 },
1849 		{ "gddriii", 28, 1 },
1850 		{ "gddrii", 27, 1 },
1851 		{ "gddri", 26, 1 },
1852 		{ "read", 25, 1 },
1853 		{ "cal_imp_upd", 23, 1 },
1854 		{ "cal_busy", 22, 1 },
1855 		{ "cal_error", 21, 1 },
1856 		{ "sgl_cal_en", 20, 1 },
1857 		{ "imp_upd_mode", 19, 1 },
1858 		{ "imp_sel", 18, 1 },
1859 		{ "man_pu", 15, 3 },
1860 		{ "man_pd", 12, 3 },
1861 		{ "cal_pu", 9, 3 },
1862 		{ "cal_pd", 6, 3 },
1863 		{ "set_pu", 3, 3 },
1864 		{ "set_pd", 0, 3 },
1865 	{ "MC5_DB_CONFIG", 0x704, 0 },
1866 		{ "TMCfgWrLock", 31, 1 },
1867 		{ "TMTypeHi", 30, 1 },
1868 		{ "TMPartSize", 28, 2 },
1869 		{ "TMType", 26, 2 },
1870 		{ "TMPartCount", 24, 2 },
1871 		{ "nLIP", 18, 6 },
1872 		{ "COMPEN", 17, 1 },
1873 		{ "BUILD", 16, 1 },
1874 		{ "TM_IO_PDOWN", 9, 1 },
1875 		{ "SYNMode", 7, 2 },
1876 		{ "PRTYEN", 6, 1 },
1877 		{ "MBUSEN", 5, 1 },
1878 		{ "DBGIEN", 4, 1 },
1879 		{ "TMRDY", 2, 1 },
1880 		{ "TMRST", 1, 1 },
1881 		{ "TMMode", 0, 1 },
1882 	{ "MC5_DB_ROUTING_TABLE_INDEX", 0x70c, 0 },
1883 		{ "RTINDX", 0, 22 },
1884 	{ "MC5_DB_SERVER_INDEX", 0x714, 0 },
1885 		{ "SRINDX", 0, 22 },
1886 	{ "MC5_DB_LIP_RAM_ADDR", 0x718, 0 },
1887 		{ "RAMWR", 8, 1 },
1888 		{ "RAMADDR", 0, 6 },
1889 	{ "MC5_DB_LIP_RAM_DATA", 0x71c, 0 },
1890 	{ "MC5_DB_RSP_LATENCY", 0x720, 0 },
1891 		{ "RDLAT", 16, 5 },
1892 		{ "LRNLAT", 8, 5 },
1893 		{ "SRCHLAT", 0, 5 },
1894 	{ "MC5_DB_PARITY_LATENCY", 0x724, 0 },
1895 		{ "PARLAT", 0, 4 },
1896 	{ "MC5_DB_WR_LRN_VERIFY", 0x728, 0 },
1897 		{ "VWVEREN", 2, 1 },
1898 		{ "LRNVEREN", 1, 1 },
1899 		{ "POVEREN", 0, 1 },
1900 	{ "MC5_DB_PART_ID_INDEX", 0x72c, 0 },
1901 		{ "IDINDEX", 0, 4 },
1902 	{ "MC5_DB_RESET_MAX", 0x730, 0 },
1903 		{ "RSTMAX", 0, 4 },
1904 	{ "MC5_DB_ACT_CNT", 0x734, 0 },
1905 		{ "ACTCNT", 0, 20 },
1906 	{ "MC5_DB_INT_ENABLE", 0x740, 0 },
1907 		{ "MsgSel", 28, 4 },
1908 		{ "DelActEmpty", 18, 1 },
1909 		{ "DispQParErr", 17, 1 },
1910 		{ "ReqQParErr", 16, 1 },
1911 		{ "UnknownCmd", 15, 1 },
1912 		{ "SYNCookieOff", 11, 1 },
1913 		{ "SYNCookieBad", 10, 1 },
1914 		{ "SYNCookie", 9, 1 },
1915 		{ "NFASrchFail", 8, 1 },
1916 		{ "ActRgnFull", 7, 1 },
1917 		{ "ParityErr", 6, 1 },
1918 		{ "LIPMiss", 5, 1 },
1919 		{ "LIP0", 4, 1 },
1920 		{ "Miss", 3, 1 },
1921 		{ "RoutingHit", 2, 1 },
1922 		{ "ActiveHit", 1, 1 },
1923 		{ "ActiveOutHit", 0, 1 },
1924 	{ "MC5_DB_INT_CAUSE", 0x744, 0 },
1925 		{ "DelActEmpty", 18, 1 },
1926 		{ "DispQParErr", 17, 1 },
1927 		{ "ReqQParErr", 16, 1 },
1928 		{ "UnknownCmd", 15, 1 },
1929 		{ "SYNCookieOff", 11, 1 },
1930 		{ "SYNCookieBad", 10, 1 },
1931 		{ "SYNCookie", 9, 1 },
1932 		{ "NFASrchFail", 8, 1 },
1933 		{ "ActRgnFull", 7, 1 },
1934 		{ "ParityErr", 6, 1 },
1935 		{ "LIPMiss", 5, 1 },
1936 		{ "LIP0", 4, 1 },
1937 		{ "Miss", 3, 1 },
1938 		{ "RoutingHit", 2, 1 },
1939 		{ "ActiveHit", 1, 1 },
1940 		{ "ActiveOutHit", 0, 1 },
1941 	{ "MC5_DB_INT_TID", 0x748, 0 },
1942 		{ "INTTID", 0, 20 },
1943 	{ "MC5_DB_INT_PTID", 0x74c, 0 },
1944 		{ "INTPTID", 0, 20 },
1945 	{ "MC5_DB_DBGI_CONFIG", 0x774, 0 },
1946 		{ "WRReqSize", 22, 10 },
1947 		{ "SADRSel", 4, 1 },
1948 		{ "CMDMode", 0, 3 },
1949 	{ "MC5_DB_DBGI_REQ_CMD", 0x778, 0 },
1950 		{ "MBusCmd", 0, 4 },
1951 		{ "IDTCmdHi", 11, 3 },
1952 		{ "IDTCmdLo", 0, 4 },
1953 		{ "IDTCmd", 0, 20 },
1954 		{ "LCMDB", 16, 11 },
1955 		{ "LCMDA", 0, 11 },
1956 	{ "MC5_DB_DBGI_REQ_ADDR0", 0x77c, 0 },
1957 	{ "MC5_DB_DBGI_REQ_ADDR1", 0x780, 0 },
1958 	{ "MC5_DB_DBGI_REQ_ADDR2", 0x784, 0 },
1959 		{ "DBGIReqAdrHi", 0, 8 },
1960 	{ "MC5_DB_DBGI_REQ_DATA0", 0x788, 0 },
1961 	{ "MC5_DB_DBGI_REQ_DATA1", 0x78c, 0 },
1962 	{ "MC5_DB_DBGI_REQ_DATA2", 0x790, 0 },
1963 	{ "MC5_DB_DBGI_REQ_DATA3", 0x794, 0 },
1964 	{ "MC5_DB_DBGI_REQ_DATA4", 0x798, 0 },
1965 		{ "DBGIReqData4", 0, 16 },
1966 	{ "MC5_DB_DBGI_REQ_MASK0", 0x79c, 0 },
1967 	{ "MC5_DB_DBGI_REQ_MASK1", 0x7a0, 0 },
1968 	{ "MC5_DB_DBGI_REQ_MASK2", 0x7a4, 0 },
1969 	{ "MC5_DB_DBGI_REQ_MASK3", 0x7a8, 0 },
1970 	{ "MC5_DB_DBGI_REQ_MASK4", 0x7ac, 0 },
1971 		{ "DBGIReqMsk4", 0, 16 },
1972 	{ "MC5_DB_DBGI_RSP_STATUS", 0x7b0, 0 },
1973 		{ "DBGIRspMsg", 8, 4 },
1974 		{ "DBGIRspMsgVld", 2, 1 },
1975 		{ "DBGIRspHit", 1, 1 },
1976 		{ "DBGIRspValid", 0, 1 },
1977 	{ "MC5_DB_DBGI_RSP_DATA0", 0x7b4, 0 },
1978 	{ "MC5_DB_DBGI_RSP_DATA1", 0x7b8, 0 },
1979 	{ "MC5_DB_DBGI_RSP_DATA2", 0x7bc, 0 },
1980 	{ "MC5_DB_DBGI_RSP_DATA3", 0x7c0, 0 },
1981 	{ "MC5_DB_DBGI_RSP_DATA4", 0x7c4, 0 },
1982 		{ "DBGIRspData3", 0, 16 },
1983 	{ "MC5_DB_DBGI_RSP_LAST_CMD", 0x7c8, 0 },
1984 		{ "LastCmdB", 16, 11 },
1985 		{ "LastCmdA", 0, 11 },
1986 	{ "MC5_DB_POPEN_DATA_WR_CMD", 0x7cc, 0 },
1987 		{ "PO_DWR", 0, 20 },
1988 	{ "MC5_DB_POPEN_MASK_WR_CMD", 0x7d0, 0 },
1989 		{ "PO_MWR", 0, 20 },
1990 	{ "MC5_DB_AOPEN_SRCH_CMD", 0x7d4, 0 },
1991 		{ "AO_SRCH", 0, 20 },
1992 	{ "MC5_DB_AOPEN_LRN_CMD", 0x7d8, 0 },
1993 		{ "AO_LRN", 0, 20 },
1994 	{ "MC5_DB_SYN_SRCH_CMD", 0x7dc, 0 },
1995 		{ "SYN_SRCH", 0, 20 },
1996 	{ "MC5_DB_SYN_LRN_CMD", 0x7e0, 0 },
1997 		{ "SYN_LRN", 0, 20 },
1998 	{ "MC5_DB_ACK_SRCH_CMD", 0x7e4, 0 },
1999 		{ "ACK_SRCH", 0, 20 },
2000 	{ "MC5_DB_ACK_LRN_CMD", 0x7e8, 0 },
2001 		{ "ACK_LRN", 0, 20 },
2002 	{ "MC5_DB_ILOOKUP_CMD", 0x7ec, 0 },
2003 		{ "I_SRCH", 0, 20 },
2004 	{ "MC5_DB_ELOOKUP_CMD", 0x7f0, 0 },
2005 		{ "E_SRCH", 0, 20 },
2006 	{ "MC5_DB_DATA_WRITE_CMD", 0x7f4, 0 },
2007 		{ "Write", 0, 20 },
2008 	{ "MC5_DB_DATA_READ_CMD", 0x7f8, 0 },
2009 		{ "ReadCmd", 0, 20 },
2010 	{ "MC5_DB_MASK_WRITE_CMD", 0x7fc, 0 },
2011 		{ "MaskWr", 0, 16 },
2012 	{ NULL, 0, 0 }
2013 };
2014 
2015 struct reg_info xgmac0_0_regs[] = {
2016 	{ "XGM_TX_CTRL", 0x800, 0 },
2017 		{ "SendPause", 2, 1 },
2018 		{ "SendZeroPause", 1, 1 },
2019 		{ "TxEn", 0, 1 },
2020 	{ "XGM_TX_CFG", 0x804, 0 },
2021 		{ "CfgClkSpeed", 2, 3 },
2022 		{ "StretchMode", 1, 1 },
2023 		{ "TxPauseEn", 0, 1 },
2024 	{ "XGM_TX_PAUSE_QUANTA", 0x808, 0 },
2025 		{ "TxPauseQuanta", 0, 16 },
2026 	{ "XGM_RX_CTRL", 0x80c, 0 },
2027 		{ "RxEn", 0, 1 },
2028 	{ "XGM_RX_CFG", 0x810, 0 },
2029 		{ "Con802_3Preamble", 12, 1 },
2030 		{ "EnNon802_3Preamble", 11, 1 },
2031 		{ "CopyPreamble", 10, 1 },
2032 		{ "DisPauseFrames", 9, 1 },
2033 		{ "En1536BFrames", 8, 1 },
2034 		{ "EnJumbo", 7, 1 },
2035 		{ "RmFCS", 6, 1 },
2036 		{ "DisNonVlan", 5, 1 },
2037 		{ "EnExtMatch", 4, 1 },
2038 		{ "EnHashUcast", 3, 1 },
2039 		{ "EnHashMcast", 2, 1 },
2040 		{ "DisBCast", 1, 1 },
2041 		{ "CopyAllFrames", 0, 1 },
2042 	{ "XGM_RX_HASH_LOW", 0x814, 0 },
2043 	{ "XGM_RX_HASH_HIGH", 0x818, 0 },
2044 	{ "XGM_RX_EXACT_MATCH_LOW_1", 0x81c, 0 },
2045 	{ "XGM_RX_EXACT_MATCH_HIGH_1", 0x820, 0 },
2046 		{ "address_high", 0, 16 },
2047 	{ "XGM_RX_EXACT_MATCH_LOW_2", 0x824, 0 },
2048 	{ "XGM_RX_EXACT_MATCH_HIGH_2", 0x828, 0 },
2049 		{ "address_high", 0, 16 },
2050 	{ "XGM_RX_EXACT_MATCH_LOW_3", 0x82c, 0 },
2051 	{ "XGM_RX_EXACT_MATCH_HIGH_3", 0x830, 0 },
2052 		{ "address_high", 0, 16 },
2053 	{ "XGM_RX_EXACT_MATCH_LOW_4", 0x834, 0 },
2054 	{ "XGM_RX_EXACT_MATCH_HIGH_4", 0x838, 0 },
2055 		{ "address_high", 0, 16 },
2056 	{ "XGM_RX_EXACT_MATCH_LOW_5", 0x83c, 0 },
2057 	{ "XGM_RX_EXACT_MATCH_HIGH_5", 0x840, 0 },
2058 		{ "address_high", 0, 16 },
2059 	{ "XGM_RX_EXACT_MATCH_LOW_6", 0x844, 0 },
2060 	{ "XGM_RX_EXACT_MATCH_HIGH_6", 0x848, 0 },
2061 		{ "address_high", 0, 16 },
2062 	{ "XGM_RX_EXACT_MATCH_LOW_7", 0x84c, 0 },
2063 	{ "XGM_RX_EXACT_MATCH_HIGH_7", 0x850, 0 },
2064 		{ "address_high", 0, 16 },
2065 	{ "XGM_RX_EXACT_MATCH_LOW_8", 0x854, 0 },
2066 	{ "XGM_RX_EXACT_MATCH_HIGH_8", 0x858, 0 },
2067 		{ "address_high", 0, 16 },
2068 	{ "XGM_RX_TYPE_MATCH_1", 0x85c, 0 },
2069 		{ "EnTypeMatch", 31, 1 },
2070 		{ "type", 0, 16 },
2071 	{ "XGM_RX_TYPE_MATCH_2", 0x860, 0 },
2072 		{ "EnTypeMatch", 31, 1 },
2073 		{ "type", 0, 16 },
2074 	{ "XGM_RX_TYPE_MATCH_3", 0x864, 0 },
2075 		{ "EnTypeMatch", 31, 1 },
2076 		{ "type", 0, 16 },
2077 	{ "XGM_RX_TYPE_MATCH_4", 0x868, 0 },
2078 		{ "EnTypeMatch", 31, 1 },
2079 		{ "type", 0, 16 },
2080 	{ "XGM_INT_STATUS", 0x86c, 0 },
2081 		{ "XGMIIExtInt", 10, 1 },
2082 		{ "LinkFaultChange", 9, 1 },
2083 		{ "PhyFrameComplete", 8, 1 },
2084 		{ "PauseFrameTxmt", 7, 1 },
2085 		{ "PauseCntrTimeOut", 6, 1 },
2086 		{ "Non0PauseRcvd", 5, 1 },
2087 		{ "StatOFlow", 4, 1 },
2088 		{ "TxErrFIFO", 3, 1 },
2089 		{ "TxUFlow", 2, 1 },
2090 		{ "FrameTxmt", 1, 1 },
2091 		{ "FrameRcvd", 0, 1 },
2092 	{ "XGM_XGM_INT_MASK", 0x870, 0 },
2093 		{ "XGMIIExtInt", 10, 1 },
2094 		{ "LinkFaultChange", 9, 1 },
2095 		{ "PhyFrameComplete", 8, 1 },
2096 		{ "PauseFrameTxmt", 7, 1 },
2097 		{ "PauseCntrTimeOut", 6, 1 },
2098 		{ "Non0PauseRcvd", 5, 1 },
2099 		{ "StatOFlow", 4, 1 },
2100 		{ "TxErrFIFO", 3, 1 },
2101 		{ "TxUFlow", 2, 1 },
2102 		{ "FrameTxmt", 1, 1 },
2103 		{ "FrameRcvd", 0, 1 },
2104 	{ "XGM_XGM_INT_ENABLE", 0x874, 0 },
2105 		{ "XGMIIExtInt", 10, 1 },
2106 		{ "LinkFaultChange", 9, 1 },
2107 		{ "PhyFrameComplete", 8, 1 },
2108 		{ "PauseFrameTxmt", 7, 1 },
2109 		{ "PauseCntrTimeOut", 6, 1 },
2110 		{ "Non0PauseRcvd", 5, 1 },
2111 		{ "StatOFlow", 4, 1 },
2112 		{ "TxErrFIFO", 3, 1 },
2113 		{ "TxUFlow", 2, 1 },
2114 		{ "FrameTxmt", 1, 1 },
2115 		{ "FrameRcvd", 0, 1 },
2116 	{ "XGM_XGM_INT_DISABLE", 0x878, 0 },
2117 		{ "XGMIIExtInt", 10, 1 },
2118 		{ "LinkFaultChange", 9, 1 },
2119 		{ "PhyFrameComplete", 8, 1 },
2120 		{ "PauseFrameTxmt", 7, 1 },
2121 		{ "PauseCntrTimeOut", 6, 1 },
2122 		{ "Non0PauseRcvd", 5, 1 },
2123 		{ "StatOFlow", 4, 1 },
2124 		{ "TxErrFIFO", 3, 1 },
2125 		{ "TxUFlow", 2, 1 },
2126 		{ "FrameTxmt", 1, 1 },
2127 		{ "FrameRcvd", 0, 1 },
2128 	{ "XGM_TX_PAUSE_TIMER", 0x87c, 0 },
2129 		{ "CurPauseTimer", 0, 16 },
2130 	{ "XGM_STAT_CTRL", 0x880, 0 },
2131 		{ "ReadSnpShot", 4, 1 },
2132 		{ "TakeSnpShot", 3, 1 },
2133 		{ "ClrStats", 2, 1 },
2134 		{ "IncrStats", 1, 1 },
2135 		{ "EnTestModeWr", 0, 1 },
2136 	{ "XGM_RXFIFO_CFG", 0x884, 0 },
2137 		{ "RxFIFOPauseHWM", 17, 12 },
2138 		{ "RxFIFOPauseLWM", 5, 12 },
2139 		{ "ForcedPause", 4, 1 },
2140 		{ "ExternLoopback", 3, 1 },
2141 		{ "RxByteSwap", 2, 1 },
2142 		{ "RxStrFrwrd", 1, 1 },
2143 		{ "DisErrFrames", 0, 1 },
2144 	{ "XGM_TXFIFO_CFG", 0x888, 0 },
2145 		{ "TxIPG", 13, 8 },
2146 		{ "TxFIFOThresh", 4, 9 },
2147 		{ "InternLoopback", 3, 1 },
2148 		{ "TxByteSwap", 2, 1 },
2149 		{ "DisCRC", 1, 1 },
2150 		{ "DisPreAmble", 0, 1 },
2151 	{ "XGM_SLOW_TIMER", 0x88c, 0 },
2152 		{ "PauseSlowTimerEn", 31, 1 },
2153 		{ "PauseSlowTimer", 0, 20 },
2154 	{ "XGM_SERDES_CTRL", 0x890, 0 },
2155 		{ "SERDESEn", 25, 1 },
2156 		{ "SERDESReset_", 24, 1 },
2157 		{ "CMURange", 21, 3 },
2158 		{ "BGEnb", 20, 1 },
2159 		{ "EnSkpDrop", 19, 1 },
2160 		{ "EnComma", 18, 1 },
2161 		{ "En8B10B", 17, 1 },
2162 		{ "EnElBuf", 16, 1 },
2163 		{ "Gain", 11, 5 },
2164 		{ "BandGap", 7, 4 },
2165 		{ "LpbkEn", 5, 2 },
2166 		{ "RxEn", 4, 1 },
2167 		{ "TxEn", 3, 1 },
2168 		{ "RxComAdj", 2, 1 },
2169 		{ "PreEmph", 0, 2 },
2170 	{ "XGM_XAUI_PCS_TEST", 0x894, 0 },
2171 		{ "TestPattern", 1, 2 },
2172 		{ "EnTest", 0, 1 },
2173 	{ "XGM_RGMII_CTRL", 0x898, 0 },
2174 		{ "PhAlignFIFOThresh", 1, 2 },
2175 		{ "TxClk90Shift", 0, 1 },
2176 	{ "XGM_RGMII_IMP", 0x89c, 0 },
2177 		{ "ImpSetUpdate", 6, 1 },
2178 		{ "RGMIIImpPD", 3, 3 },
2179 		{ "RGMIIImpPU", 0, 3 },
2180 	{ "XGM_XAUI_IMP", 0x8a0, 0 },
2181 		{ "CalBusy", 31, 1 },
2182 		{ "CalFault", 29, 1 },
2183 		{ "CalImp", 24, 5 },
2184 		{ "XAUIImp", 0, 3 },
2185 	{ "XGM_SERDES_BIST", 0x8a4, 0 },
2186 		{ "BISTDone", 28, 4 },
2187 		{ "BISTCycleThresh", 3, 17 },
2188 		{ "BISTMode", 0, 3 },
2189 	{ "XGM_RX_MAX_PKT_SIZE", 0x8a8, 0 },
2190 		{ "RxMaxPktSize", 0, 14 },
2191 	{ "XGM_RESET_CTRL", 0x8ac, 0 },
2192 		{ "XG2G_Reset_", 3, 1 },
2193 		{ "RGMII_Reset_", 2, 1 },
2194 		{ "PCS_Reset_", 1, 1 },
2195 		{ "MAC_Reset_", 0, 1 },
2196 	{ "XGM_XAUI1G_CTRL", 0x8b0, 0 },
2197 		{ "XAUI1GLinkId", 0, 2 },
2198 	{ "XGM_SERDES_LANE_CTRL", 0x8b4, 0 },
2199 		{ "LaneReversal", 8, 1 },
2200 		{ "TxPolarity", 4, 4 },
2201 		{ "RxPolarity", 0, 4 },
2202 	{ "XGM_PORT_CFG", 0x8b8, 0 },
2203 		{ "SafeSpeedChange", 4, 1 },
2204 		{ "ClkDivReset_", 3, 1 },
2205 		{ "PortSpeed", 1, 2 },
2206 		{ "EnRGMII", 0, 1 },
2207 	{ "XGM_EPIO_DATA0", 0x8c0, 0 },
2208 	{ "XGM_EPIO_DATA1", 0x8c4, 0 },
2209 	{ "XGM_EPIO_DATA2", 0x8c8, 0 },
2210 	{ "XGM_EPIO_DATA3", 0x8cc, 0 },
2211 	{ "XGM_EPIO_OP", 0x8d0, 0 },
2212 		{ "PIO_Ready", 31, 1 },
2213 		{ "PIO_WrRd", 24, 1 },
2214 		{ "PIO_Address", 0, 8 },
2215 	{ "XGM_INT_ENABLE", 0x8d4, 0 },
2216 		{ "SERDESCMULock_loss", 24, 1 },
2217 		{ "RGMIIRxFIFOOverflow", 23, 1 },
2218 		{ "RGMIIRxFIFOUnderflow", 22, 1 },
2219 		{ "RxPktSizeError", 21, 1 },
2220 		{ "WOLPatDetected", 20, 1 },
2221 		{ "TXFIFO_prty_err", 17, 3 },
2222 		{ "RXFIFO_prty_err", 14, 3 },
2223 		{ "TXFIFO_underrun", 13, 1 },
2224 		{ "RXFIFO_overflow", 12, 1 },
2225 		{ "SERDESBIST_err", 8, 4 },
2226 		{ "SERDES_los", 4, 4 },
2227 		{ "XAUIPCSCTCErr", 3, 1 },
2228 		{ "XAUIPCSAlignChange", 2, 1 },
2229 		{ "RGMIILinkStsChange", 1, 1 },
2230 		{ "xgm_int", 0, 1 },
2231 	{ "XGM_INT_CAUSE", 0x8d8, 0 },
2232 		{ "SERDESCMULock_loss", 24, 1 },
2233 		{ "RGMIIRxFIFOOverflow", 23, 1 },
2234 		{ "RGMIIRxFIFOUnderflow", 22, 1 },
2235 		{ "RxPktSizeError", 21, 1 },
2236 		{ "WOLPatDetected", 20, 1 },
2237 		{ "TXFIFO_prty_err", 17, 3 },
2238 		{ "RXFIFO_prty_err", 14, 3 },
2239 		{ "TXFIFO_underrun", 13, 1 },
2240 		{ "RXFIFO_overflow", 12, 1 },
2241 		{ "SERDESBIST_err", 8, 4 },
2242 		{ "SERDES_los", 4, 4 },
2243 		{ "XAUIPCSCTCErr", 3, 1 },
2244 		{ "XAUIPCSAlignChange", 2, 1 },
2245 		{ "RGMIILinkStsChange", 1, 1 },
2246 		{ "xgm_int", 0, 1 },
2247 	{ "XGM_STAT_TX_BYTE_LOW", 0x900, 0 },
2248 	{ "XGM_STAT_TX_BYTE_HIGH", 0x904, 0 },
2249 		{ "TxBytes_high", 0, 13 },
2250 	{ "XGM_STAT_TX_FRAME_LOW", 0x908, 0 },
2251 	{ "XGM_STAT_TX_FRAME_HIGH", 0x90c, 0 },
2252 		{ "TxFrames_high", 0, 4 },
2253 	{ "XGM_STAT_TX_BCAST", 0x910, 0 },
2254 	{ "XGM_STAT_TX_MCAST", 0x914, 0 },
2255 	{ "XGM_STAT_TX_PAUSE", 0x918, 0 },
2256 	{ "XGM_STAT_TX_64B_FRAMES", 0x91c, 0 },
2257 	{ "XGM_STAT_TX_65_127B_FRAMES", 0x920, 0 },
2258 	{ "XGM_STAT_TX_128_255B_FRAMES", 0x924, 0 },
2259 	{ "XGM_STAT_TX_256_511B_FRAMES", 0x928, 0 },
2260 	{ "XGM_STAT_TX_512_1023B_FRAMES", 0x92c, 0 },
2261 	{ "XGM_STAT_TX_1024_1518B_FRAMES", 0x930, 0 },
2262 	{ "XGM_STAT_TX_1519_MAXB_FRAMES", 0x934, 0 },
2263 	{ "XGM_STAT_TX_ERR_FRAMES", 0x938, 0 },
2264 	{ "XGM_STAT_RX_BYTES_LOW", 0x93c, 0 },
2265 	{ "XGM_STAT_RX_BYTES_HIGH", 0x940, 0 },
2266 		{ "RxBytes_high", 0, 13 },
2267 	{ "XGM_STAT_RX_FRAMES_LOW", 0x944, 0 },
2268 	{ "XGM_STAT_RX_FRAMES_HIGH", 0x948, 0 },
2269 		{ "RxFrames_high", 0, 4 },
2270 	{ "XGM_STAT_RX_BCAST_FRAMES", 0x94c, 0 },
2271 	{ "XGM_STAT_RX_MCAST_FRAMES", 0x950, 0 },
2272 	{ "XGM_STAT_RX_PAUSE_FRAMES", 0x954, 0 },
2273 		{ "RxPauseFrames", 0, 16 },
2274 	{ "XGM_STAT_RX_64B_FRAMES", 0x958, 0 },
2275 	{ "XGM_STAT_RX_65_127B_FRAMES", 0x95c, 0 },
2276 	{ "XGM_STAT_RX_128_255B_FRAMES", 0x960, 0 },
2277 	{ "XGM_STAT_RX_256_511B_FRAMES", 0x964, 0 },
2278 	{ "XGM_STAT_RX_512_1023B_FRAMES", 0x968, 0 },
2279 	{ "XGM_STAT_RX_1024_1518B_FRAMES", 0x96c, 0 },
2280 	{ "XGM_STAT_RX_1519_MAXB_FRAMES", 0x970, 0 },
2281 	{ "XGM_STAT_RX_SHORT_FRAMES", 0x974, 0 },
2282 		{ "RxShortFrames", 0, 16 },
2283 	{ "XGM_STAT_RX_OVERSIZE_FRAMES", 0x978, 0 },
2284 		{ "RxOversizeFrames", 0, 16 },
2285 	{ "XGM_STAT_RX_JABBER_FRAMES", 0x97c, 0 },
2286 		{ "RxJabberFrames", 0, 16 },
2287 	{ "XGM_STAT_RX_CRC_ERR_FRAMES", 0x980, 0 },
2288 		{ "RxCRCErrFrames", 0, 16 },
2289 	{ "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x984, 0 },
2290 		{ "RxLengthErrFrames", 0, 16 },
2291 	{ "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x988, 0 },
2292 		{ "RxSymCodeErrFrames", 0, 16 },
2293 	{ "XGM_SERDES_STATUS0", 0x98c, 0 },
2294 		{ "RxErrLane3", 9, 3 },
2295 		{ "RxErrLane2", 6, 3 },
2296 		{ "RxErrLane1", 3, 3 },
2297 		{ "RxErrLane0", 0, 3 },
2298 	{ "XGM_SERDES_STATUS1", 0x990, 0 },
2299 		{ "CMULock", 31, 1 },
2300 		{ "RxKLockLane3", 11, 1 },
2301 		{ "RxKLockLane2", 10, 1 },
2302 		{ "RxKLockLane1", 9, 1 },
2303 		{ "RxKLockLane0", 8, 1 },
2304 		{ "RxUFlowLane3", 7, 1 },
2305 		{ "RxUFlowLane2", 6, 1 },
2306 		{ "RxUFlowLane1", 5, 1 },
2307 		{ "RxUFlowLane0", 4, 1 },
2308 		{ "RxOFlowLane3", 3, 1 },
2309 		{ "RxOFlowLane2", 2, 1 },
2310 		{ "RxOFlowLane1", 1, 1 },
2311 		{ "RxOFlowLane0", 0, 1 },
2312 	{ "XGM_SERDES_STATUS2", 0x994, 0 },
2313 		{ "RxEIDLane3", 11, 1 },
2314 		{ "RxEIDLane2", 10, 1 },
2315 		{ "RxEIDLane1", 9, 1 },
2316 		{ "RxEIDLane0", 8, 1 },
2317 		{ "RxRemSkipLane3", 7, 1 },
2318 		{ "RxRemSkipLane2", 6, 1 },
2319 		{ "RxRemSkipLane1", 5, 1 },
2320 		{ "RxRemSkipLane0", 4, 1 },
2321 		{ "RxAddSkipLane3", 3, 1 },
2322 		{ "RxAddSkipLane2", 2, 1 },
2323 		{ "RxAddSkipLane1", 1, 1 },
2324 		{ "RxAddSkipLane0", 0, 1 },
2325 	{ "XGM_XAUI_PCS_ERR", 0x998, 0 },
2326 		{ "PCS_SyncStatus", 5, 4 },
2327 		{ "PCS_CTCFIFOErr", 1, 4 },
2328 		{ "PCS_NotAligned", 0, 1 },
2329 	{ "XGM_RGMII_STATUS", 0x99c, 0 },
2330 		{ "GMIIDuplex", 3, 1 },
2331 		{ "GMIISpeed", 1, 2 },
2332 		{ "GMIILinkStatus", 0, 1 },
2333 	{ "XGM_WOL_STATUS", 0x9a0, 0 },
2334 		{ "PatDetected", 31, 1 },
2335 		{ "MatchedFilter", 0, 3 },
2336 	{ "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0x9a4, 0 },
2337 	{ "XGM_TX_SPI4_SOP_EOP_CNT", 0x9a8, 0 },
2338 		{ "TxSPI4SopCnt", 16, 16 },
2339 		{ "TxSPI4EopCnt", 0, 16 },
2340 	{ "XGM_RX_SPI4_SOP_EOP_CNT", 0x9ac, 0 },
2341 		{ "RxSPI4SopCnt", 16, 16 },
2342 		{ "RxSPI4EopCnt", 0, 16 },
2343 	{ NULL, 0, 0 }
2344 };
2345 
2346 struct reg_info xgmac0_1_regs[] = {
2347 	{ "XGM_TX_CTRL", 0xa00, 0 },
2348 		{ "SendPause", 2, 1 },
2349 		{ "SendZeroPause", 1, 1 },
2350 		{ "TxEn", 0, 1 },
2351 	{ "XGM_TX_CFG", 0xa04, 0 },
2352 		{ "CfgClkSpeed", 2, 3 },
2353 		{ "StretchMode", 1, 1 },
2354 		{ "TxPauseEn", 0, 1 },
2355 	{ "XGM_TX_PAUSE_QUANTA", 0xa08, 0 },
2356 		{ "TxPauseQuanta", 0, 16 },
2357 	{ "XGM_RX_CTRL", 0xa0c, 0 },
2358 		{ "RxEn", 0, 1 },
2359 	{ "XGM_RX_CFG", 0xa10, 0 },
2360 		{ "Con802_3Preamble", 12, 1 },
2361 		{ "EnNon802_3Preamble", 11, 1 },
2362 		{ "CopyPreamble", 10, 1 },
2363 		{ "DisPauseFrames", 9, 1 },
2364 		{ "En1536BFrames", 8, 1 },
2365 		{ "EnJumbo", 7, 1 },
2366 		{ "RmFCS", 6, 1 },
2367 		{ "DisNonVlan", 5, 1 },
2368 		{ "EnExtMatch", 4, 1 },
2369 		{ "EnHashUcast", 3, 1 },
2370 		{ "EnHashMcast", 2, 1 },
2371 		{ "DisBCast", 1, 1 },
2372 		{ "CopyAllFrames", 0, 1 },
2373 	{ "XGM_RX_HASH_LOW", 0xa14, 0 },
2374 	{ "XGM_RX_HASH_HIGH", 0xa18, 0 },
2375 	{ "XGM_RX_EXACT_MATCH_LOW_1", 0xa1c, 0 },
2376 	{ "XGM_RX_EXACT_MATCH_HIGH_1", 0xa20, 0 },
2377 		{ "address_high", 0, 16 },
2378 	{ "XGM_RX_EXACT_MATCH_LOW_2", 0xa24, 0 },
2379 	{ "XGM_RX_EXACT_MATCH_HIGH_2", 0xa28, 0 },
2380 		{ "address_high", 0, 16 },
2381 	{ "XGM_RX_EXACT_MATCH_LOW_3", 0xa2c, 0 },
2382 	{ "XGM_RX_EXACT_MATCH_HIGH_3", 0xa30, 0 },
2383 		{ "address_high", 0, 16 },
2384 	{ "XGM_RX_EXACT_MATCH_LOW_4", 0xa34, 0 },
2385 	{ "XGM_RX_EXACT_MATCH_HIGH_4", 0xa38, 0 },
2386 		{ "address_high", 0, 16 },
2387 	{ "XGM_RX_EXACT_MATCH_LOW_5", 0xa3c, 0 },
2388 	{ "XGM_RX_EXACT_MATCH_HIGH_5", 0xa40, 0 },
2389 		{ "address_high", 0, 16 },
2390 	{ "XGM_RX_EXACT_MATCH_LOW_6", 0xa44, 0 },
2391 	{ "XGM_RX_EXACT_MATCH_HIGH_6", 0xa48, 0 },
2392 		{ "address_high", 0, 16 },
2393 	{ "XGM_RX_EXACT_MATCH_LOW_7", 0xa4c, 0 },
2394 	{ "XGM_RX_EXACT_MATCH_HIGH_7", 0xa50, 0 },
2395 		{ "address_high", 0, 16 },
2396 	{ "XGM_RX_EXACT_MATCH_LOW_8", 0xa54, 0 },
2397 	{ "XGM_RX_EXACT_MATCH_HIGH_8", 0xa58, 0 },
2398 		{ "address_high", 0, 16 },
2399 	{ "XGM_RX_TYPE_MATCH_1", 0xa5c, 0 },
2400 		{ "EnTypeMatch", 31, 1 },
2401 		{ "type", 0, 16 },
2402 	{ "XGM_RX_TYPE_MATCH_2", 0xa60, 0 },
2403 		{ "EnTypeMatch", 31, 1 },
2404 		{ "type", 0, 16 },
2405 	{ "XGM_RX_TYPE_MATCH_3", 0xa64, 0 },
2406 		{ "EnTypeMatch", 31, 1 },
2407 		{ "type", 0, 16 },
2408 	{ "XGM_RX_TYPE_MATCH_4", 0xa68, 0 },
2409 		{ "EnTypeMatch", 31, 1 },
2410 		{ "type", 0, 16 },
2411 	{ "XGM_INT_STATUS", 0xa6c, 0 },
2412 		{ "XGMIIExtInt", 10, 1 },
2413 		{ "LinkFaultChange", 9, 1 },
2414 		{ "PhyFrameComplete", 8, 1 },
2415 		{ "PauseFrameTxmt", 7, 1 },
2416 		{ "PauseCntrTimeOut", 6, 1 },
2417 		{ "Non0PauseRcvd", 5, 1 },
2418 		{ "StatOFlow", 4, 1 },
2419 		{ "TxErrFIFO", 3, 1 },
2420 		{ "TxUFlow", 2, 1 },
2421 		{ "FrameTxmt", 1, 1 },
2422 		{ "FrameRcvd", 0, 1 },
2423 	{ "XGM_XGM_INT_MASK", 0xa70, 0 },
2424 		{ "XGMIIExtInt", 10, 1 },
2425 		{ "LinkFaultChange", 9, 1 },
2426 		{ "PhyFrameComplete", 8, 1 },
2427 		{ "PauseFrameTxmt", 7, 1 },
2428 		{ "PauseCntrTimeOut", 6, 1 },
2429 		{ "Non0PauseRcvd", 5, 1 },
2430 		{ "StatOFlow", 4, 1 },
2431 		{ "TxErrFIFO", 3, 1 },
2432 		{ "TxUFlow", 2, 1 },
2433 		{ "FrameTxmt", 1, 1 },
2434 		{ "FrameRcvd", 0, 1 },
2435 	{ "XGM_XGM_INT_ENABLE", 0xa74, 0 },
2436 		{ "XGMIIExtInt", 10, 1 },
2437 		{ "LinkFaultChange", 9, 1 },
2438 		{ "PhyFrameComplete", 8, 1 },
2439 		{ "PauseFrameTxmt", 7, 1 },
2440 		{ "PauseCntrTimeOut", 6, 1 },
2441 		{ "Non0PauseRcvd", 5, 1 },
2442 		{ "StatOFlow", 4, 1 },
2443 		{ "TxErrFIFO", 3, 1 },
2444 		{ "TxUFlow", 2, 1 },
2445 		{ "FrameTxmt", 1, 1 },
2446 		{ "FrameRcvd", 0, 1 },
2447 	{ "XGM_XGM_INT_DISABLE", 0xa78, 0 },
2448 		{ "XGMIIExtInt", 10, 1 },
2449 		{ "LinkFaultChange", 9, 1 },
2450 		{ "PhyFrameComplete", 8, 1 },
2451 		{ "PauseFrameTxmt", 7, 1 },
2452 		{ "PauseCntrTimeOut", 6, 1 },
2453 		{ "Non0PauseRcvd", 5, 1 },
2454 		{ "StatOFlow", 4, 1 },
2455 		{ "TxErrFIFO", 3, 1 },
2456 		{ "TxUFlow", 2, 1 },
2457 		{ "FrameTxmt", 1, 1 },
2458 		{ "FrameRcvd", 0, 1 },
2459 	{ "XGM_TX_PAUSE_TIMER", 0xa7c, 0 },
2460 		{ "CurPauseTimer", 0, 16 },
2461 	{ "XGM_STAT_CTRL", 0xa80, 0 },
2462 		{ "ReadSnpShot", 4, 1 },
2463 		{ "TakeSnpShot", 3, 1 },
2464 		{ "ClrStats", 2, 1 },
2465 		{ "IncrStats", 1, 1 },
2466 		{ "EnTestModeWr", 0, 1 },
2467 	{ "XGM_RXFIFO_CFG", 0xa84, 0 },
2468 		{ "RxFIFOPauseHWM", 17, 12 },
2469 		{ "RxFIFOPauseLWM", 5, 12 },
2470 		{ "ForcedPause", 4, 1 },
2471 		{ "ExternLoopback", 3, 1 },
2472 		{ "RxByteSwap", 2, 1 },
2473 		{ "RxStrFrwrd", 1, 1 },
2474 		{ "DisErrFrames", 0, 1 },
2475 	{ "XGM_TXFIFO_CFG", 0xa88, 0 },
2476 		{ "TxIPG", 13, 8 },
2477 		{ "TxFIFOThresh", 4, 9 },
2478 		{ "InternLoopback", 3, 1 },
2479 		{ "TxByteSwap", 2, 1 },
2480 		{ "DisCRC", 1, 1 },
2481 		{ "DisPreAmble", 0, 1 },
2482 	{ "XGM_SLOW_TIMER", 0xa8c, 0 },
2483 		{ "PauseSlowTimerEn", 31, 1 },
2484 		{ "PauseSlowTimer", 0, 20 },
2485 	{ "XGM_SERDES_CTRL", 0xa90, 0 },
2486 		{ "SERDESEn", 25, 1 },
2487 		{ "SERDESReset_", 24, 1 },
2488 		{ "CMURange", 21, 3 },
2489 		{ "BGEnb", 20, 1 },
2490 		{ "EnSkpDrop", 19, 1 },
2491 		{ "EnComma", 18, 1 },
2492 		{ "En8B10B", 17, 1 },
2493 		{ "EnElBuf", 16, 1 },
2494 		{ "Gain", 11, 5 },
2495 		{ "BandGap", 7, 4 },
2496 		{ "LpbkEn", 5, 2 },
2497 		{ "RxEn", 4, 1 },
2498 		{ "TxEn", 3, 1 },
2499 		{ "RxComAdj", 2, 1 },
2500 		{ "PreEmph", 0, 2 },
2501 	{ "XGM_XAUI_PCS_TEST", 0xa94, 0 },
2502 		{ "TestPattern", 1, 2 },
2503 		{ "EnTest", 0, 1 },
2504 	{ "XGM_RGMII_CTRL", 0xa98, 0 },
2505 		{ "PhAlignFIFOThresh", 1, 2 },
2506 		{ "TxClk90Shift", 0, 1 },
2507 	{ "XGM_RGMII_IMP", 0xa9c, 0 },
2508 		{ "ImpSetUpdate", 6, 1 },
2509 		{ "RGMIIImpPD", 3, 3 },
2510 		{ "RGMIIImpPU", 0, 3 },
2511 	{ "XGM_XAUI_IMP", 0xaa0, 0 },
2512 		{ "CalBusy", 31, 1 },
2513 		{ "CalFault", 29, 1 },
2514 		{ "CalImp", 24, 5 },
2515 		{ "XAUIImp", 0, 3 },
2516 	{ "XGM_SERDES_BIST", 0xaa4, 0 },
2517 		{ "BISTDone", 28, 4 },
2518 		{ "BISTCycleThresh", 3, 17 },
2519 		{ "BISTMode", 0, 3 },
2520 	{ "XGM_RX_MAX_PKT_SIZE", 0xaa8, 0 },
2521 		{ "RxMaxPktSize", 0, 14 },
2522 	{ "XGM_RESET_CTRL", 0xaac, 0 },
2523 		{ "XG2G_Reset_", 3, 1 },
2524 		{ "RGMII_Reset_", 2, 1 },
2525 		{ "PCS_Reset_", 1, 1 },
2526 		{ "MAC_Reset_", 0, 1 },
2527 	{ "XGM_XAUI1G_CTRL", 0xab0, 0 },
2528 		{ "XAUI1GLinkId", 0, 2 },
2529 	{ "XGM_SERDES_LANE_CTRL", 0xab4, 0 },
2530 		{ "LaneReversal", 8, 1 },
2531 		{ "TxPolarity", 4, 4 },
2532 		{ "RxPolarity", 0, 4 },
2533 	{ "XGM_PORT_CFG", 0xab8, 0 },
2534 		{ "SafeSpeedChange", 4, 1 },
2535 		{ "ClkDivReset_", 3, 1 },
2536 		{ "PortSpeed", 1, 2 },
2537 		{ "EnRGMII", 0, 1 },
2538 	{ "XGM_EPIO_DATA0", 0xac0, 0 },
2539 	{ "XGM_EPIO_DATA1", 0xac4, 0 },
2540 	{ "XGM_EPIO_DATA2", 0xac8, 0 },
2541 	{ "XGM_EPIO_DATA3", 0xacc, 0 },
2542 	{ "XGM_EPIO_OP", 0xad0, 0 },
2543 		{ "PIO_Ready", 31, 1 },
2544 		{ "PIO_WrRd", 24, 1 },
2545 		{ "PIO_Address", 0, 8 },
2546 	{ "XGM_INT_ENABLE", 0xad4, 0 },
2547 		{ "SERDESCMULock_loss", 24, 1 },
2548 		{ "RGMIIRxFIFOOverflow", 23, 1 },
2549 		{ "RGMIIRxFIFOUnderflow", 22, 1 },
2550 		{ "RxPktSizeError", 21, 1 },
2551 		{ "WOLPatDetected", 20, 1 },
2552 		{ "TXFIFO_prty_err", 17, 3 },
2553 		{ "RXFIFO_prty_err", 14, 3 },
2554 		{ "TXFIFO_underrun", 13, 1 },
2555 		{ "RXFIFO_overflow", 12, 1 },
2556 		{ "SERDESBIST_err", 8, 4 },
2557 		{ "SERDES_los", 4, 4 },
2558 		{ "XAUIPCSCTCErr", 3, 1 },
2559 		{ "XAUIPCSAlignChange", 2, 1 },
2560 		{ "RGMIILinkStsChange", 1, 1 },
2561 		{ "xgm_int", 0, 1 },
2562 	{ "XGM_INT_CAUSE", 0xad8, 0 },
2563 		{ "SERDESCMULock_loss", 24, 1 },
2564 		{ "RGMIIRxFIFOOverflow", 23, 1 },
2565 		{ "RGMIIRxFIFOUnderflow", 22, 1 },
2566 		{ "RxPktSizeError", 21, 1 },
2567 		{ "WOLPatDetected", 20, 1 },
2568 		{ "TXFIFO_prty_err", 17, 3 },
2569 		{ "RXFIFO_prty_err", 14, 3 },
2570 		{ "TXFIFO_underrun", 13, 1 },
2571 		{ "RXFIFO_overflow", 12, 1 },
2572 		{ "SERDESBIST_err", 8, 4 },
2573 		{ "SERDES_los", 4, 4 },
2574 		{ "XAUIPCSCTCErr", 3, 1 },
2575 		{ "XAUIPCSAlignChange", 2, 1 },
2576 		{ "RGMIILinkStsChange", 1, 1 },
2577 		{ "xgm_int", 0, 1 },
2578 	{ "XGM_STAT_TX_BYTE_LOW", 0xb00, 0 },
2579 	{ "XGM_STAT_TX_BYTE_HIGH", 0xb04, 0 },
2580 		{ "TxBytes_high", 0, 13 },
2581 	{ "XGM_STAT_TX_FRAME_LOW", 0xb08, 0 },
2582 	{ "XGM_STAT_TX_FRAME_HIGH", 0xb0c, 0 },
2583 		{ "TxFrames_high", 0, 4 },
2584 	{ "XGM_STAT_TX_BCAST", 0xb10, 0 },
2585 	{ "XGM_STAT_TX_MCAST", 0xb14, 0 },
2586 	{ "XGM_STAT_TX_PAUSE", 0xb18, 0 },
2587 	{ "XGM_STAT_TX_64B_FRAMES", 0xb1c, 0 },
2588 	{ "XGM_STAT_TX_65_127B_FRAMES", 0xb20, 0 },
2589 	{ "XGM_STAT_TX_128_255B_FRAMES", 0xb24, 0 },
2590 	{ "XGM_STAT_TX_256_511B_FRAMES", 0xb28, 0 },
2591 	{ "XGM_STAT_TX_512_1023B_FRAMES", 0xb2c, 0 },
2592 	{ "XGM_STAT_TX_1024_1518B_FRAMES", 0xb30, 0 },
2593 	{ "XGM_STAT_TX_1519_MAXB_FRAMES", 0xb34, 0 },
2594 	{ "XGM_STAT_TX_ERR_FRAMES", 0xb38, 0 },
2595 	{ "XGM_STAT_RX_BYTES_LOW", 0xb3c, 0 },
2596 	{ "XGM_STAT_RX_BYTES_HIGH", 0xb40, 0 },
2597 		{ "RxBytes_high", 0, 13 },
2598 	{ "XGM_STAT_RX_FRAMES_LOW", 0xb44, 0 },
2599 	{ "XGM_STAT_RX_FRAMES_HIGH", 0xb48, 0 },
2600 		{ "RxFrames_high", 0, 4 },
2601 	{ "XGM_STAT_RX_BCAST_FRAMES", 0xb4c, 0 },
2602 	{ "XGM_STAT_RX_MCAST_FRAMES", 0xb50, 0 },
2603 	{ "XGM_STAT_RX_PAUSE_FRAMES", 0xb54, 0 },
2604 		{ "RxPauseFrames", 0, 16 },
2605 	{ "XGM_STAT_RX_64B_FRAMES", 0xb58, 0 },
2606 	{ "XGM_STAT_RX_65_127B_FRAMES", 0xb5c, 0 },
2607 	{ "XGM_STAT_RX_128_255B_FRAMES", 0xb60, 0 },
2608 	{ "XGM_STAT_RX_256_511B_FRAMES", 0xb64, 0 },
2609 	{ "XGM_STAT_RX_512_1023B_FRAMES", 0xb68, 0 },
2610 	{ "XGM_STAT_RX_1024_1518B_FRAMES", 0xb6c, 0 },
2611 	{ "XGM_STAT_RX_1519_MAXB_FRAMES", 0xb70, 0 },
2612 	{ "XGM_STAT_RX_SHORT_FRAMES", 0xb74, 0 },
2613 		{ "RxShortFrames", 0, 16 },
2614 	{ "XGM_STAT_RX_OVERSIZE_FRAMES", 0xb78, 0 },
2615 		{ "RxOversizeFrames", 0, 16 },
2616 	{ "XGM_STAT_RX_JABBER_FRAMES", 0xb7c, 0 },
2617 		{ "RxJabberFrames", 0, 16 },
2618 	{ "XGM_STAT_RX_CRC_ERR_FRAMES", 0xb80, 0 },
2619 		{ "RxCRCErrFrames", 0, 16 },
2620 	{ "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0xb84, 0 },
2621 		{ "RxLengthErrFrames", 0, 16 },
2622 	{ "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0xb88, 0 },
2623 		{ "RxSymCodeErrFrames", 0, 16 },
2624 	{ "XGM_SERDES_STATUS0", 0xb8c, 0 },
2625 		{ "RxErrLane3", 9, 3 },
2626 		{ "RxErrLane2", 6, 3 },
2627 		{ "RxErrLane1", 3, 3 },
2628 		{ "RxErrLane0", 0, 3 },
2629 	{ "XGM_SERDES_STATUS1", 0xb90, 0 },
2630 		{ "CMULock", 31, 1 },
2631 		{ "RxKLockLane3", 11, 1 },
2632 		{ "RxKLockLane2", 10, 1 },
2633 		{ "RxKLockLane1", 9, 1 },
2634 		{ "RxKLockLane0", 8, 1 },
2635 		{ "RxUFlowLane3", 7, 1 },
2636 		{ "RxUFlowLane2", 6, 1 },
2637 		{ "RxUFlowLane1", 5, 1 },
2638 		{ "RxUFlowLane0", 4, 1 },
2639 		{ "RxOFlowLane3", 3, 1 },
2640 		{ "RxOFlowLane2", 2, 1 },
2641 		{ "RxOFlowLane1", 1, 1 },
2642 		{ "RxOFlowLane0", 0, 1 },
2643 	{ "XGM_SERDES_STATUS2", 0xb94, 0 },
2644 		{ "RxEIDLane3", 11, 1 },
2645 		{ "RxEIDLane2", 10, 1 },
2646 		{ "RxEIDLane1", 9, 1 },
2647 		{ "RxEIDLane0", 8, 1 },
2648 		{ "RxRemSkipLane3", 7, 1 },
2649 		{ "RxRemSkipLane2", 6, 1 },
2650 		{ "RxRemSkipLane1", 5, 1 },
2651 		{ "RxRemSkipLane0", 4, 1 },
2652 		{ "RxAddSkipLane3", 3, 1 },
2653 		{ "RxAddSkipLane2", 2, 1 },
2654 		{ "RxAddSkipLane1", 1, 1 },
2655 		{ "RxAddSkipLane0", 0, 1 },
2656 	{ "XGM_XAUI_PCS_ERR", 0xb98, 0 },
2657 		{ "PCS_SyncStatus", 5, 4 },
2658 		{ "PCS_CTCFIFOErr", 1, 4 },
2659 		{ "PCS_NotAligned", 0, 1 },
2660 	{ "XGM_RGMII_STATUS", 0xb9c, 0 },
2661 		{ "GMIIDuplex", 3, 1 },
2662 		{ "GMIISpeed", 1, 2 },
2663 		{ "GMIILinkStatus", 0, 1 },
2664 	{ "XGM_WOL_STATUS", 0xba0, 0 },
2665 		{ "PatDetected", 31, 1 },
2666 		{ "MatchedFilter", 0, 3 },
2667 	{ "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0xba4, 0 },
2668 	{ "XGM_TX_SPI4_SOP_EOP_CNT", 0xba8, 0 },
2669 		{ "TxSPI4SopCnt", 16, 16 },
2670 		{ "TxSPI4EopCnt", 0, 16 },
2671 	{ "XGM_RX_SPI4_SOP_EOP_CNT", 0xbac, 0 },
2672 		{ "RxSPI4SopCnt", 16, 16 },
2673 		{ "RxSPI4EopCnt", 0, 16 },
2674 	{ NULL, 0, 0 }
2675 };
2676