1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 if (do_unmap) 290 svm_range_dma_unmap(prange); 291 292 if (do_unmap && !p->xnack_enabled) { 293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 296 } 297 298 /* free dma_addr array for each gpu */ 299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 300 if (prange->dma_addr[gpuidx]) { 301 kvfree(prange->dma_addr[gpuidx]); 302 prange->dma_addr[gpuidx] = NULL; 303 } 304 } 305 306 mutex_destroy(&prange->lock); 307 mutex_destroy(&prange->migrate_mutex); 308 kfree(prange); 309 } 310 311 static void 312 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 313 int32_t *prefetch_loc, uint8_t *granularity, 314 uint32_t *flags) 315 { 316 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 317 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *granularity = svms->default_granularity; 319 *flags = 320 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 321 } 322 323 static struct 324 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 325 uint64_t last, bool update_mem_usage) 326 { 327 uint64_t size = last - start + 1; 328 struct svm_range *prange; 329 struct kfd_process *p; 330 331 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 332 if (!prange) 333 return NULL; 334 335 p = container_of(svms, struct kfd_process, svms); 336 if (!p->xnack_enabled && update_mem_usage && 337 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 338 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 339 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 340 kfree(prange); 341 return NULL; 342 } 343 prange->npages = size; 344 prange->svms = svms; 345 prange->start = start; 346 prange->last = last; 347 INIT_LIST_HEAD(&prange->list); 348 INIT_LIST_HEAD(&prange->update_list); 349 INIT_LIST_HEAD(&prange->svm_bo_list); 350 INIT_LIST_HEAD(&prange->deferred_list); 351 INIT_LIST_HEAD(&prange->child_list); 352 atomic_set(&prange->invalid, 0); 353 prange->validate_timestamp = 0; 354 prange->vram_pages = 0; 355 mutex_init(&prange->migrate_mutex); 356 mutex_init(&prange->lock); 357 358 if (p->xnack_enabled) 359 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 360 MAX_GPU_INSTANCE); 361 362 svm_range_set_default_attributes(svms, &prange->preferred_loc, 363 &prange->prefetch_loc, 364 &prange->granularity, &prange->flags); 365 366 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 367 368 return prange; 369 } 370 371 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 372 { 373 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 374 return false; 375 376 return true; 377 } 378 379 static void svm_range_bo_release(struct kref *kref) 380 { 381 struct svm_range_bo *svm_bo; 382 383 svm_bo = container_of(kref, struct svm_range_bo, kref); 384 pr_debug("svm_bo 0x%p\n", svm_bo); 385 386 spin_lock(&svm_bo->list_lock); 387 while (!list_empty(&svm_bo->range_list)) { 388 struct svm_range *prange = 389 list_first_entry(&svm_bo->range_list, 390 struct svm_range, svm_bo_list); 391 /* list_del_init tells a concurrent svm_range_vram_node_new when 392 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 393 */ 394 list_del_init(&prange->svm_bo_list); 395 spin_unlock(&svm_bo->list_lock); 396 397 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 398 prange->start, prange->last); 399 mutex_lock(&prange->lock); 400 prange->svm_bo = NULL; 401 /* prange should not hold vram page now */ 402 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 403 mutex_unlock(&prange->lock); 404 405 spin_lock(&svm_bo->list_lock); 406 } 407 spin_unlock(&svm_bo->list_lock); 408 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 409 /* We're not in the eviction worker. Signal the fence. */ 410 dma_fence_signal(&svm_bo->eviction_fence->base); 411 dma_fence_put(&svm_bo->eviction_fence->base); 412 amdgpu_bo_unref(&svm_bo->bo); 413 kfree(svm_bo); 414 } 415 416 static void svm_range_bo_wq_release(struct work_struct *work) 417 { 418 struct svm_range_bo *svm_bo; 419 420 svm_bo = container_of(work, struct svm_range_bo, release_work); 421 svm_range_bo_release(&svm_bo->kref); 422 } 423 424 static void svm_range_bo_release_async(struct kref *kref) 425 { 426 struct svm_range_bo *svm_bo; 427 428 svm_bo = container_of(kref, struct svm_range_bo, kref); 429 pr_debug("svm_bo 0x%p\n", svm_bo); 430 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 431 schedule_work(&svm_bo->release_work); 432 } 433 434 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 435 { 436 kref_put(&svm_bo->kref, svm_range_bo_release_async); 437 } 438 439 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 440 { 441 if (svm_bo) 442 kref_put(&svm_bo->kref, svm_range_bo_release); 443 } 444 445 static bool 446 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 447 { 448 mutex_lock(&prange->lock); 449 if (!prange->svm_bo) { 450 mutex_unlock(&prange->lock); 451 return false; 452 } 453 if (prange->ttm_res) { 454 /* We still have a reference, all is well */ 455 mutex_unlock(&prange->lock); 456 return true; 457 } 458 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 459 /* 460 * Migrate from GPU to GPU, remove range from source svm_bo->node 461 * range list, and return false to allocate svm_bo from destination 462 * node. 463 */ 464 if (prange->svm_bo->node != node) { 465 mutex_unlock(&prange->lock); 466 467 spin_lock(&prange->svm_bo->list_lock); 468 list_del_init(&prange->svm_bo_list); 469 spin_unlock(&prange->svm_bo->list_lock); 470 471 svm_range_bo_unref(prange->svm_bo); 472 return false; 473 } 474 if (READ_ONCE(prange->svm_bo->evicting)) { 475 struct dma_fence *f; 476 struct svm_range_bo *svm_bo; 477 /* The BO is getting evicted, 478 * we need to get a new one 479 */ 480 mutex_unlock(&prange->lock); 481 svm_bo = prange->svm_bo; 482 f = dma_fence_get(&svm_bo->eviction_fence->base); 483 svm_range_bo_unref(prange->svm_bo); 484 /* wait for the fence to avoid long spin-loop 485 * at list_empty_careful 486 */ 487 dma_fence_wait(f, false); 488 dma_fence_put(f); 489 } else { 490 /* The BO was still around and we got 491 * a new reference to it 492 */ 493 mutex_unlock(&prange->lock); 494 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 495 prange->svms, prange->start, prange->last); 496 497 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 498 return true; 499 } 500 501 } else { 502 mutex_unlock(&prange->lock); 503 } 504 505 /* We need a new svm_bo. Spin-loop to wait for concurrent 506 * svm_range_bo_release to finish removing this range from 507 * its range list and set prange->svm_bo to null. After this, 508 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 509 */ 510 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 511 cond_resched(); 512 513 return false; 514 } 515 516 static struct svm_range_bo *svm_range_bo_new(void) 517 { 518 struct svm_range_bo *svm_bo; 519 520 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 521 if (!svm_bo) 522 return NULL; 523 524 kref_init(&svm_bo->kref); 525 INIT_LIST_HEAD(&svm_bo->range_list); 526 spin_lock_init(&svm_bo->list_lock); 527 528 return svm_bo; 529 } 530 531 int 532 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 533 bool clear) 534 { 535 struct amdgpu_bo_param bp; 536 struct svm_range_bo *svm_bo; 537 struct amdgpu_bo_user *ubo; 538 struct amdgpu_bo *bo; 539 struct kfd_process *p; 540 struct mm_struct *mm; 541 int r; 542 543 p = container_of(prange->svms, struct kfd_process, svms); 544 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 545 prange->start, prange->last); 546 547 if (svm_range_validate_svm_bo(node, prange)) 548 return 0; 549 550 svm_bo = svm_range_bo_new(); 551 if (!svm_bo) { 552 pr_debug("failed to alloc svm bo\n"); 553 return -ENOMEM; 554 } 555 mm = get_task_mm(p->lead_thread); 556 if (!mm) { 557 pr_debug("failed to get mm\n"); 558 kfree(svm_bo); 559 return -ESRCH; 560 } 561 svm_bo->node = node; 562 svm_bo->eviction_fence = 563 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 564 mm, 565 svm_bo); 566 mmput(mm); 567 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 568 svm_bo->evicting = 0; 569 memset(&bp, 0, sizeof(bp)); 570 bp.size = prange->npages * PAGE_SIZE; 571 bp.byte_align = PAGE_SIZE; 572 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 573 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 574 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 575 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 576 bp.type = ttm_bo_type_device; 577 bp.resv = NULL; 578 if (node->xcp) 579 bp.xcp_id_plus1 = node->xcp->id + 1; 580 581 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 582 if (r) { 583 pr_debug("failed %d to create bo\n", r); 584 goto create_bo_failed; 585 } 586 bo = &ubo->bo; 587 588 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 589 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 590 bp.xcp_id_plus1 - 1); 591 592 r = amdgpu_bo_reserve(bo, true); 593 if (r) { 594 pr_debug("failed %d to reserve bo\n", r); 595 goto reserve_bo_failed; 596 } 597 598 if (clear) { 599 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 600 if (r) { 601 pr_debug("failed %d to sync bo\n", r); 602 amdgpu_bo_unreserve(bo); 603 goto reserve_bo_failed; 604 } 605 } 606 607 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 608 if (r) { 609 pr_debug("failed %d to reserve bo\n", r); 610 amdgpu_bo_unreserve(bo); 611 goto reserve_bo_failed; 612 } 613 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 614 615 amdgpu_bo_unreserve(bo); 616 617 svm_bo->bo = bo; 618 prange->svm_bo = svm_bo; 619 prange->ttm_res = bo->tbo.resource; 620 prange->offset = 0; 621 622 spin_lock(&svm_bo->list_lock); 623 list_add(&prange->svm_bo_list, &svm_bo->range_list); 624 spin_unlock(&svm_bo->list_lock); 625 626 return 0; 627 628 reserve_bo_failed: 629 amdgpu_bo_unref(&bo); 630 create_bo_failed: 631 dma_fence_put(&svm_bo->eviction_fence->base); 632 kfree(svm_bo); 633 prange->ttm_res = NULL; 634 635 return r; 636 } 637 638 void svm_range_vram_node_free(struct svm_range *prange) 639 { 640 /* serialize prange->svm_bo unref */ 641 mutex_lock(&prange->lock); 642 /* prange->svm_bo has not been unref */ 643 if (prange->ttm_res) { 644 prange->ttm_res = NULL; 645 mutex_unlock(&prange->lock); 646 svm_range_bo_unref(prange->svm_bo); 647 } else 648 mutex_unlock(&prange->lock); 649 } 650 651 struct kfd_node * 652 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 653 { 654 struct kfd_process *p; 655 struct kfd_process_device *pdd; 656 657 p = container_of(prange->svms, struct kfd_process, svms); 658 pdd = kfd_process_device_data_by_id(p, gpu_id); 659 if (!pdd) { 660 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 661 return NULL; 662 } 663 664 return pdd->dev; 665 } 666 667 struct kfd_process_device * 668 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 669 { 670 struct kfd_process *p; 671 672 p = container_of(prange->svms, struct kfd_process, svms); 673 674 return kfd_get_process_device_data(node, p); 675 } 676 677 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 678 { 679 struct ttm_operation_ctx ctx = { false, false }; 680 681 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 682 683 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 684 } 685 686 static int 687 svm_range_check_attr(struct kfd_process *p, 688 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 689 { 690 uint32_t i; 691 692 for (i = 0; i < nattr; i++) { 693 uint32_t val = attrs[i].value; 694 int gpuidx = MAX_GPU_INSTANCE; 695 696 switch (attrs[i].type) { 697 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 698 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 699 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 700 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 701 break; 702 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 703 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 704 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 705 break; 706 case KFD_IOCTL_SVM_ATTR_ACCESS: 707 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 708 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 709 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 710 break; 711 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 712 break; 713 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 714 break; 715 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 716 break; 717 default: 718 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 719 return -EINVAL; 720 } 721 722 if (gpuidx < 0) { 723 pr_debug("no GPU 0x%x found\n", val); 724 return -EINVAL; 725 } else if (gpuidx < MAX_GPU_INSTANCE && 726 !test_bit(gpuidx, p->svms.bitmap_supported)) { 727 pr_debug("GPU 0x%x not supported\n", val); 728 return -EINVAL; 729 } 730 } 731 732 return 0; 733 } 734 735 static void 736 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 737 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 738 bool *update_mapping) 739 { 740 uint32_t i; 741 int gpuidx; 742 743 for (i = 0; i < nattr; i++) { 744 switch (attrs[i].type) { 745 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 746 prange->preferred_loc = attrs[i].value; 747 break; 748 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 749 prange->prefetch_loc = attrs[i].value; 750 break; 751 case KFD_IOCTL_SVM_ATTR_ACCESS: 752 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 753 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 754 if (!p->xnack_enabled) 755 *update_mapping = true; 756 757 gpuidx = kfd_process_gpuidx_from_gpuid(p, 758 attrs[i].value); 759 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 760 bitmap_clear(prange->bitmap_access, gpuidx, 1); 761 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 762 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 763 bitmap_set(prange->bitmap_access, gpuidx, 1); 764 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 765 } else { 766 bitmap_clear(prange->bitmap_access, gpuidx, 1); 767 bitmap_set(prange->bitmap_aip, gpuidx, 1); 768 } 769 break; 770 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 771 *update_mapping = true; 772 prange->flags |= attrs[i].value; 773 break; 774 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 775 *update_mapping = true; 776 prange->flags &= ~attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 779 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 780 break; 781 default: 782 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 783 } 784 } 785 } 786 787 static bool 788 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 789 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 790 { 791 uint32_t i; 792 int gpuidx; 793 794 for (i = 0; i < nattr; i++) { 795 switch (attrs[i].type) { 796 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 797 if (prange->preferred_loc != attrs[i].value) 798 return false; 799 break; 800 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 801 /* Prefetch should always trigger a migration even 802 * if the value of the attribute didn't change. 803 */ 804 return false; 805 case KFD_IOCTL_SVM_ATTR_ACCESS: 806 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 807 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 808 gpuidx = kfd_process_gpuidx_from_gpuid(p, 809 attrs[i].value); 810 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 811 if (test_bit(gpuidx, prange->bitmap_access) || 812 test_bit(gpuidx, prange->bitmap_aip)) 813 return false; 814 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 815 if (!test_bit(gpuidx, prange->bitmap_access)) 816 return false; 817 } else { 818 if (!test_bit(gpuidx, prange->bitmap_aip)) 819 return false; 820 } 821 break; 822 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 823 if ((prange->flags & attrs[i].value) != attrs[i].value) 824 return false; 825 break; 826 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 827 if ((prange->flags & attrs[i].value) != 0) 828 return false; 829 break; 830 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 831 if (prange->granularity != attrs[i].value) 832 return false; 833 break; 834 default: 835 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 836 } 837 } 838 839 return true; 840 } 841 842 /** 843 * svm_range_debug_dump - print all range information from svms 844 * @svms: svm range list header 845 * 846 * debug output svm range start, end, prefetch location from svms 847 * interval tree and link list 848 * 849 * Context: The caller must hold svms->lock 850 */ 851 static void svm_range_debug_dump(struct svm_range_list *svms) 852 { 853 struct interval_tree_node *node; 854 struct svm_range *prange; 855 856 pr_debug("dump svms 0x%p list\n", svms); 857 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 858 859 list_for_each_entry(prange, &svms->list, list) { 860 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 861 prange, prange->start, prange->npages, 862 prange->start + prange->npages - 1, 863 prange->actual_loc); 864 } 865 866 pr_debug("dump svms 0x%p interval tree\n", svms); 867 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 868 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 869 while (node) { 870 prange = container_of(node, struct svm_range, it_node); 871 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 872 prange, prange->start, prange->npages, 873 prange->start + prange->npages - 1, 874 prange->actual_loc); 875 node = interval_tree_iter_next(node, 0, ~0ULL); 876 } 877 } 878 879 static void * 880 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 881 uint64_t offset, uint64_t *vram_pages) 882 { 883 unsigned char *src = (unsigned char *)psrc + offset; 884 unsigned char *dst; 885 uint64_t i; 886 887 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 888 if (!dst) 889 return NULL; 890 891 if (!vram_pages) { 892 memcpy(dst, src, num_elements * size); 893 return (void *)dst; 894 } 895 896 *vram_pages = 0; 897 for (i = 0; i < num_elements; i++) { 898 dma_addr_t *temp; 899 temp = (dma_addr_t *)dst + i; 900 *temp = *((dma_addr_t *)src + i); 901 if (*temp&SVM_RANGE_VRAM_DOMAIN) 902 (*vram_pages)++; 903 } 904 905 return (void *)dst; 906 } 907 908 static int 909 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 910 { 911 int i; 912 913 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 914 if (!src->dma_addr[i]) 915 continue; 916 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 917 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 918 if (!dst->dma_addr[i]) 919 return -ENOMEM; 920 } 921 922 return 0; 923 } 924 925 static int 926 svm_range_split_array(void *ppnew, void *ppold, size_t size, 927 uint64_t old_start, uint64_t old_n, 928 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 929 { 930 unsigned char *new, *old, *pold; 931 uint64_t d; 932 933 if (!ppold) 934 return 0; 935 pold = *(unsigned char **)ppold; 936 if (!pold) 937 return 0; 938 939 d = (new_start - old_start) * size; 940 /* get dma addr array for new range and calculte its vram page number */ 941 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 942 if (!new) 943 return -ENOMEM; 944 d = (new_start == old_start) ? new_n * size : 0; 945 old = svm_range_copy_array(pold, size, old_n, d, NULL); 946 if (!old) { 947 kvfree(new); 948 return -ENOMEM; 949 } 950 kvfree(pold); 951 *(void **)ppold = old; 952 *(void **)ppnew = new; 953 954 return 0; 955 } 956 957 static int 958 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 959 uint64_t start, uint64_t last) 960 { 961 uint64_t npages = last - start + 1; 962 int i, r; 963 964 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 965 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 966 sizeof(*old->dma_addr[i]), old->start, 967 npages, new->start, new->npages, 968 old->actual_loc ? &new->vram_pages : NULL); 969 if (r) 970 return r; 971 } 972 if (old->actual_loc) 973 old->vram_pages -= new->vram_pages; 974 975 return 0; 976 } 977 978 static int 979 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 980 uint64_t start, uint64_t last) 981 { 982 uint64_t npages = last - start + 1; 983 984 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 985 new->svms, new, new->start, start, last); 986 987 if (new->start == old->start) { 988 new->offset = old->offset; 989 old->offset += new->npages; 990 } else { 991 new->offset = old->offset + npages; 992 } 993 994 new->svm_bo = svm_range_bo_ref(old->svm_bo); 995 new->ttm_res = old->ttm_res; 996 997 spin_lock(&new->svm_bo->list_lock); 998 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 999 spin_unlock(&new->svm_bo->list_lock); 1000 1001 return 0; 1002 } 1003 1004 /** 1005 * svm_range_split_adjust - split range and adjust 1006 * 1007 * @new: new range 1008 * @old: the old range 1009 * @start: the old range adjust to start address in pages 1010 * @last: the old range adjust to last address in pages 1011 * 1012 * Copy system memory dma_addr or vram ttm_res in old range to new 1013 * range from new_start up to size new->npages, the remaining old range is from 1014 * start to last 1015 * 1016 * Return: 1017 * 0 - OK, -ENOMEM - out of memory 1018 */ 1019 static int 1020 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1021 uint64_t start, uint64_t last) 1022 { 1023 int r; 1024 1025 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1026 new->svms, new->start, old->start, old->last, start, last); 1027 1028 if (new->start < old->start || 1029 new->last > old->last) { 1030 WARN_ONCE(1, "invalid new range start or last\n"); 1031 return -EINVAL; 1032 } 1033 1034 r = svm_range_split_pages(new, old, start, last); 1035 if (r) 1036 return r; 1037 1038 if (old->actual_loc && old->ttm_res) { 1039 r = svm_range_split_nodes(new, old, start, last); 1040 if (r) 1041 return r; 1042 } 1043 1044 old->npages = last - start + 1; 1045 old->start = start; 1046 old->last = last; 1047 new->flags = old->flags; 1048 new->preferred_loc = old->preferred_loc; 1049 new->prefetch_loc = old->prefetch_loc; 1050 new->actual_loc = old->actual_loc; 1051 new->granularity = old->granularity; 1052 new->mapped_to_gpu = old->mapped_to_gpu; 1053 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1054 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1055 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1056 1057 return 0; 1058 } 1059 1060 /** 1061 * svm_range_split - split a range in 2 ranges 1062 * 1063 * @prange: the svm range to split 1064 * @start: the remaining range start address in pages 1065 * @last: the remaining range last address in pages 1066 * @new: the result new range generated 1067 * 1068 * Two cases only: 1069 * case 1: if start == prange->start 1070 * prange ==> prange[start, last] 1071 * new range [last + 1, prange->last] 1072 * 1073 * case 2: if last == prange->last 1074 * prange ==> prange[start, last] 1075 * new range [prange->start, start - 1] 1076 * 1077 * Return: 1078 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1079 */ 1080 static int 1081 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1082 struct svm_range **new) 1083 { 1084 uint64_t old_start = prange->start; 1085 uint64_t old_last = prange->last; 1086 struct svm_range_list *svms; 1087 int r = 0; 1088 1089 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1090 old_start, old_last, start, last); 1091 1092 if (old_start != start && old_last != last) 1093 return -EINVAL; 1094 if (start < old_start || last > old_last) 1095 return -EINVAL; 1096 1097 svms = prange->svms; 1098 if (old_start == start) 1099 *new = svm_range_new(svms, last + 1, old_last, false); 1100 else 1101 *new = svm_range_new(svms, old_start, start - 1, false); 1102 if (!*new) 1103 return -ENOMEM; 1104 1105 r = svm_range_split_adjust(*new, prange, start, last); 1106 if (r) { 1107 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1108 r, old_start, old_last, start, last); 1109 svm_range_free(*new, false); 1110 *new = NULL; 1111 } 1112 1113 return r; 1114 } 1115 1116 static int 1117 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1118 struct list_head *insert_list, struct list_head *remap_list) 1119 { 1120 struct svm_range *tail = NULL; 1121 int r = svm_range_split(prange, prange->start, new_last, &tail); 1122 1123 if (!r) { 1124 list_add(&tail->list, insert_list); 1125 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1126 list_add(&tail->update_list, remap_list); 1127 } 1128 return r; 1129 } 1130 1131 static int 1132 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1133 struct list_head *insert_list, struct list_head *remap_list) 1134 { 1135 struct svm_range *head = NULL; 1136 int r = svm_range_split(prange, new_start, prange->last, &head); 1137 1138 if (!r) { 1139 list_add(&head->list, insert_list); 1140 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1141 list_add(&head->update_list, remap_list); 1142 } 1143 return r; 1144 } 1145 1146 static void 1147 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1148 struct svm_range *pchild, enum svm_work_list_ops op) 1149 { 1150 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1151 pchild, pchild->start, pchild->last, prange, op); 1152 1153 pchild->work_item.mm = mm; 1154 pchild->work_item.op = op; 1155 list_add_tail(&pchild->child_list, &prange->child_list); 1156 } 1157 1158 static bool 1159 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1160 { 1161 return (node_a->adev == node_b->adev || 1162 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1163 } 1164 1165 static uint64_t 1166 svm_range_get_pte_flags(struct kfd_node *node, 1167 struct svm_range *prange, int domain) 1168 { 1169 struct kfd_node *bo_node; 1170 uint32_t flags = prange->flags; 1171 uint32_t mapping_flags = 0; 1172 uint64_t pte_flags; 1173 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1174 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1175 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1176 unsigned int mtype_local; 1177 1178 if (domain == SVM_RANGE_VRAM_DOMAIN) 1179 bo_node = prange->svm_bo->node; 1180 1181 switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) { 1182 case IP_VERSION(9, 4, 1): 1183 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1184 if (bo_node == node) { 1185 mapping_flags |= coherent ? 1186 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1187 } else { 1188 mapping_flags |= coherent ? 1189 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1190 if (svm_nodes_in_same_hive(node, bo_node)) 1191 snoop = true; 1192 } 1193 } else { 1194 mapping_flags |= coherent ? 1195 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1196 } 1197 break; 1198 case IP_VERSION(9, 4, 2): 1199 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1200 if (bo_node == node) { 1201 mapping_flags |= coherent ? 1202 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1203 if (node->adev->gmc.xgmi.connected_to_cpu) 1204 snoop = true; 1205 } else { 1206 mapping_flags |= coherent ? 1207 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1208 if (svm_nodes_in_same_hive(node, bo_node)) 1209 snoop = true; 1210 } 1211 } else { 1212 mapping_flags |= coherent ? 1213 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1214 } 1215 break; 1216 case IP_VERSION(9, 4, 3): 1217 case IP_VERSION(9, 4, 4): 1218 if (ext_coherent) 1219 mtype_local = node->adev->rev_id ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_UC; 1220 else 1221 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1222 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1223 snoop = true; 1224 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1225 /* local HBM region close to partition */ 1226 if (bo_node->adev == node->adev && 1227 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1228 mapping_flags |= mtype_local; 1229 /* local HBM region far from partition or remote XGMI GPU 1230 * with regular system scope coherence 1231 */ 1232 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1233 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1234 /* PCIe P2P or extended system scope coherence */ 1235 else 1236 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1237 /* system memory accessed by the APU */ 1238 } else if (node->adev->flags & AMD_IS_APU) { 1239 /* On NUMA systems, locality is determined per-page 1240 * in amdgpu_gmc_override_vm_pte_flags 1241 */ 1242 if (num_possible_nodes() <= 1) 1243 mapping_flags |= mtype_local; 1244 else 1245 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1246 /* system memory accessed by the dGPU */ 1247 } else { 1248 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1249 } 1250 break; 1251 case IP_VERSION(12, 0, 0): 1252 case IP_VERSION(12, 0, 1): 1253 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1254 if (bo_node != node) 1255 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1256 } else { 1257 mapping_flags |= coherent ? 1258 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1259 } 1260 break; 1261 default: 1262 mapping_flags |= coherent ? 1263 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1264 } 1265 1266 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1267 1268 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1269 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1270 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1271 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1272 1273 pte_flags = AMDGPU_PTE_VALID; 1274 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1275 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1276 if (KFD_GC_VERSION(node) >= IP_VERSION(12, 0, 0)) 1277 pte_flags |= AMDGPU_PTE_IS_PTE; 1278 1279 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1280 return pte_flags; 1281 } 1282 1283 static int 1284 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1285 uint64_t start, uint64_t last, 1286 struct dma_fence **fence) 1287 { 1288 uint64_t init_pte_value = 0; 1289 1290 pr_debug("[0x%llx 0x%llx]\n", start, last); 1291 1292 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1293 last, init_pte_value, 0, 0, NULL, NULL, 1294 fence); 1295 } 1296 1297 static int 1298 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1299 unsigned long last, uint32_t trigger) 1300 { 1301 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1302 struct kfd_process_device *pdd; 1303 struct dma_fence *fence = NULL; 1304 struct kfd_process *p; 1305 uint32_t gpuidx; 1306 int r = 0; 1307 1308 if (!prange->mapped_to_gpu) { 1309 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1310 prange, prange->start, prange->last); 1311 return 0; 1312 } 1313 1314 if (prange->start == start && prange->last == last) { 1315 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1316 prange->mapped_to_gpu = false; 1317 } 1318 1319 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1320 MAX_GPU_INSTANCE); 1321 p = container_of(prange->svms, struct kfd_process, svms); 1322 1323 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1324 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1325 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1326 if (!pdd) { 1327 pr_debug("failed to find device idx %d\n", gpuidx); 1328 return -EINVAL; 1329 } 1330 1331 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1332 start, last, trigger); 1333 1334 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1335 drm_priv_to_vm(pdd->drm_priv), 1336 start, last, &fence); 1337 if (r) 1338 break; 1339 1340 if (fence) { 1341 r = dma_fence_wait(fence, false); 1342 dma_fence_put(fence); 1343 fence = NULL; 1344 if (r) 1345 break; 1346 } 1347 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1348 } 1349 1350 return r; 1351 } 1352 1353 static int 1354 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1355 unsigned long offset, unsigned long npages, bool readonly, 1356 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1357 struct dma_fence **fence, bool flush_tlb) 1358 { 1359 struct amdgpu_device *adev = pdd->dev->adev; 1360 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1361 uint64_t pte_flags; 1362 unsigned long last_start; 1363 int last_domain; 1364 int r = 0; 1365 int64_t i, j; 1366 1367 last_start = prange->start + offset; 1368 1369 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1370 last_start, last_start + npages - 1, readonly); 1371 1372 for (i = offset; i < offset + npages; i++) { 1373 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1374 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1375 1376 /* Collect all pages in the same address range and memory domain 1377 * that can be mapped with a single call to update mapping. 1378 */ 1379 if (i < offset + npages - 1 && 1380 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1381 continue; 1382 1383 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1384 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1385 1386 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1387 if (readonly) 1388 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1389 1390 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1391 prange->svms, last_start, prange->start + i, 1392 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1393 pte_flags); 1394 1395 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1396 * different memory partition based on fpfn/lpfn, we should use 1397 * same vm_manager.vram_base_offset regardless memory partition. 1398 */ 1399 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1400 NULL, last_start, prange->start + i, 1401 pte_flags, 1402 (last_start - prange->start) << PAGE_SHIFT, 1403 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1404 NULL, dma_addr, &vm->last_update); 1405 1406 for (j = last_start - prange->start; j <= i; j++) 1407 dma_addr[j] |= last_domain; 1408 1409 if (r) { 1410 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1411 goto out; 1412 } 1413 last_start = prange->start + i + 1; 1414 } 1415 1416 r = amdgpu_vm_update_pdes(adev, vm, false); 1417 if (r) { 1418 pr_debug("failed %d to update directories 0x%lx\n", r, 1419 prange->start); 1420 goto out; 1421 } 1422 1423 if (fence) 1424 *fence = dma_fence_get(vm->last_update); 1425 1426 out: 1427 return r; 1428 } 1429 1430 static int 1431 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1432 unsigned long npages, bool readonly, 1433 unsigned long *bitmap, bool wait, bool flush_tlb) 1434 { 1435 struct kfd_process_device *pdd; 1436 struct amdgpu_device *bo_adev = NULL; 1437 struct kfd_process *p; 1438 struct dma_fence *fence = NULL; 1439 uint32_t gpuidx; 1440 int r = 0; 1441 1442 if (prange->svm_bo && prange->ttm_res) 1443 bo_adev = prange->svm_bo->node->adev; 1444 1445 p = container_of(prange->svms, struct kfd_process, svms); 1446 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1447 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1448 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1449 if (!pdd) { 1450 pr_debug("failed to find device idx %d\n", gpuidx); 1451 return -EINVAL; 1452 } 1453 1454 pdd = kfd_bind_process_to_device(pdd->dev, p); 1455 if (IS_ERR(pdd)) 1456 return -EINVAL; 1457 1458 if (bo_adev && pdd->dev->adev != bo_adev && 1459 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1460 pr_debug("cannot map to device idx %d\n", gpuidx); 1461 continue; 1462 } 1463 1464 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1465 prange->dma_addr[gpuidx], 1466 bo_adev, wait ? &fence : NULL, 1467 flush_tlb); 1468 if (r) 1469 break; 1470 1471 if (fence) { 1472 r = dma_fence_wait(fence, false); 1473 dma_fence_put(fence); 1474 fence = NULL; 1475 if (r) { 1476 pr_debug("failed %d to dma fence wait\n", r); 1477 break; 1478 } 1479 } 1480 1481 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1482 } 1483 1484 return r; 1485 } 1486 1487 struct svm_validate_context { 1488 struct kfd_process *process; 1489 struct svm_range *prange; 1490 bool intr; 1491 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1492 struct drm_exec exec; 1493 }; 1494 1495 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1496 { 1497 struct kfd_process_device *pdd; 1498 struct amdgpu_vm *vm; 1499 uint32_t gpuidx; 1500 int r; 1501 1502 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1503 drm_exec_until_all_locked(&ctx->exec) { 1504 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1505 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1506 if (!pdd) { 1507 pr_debug("failed to find device idx %d\n", gpuidx); 1508 r = -EINVAL; 1509 goto unreserve_out; 1510 } 1511 vm = drm_priv_to_vm(pdd->drm_priv); 1512 1513 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1514 drm_exec_retry_on_contention(&ctx->exec); 1515 if (unlikely(r)) { 1516 pr_debug("failed %d to reserve bo\n", r); 1517 goto unreserve_out; 1518 } 1519 } 1520 } 1521 1522 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1523 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1524 if (!pdd) { 1525 pr_debug("failed to find device idx %d\n", gpuidx); 1526 r = -EINVAL; 1527 goto unreserve_out; 1528 } 1529 1530 r = amdgpu_vm_validate(pdd->dev->adev, 1531 drm_priv_to_vm(pdd->drm_priv), NULL, 1532 svm_range_bo_validate, NULL); 1533 if (r) { 1534 pr_debug("failed %d validate pt bos\n", r); 1535 goto unreserve_out; 1536 } 1537 } 1538 1539 return 0; 1540 1541 unreserve_out: 1542 drm_exec_fini(&ctx->exec); 1543 return r; 1544 } 1545 1546 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1547 { 1548 drm_exec_fini(&ctx->exec); 1549 } 1550 1551 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1552 { 1553 struct kfd_process_device *pdd; 1554 1555 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1556 if (!pdd) 1557 return NULL; 1558 1559 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1560 } 1561 1562 /* 1563 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1564 * 1565 * To prevent concurrent destruction or change of range attributes, the 1566 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1567 * because that would block concurrent evictions and lead to deadlocks. To 1568 * serialize concurrent migrations or validations of the same range, the 1569 * prange->migrate_mutex must be held. 1570 * 1571 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1572 * eviction fence. 1573 * 1574 * The following sequence ensures race-free validation and GPU mapping: 1575 * 1576 * 1. Reserve page table (and SVM BO if range is in VRAM) 1577 * 2. hmm_range_fault to get page addresses (if system memory) 1578 * 3. DMA-map pages (if system memory) 1579 * 4-a. Take notifier lock 1580 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1581 * 4-c. Check that the range was not split or otherwise invalidated 1582 * 4-d. Update GPU page table 1583 * 4.e. Release notifier lock 1584 * 5. Release page table (and SVM BO) reservation 1585 */ 1586 static int svm_range_validate_and_map(struct mm_struct *mm, 1587 unsigned long map_start, unsigned long map_last, 1588 struct svm_range *prange, int32_t gpuidx, 1589 bool intr, bool wait, bool flush_tlb) 1590 { 1591 struct svm_validate_context *ctx; 1592 unsigned long start, end, addr; 1593 struct kfd_process *p; 1594 void *owner; 1595 int32_t idx; 1596 int r = 0; 1597 1598 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1599 if (!ctx) 1600 return -ENOMEM; 1601 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1602 ctx->prange = prange; 1603 ctx->intr = intr; 1604 1605 if (gpuidx < MAX_GPU_INSTANCE) { 1606 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1607 bitmap_set(ctx->bitmap, gpuidx, 1); 1608 } else if (ctx->process->xnack_enabled) { 1609 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1610 1611 /* If prefetch range to GPU, or GPU retry fault migrate range to 1612 * GPU, which has ACCESS attribute to the range, create mapping 1613 * on that GPU. 1614 */ 1615 if (prange->actual_loc) { 1616 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1617 prange->actual_loc); 1618 if (gpuidx < 0) { 1619 WARN_ONCE(1, "failed get device by id 0x%x\n", 1620 prange->actual_loc); 1621 r = -EINVAL; 1622 goto free_ctx; 1623 } 1624 if (test_bit(gpuidx, prange->bitmap_access)) 1625 bitmap_set(ctx->bitmap, gpuidx, 1); 1626 } 1627 1628 /* 1629 * If prange is already mapped or with always mapped flag, 1630 * update mapping on GPUs with ACCESS attribute 1631 */ 1632 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1633 if (prange->mapped_to_gpu || 1634 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1635 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1636 } 1637 } else { 1638 bitmap_or(ctx->bitmap, prange->bitmap_access, 1639 prange->bitmap_aip, MAX_GPU_INSTANCE); 1640 } 1641 1642 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1643 r = 0; 1644 goto free_ctx; 1645 } 1646 1647 if (prange->actual_loc && !prange->ttm_res) { 1648 /* This should never happen. actual_loc gets set by 1649 * svm_migrate_ram_to_vram after allocating a BO. 1650 */ 1651 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1652 r = -EINVAL; 1653 goto free_ctx; 1654 } 1655 1656 r = svm_range_reserve_bos(ctx, intr); 1657 if (r) 1658 goto free_ctx; 1659 1660 p = container_of(prange->svms, struct kfd_process, svms); 1661 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1662 MAX_GPU_INSTANCE)); 1663 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1664 if (kfd_svm_page_owner(p, idx) != owner) { 1665 owner = NULL; 1666 break; 1667 } 1668 } 1669 1670 start = map_start << PAGE_SHIFT; 1671 end = (map_last + 1) << PAGE_SHIFT; 1672 for (addr = start; !r && addr < end; ) { 1673 struct hmm_range *hmm_range = NULL; 1674 unsigned long map_start_vma; 1675 unsigned long map_last_vma; 1676 struct vm_area_struct *vma; 1677 unsigned long next = 0; 1678 unsigned long offset; 1679 unsigned long npages; 1680 bool readonly; 1681 1682 vma = vma_lookup(mm, addr); 1683 if (vma) { 1684 readonly = !(vma->vm_flags & VM_WRITE); 1685 1686 next = min(vma->vm_end, end); 1687 npages = (next - addr) >> PAGE_SHIFT; 1688 WRITE_ONCE(p->svms.faulting_task, current); 1689 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1690 readonly, owner, NULL, 1691 &hmm_range); 1692 WRITE_ONCE(p->svms.faulting_task, NULL); 1693 if (r) 1694 pr_debug("failed %d to get svm range pages\n", r); 1695 } else { 1696 r = -EFAULT; 1697 } 1698 1699 if (!r) { 1700 offset = (addr >> PAGE_SHIFT) - prange->start; 1701 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1702 hmm_range->hmm_pfns); 1703 if (r) 1704 pr_debug("failed %d to dma map range\n", r); 1705 } 1706 1707 svm_range_lock(prange); 1708 1709 /* Free backing memory of hmm_range if it was initialized 1710 * Overrride return value to TRY AGAIN only if prior returns 1711 * were successful 1712 */ 1713 if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range) && !r) { 1714 pr_debug("hmm update the range, need validate again\n"); 1715 r = -EAGAIN; 1716 } 1717 1718 if (!r && !list_empty(&prange->child_list)) { 1719 pr_debug("range split by unmap in parallel, validate again\n"); 1720 r = -EAGAIN; 1721 } 1722 1723 if (!r) { 1724 map_start_vma = max(map_start, prange->start + offset); 1725 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1726 if (map_start_vma <= map_last_vma) { 1727 offset = map_start_vma - prange->start; 1728 npages = map_last_vma - map_start_vma + 1; 1729 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1730 ctx->bitmap, wait, flush_tlb); 1731 } 1732 } 1733 1734 if (!r && next == end) 1735 prange->mapped_to_gpu = true; 1736 1737 svm_range_unlock(prange); 1738 1739 addr = next; 1740 } 1741 1742 svm_range_unreserve_bos(ctx); 1743 if (!r) 1744 prange->validate_timestamp = ktime_get_boottime(); 1745 1746 free_ctx: 1747 kfree(ctx); 1748 1749 return r; 1750 } 1751 1752 /** 1753 * svm_range_list_lock_and_flush_work - flush pending deferred work 1754 * 1755 * @svms: the svm range list 1756 * @mm: the mm structure 1757 * 1758 * Context: Returns with mmap write lock held, pending deferred work flushed 1759 * 1760 */ 1761 void 1762 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1763 struct mm_struct *mm) 1764 { 1765 retry_flush_work: 1766 flush_work(&svms->deferred_list_work); 1767 mmap_write_lock(mm); 1768 1769 if (list_empty(&svms->deferred_range_list)) 1770 return; 1771 mmap_write_unlock(mm); 1772 pr_debug("retry flush\n"); 1773 goto retry_flush_work; 1774 } 1775 1776 static void svm_range_restore_work(struct work_struct *work) 1777 { 1778 struct delayed_work *dwork = to_delayed_work(work); 1779 struct amdkfd_process_info *process_info; 1780 struct svm_range_list *svms; 1781 struct svm_range *prange; 1782 struct kfd_process *p; 1783 struct mm_struct *mm; 1784 int evicted_ranges; 1785 int invalid; 1786 int r; 1787 1788 svms = container_of(dwork, struct svm_range_list, restore_work); 1789 evicted_ranges = atomic_read(&svms->evicted_ranges); 1790 if (!evicted_ranges) 1791 return; 1792 1793 pr_debug("restore svm ranges\n"); 1794 1795 p = container_of(svms, struct kfd_process, svms); 1796 process_info = p->kgd_process_info; 1797 1798 /* Keep mm reference when svm_range_validate_and_map ranges */ 1799 mm = get_task_mm(p->lead_thread); 1800 if (!mm) { 1801 pr_debug("svms 0x%p process mm gone\n", svms); 1802 return; 1803 } 1804 1805 mutex_lock(&process_info->lock); 1806 svm_range_list_lock_and_flush_work(svms, mm); 1807 mutex_lock(&svms->lock); 1808 1809 evicted_ranges = atomic_read(&svms->evicted_ranges); 1810 1811 list_for_each_entry(prange, &svms->list, list) { 1812 invalid = atomic_read(&prange->invalid); 1813 if (!invalid) 1814 continue; 1815 1816 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1817 prange->svms, prange, prange->start, prange->last, 1818 invalid); 1819 1820 /* 1821 * If range is migrating, wait for migration is done. 1822 */ 1823 mutex_lock(&prange->migrate_mutex); 1824 1825 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1826 MAX_GPU_INSTANCE, false, true, false); 1827 if (r) 1828 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1829 prange->start); 1830 1831 mutex_unlock(&prange->migrate_mutex); 1832 if (r) 1833 goto out_reschedule; 1834 1835 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1836 goto out_reschedule; 1837 } 1838 1839 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1840 evicted_ranges) 1841 goto out_reschedule; 1842 1843 evicted_ranges = 0; 1844 1845 r = kgd2kfd_resume_mm(mm); 1846 if (r) { 1847 /* No recovery from this failure. Probably the CP is 1848 * hanging. No point trying again. 1849 */ 1850 pr_debug("failed %d to resume KFD\n", r); 1851 } 1852 1853 pr_debug("restore svm ranges successfully\n"); 1854 1855 out_reschedule: 1856 mutex_unlock(&svms->lock); 1857 mmap_write_unlock(mm); 1858 mutex_unlock(&process_info->lock); 1859 1860 /* If validation failed, reschedule another attempt */ 1861 if (evicted_ranges) { 1862 pr_debug("reschedule to restore svm range\n"); 1863 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1864 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1865 1866 kfd_smi_event_queue_restore_rescheduled(mm); 1867 } 1868 mmput(mm); 1869 } 1870 1871 /** 1872 * svm_range_evict - evict svm range 1873 * @prange: svm range structure 1874 * @mm: current process mm_struct 1875 * @start: starting process queue number 1876 * @last: last process queue number 1877 * @event: mmu notifier event when range is evicted or migrated 1878 * 1879 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1880 * return to let CPU evict the buffer and proceed CPU pagetable update. 1881 * 1882 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1883 * If invalidation happens while restore work is running, restore work will 1884 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1885 * the queues. 1886 */ 1887 static int 1888 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1889 unsigned long start, unsigned long last, 1890 enum mmu_notifier_event event) 1891 { 1892 struct svm_range_list *svms = prange->svms; 1893 struct svm_range *pchild; 1894 struct kfd_process *p; 1895 int r = 0; 1896 1897 p = container_of(svms, struct kfd_process, svms); 1898 1899 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1900 svms, prange->start, prange->last, start, last); 1901 1902 if (!p->xnack_enabled || 1903 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1904 int evicted_ranges; 1905 bool mapped = prange->mapped_to_gpu; 1906 1907 list_for_each_entry(pchild, &prange->child_list, child_list) { 1908 if (!pchild->mapped_to_gpu) 1909 continue; 1910 mapped = true; 1911 mutex_lock_nested(&pchild->lock, 1); 1912 if (pchild->start <= last && pchild->last >= start) { 1913 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1914 pchild->start, pchild->last); 1915 atomic_inc(&pchild->invalid); 1916 } 1917 mutex_unlock(&pchild->lock); 1918 } 1919 1920 if (!mapped) 1921 return r; 1922 1923 if (prange->start <= last && prange->last >= start) 1924 atomic_inc(&prange->invalid); 1925 1926 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1927 if (evicted_ranges != 1) 1928 return r; 1929 1930 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1931 prange->svms, prange->start, prange->last); 1932 1933 /* First eviction, stop the queues */ 1934 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1935 if (r) 1936 pr_debug("failed to quiesce KFD\n"); 1937 1938 pr_debug("schedule to restore svm %p ranges\n", svms); 1939 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1940 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1941 } else { 1942 unsigned long s, l; 1943 uint32_t trigger; 1944 1945 if (event == MMU_NOTIFY_MIGRATE) 1946 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1947 else 1948 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1949 1950 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1951 prange->svms, start, last); 1952 list_for_each_entry(pchild, &prange->child_list, child_list) { 1953 mutex_lock_nested(&pchild->lock, 1); 1954 s = max(start, pchild->start); 1955 l = min(last, pchild->last); 1956 if (l >= s) 1957 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1958 mutex_unlock(&pchild->lock); 1959 } 1960 s = max(start, prange->start); 1961 l = min(last, prange->last); 1962 if (l >= s) 1963 svm_range_unmap_from_gpus(prange, s, l, trigger); 1964 } 1965 1966 return r; 1967 } 1968 1969 static struct svm_range *svm_range_clone(struct svm_range *old) 1970 { 1971 struct svm_range *new; 1972 1973 new = svm_range_new(old->svms, old->start, old->last, false); 1974 if (!new) 1975 return NULL; 1976 if (svm_range_copy_dma_addrs(new, old)) { 1977 svm_range_free(new, false); 1978 return NULL; 1979 } 1980 if (old->svm_bo) { 1981 new->ttm_res = old->ttm_res; 1982 new->offset = old->offset; 1983 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1984 spin_lock(&new->svm_bo->list_lock); 1985 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1986 spin_unlock(&new->svm_bo->list_lock); 1987 } 1988 new->flags = old->flags; 1989 new->preferred_loc = old->preferred_loc; 1990 new->prefetch_loc = old->prefetch_loc; 1991 new->actual_loc = old->actual_loc; 1992 new->granularity = old->granularity; 1993 new->mapped_to_gpu = old->mapped_to_gpu; 1994 new->vram_pages = old->vram_pages; 1995 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1996 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1997 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1998 1999 return new; 2000 } 2001 2002 void svm_range_set_max_pages(struct amdgpu_device *adev) 2003 { 2004 uint64_t max_pages; 2005 uint64_t pages, _pages; 2006 uint64_t min_pages = 0; 2007 int i, id; 2008 2009 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2010 if (adev->kfd.dev->nodes[i]->xcp) 2011 id = adev->kfd.dev->nodes[i]->xcp->id; 2012 else 2013 id = -1; 2014 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2015 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2016 pages = rounddown_pow_of_two(pages); 2017 min_pages = min_not_zero(min_pages, pages); 2018 } 2019 2020 do { 2021 max_pages = READ_ONCE(max_svm_range_pages); 2022 _pages = min_not_zero(max_pages, min_pages); 2023 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2024 } 2025 2026 static int 2027 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2028 uint64_t max_pages, struct list_head *insert_list, 2029 struct list_head *update_list) 2030 { 2031 struct svm_range *prange; 2032 uint64_t l; 2033 2034 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2035 max_pages, start, last); 2036 2037 while (last >= start) { 2038 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2039 2040 prange = svm_range_new(svms, start, l, true); 2041 if (!prange) 2042 return -ENOMEM; 2043 list_add(&prange->list, insert_list); 2044 list_add(&prange->update_list, update_list); 2045 2046 start = l + 1; 2047 } 2048 return 0; 2049 } 2050 2051 /** 2052 * svm_range_add - add svm range and handle overlap 2053 * @p: the range add to this process svms 2054 * @start: page size aligned 2055 * @size: page size aligned 2056 * @nattr: number of attributes 2057 * @attrs: array of attributes 2058 * @update_list: output, the ranges need validate and update GPU mapping 2059 * @insert_list: output, the ranges need insert to svms 2060 * @remove_list: output, the ranges are replaced and need remove from svms 2061 * @remap_list: output, remap unaligned svm ranges 2062 * 2063 * Check if the virtual address range has overlap with any existing ranges, 2064 * split partly overlapping ranges and add new ranges in the gaps. All changes 2065 * should be applied to the range_list and interval tree transactionally. If 2066 * any range split or allocation fails, the entire update fails. Therefore any 2067 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2068 * unchanged. 2069 * 2070 * If the transaction succeeds, the caller can update and insert clones and 2071 * new ranges, then free the originals. 2072 * 2073 * Otherwise the caller can free the clones and new ranges, while the old 2074 * svm_ranges remain unchanged. 2075 * 2076 * Context: Process context, caller must hold svms->lock 2077 * 2078 * Return: 2079 * 0 - OK, otherwise error code 2080 */ 2081 static int 2082 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2083 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2084 struct list_head *update_list, struct list_head *insert_list, 2085 struct list_head *remove_list, struct list_head *remap_list) 2086 { 2087 unsigned long last = start + size - 1UL; 2088 struct svm_range_list *svms = &p->svms; 2089 struct interval_tree_node *node; 2090 struct svm_range *prange; 2091 struct svm_range *tmp; 2092 struct list_head new_list; 2093 int r = 0; 2094 2095 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2096 2097 INIT_LIST_HEAD(update_list); 2098 INIT_LIST_HEAD(insert_list); 2099 INIT_LIST_HEAD(remove_list); 2100 INIT_LIST_HEAD(&new_list); 2101 INIT_LIST_HEAD(remap_list); 2102 2103 node = interval_tree_iter_first(&svms->objects, start, last); 2104 while (node) { 2105 struct interval_tree_node *next; 2106 unsigned long next_start; 2107 2108 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2109 node->last); 2110 2111 prange = container_of(node, struct svm_range, it_node); 2112 next = interval_tree_iter_next(node, start, last); 2113 next_start = min(node->last, last) + 1; 2114 2115 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2116 prange->mapped_to_gpu) { 2117 /* nothing to do */ 2118 } else if (node->start < start || node->last > last) { 2119 /* node intersects the update range and its attributes 2120 * will change. Clone and split it, apply updates only 2121 * to the overlapping part 2122 */ 2123 struct svm_range *old = prange; 2124 2125 prange = svm_range_clone(old); 2126 if (!prange) { 2127 r = -ENOMEM; 2128 goto out; 2129 } 2130 2131 list_add(&old->update_list, remove_list); 2132 list_add(&prange->list, insert_list); 2133 list_add(&prange->update_list, update_list); 2134 2135 if (node->start < start) { 2136 pr_debug("change old range start\n"); 2137 r = svm_range_split_head(prange, start, 2138 insert_list, remap_list); 2139 if (r) 2140 goto out; 2141 } 2142 if (node->last > last) { 2143 pr_debug("change old range last\n"); 2144 r = svm_range_split_tail(prange, last, 2145 insert_list, remap_list); 2146 if (r) 2147 goto out; 2148 } 2149 } else { 2150 /* The node is contained within start..last, 2151 * just update it 2152 */ 2153 list_add(&prange->update_list, update_list); 2154 } 2155 2156 /* insert a new node if needed */ 2157 if (node->start > start) { 2158 r = svm_range_split_new(svms, start, node->start - 1, 2159 READ_ONCE(max_svm_range_pages), 2160 &new_list, update_list); 2161 if (r) 2162 goto out; 2163 } 2164 2165 node = next; 2166 start = next_start; 2167 } 2168 2169 /* add a final range at the end if needed */ 2170 if (start <= last) 2171 r = svm_range_split_new(svms, start, last, 2172 READ_ONCE(max_svm_range_pages), 2173 &new_list, update_list); 2174 2175 out: 2176 if (r) { 2177 list_for_each_entry_safe(prange, tmp, insert_list, list) 2178 svm_range_free(prange, false); 2179 list_for_each_entry_safe(prange, tmp, &new_list, list) 2180 svm_range_free(prange, true); 2181 } else { 2182 list_splice(&new_list, insert_list); 2183 } 2184 2185 return r; 2186 } 2187 2188 static void 2189 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2190 struct svm_range *prange) 2191 { 2192 unsigned long start; 2193 unsigned long last; 2194 2195 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2196 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2197 2198 if (prange->start == start && prange->last == last) 2199 return; 2200 2201 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2202 prange->svms, prange, start, last, prange->start, 2203 prange->last); 2204 2205 if (start != 0 && last != 0) { 2206 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2207 svm_range_remove_notifier(prange); 2208 } 2209 prange->it_node.start = prange->start; 2210 prange->it_node.last = prange->last; 2211 2212 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2213 svm_range_add_notifier_locked(mm, prange); 2214 } 2215 2216 static void 2217 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2218 struct mm_struct *mm) 2219 { 2220 switch (prange->work_item.op) { 2221 case SVM_OP_NULL: 2222 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2223 svms, prange, prange->start, prange->last); 2224 break; 2225 case SVM_OP_UNMAP_RANGE: 2226 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2227 svms, prange, prange->start, prange->last); 2228 svm_range_unlink(prange); 2229 svm_range_remove_notifier(prange); 2230 svm_range_free(prange, true); 2231 break; 2232 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2233 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2234 svms, prange, prange->start, prange->last); 2235 svm_range_update_notifier_and_interval_tree(mm, prange); 2236 break; 2237 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2238 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2239 svms, prange, prange->start, prange->last); 2240 svm_range_update_notifier_and_interval_tree(mm, prange); 2241 /* TODO: implement deferred validation and mapping */ 2242 break; 2243 case SVM_OP_ADD_RANGE: 2244 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2245 prange->start, prange->last); 2246 svm_range_add_to_svms(prange); 2247 svm_range_add_notifier_locked(mm, prange); 2248 break; 2249 case SVM_OP_ADD_RANGE_AND_MAP: 2250 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2251 prange, prange->start, prange->last); 2252 svm_range_add_to_svms(prange); 2253 svm_range_add_notifier_locked(mm, prange); 2254 /* TODO: implement deferred validation and mapping */ 2255 break; 2256 default: 2257 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2258 prange->work_item.op); 2259 } 2260 } 2261 2262 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2263 { 2264 struct kfd_process_device *pdd; 2265 struct kfd_process *p; 2266 uint32_t i; 2267 2268 p = container_of(svms, struct kfd_process, svms); 2269 2270 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2271 pdd = p->pdds[i]; 2272 if (!pdd) 2273 continue; 2274 2275 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2276 2277 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2278 pdd->dev->adev->irq.retry_cam_enabled ? 2279 &pdd->dev->adev->irq.ih : 2280 &pdd->dev->adev->irq.ih1); 2281 2282 if (pdd->dev->adev->irq.retry_cam_enabled) 2283 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2284 &pdd->dev->adev->irq.ih_soft); 2285 2286 2287 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2288 } 2289 } 2290 2291 static void svm_range_deferred_list_work(struct work_struct *work) 2292 { 2293 struct svm_range_list *svms; 2294 struct svm_range *prange; 2295 struct mm_struct *mm; 2296 2297 svms = container_of(work, struct svm_range_list, deferred_list_work); 2298 pr_debug("enter svms 0x%p\n", svms); 2299 2300 spin_lock(&svms->deferred_list_lock); 2301 while (!list_empty(&svms->deferred_range_list)) { 2302 prange = list_first_entry(&svms->deferred_range_list, 2303 struct svm_range, deferred_list); 2304 spin_unlock(&svms->deferred_list_lock); 2305 2306 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2307 prange->start, prange->last, prange->work_item.op); 2308 2309 mm = prange->work_item.mm; 2310 2311 mmap_write_lock(mm); 2312 2313 /* Remove from deferred_list must be inside mmap write lock, for 2314 * two race cases: 2315 * 1. unmap_from_cpu may change work_item.op and add the range 2316 * to deferred_list again, cause use after free bug. 2317 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2318 * lock and continue because deferred_list is empty, but 2319 * deferred_list work is actually waiting for mmap lock. 2320 */ 2321 spin_lock(&svms->deferred_list_lock); 2322 list_del_init(&prange->deferred_list); 2323 spin_unlock(&svms->deferred_list_lock); 2324 2325 mutex_lock(&svms->lock); 2326 mutex_lock(&prange->migrate_mutex); 2327 while (!list_empty(&prange->child_list)) { 2328 struct svm_range *pchild; 2329 2330 pchild = list_first_entry(&prange->child_list, 2331 struct svm_range, child_list); 2332 pr_debug("child prange 0x%p op %d\n", pchild, 2333 pchild->work_item.op); 2334 list_del_init(&pchild->child_list); 2335 svm_range_handle_list_op(svms, pchild, mm); 2336 } 2337 mutex_unlock(&prange->migrate_mutex); 2338 2339 svm_range_handle_list_op(svms, prange, mm); 2340 mutex_unlock(&svms->lock); 2341 mmap_write_unlock(mm); 2342 2343 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2344 * last mm refcount, schedule release work to avoid circular locking 2345 */ 2346 mmput_async(mm); 2347 2348 spin_lock(&svms->deferred_list_lock); 2349 } 2350 spin_unlock(&svms->deferred_list_lock); 2351 pr_debug("exit svms 0x%p\n", svms); 2352 } 2353 2354 void 2355 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2356 struct mm_struct *mm, enum svm_work_list_ops op) 2357 { 2358 spin_lock(&svms->deferred_list_lock); 2359 /* if prange is on the deferred list */ 2360 if (!list_empty(&prange->deferred_list)) { 2361 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2362 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2363 if (op != SVM_OP_NULL && 2364 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2365 prange->work_item.op = op; 2366 } else { 2367 prange->work_item.op = op; 2368 2369 /* Pairs with mmput in deferred_list_work */ 2370 mmget(mm); 2371 prange->work_item.mm = mm; 2372 list_add_tail(&prange->deferred_list, 2373 &prange->svms->deferred_range_list); 2374 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2375 prange, prange->start, prange->last, op); 2376 } 2377 spin_unlock(&svms->deferred_list_lock); 2378 } 2379 2380 void schedule_deferred_list_work(struct svm_range_list *svms) 2381 { 2382 spin_lock(&svms->deferred_list_lock); 2383 if (!list_empty(&svms->deferred_range_list)) 2384 schedule_work(&svms->deferred_list_work); 2385 spin_unlock(&svms->deferred_list_lock); 2386 } 2387 2388 static void 2389 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2390 struct svm_range *prange, unsigned long start, 2391 unsigned long last) 2392 { 2393 struct svm_range *head; 2394 struct svm_range *tail; 2395 2396 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2397 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2398 prange->start, prange->last); 2399 return; 2400 } 2401 if (start > prange->last || last < prange->start) 2402 return; 2403 2404 head = tail = prange; 2405 if (start > prange->start) 2406 svm_range_split(prange, prange->start, start - 1, &tail); 2407 if (last < tail->last) 2408 svm_range_split(tail, last + 1, tail->last, &head); 2409 2410 if (head != prange && tail != prange) { 2411 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2412 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2413 } else if (tail != prange) { 2414 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2415 } else if (head != prange) { 2416 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2417 } else if (parent != prange) { 2418 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2419 } 2420 } 2421 2422 static void 2423 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2424 unsigned long start, unsigned long last) 2425 { 2426 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2427 struct svm_range_list *svms; 2428 struct svm_range *pchild; 2429 struct kfd_process *p; 2430 unsigned long s, l; 2431 bool unmap_parent; 2432 uint32_t i; 2433 2434 if (atomic_read(&prange->queue_refcount)) { 2435 int r; 2436 2437 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2438 prange->start << PAGE_SHIFT); 2439 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2440 if (r) 2441 pr_debug("failed %d to quiesce KFD queues\n", r); 2442 } 2443 2444 p = kfd_lookup_process_by_mm(mm); 2445 if (!p) 2446 return; 2447 svms = &p->svms; 2448 2449 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2450 prange, prange->start, prange->last, start, last); 2451 2452 /* calculate time stamps that are used to decide which page faults need be 2453 * dropped or handled before unmap pages from gpu vm 2454 */ 2455 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2456 struct kfd_process_device *pdd; 2457 struct amdgpu_device *adev; 2458 struct amdgpu_ih_ring *ih; 2459 uint32_t checkpoint_wptr; 2460 2461 pdd = p->pdds[i]; 2462 if (!pdd) 2463 continue; 2464 2465 adev = pdd->dev->adev; 2466 2467 /* Check and drain ih1 ring if cam not available */ 2468 if (adev->irq.ih1.ring_size) { 2469 ih = &adev->irq.ih1; 2470 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2471 if (ih->rptr != checkpoint_wptr) { 2472 svms->checkpoint_ts[i] = 2473 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2474 continue; 2475 } 2476 } 2477 2478 /* check if dev->irq.ih_soft is not empty */ 2479 ih = &adev->irq.ih_soft; 2480 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2481 if (ih->rptr != checkpoint_wptr) 2482 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2483 } 2484 2485 unmap_parent = start <= prange->start && last >= prange->last; 2486 2487 list_for_each_entry(pchild, &prange->child_list, child_list) { 2488 mutex_lock_nested(&pchild->lock, 1); 2489 s = max(start, pchild->start); 2490 l = min(last, pchild->last); 2491 if (l >= s) 2492 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2493 svm_range_unmap_split(mm, prange, pchild, start, last); 2494 mutex_unlock(&pchild->lock); 2495 } 2496 s = max(start, prange->start); 2497 l = min(last, prange->last); 2498 if (l >= s) 2499 svm_range_unmap_from_gpus(prange, s, l, trigger); 2500 svm_range_unmap_split(mm, prange, prange, start, last); 2501 2502 if (unmap_parent) 2503 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2504 else 2505 svm_range_add_list_work(svms, prange, mm, 2506 SVM_OP_UPDATE_RANGE_NOTIFIER); 2507 schedule_deferred_list_work(svms); 2508 2509 kfd_unref_process(p); 2510 } 2511 2512 /** 2513 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2514 * @mni: mmu_interval_notifier struct 2515 * @range: mmu_notifier_range struct 2516 * @cur_seq: value to pass to mmu_interval_set_seq() 2517 * 2518 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2519 * is from migration, or CPU page invalidation callback. 2520 * 2521 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2522 * work thread, and split prange if only part of prange is unmapped. 2523 * 2524 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2525 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2526 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2527 * update GPU mapping to recover. 2528 * 2529 * Context: mmap lock, notifier_invalidate_start lock are held 2530 * for invalidate event, prange lock is held if this is from migration 2531 */ 2532 static bool 2533 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2534 const struct mmu_notifier_range *range, 2535 unsigned long cur_seq) 2536 { 2537 struct svm_range *prange; 2538 unsigned long start; 2539 unsigned long last; 2540 2541 if (range->event == MMU_NOTIFY_RELEASE) 2542 return true; 2543 if (!mmget_not_zero(mni->mm)) 2544 return true; 2545 2546 start = mni->interval_tree.start; 2547 last = mni->interval_tree.last; 2548 start = max(start, range->start) >> PAGE_SHIFT; 2549 last = min(last, range->end - 1) >> PAGE_SHIFT; 2550 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2551 start, last, range->start >> PAGE_SHIFT, 2552 (range->end - 1) >> PAGE_SHIFT, 2553 mni->interval_tree.start >> PAGE_SHIFT, 2554 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2555 2556 prange = container_of(mni, struct svm_range, notifier); 2557 2558 svm_range_lock(prange); 2559 mmu_interval_set_seq(mni, cur_seq); 2560 2561 switch (range->event) { 2562 case MMU_NOTIFY_UNMAP: 2563 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2564 break; 2565 default: 2566 svm_range_evict(prange, mni->mm, start, last, range->event); 2567 break; 2568 } 2569 2570 svm_range_unlock(prange); 2571 mmput(mni->mm); 2572 2573 return true; 2574 } 2575 2576 /** 2577 * svm_range_from_addr - find svm range from fault address 2578 * @svms: svm range list header 2579 * @addr: address to search range interval tree, in pages 2580 * @parent: parent range if range is on child list 2581 * 2582 * Context: The caller must hold svms->lock 2583 * 2584 * Return: the svm_range found or NULL 2585 */ 2586 struct svm_range * 2587 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2588 struct svm_range **parent) 2589 { 2590 struct interval_tree_node *node; 2591 struct svm_range *prange; 2592 struct svm_range *pchild; 2593 2594 node = interval_tree_iter_first(&svms->objects, addr, addr); 2595 if (!node) 2596 return NULL; 2597 2598 prange = container_of(node, struct svm_range, it_node); 2599 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2600 addr, prange->start, prange->last, node->start, node->last); 2601 2602 if (addr >= prange->start && addr <= prange->last) { 2603 if (parent) 2604 *parent = prange; 2605 return prange; 2606 } 2607 list_for_each_entry(pchild, &prange->child_list, child_list) 2608 if (addr >= pchild->start && addr <= pchild->last) { 2609 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2610 addr, pchild->start, pchild->last); 2611 if (parent) 2612 *parent = prange; 2613 return pchild; 2614 } 2615 2616 return NULL; 2617 } 2618 2619 /* svm_range_best_restore_location - decide the best fault restore location 2620 * @prange: svm range structure 2621 * @adev: the GPU on which vm fault happened 2622 * 2623 * This is only called when xnack is on, to decide the best location to restore 2624 * the range mapping after GPU vm fault. Caller uses the best location to do 2625 * migration if actual loc is not best location, then update GPU page table 2626 * mapping to the best location. 2627 * 2628 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2629 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2630 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2631 * if range actual loc is cpu, best_loc is cpu 2632 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2633 * range actual loc. 2634 * Otherwise, GPU no access, best_loc is -1. 2635 * 2636 * Return: 2637 * -1 means vm fault GPU no access 2638 * 0 for CPU or GPU id 2639 */ 2640 static int32_t 2641 svm_range_best_restore_location(struct svm_range *prange, 2642 struct kfd_node *node, 2643 int32_t *gpuidx) 2644 { 2645 struct kfd_node *bo_node, *preferred_node; 2646 struct kfd_process *p; 2647 uint32_t gpuid; 2648 int r; 2649 2650 p = container_of(prange->svms, struct kfd_process, svms); 2651 2652 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2653 if (r < 0) { 2654 pr_debug("failed to get gpuid from kgd\n"); 2655 return -1; 2656 } 2657 2658 if (node->adev->flags & AMD_IS_APU) 2659 return 0; 2660 2661 if (prange->preferred_loc == gpuid || 2662 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2663 return prange->preferred_loc; 2664 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2665 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2666 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2667 return prange->preferred_loc; 2668 /* fall through */ 2669 } 2670 2671 if (test_bit(*gpuidx, prange->bitmap_access)) 2672 return gpuid; 2673 2674 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2675 if (!prange->actual_loc) 2676 return 0; 2677 2678 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2679 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2680 return prange->actual_loc; 2681 else 2682 return 0; 2683 } 2684 2685 return -1; 2686 } 2687 2688 static int 2689 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2690 unsigned long *start, unsigned long *last, 2691 bool *is_heap_stack) 2692 { 2693 struct vm_area_struct *vma; 2694 struct interval_tree_node *node; 2695 struct rb_node *rb_node; 2696 unsigned long start_limit, end_limit; 2697 2698 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2699 if (!vma) { 2700 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2701 return -EFAULT; 2702 } 2703 2704 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2705 2706 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2707 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2708 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2709 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2710 2711 /* First range that starts after the fault address */ 2712 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2713 if (node) { 2714 end_limit = min(end_limit, node->start); 2715 /* Last range that ends before the fault address */ 2716 rb_node = rb_prev(&node->rb); 2717 } else { 2718 /* Last range must end before addr because 2719 * there was no range after addr 2720 */ 2721 rb_node = rb_last(&p->svms.objects.rb_root); 2722 } 2723 if (rb_node) { 2724 node = container_of(rb_node, struct interval_tree_node, rb); 2725 if (node->last >= addr) { 2726 WARN(1, "Overlap with prev node and page fault addr\n"); 2727 return -EFAULT; 2728 } 2729 start_limit = max(start_limit, node->last + 1); 2730 } 2731 2732 *start = start_limit; 2733 *last = end_limit - 1; 2734 2735 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2736 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2737 *start, *last, *is_heap_stack); 2738 2739 return 0; 2740 } 2741 2742 static int 2743 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2744 uint64_t *bo_s, uint64_t *bo_l) 2745 { 2746 struct amdgpu_bo_va_mapping *mapping; 2747 struct interval_tree_node *node; 2748 struct amdgpu_bo *bo = NULL; 2749 unsigned long userptr; 2750 uint32_t i; 2751 int r; 2752 2753 for (i = 0; i < p->n_pdds; i++) { 2754 struct amdgpu_vm *vm; 2755 2756 if (!p->pdds[i]->drm_priv) 2757 continue; 2758 2759 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2760 r = amdgpu_bo_reserve(vm->root.bo, false); 2761 if (r) 2762 return r; 2763 2764 /* Check userptr by searching entire vm->va interval tree */ 2765 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2766 while (node) { 2767 mapping = container_of((struct rb_node *)node, 2768 struct amdgpu_bo_va_mapping, rb); 2769 bo = mapping->bo_va->base.bo; 2770 2771 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2772 start << PAGE_SHIFT, 2773 last << PAGE_SHIFT, 2774 &userptr)) { 2775 node = interval_tree_iter_next(node, 0, ~0ULL); 2776 continue; 2777 } 2778 2779 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2780 start, last); 2781 if (bo_s && bo_l) { 2782 *bo_s = userptr >> PAGE_SHIFT; 2783 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2784 } 2785 amdgpu_bo_unreserve(vm->root.bo); 2786 return -EADDRINUSE; 2787 } 2788 amdgpu_bo_unreserve(vm->root.bo); 2789 } 2790 return 0; 2791 } 2792 2793 static struct 2794 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2795 struct kfd_process *p, 2796 struct mm_struct *mm, 2797 int64_t addr) 2798 { 2799 struct svm_range *prange = NULL; 2800 unsigned long start, last; 2801 uint32_t gpuid, gpuidx; 2802 bool is_heap_stack; 2803 uint64_t bo_s = 0; 2804 uint64_t bo_l = 0; 2805 int r; 2806 2807 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2808 &is_heap_stack)) 2809 return NULL; 2810 2811 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2812 if (r != -EADDRINUSE) 2813 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2814 2815 if (r == -EADDRINUSE) { 2816 if (addr >= bo_s && addr <= bo_l) 2817 return NULL; 2818 2819 /* Create one page svm range if 2MB range overlapping */ 2820 start = addr; 2821 last = addr; 2822 } 2823 2824 prange = svm_range_new(&p->svms, start, last, true); 2825 if (!prange) { 2826 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2827 return NULL; 2828 } 2829 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2830 pr_debug("failed to get gpuid from kgd\n"); 2831 svm_range_free(prange, true); 2832 return NULL; 2833 } 2834 2835 if (is_heap_stack) 2836 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2837 2838 svm_range_add_to_svms(prange); 2839 svm_range_add_notifier_locked(mm, prange); 2840 2841 return prange; 2842 } 2843 2844 /* svm_range_skip_recover - decide if prange can be recovered 2845 * @prange: svm range structure 2846 * 2847 * GPU vm retry fault handle skip recover the range for cases: 2848 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2849 * deferred list work will drain the stale fault before free the prange. 2850 * 2. prange is on deferred list to add interval notifier after split, or 2851 * 3. prange is child range, it is split from parent prange, recover later 2852 * after interval notifier is added. 2853 * 2854 * Return: true to skip recover, false to recover 2855 */ 2856 static bool svm_range_skip_recover(struct svm_range *prange) 2857 { 2858 struct svm_range_list *svms = prange->svms; 2859 2860 spin_lock(&svms->deferred_list_lock); 2861 if (list_empty(&prange->deferred_list) && 2862 list_empty(&prange->child_list)) { 2863 spin_unlock(&svms->deferred_list_lock); 2864 return false; 2865 } 2866 spin_unlock(&svms->deferred_list_lock); 2867 2868 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2869 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2870 svms, prange, prange->start, prange->last); 2871 return true; 2872 } 2873 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2874 prange->work_item.op == SVM_OP_ADD_RANGE) { 2875 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2876 svms, prange, prange->start, prange->last); 2877 return true; 2878 } 2879 return false; 2880 } 2881 2882 static void 2883 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2884 int32_t gpuidx) 2885 { 2886 struct kfd_process_device *pdd; 2887 2888 /* fault is on different page of same range 2889 * or fault is skipped to recover later 2890 * or fault is on invalid virtual address 2891 */ 2892 if (gpuidx == MAX_GPU_INSTANCE) { 2893 uint32_t gpuid; 2894 int r; 2895 2896 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2897 if (r < 0) 2898 return; 2899 } 2900 2901 /* fault is recovered 2902 * or fault cannot recover because GPU no access on the range 2903 */ 2904 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2905 if (pdd) 2906 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2907 } 2908 2909 static bool 2910 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2911 { 2912 unsigned long requested = VM_READ; 2913 2914 if (write_fault) 2915 requested |= VM_WRITE; 2916 2917 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2918 vma->vm_flags); 2919 return (vma->vm_flags & requested) == requested; 2920 } 2921 2922 int 2923 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2924 uint32_t vmid, uint32_t node_id, 2925 uint64_t addr, uint64_t ts, bool write_fault) 2926 { 2927 unsigned long start, last, size; 2928 struct mm_struct *mm = NULL; 2929 struct svm_range_list *svms; 2930 struct svm_range *prange; 2931 struct kfd_process *p; 2932 ktime_t timestamp = ktime_get_boottime(); 2933 struct kfd_node *node; 2934 int32_t best_loc; 2935 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 2936 bool write_locked = false; 2937 struct vm_area_struct *vma; 2938 bool migration = false; 2939 int r = 0; 2940 2941 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2942 pr_debug("device does not support SVM\n"); 2943 return -EFAULT; 2944 } 2945 2946 p = kfd_lookup_process_by_pasid(pasid); 2947 if (!p) { 2948 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2949 return 0; 2950 } 2951 svms = &p->svms; 2952 2953 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2954 2955 if (atomic_read(&svms->drain_pagefaults)) { 2956 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 2957 r = 0; 2958 goto out; 2959 } 2960 2961 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2962 if (!node) { 2963 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2964 vmid); 2965 r = -EFAULT; 2966 goto out; 2967 } 2968 2969 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2970 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 2971 r = -EFAULT; 2972 goto out; 2973 } 2974 2975 /* check if this page fault time stamp is before svms->checkpoint_ts */ 2976 if (svms->checkpoint_ts[gpuidx] != 0) { 2977 if (amdgpu_ih_ts_after(ts, svms->checkpoint_ts[gpuidx])) { 2978 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2979 r = 0; 2980 goto out; 2981 } else 2982 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 2983 * to zero to avoid following ts wrap around give wrong comparing 2984 */ 2985 svms->checkpoint_ts[gpuidx] = 0; 2986 } 2987 2988 if (!p->xnack_enabled) { 2989 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2990 r = -EFAULT; 2991 goto out; 2992 } 2993 2994 /* p->lead_thread is available as kfd_process_wq_release flush the work 2995 * before releasing task ref. 2996 */ 2997 mm = get_task_mm(p->lead_thread); 2998 if (!mm) { 2999 pr_debug("svms 0x%p failed to get mm\n", svms); 3000 r = 0; 3001 goto out; 3002 } 3003 3004 mmap_read_lock(mm); 3005 retry_write_locked: 3006 mutex_lock(&svms->lock); 3007 prange = svm_range_from_addr(svms, addr, NULL); 3008 if (!prange) { 3009 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3010 svms, addr); 3011 if (!write_locked) { 3012 /* Need the write lock to create new range with MMU notifier. 3013 * Also flush pending deferred work to make sure the interval 3014 * tree is up to date before we add a new range 3015 */ 3016 mutex_unlock(&svms->lock); 3017 mmap_read_unlock(mm); 3018 mmap_write_lock(mm); 3019 write_locked = true; 3020 goto retry_write_locked; 3021 } 3022 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3023 if (!prange) { 3024 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3025 svms, addr); 3026 mmap_write_downgrade(mm); 3027 r = -EFAULT; 3028 goto out_unlock_svms; 3029 } 3030 } 3031 if (write_locked) 3032 mmap_write_downgrade(mm); 3033 3034 mutex_lock(&prange->migrate_mutex); 3035 3036 if (svm_range_skip_recover(prange)) { 3037 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3038 r = 0; 3039 goto out_unlock_range; 3040 } 3041 3042 /* skip duplicate vm fault on different pages of same range */ 3043 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3044 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3045 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3046 svms, prange->start, prange->last); 3047 r = 0; 3048 goto out_unlock_range; 3049 } 3050 3051 /* __do_munmap removed VMA, return success as we are handling stale 3052 * retry fault. 3053 */ 3054 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3055 if (!vma) { 3056 pr_debug("address 0x%llx VMA is removed\n", addr); 3057 r = 0; 3058 goto out_unlock_range; 3059 } 3060 3061 if (!svm_fault_allowed(vma, write_fault)) { 3062 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3063 write_fault ? "write" : "read"); 3064 r = -EPERM; 3065 goto out_unlock_range; 3066 } 3067 3068 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3069 if (best_loc == -1) { 3070 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3071 svms, prange->start, prange->last); 3072 r = -EACCES; 3073 goto out_unlock_range; 3074 } 3075 3076 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3077 svms, prange->start, prange->last, best_loc, 3078 prange->actual_loc); 3079 3080 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3081 write_fault, timestamp); 3082 3083 /* Align migration range start and size to granularity size */ 3084 size = 1UL << prange->granularity; 3085 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3086 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3087 if (prange->actual_loc != 0 || best_loc != 0) { 3088 migration = true; 3089 3090 if (best_loc) { 3091 r = svm_migrate_to_vram(prange, best_loc, start, last, 3092 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3093 if (r) { 3094 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3095 r, addr); 3096 /* Fallback to system memory if migration to 3097 * VRAM failed 3098 */ 3099 if (prange->actual_loc && prange->actual_loc != best_loc) 3100 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3101 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3102 else 3103 r = 0; 3104 } 3105 } else { 3106 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3107 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3108 } 3109 if (r) { 3110 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3111 r, svms, start, last); 3112 goto out_unlock_range; 3113 } 3114 } 3115 3116 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3117 false, false); 3118 if (r) 3119 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3120 r, svms, start, last); 3121 3122 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3123 migration); 3124 3125 out_unlock_range: 3126 mutex_unlock(&prange->migrate_mutex); 3127 out_unlock_svms: 3128 mutex_unlock(&svms->lock); 3129 mmap_read_unlock(mm); 3130 3131 svm_range_count_fault(node, p, gpuidx); 3132 3133 mmput(mm); 3134 out: 3135 kfd_unref_process(p); 3136 3137 if (r == -EAGAIN) { 3138 pr_debug("recover vm fault later\n"); 3139 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3140 r = 0; 3141 } 3142 return r; 3143 } 3144 3145 int 3146 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3147 { 3148 struct svm_range *prange, *pchild; 3149 uint64_t reserved_size = 0; 3150 uint64_t size; 3151 int r = 0; 3152 3153 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3154 3155 mutex_lock(&p->svms.lock); 3156 3157 list_for_each_entry(prange, &p->svms.list, list) { 3158 svm_range_lock(prange); 3159 list_for_each_entry(pchild, &prange->child_list, child_list) { 3160 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3161 if (xnack_enabled) { 3162 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3163 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3164 } else { 3165 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3166 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3167 if (r) 3168 goto out_unlock; 3169 reserved_size += size; 3170 } 3171 } 3172 3173 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3174 if (xnack_enabled) { 3175 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3176 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3177 } else { 3178 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3179 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3180 if (r) 3181 goto out_unlock; 3182 reserved_size += size; 3183 } 3184 out_unlock: 3185 svm_range_unlock(prange); 3186 if (r) 3187 break; 3188 } 3189 3190 if (r) 3191 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3192 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3193 else 3194 /* Change xnack mode must be inside svms lock, to avoid race with 3195 * svm_range_deferred_list_work unreserve memory in parallel. 3196 */ 3197 p->xnack_enabled = xnack_enabled; 3198 3199 mutex_unlock(&p->svms.lock); 3200 return r; 3201 } 3202 3203 void svm_range_list_fini(struct kfd_process *p) 3204 { 3205 struct svm_range *prange; 3206 struct svm_range *next; 3207 3208 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3209 3210 cancel_delayed_work_sync(&p->svms.restore_work); 3211 3212 /* Ensure list work is finished before process is destroyed */ 3213 flush_work(&p->svms.deferred_list_work); 3214 3215 /* 3216 * Ensure no retry fault comes in afterwards, as page fault handler will 3217 * not find kfd process and take mm lock to recover fault. 3218 * stop kfd page fault handing, then wait pending page faults got drained 3219 */ 3220 atomic_set(&p->svms.drain_pagefaults, 1); 3221 svm_range_drain_retry_fault(&p->svms); 3222 3223 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3224 svm_range_unlink(prange); 3225 svm_range_remove_notifier(prange); 3226 svm_range_free(prange, true); 3227 } 3228 3229 mutex_destroy(&p->svms.lock); 3230 3231 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3232 } 3233 3234 int svm_range_list_init(struct kfd_process *p) 3235 { 3236 struct svm_range_list *svms = &p->svms; 3237 int i; 3238 3239 svms->objects = RB_ROOT_CACHED; 3240 mutex_init(&svms->lock); 3241 INIT_LIST_HEAD(&svms->list); 3242 atomic_set(&svms->evicted_ranges, 0); 3243 atomic_set(&svms->drain_pagefaults, 0); 3244 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3245 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3246 INIT_LIST_HEAD(&svms->deferred_range_list); 3247 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3248 spin_lock_init(&svms->deferred_list_lock); 3249 3250 for (i = 0; i < p->n_pdds; i++) 3251 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3252 bitmap_set(svms->bitmap_supported, i, 1); 3253 3254 /* Value of default granularity cannot exceed 0x1B, the 3255 * number of pages supported by a 4-level paging table 3256 */ 3257 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3258 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3259 3260 return 0; 3261 } 3262 3263 /** 3264 * svm_range_check_vm - check if virtual address range mapped already 3265 * @p: current kfd_process 3266 * @start: range start address, in pages 3267 * @last: range last address, in pages 3268 * @bo_s: mapping start address in pages if address range already mapped 3269 * @bo_l: mapping last address in pages if address range already mapped 3270 * 3271 * The purpose is to avoid virtual address ranges already allocated by 3272 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3273 * It looks for each pdd in the kfd_process. 3274 * 3275 * Context: Process context 3276 * 3277 * Return 0 - OK, if the range is not mapped. 3278 * Otherwise error code: 3279 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3280 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3281 * a signal. Release all buffer reservations and return to user-space. 3282 */ 3283 static int 3284 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3285 uint64_t *bo_s, uint64_t *bo_l) 3286 { 3287 struct amdgpu_bo_va_mapping *mapping; 3288 struct interval_tree_node *node; 3289 uint32_t i; 3290 int r; 3291 3292 for (i = 0; i < p->n_pdds; i++) { 3293 struct amdgpu_vm *vm; 3294 3295 if (!p->pdds[i]->drm_priv) 3296 continue; 3297 3298 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3299 r = amdgpu_bo_reserve(vm->root.bo, false); 3300 if (r) 3301 return r; 3302 3303 node = interval_tree_iter_first(&vm->va, start, last); 3304 if (node) { 3305 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3306 start, last); 3307 mapping = container_of((struct rb_node *)node, 3308 struct amdgpu_bo_va_mapping, rb); 3309 if (bo_s && bo_l) { 3310 *bo_s = mapping->start; 3311 *bo_l = mapping->last; 3312 } 3313 amdgpu_bo_unreserve(vm->root.bo); 3314 return -EADDRINUSE; 3315 } 3316 amdgpu_bo_unreserve(vm->root.bo); 3317 } 3318 3319 return 0; 3320 } 3321 3322 /** 3323 * svm_range_is_valid - check if virtual address range is valid 3324 * @p: current kfd_process 3325 * @start: range start address, in pages 3326 * @size: range size, in pages 3327 * 3328 * Valid virtual address range means it belongs to one or more VMAs 3329 * 3330 * Context: Process context 3331 * 3332 * Return: 3333 * 0 - OK, otherwise error code 3334 */ 3335 static int 3336 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3337 { 3338 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3339 struct vm_area_struct *vma; 3340 unsigned long end; 3341 unsigned long start_unchg = start; 3342 3343 start <<= PAGE_SHIFT; 3344 end = start + (size << PAGE_SHIFT); 3345 do { 3346 vma = vma_lookup(p->mm, start); 3347 if (!vma || (vma->vm_flags & device_vma)) 3348 return -EFAULT; 3349 start = min(end, vma->vm_end); 3350 } while (start < end); 3351 3352 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3353 NULL); 3354 } 3355 3356 /** 3357 * svm_range_best_prefetch_location - decide the best prefetch location 3358 * @prange: svm range structure 3359 * 3360 * For xnack off: 3361 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3362 * can be CPU or GPU. 3363 * 3364 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3365 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3366 * the best prefetch location is always CPU, because GPU can not have coherent 3367 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3368 * 3369 * For xnack on: 3370 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3371 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3372 * 3373 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3374 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3375 * prefetch location is always CPU. 3376 * 3377 * Context: Process context 3378 * 3379 * Return: 3380 * 0 for CPU or GPU id 3381 */ 3382 static uint32_t 3383 svm_range_best_prefetch_location(struct svm_range *prange) 3384 { 3385 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3386 uint32_t best_loc = prange->prefetch_loc; 3387 struct kfd_process_device *pdd; 3388 struct kfd_node *bo_node; 3389 struct kfd_process *p; 3390 uint32_t gpuidx; 3391 3392 p = container_of(prange->svms, struct kfd_process, svms); 3393 3394 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3395 goto out; 3396 3397 bo_node = svm_range_get_node_by_id(prange, best_loc); 3398 if (!bo_node) { 3399 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3400 best_loc = 0; 3401 goto out; 3402 } 3403 3404 if (bo_node->adev->flags & AMD_IS_APU) { 3405 best_loc = 0; 3406 goto out; 3407 } 3408 3409 if (p->xnack_enabled) 3410 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3411 else 3412 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3413 MAX_GPU_INSTANCE); 3414 3415 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3416 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3417 if (!pdd) { 3418 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3419 continue; 3420 } 3421 3422 if (pdd->dev->adev == bo_node->adev) 3423 continue; 3424 3425 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3426 best_loc = 0; 3427 break; 3428 } 3429 } 3430 3431 out: 3432 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3433 p->xnack_enabled, &p->svms, prange->start, prange->last, 3434 best_loc); 3435 3436 return best_loc; 3437 } 3438 3439 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3440 * @mm: current process mm_struct 3441 * @prange: svm range structure 3442 * @migrated: output, true if migration is triggered 3443 * 3444 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3445 * from ram to vram. 3446 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3447 * from vram to ram. 3448 * 3449 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3450 * and restore work: 3451 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3452 * stops all queues, schedule restore work 3453 * 2. svm_range_restore_work wait for migration is done by 3454 * a. svm_range_validate_vram takes prange->migrate_mutex 3455 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3456 * 3. restore work update mappings of GPU, resume all queues. 3457 * 3458 * Context: Process context 3459 * 3460 * Return: 3461 * 0 - OK, otherwise - error code of migration 3462 */ 3463 static int 3464 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3465 bool *migrated) 3466 { 3467 uint32_t best_loc; 3468 int r = 0; 3469 3470 *migrated = false; 3471 best_loc = svm_range_best_prefetch_location(prange); 3472 3473 /* when best_loc is a gpu node and same as prange->actual_loc 3474 * we still need do migration as prange->actual_loc !=0 does 3475 * not mean all pages in prange are vram. hmm migrate will pick 3476 * up right pages during migration. 3477 */ 3478 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3479 (best_loc == 0 && prange->actual_loc == 0)) 3480 return 0; 3481 3482 if (!best_loc) { 3483 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3484 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3485 *migrated = !r; 3486 return r; 3487 } 3488 3489 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3490 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3491 *migrated = !r; 3492 3493 return 0; 3494 } 3495 3496 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3497 { 3498 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3499 * signaled yet and we're under the protection of the fence->lock. 3500 * After the fence is signaled in svm_range_bo_release, we cannot get 3501 * here any more. 3502 * 3503 * Reference is dropped in svm_range_evict_svm_bo_worker. 3504 */ 3505 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3506 WRITE_ONCE(fence->svm_bo->evicting, 1); 3507 schedule_work(&fence->svm_bo->eviction_work); 3508 } 3509 3510 return 0; 3511 } 3512 3513 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3514 { 3515 struct svm_range_bo *svm_bo; 3516 struct mm_struct *mm; 3517 int r = 0; 3518 3519 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3520 3521 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3522 mm = svm_bo->eviction_fence->mm; 3523 } else { 3524 svm_range_bo_unref(svm_bo); 3525 return; 3526 } 3527 3528 mmap_read_lock(mm); 3529 spin_lock(&svm_bo->list_lock); 3530 while (!list_empty(&svm_bo->range_list) && !r) { 3531 struct svm_range *prange = 3532 list_first_entry(&svm_bo->range_list, 3533 struct svm_range, svm_bo_list); 3534 int retries = 3; 3535 3536 list_del_init(&prange->svm_bo_list); 3537 spin_unlock(&svm_bo->list_lock); 3538 3539 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3540 prange->start, prange->last); 3541 3542 mutex_lock(&prange->migrate_mutex); 3543 do { 3544 /* migrate all vram pages in this prange to sys ram 3545 * after that prange->actual_loc should be zero 3546 */ 3547 r = svm_migrate_vram_to_ram(prange, mm, 3548 prange->start, prange->last, 3549 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3550 } while (!r && prange->actual_loc && --retries); 3551 3552 if (!r && prange->actual_loc) 3553 pr_info_once("Migration failed during eviction"); 3554 3555 if (!prange->actual_loc) { 3556 mutex_lock(&prange->lock); 3557 prange->svm_bo = NULL; 3558 mutex_unlock(&prange->lock); 3559 } 3560 mutex_unlock(&prange->migrate_mutex); 3561 3562 spin_lock(&svm_bo->list_lock); 3563 } 3564 spin_unlock(&svm_bo->list_lock); 3565 mmap_read_unlock(mm); 3566 mmput(mm); 3567 3568 dma_fence_signal(&svm_bo->eviction_fence->base); 3569 3570 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3571 * has been called in svm_migrate_vram_to_ram 3572 */ 3573 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3574 svm_range_bo_unref(svm_bo); 3575 } 3576 3577 static int 3578 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3579 uint64_t start, uint64_t size, uint32_t nattr, 3580 struct kfd_ioctl_svm_attribute *attrs) 3581 { 3582 struct amdkfd_process_info *process_info = p->kgd_process_info; 3583 struct list_head update_list; 3584 struct list_head insert_list; 3585 struct list_head remove_list; 3586 struct list_head remap_list; 3587 struct svm_range_list *svms; 3588 struct svm_range *prange; 3589 struct svm_range *next; 3590 bool update_mapping = false; 3591 bool flush_tlb; 3592 int r, ret = 0; 3593 3594 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3595 p->pasid, &p->svms, start, start + size - 1, size); 3596 3597 r = svm_range_check_attr(p, nattr, attrs); 3598 if (r) 3599 return r; 3600 3601 svms = &p->svms; 3602 3603 mutex_lock(&process_info->lock); 3604 3605 svm_range_list_lock_and_flush_work(svms, mm); 3606 3607 r = svm_range_is_valid(p, start, size); 3608 if (r) { 3609 pr_debug("invalid range r=%d\n", r); 3610 mmap_write_unlock(mm); 3611 goto out; 3612 } 3613 3614 mutex_lock(&svms->lock); 3615 3616 /* Add new range and split existing ranges as needed */ 3617 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3618 &insert_list, &remove_list, &remap_list); 3619 if (r) { 3620 mutex_unlock(&svms->lock); 3621 mmap_write_unlock(mm); 3622 goto out; 3623 } 3624 /* Apply changes as a transaction */ 3625 list_for_each_entry_safe(prange, next, &insert_list, list) { 3626 svm_range_add_to_svms(prange); 3627 svm_range_add_notifier_locked(mm, prange); 3628 } 3629 list_for_each_entry(prange, &update_list, update_list) { 3630 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3631 /* TODO: unmap ranges from GPU that lost access */ 3632 } 3633 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3634 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3635 prange->svms, prange, prange->start, 3636 prange->last); 3637 svm_range_unlink(prange); 3638 svm_range_remove_notifier(prange); 3639 svm_range_free(prange, false); 3640 } 3641 3642 mmap_write_downgrade(mm); 3643 /* Trigger migrations and revalidate and map to GPUs as needed. If 3644 * this fails we may be left with partially completed actions. There 3645 * is no clean way of rolling back to the previous state in such a 3646 * case because the rollback wouldn't be guaranteed to work either. 3647 */ 3648 list_for_each_entry(prange, &update_list, update_list) { 3649 bool migrated; 3650 3651 mutex_lock(&prange->migrate_mutex); 3652 3653 r = svm_range_trigger_migration(mm, prange, &migrated); 3654 if (r) 3655 goto out_unlock_range; 3656 3657 if (migrated && (!p->xnack_enabled || 3658 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3659 prange->mapped_to_gpu) { 3660 pr_debug("restore_work will update mappings of GPUs\n"); 3661 mutex_unlock(&prange->migrate_mutex); 3662 continue; 3663 } 3664 3665 if (!migrated && !update_mapping) { 3666 mutex_unlock(&prange->migrate_mutex); 3667 continue; 3668 } 3669 3670 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3671 3672 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3673 MAX_GPU_INSTANCE, true, true, flush_tlb); 3674 if (r) 3675 pr_debug("failed %d to map svm range\n", r); 3676 3677 out_unlock_range: 3678 mutex_unlock(&prange->migrate_mutex); 3679 if (r) 3680 ret = r; 3681 } 3682 3683 list_for_each_entry(prange, &remap_list, update_list) { 3684 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3685 prange, prange->start, prange->last); 3686 mutex_lock(&prange->migrate_mutex); 3687 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3688 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3689 if (r) 3690 pr_debug("failed %d on remap svm range\n", r); 3691 mutex_unlock(&prange->migrate_mutex); 3692 if (r) 3693 ret = r; 3694 } 3695 3696 dynamic_svm_range_dump(svms); 3697 3698 mutex_unlock(&svms->lock); 3699 mmap_read_unlock(mm); 3700 out: 3701 mutex_unlock(&process_info->lock); 3702 3703 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3704 &p->svms, start, start + size - 1, r); 3705 3706 return ret ? ret : r; 3707 } 3708 3709 static int 3710 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3711 uint64_t start, uint64_t size, uint32_t nattr, 3712 struct kfd_ioctl_svm_attribute *attrs) 3713 { 3714 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3715 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3716 bool get_preferred_loc = false; 3717 bool get_prefetch_loc = false; 3718 bool get_granularity = false; 3719 bool get_accessible = false; 3720 bool get_flags = false; 3721 uint64_t last = start + size - 1UL; 3722 uint8_t granularity = 0xff; 3723 struct interval_tree_node *node; 3724 struct svm_range_list *svms; 3725 struct svm_range *prange; 3726 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3727 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3728 uint32_t flags_and = 0xffffffff; 3729 uint32_t flags_or = 0; 3730 int gpuidx; 3731 uint32_t i; 3732 int r = 0; 3733 3734 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3735 start + size - 1, nattr); 3736 3737 /* Flush pending deferred work to avoid racing with deferred actions from 3738 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3739 * can still race with get_attr because we don't hold the mmap lock. But that 3740 * would be a race condition in the application anyway, and undefined 3741 * behaviour is acceptable in that case. 3742 */ 3743 flush_work(&p->svms.deferred_list_work); 3744 3745 mmap_read_lock(mm); 3746 r = svm_range_is_valid(p, start, size); 3747 mmap_read_unlock(mm); 3748 if (r) { 3749 pr_debug("invalid range r=%d\n", r); 3750 return r; 3751 } 3752 3753 for (i = 0; i < nattr; i++) { 3754 switch (attrs[i].type) { 3755 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3756 get_preferred_loc = true; 3757 break; 3758 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3759 get_prefetch_loc = true; 3760 break; 3761 case KFD_IOCTL_SVM_ATTR_ACCESS: 3762 get_accessible = true; 3763 break; 3764 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3765 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3766 get_flags = true; 3767 break; 3768 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3769 get_granularity = true; 3770 break; 3771 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3772 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3773 fallthrough; 3774 default: 3775 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3776 return -EINVAL; 3777 } 3778 } 3779 3780 svms = &p->svms; 3781 3782 mutex_lock(&svms->lock); 3783 3784 node = interval_tree_iter_first(&svms->objects, start, last); 3785 if (!node) { 3786 pr_debug("range attrs not found return default values\n"); 3787 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3788 &granularity, &flags_and); 3789 flags_or = flags_and; 3790 if (p->xnack_enabled) 3791 bitmap_copy(bitmap_access, svms->bitmap_supported, 3792 MAX_GPU_INSTANCE); 3793 else 3794 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3795 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3796 goto fill_values; 3797 } 3798 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3799 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3800 3801 while (node) { 3802 struct interval_tree_node *next; 3803 3804 prange = container_of(node, struct svm_range, it_node); 3805 next = interval_tree_iter_next(node, start, last); 3806 3807 if (get_preferred_loc) { 3808 if (prange->preferred_loc == 3809 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3810 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3811 location != prange->preferred_loc)) { 3812 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3813 get_preferred_loc = false; 3814 } else { 3815 location = prange->preferred_loc; 3816 } 3817 } 3818 if (get_prefetch_loc) { 3819 if (prange->prefetch_loc == 3820 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3821 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3822 prefetch_loc != prange->prefetch_loc)) { 3823 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3824 get_prefetch_loc = false; 3825 } else { 3826 prefetch_loc = prange->prefetch_loc; 3827 } 3828 } 3829 if (get_accessible) { 3830 bitmap_and(bitmap_access, bitmap_access, 3831 prange->bitmap_access, MAX_GPU_INSTANCE); 3832 bitmap_and(bitmap_aip, bitmap_aip, 3833 prange->bitmap_aip, MAX_GPU_INSTANCE); 3834 } 3835 if (get_flags) { 3836 flags_and &= prange->flags; 3837 flags_or |= prange->flags; 3838 } 3839 3840 if (get_granularity && prange->granularity < granularity) 3841 granularity = prange->granularity; 3842 3843 node = next; 3844 } 3845 fill_values: 3846 mutex_unlock(&svms->lock); 3847 3848 for (i = 0; i < nattr; i++) { 3849 switch (attrs[i].type) { 3850 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3851 attrs[i].value = location; 3852 break; 3853 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3854 attrs[i].value = prefetch_loc; 3855 break; 3856 case KFD_IOCTL_SVM_ATTR_ACCESS: 3857 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3858 attrs[i].value); 3859 if (gpuidx < 0) { 3860 pr_debug("invalid gpuid %x\n", attrs[i].value); 3861 return -EINVAL; 3862 } 3863 if (test_bit(gpuidx, bitmap_access)) 3864 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3865 else if (test_bit(gpuidx, bitmap_aip)) 3866 attrs[i].type = 3867 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3868 else 3869 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3870 break; 3871 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3872 attrs[i].value = flags_and; 3873 break; 3874 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3875 attrs[i].value = ~flags_or; 3876 break; 3877 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3878 attrs[i].value = (uint32_t)granularity; 3879 break; 3880 } 3881 } 3882 3883 return 0; 3884 } 3885 3886 int kfd_criu_resume_svm(struct kfd_process *p) 3887 { 3888 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3889 int nattr_common = 4, nattr_accessibility = 1; 3890 struct criu_svm_metadata *criu_svm_md = NULL; 3891 struct svm_range_list *svms = &p->svms; 3892 struct criu_svm_metadata *next = NULL; 3893 uint32_t set_flags = 0xffffffff; 3894 int i, j, num_attrs, ret = 0; 3895 uint64_t set_attr_size; 3896 struct mm_struct *mm; 3897 3898 if (list_empty(&svms->criu_svm_metadata_list)) { 3899 pr_debug("No SVM data from CRIU restore stage 2\n"); 3900 return ret; 3901 } 3902 3903 mm = get_task_mm(p->lead_thread); 3904 if (!mm) { 3905 pr_err("failed to get mm for the target process\n"); 3906 return -ESRCH; 3907 } 3908 3909 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3910 3911 i = j = 0; 3912 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3913 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3914 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3915 3916 for (j = 0; j < num_attrs; j++) { 3917 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3918 i, j, criu_svm_md->data.attrs[j].type, 3919 i, j, criu_svm_md->data.attrs[j].value); 3920 switch (criu_svm_md->data.attrs[j].type) { 3921 /* During Checkpoint operation, the query for 3922 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3923 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3924 * not used by the range which was checkpointed. Care 3925 * must be taken to not restore with an invalid value 3926 * otherwise the gpuidx value will be invalid and 3927 * set_attr would eventually fail so just replace those 3928 * with another dummy attribute such as 3929 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3930 */ 3931 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3932 if (criu_svm_md->data.attrs[j].value == 3933 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3934 criu_svm_md->data.attrs[j].type = 3935 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3936 criu_svm_md->data.attrs[j].value = 0; 3937 } 3938 break; 3939 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3940 set_flags = criu_svm_md->data.attrs[j].value; 3941 break; 3942 default: 3943 break; 3944 } 3945 } 3946 3947 /* CLR_FLAGS is not available via get_attr during checkpoint but 3948 * it needs to be inserted before restoring the ranges so 3949 * allocate extra space for it before calling set_attr 3950 */ 3951 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3952 (num_attrs + 1); 3953 set_attr_new = krealloc(set_attr, set_attr_size, 3954 GFP_KERNEL); 3955 if (!set_attr_new) { 3956 ret = -ENOMEM; 3957 goto exit; 3958 } 3959 set_attr = set_attr_new; 3960 3961 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3962 sizeof(struct kfd_ioctl_svm_attribute)); 3963 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3964 set_attr[num_attrs].value = ~set_flags; 3965 3966 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3967 criu_svm_md->data.size, num_attrs + 1, 3968 set_attr); 3969 if (ret) { 3970 pr_err("CRIU: failed to set range attributes\n"); 3971 goto exit; 3972 } 3973 3974 i++; 3975 } 3976 exit: 3977 kfree(set_attr); 3978 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3979 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3980 criu_svm_md->data.start_addr); 3981 kfree(criu_svm_md); 3982 } 3983 3984 mmput(mm); 3985 return ret; 3986 3987 } 3988 3989 int kfd_criu_restore_svm(struct kfd_process *p, 3990 uint8_t __user *user_priv_ptr, 3991 uint64_t *priv_data_offset, 3992 uint64_t max_priv_data_size) 3993 { 3994 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3995 int nattr_common = 4, nattr_accessibility = 1; 3996 struct criu_svm_metadata *criu_svm_md = NULL; 3997 struct svm_range_list *svms = &p->svms; 3998 uint32_t num_devices; 3999 int ret = 0; 4000 4001 num_devices = p->n_pdds; 4002 /* Handle one SVM range object at a time, also the number of gpus are 4003 * assumed to be same on the restore node, checking must be done while 4004 * evaluating the topology earlier 4005 */ 4006 4007 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4008 (nattr_common + nattr_accessibility * num_devices); 4009 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4010 4011 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4012 svm_attrs_size; 4013 4014 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4015 if (!criu_svm_md) { 4016 pr_err("failed to allocate memory to store svm metadata\n"); 4017 return -ENOMEM; 4018 } 4019 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4020 ret = -EINVAL; 4021 goto exit; 4022 } 4023 4024 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4025 svm_priv_data_size); 4026 if (ret) { 4027 ret = -EFAULT; 4028 goto exit; 4029 } 4030 *priv_data_offset += svm_priv_data_size; 4031 4032 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4033 4034 return 0; 4035 4036 4037 exit: 4038 kfree(criu_svm_md); 4039 return ret; 4040 } 4041 4042 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4043 uint64_t *svm_priv_data_size) 4044 { 4045 uint64_t total_size, accessibility_size, common_attr_size; 4046 int nattr_common = 4, nattr_accessibility = 1; 4047 int num_devices = p->n_pdds; 4048 struct svm_range_list *svms; 4049 struct svm_range *prange; 4050 uint32_t count = 0; 4051 4052 *svm_priv_data_size = 0; 4053 4054 svms = &p->svms; 4055 if (!svms) 4056 return -EINVAL; 4057 4058 mutex_lock(&svms->lock); 4059 list_for_each_entry(prange, &svms->list, list) { 4060 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4061 prange, prange->start, prange->npages, 4062 prange->start + prange->npages - 1); 4063 count++; 4064 } 4065 mutex_unlock(&svms->lock); 4066 4067 *num_svm_ranges = count; 4068 /* Only the accessbility attributes need to be queried for all the gpus 4069 * individually, remaining ones are spanned across the entire process 4070 * regardless of the various gpu nodes. Of the remaining attributes, 4071 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4072 * 4073 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4074 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4075 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4076 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4077 * 4078 * ** ACCESSBILITY ATTRIBUTES ** 4079 * (Considered as one, type is altered during query, value is gpuid) 4080 * KFD_IOCTL_SVM_ATTR_ACCESS 4081 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4082 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4083 */ 4084 if (*num_svm_ranges > 0) { 4085 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4086 nattr_common; 4087 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4088 nattr_accessibility * num_devices; 4089 4090 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4091 common_attr_size + accessibility_size; 4092 4093 *svm_priv_data_size = *num_svm_ranges * total_size; 4094 } 4095 4096 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4097 *svm_priv_data_size); 4098 return 0; 4099 } 4100 4101 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4102 uint8_t __user *user_priv_data, 4103 uint64_t *priv_data_offset) 4104 { 4105 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4106 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4107 uint64_t svm_priv_data_size, query_attr_size = 0; 4108 int index, nattr_common = 4, ret = 0; 4109 struct svm_range_list *svms; 4110 int num_devices = p->n_pdds; 4111 struct svm_range *prange; 4112 struct mm_struct *mm; 4113 4114 svms = &p->svms; 4115 if (!svms) 4116 return -EINVAL; 4117 4118 mm = get_task_mm(p->lead_thread); 4119 if (!mm) { 4120 pr_err("failed to get mm for the target process\n"); 4121 return -ESRCH; 4122 } 4123 4124 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4125 (nattr_common + num_devices); 4126 4127 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4128 if (!query_attr) { 4129 ret = -ENOMEM; 4130 goto exit; 4131 } 4132 4133 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4134 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4135 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4136 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4137 4138 for (index = 0; index < num_devices; index++) { 4139 struct kfd_process_device *pdd = p->pdds[index]; 4140 4141 query_attr[index + nattr_common].type = 4142 KFD_IOCTL_SVM_ATTR_ACCESS; 4143 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4144 } 4145 4146 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4147 4148 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4149 if (!svm_priv) { 4150 ret = -ENOMEM; 4151 goto exit_query; 4152 } 4153 4154 index = 0; 4155 list_for_each_entry(prange, &svms->list, list) { 4156 4157 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4158 svm_priv->start_addr = prange->start; 4159 svm_priv->size = prange->npages; 4160 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4161 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4162 prange, prange->start, prange->npages, 4163 prange->start + prange->npages - 1, 4164 prange->npages * PAGE_SIZE); 4165 4166 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4167 svm_priv->size, 4168 (nattr_common + num_devices), 4169 svm_priv->attrs); 4170 if (ret) { 4171 pr_err("CRIU: failed to obtain range attributes\n"); 4172 goto exit_priv; 4173 } 4174 4175 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4176 svm_priv_data_size)) { 4177 pr_err("Failed to copy svm priv to user\n"); 4178 ret = -EFAULT; 4179 goto exit_priv; 4180 } 4181 4182 *priv_data_offset += svm_priv_data_size; 4183 4184 } 4185 4186 4187 exit_priv: 4188 kfree(svm_priv); 4189 exit_query: 4190 kfree(query_attr); 4191 exit: 4192 mmput(mm); 4193 return ret; 4194 } 4195 4196 int 4197 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4198 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4199 { 4200 struct mm_struct *mm = current->mm; 4201 int r; 4202 4203 start >>= PAGE_SHIFT; 4204 size >>= PAGE_SHIFT; 4205 4206 switch (op) { 4207 case KFD_IOCTL_SVM_OP_SET_ATTR: 4208 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4209 break; 4210 case KFD_IOCTL_SVM_OP_GET_ATTR: 4211 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4212 break; 4213 default: 4214 r = EINVAL; 4215 break; 4216 } 4217 4218 return r; 4219 } 4220