1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 1996, by Steve Passe
5 * All rights reserved.
6 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. The name of the developer may NOT be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 #include "opt_mptable_force_htt.h"
31 #include "opt_mptable_linux_bug_compat.h"
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/limits.h>
37 #include <sys/malloc.h>
38 #include <sys/smp.h>
39 #include <sys/rman.h>
40
41 #include <vm/vm.h>
42 #include <vm/vm_param.h>
43 #include <vm/pmap.h>
44
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pcib_private.h>
47 #include <x86/apicreg.h>
48 #include <x86/legacyvar.h>
49 #include <x86/mptable.h>
50 #include <machine/frame.h>
51 #include <machine/intr_machdep.h>
52 #include <x86/apicvar.h>
53 #include <machine/md_var.h>
54 #include <machine/pc/bios.h>
55 #include <machine/resource.h>
56 #include <machine/specialreg.h>
57
58 /* string defined by the Intel MP Spec as identifying the MP table */
59 #define MP_SIG 0x5f504d5f /* _MP_ */
60
61 #ifdef __amd64__
62 #define MAX_LAPIC_ID 63 /* Max local APIC ID for HTT fixup */
63 #else
64 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
65 #endif
66
67 #define BIOS_BASE (0xf0000)
68 #define BIOS_SIZE (0x10000)
69 #define BIOS_COUNT (BIOS_SIZE/4)
70
71 typedef void mptable_entry_handler(u_char *entry, void *arg);
72 typedef void mptable_extended_entry_handler(ext_entry_ptr entry, void *arg);
73
74 /* descriptions of MP table entries */
75 typedef struct BASETABLE_ENTRY {
76 uint8_t type;
77 uint8_t length;
78 uint8_t name[16];
79 } basetable_entry;
80
81 static basetable_entry basetable_entry_types[] =
82 {
83 {0, 20, "Processor"},
84 {1, 8, "Bus"},
85 {2, 8, "I/O APIC"},
86 {3, 8, "I/O INT"},
87 {4, 8, "Local INT"}
88 };
89
90 typedef struct BUSDATA {
91 u_char bus_id;
92 enum busTypes bus_type;
93 } bus_datum;
94
95 typedef struct INTDATA {
96 u_char int_type;
97 u_short int_flags;
98 u_char src_bus_id;
99 u_char src_bus_irq;
100 u_char dst_apic_id;
101 u_char dst_apic_int;
102 u_char int_vector;
103 } io_int, local_int;
104
105 typedef struct BUSTYPENAME {
106 u_char type;
107 char name[7];
108 } bus_type_name;
109
110 /* From MP spec v1.4, table 4-8. */
111 static bus_type_name bus_type_table[] =
112 {
113 {UNKNOWN_BUSTYPE, "CBUS "},
114 {UNKNOWN_BUSTYPE, "CBUSII"},
115 {EISA, "EISA "},
116 {UNKNOWN_BUSTYPE, "FUTURE"},
117 {UNKNOWN_BUSTYPE, "INTERN"},
118 {ISA, "ISA "},
119 {UNKNOWN_BUSTYPE, "MBI "},
120 {UNKNOWN_BUSTYPE, "MBII "},
121 {MCA, "MCA "},
122 {UNKNOWN_BUSTYPE, "MPI "},
123 {UNKNOWN_BUSTYPE, "MPSA "},
124 {UNKNOWN_BUSTYPE, "NUBUS "},
125 {PCI, "PCI "},
126 {UNKNOWN_BUSTYPE, "PCMCIA"},
127 {UNKNOWN_BUSTYPE, "TC "},
128 {UNKNOWN_BUSTYPE, "VL "},
129 {UNKNOWN_BUSTYPE, "VME "},
130 {UNKNOWN_BUSTYPE, "XPRESS"}
131 };
132
133 /* From MP spec v1.4, table 5-1. */
134 static int default_data[7][5] =
135 {
136 /* nbus, id0, type0, id1, type1 */
137 {1, 0, ISA, 255, NOBUS},
138 {1, 0, EISA, 255, NOBUS},
139 {1, 0, EISA, 255, NOBUS},
140 {1, 0, MCA, 255, NOBUS},
141 {2, 0, ISA, 1, PCI},
142 {2, 0, EISA, 1, PCI},
143 {2, 0, MCA, 1, PCI}
144 };
145
146 struct pci_probe_table_args {
147 u_char bus;
148 u_char found;
149 };
150
151 struct pci_route_interrupt_args {
152 u_char bus; /* Source bus. */
153 u_char irq; /* Source slot:pin. */
154 int vector; /* Return value. */
155 };
156
157 static mpfps_t mpfps;
158 static mpcth_t mpct;
159 static ext_entry_ptr mpet;
160 static void *ioapics[IOAPIC_MAX_ID + 1];
161 static bus_datum *busses;
162 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
163 static int pci0 = -1;
164
165 static MALLOC_DEFINE(M_MPTABLE, "mptable", "MP Table Items");
166
167 static enum intr_polarity conforming_polarity(u_char src_bus,
168 u_char src_bus_irq);
169 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
170 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
171 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
172 static int lookup_bus_type(char *name);
173 static void mptable_count_items(void);
174 static void mptable_count_items_handler(u_char *entry, void *arg);
175 #ifdef MPTABLE_FORCE_HTT
176 static void mptable_hyperthread_fixup(u_int id_mask);
177 #endif
178 static void mptable_parse_apics_and_busses(void);
179 static void mptable_parse_apics_and_busses_handler(u_char *entry,
180 void *arg);
181 static void mptable_parse_default_config_ints(void);
182 static void mptable_parse_ints(void);
183 static void mptable_parse_ints_handler(u_char *entry, void *arg);
184 static void mptable_parse_io_int(int_entry_ptr intr);
185 static void mptable_parse_local_int(int_entry_ptr intr);
186 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
187 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
188 static void mptable_pci_setup(void);
189 static int mptable_probe(void);
190 static int mptable_probe_cpus(void);
191 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
192 static void mptable_setup_cpus_handler(u_char *entry, void *arg __unused);
193 static void mptable_register(void *dummy);
194 static int mptable_setup_local(void);
195 static int mptable_setup_io(void);
196 static void mptable_walk_extended_table(
197 mptable_extended_entry_handler *handler, void *arg);
198 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
199 static int search_for_sig(u_int32_t target, int count);
200
201 static struct apic_enumerator mptable_enumerator = {
202 .apic_name = "MPTable",
203 .apic_probe = mptable_probe,
204 .apic_probe_cpus = mptable_probe_cpus,
205 .apic_setup_local = mptable_setup_local,
206 .apic_setup_io = mptable_setup_io
207 };
208
209 /*
210 * look for the MP spec signature
211 */
212
213 static int
search_for_sig(u_int32_t target,int count)214 search_for_sig(u_int32_t target, int count)
215 {
216 int x;
217 u_int32_t *addr;
218
219 addr = (u_int32_t *)BIOS_PADDRTOVADDR(target);
220 for (x = 0; x < count; x += 4)
221 if (addr[x] == MP_SIG)
222 /* make array index a byte index */
223 return (target + (x * sizeof(u_int32_t)));
224 return (-1);
225 }
226
227 static int
lookup_bus_type(char * name)228 lookup_bus_type(char *name)
229 {
230 int x;
231
232 for (x = 0; x < MAX_BUSTYPE; ++x)
233 if (strncmp(bus_type_table[x].name, name, 6) == 0)
234 return (bus_type_table[x].type);
235
236 return (UNKNOWN_BUSTYPE);
237 }
238
239 #ifdef MPTABLE_LINUX_BUG_COMPAT
240 /* Compute the correct entry_count value. */
241 static void
compute_entry_count(void)242 compute_entry_count(void)
243 {
244 u_char *end = (u_char *)(mpct) + mpct->base_table_length;
245 u_char *entry = (u_char *)(mpct + 1);
246 size_t nentries = 0;
247
248 while (entry < end) {
249 switch (*entry) {
250 case MPCT_ENTRY_PROCESSOR:
251 case MPCT_ENTRY_IOAPIC:
252 case MPCT_ENTRY_BUS:
253 case MPCT_ENTRY_INT:
254 case MPCT_ENTRY_LOCAL_INT:
255 break;
256 default:
257 panic("%s: Unknown MP Config Entry %d\n", __func__,
258 (int)*entry);
259 }
260 entry += basetable_entry_types[*entry].length;
261 nentries++;
262 }
263 mpct->entry_count = (uint16_t)(nentries);
264 }
265 #endif
266
267 /*
268 * Look for an Intel MP spec table (ie, SMP capable hardware).
269 */
270 static int
mptable_probe(void)271 mptable_probe(void)
272 {
273 int x;
274 u_long segment;
275 u_int32_t target;
276
277 /* see if EBDA exists */
278 if ((segment = *(u_short *)BIOS_PADDRTOVADDR(0x40e)) != 0) {
279 /* search first 1K of EBDA */
280 target = (u_int32_t) (segment << 4);
281 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
282 goto found;
283 } else {
284 /* last 1K of base memory, effective 'top of base' passed in */
285 target = (u_int32_t) ((basemem * 1024) - 0x400);
286 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
287 goto found;
288 }
289
290 /* search the BIOS */
291 target = (u_int32_t) BIOS_BASE;
292 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
293 goto found;
294
295 #ifdef MPTABLE_LINUX_BUG_COMPAT
296 /*
297 * Linux assumes that it always has 640 kB of base memory and
298 * searches for the MP table at 639k regardless of whether that
299 * address is present in the system memory map. Some VM systems
300 * rely on this buggy behaviour.
301 */
302 if ((x = search_for_sig(639 * 1024, 1024 / 4)) >= 0)
303 goto found;
304 #endif
305
306 /* nothing found */
307 return (ENXIO);
308
309 found:
310 mpfps = (mpfps_t)BIOS_PADDRTOVADDR(x);
311
312 /* Map in the configuration table if it exists. */
313 if (mpfps->config_type != 0) {
314 if (bootverbose)
315 printf(
316 "MP Table version 1.%d found using Default Configuration %d\n",
317 mpfps->spec_rev, mpfps->config_type);
318 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
319 printf(
320 "MP Table Default Configuration %d is unsupported\n",
321 mpfps->config_type);
322 return (ENXIO);
323 }
324 mpct = NULL;
325 } else {
326 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
327 printf("%s: Unable to map MP Configuration Table\n",
328 __func__);
329 return (ENXIO);
330 }
331 mpct = (mpcth_t)BIOS_PADDRTOVADDR((uintptr_t)mpfps->pap);
332 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
333 1024 * 1024) {
334 printf("%s: Unable to map end of MP Config Table\n",
335 __func__);
336 return (ENXIO);
337 }
338 if (mpct->extended_table_length != 0 &&
339 mpct->extended_table_length + mpct->base_table_length +
340 (uintptr_t)mpfps->pap < 1024 * 1024)
341 mpet = (ext_entry_ptr)((char *)mpct +
342 mpct->base_table_length);
343 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
344 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
345 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
346 __func__, mpct->signature[0], mpct->signature[1],
347 mpct->signature[2], mpct->signature[3]);
348 return (ENXIO);
349 }
350 if (bootverbose)
351 printf(
352 "MP Configuration Table version 1.%d found at %p\n",
353 mpct->spec_rev, mpct);
354 #ifdef MPTABLE_LINUX_BUG_COMPAT
355 /*
356 * Linux ignores entry_count and instead scans the MP table
357 * until it runs out of bytes of table (as specified by the
358 * base_table_length field). Some VM systems rely on this
359 * buggy behaviour and record an entry_count of zero.
360 */
361 if (mpct->entry_count == 0)
362 compute_entry_count();
363 #endif
364 }
365
366 return (-100);
367 }
368
369 /*
370 * Run through the MP table enumerating CPUs.
371 */
372 static int
mptable_probe_cpus(void)373 mptable_probe_cpus(void)
374 {
375 u_int cpu_mask;
376
377 /* Is this a pre-defined config? */
378 if (mpfps->config_type != 0) {
379 #ifdef SMP
380 mp_ncpus = 2;
381 mp_maxid = 1;
382 #endif
383 max_apic_id = 1;
384 } else {
385 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
386 }
387 return (0);
388 }
389
390 /*
391 * Initialize the local APIC on the BSP.
392 */
393 static int
mptable_setup_local(void)394 mptable_setup_local(void)
395 {
396 vm_paddr_t addr;
397 u_int cpu_mask;
398
399 /* Is this a pre-defined config? */
400 printf("MPTable: <");
401 if (mpfps->config_type != 0) {
402 lapic_create(0, 1);
403 lapic_create(1, 0);
404 addr = DEFAULT_APIC_BASE;
405 printf("Default Configuration %d", mpfps->config_type);
406
407 } else {
408 cpu_mask = 0;
409 mptable_walk_table(mptable_setup_cpus_handler, &cpu_mask);
410 #ifdef MPTABLE_FORCE_HTT
411 mptable_hyperthread_fixup(cpu_mask);
412 #endif
413 addr = mpct->apic_address;
414 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
415 (int)sizeof(mpct->product_id), mpct->product_id);
416 }
417 printf(">\n");
418 lapic_init(addr);
419 return (0);
420 }
421
422 /*
423 * Run through the MP table enumerating I/O APICs.
424 */
425 static int
mptable_setup_io(void)426 mptable_setup_io(void)
427 {
428 int i;
429 u_char byte;
430
431 /* First, we count individual items and allocate arrays. */
432 mptable_count_items();
433 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
434 M_WAITOK);
435 for (i = 0; i <= mptable_maxbusid; i++)
436 busses[i].bus_type = NOBUS;
437
438 /* Second, we run through adding I/O APIC's and buses. */
439 mptable_parse_apics_and_busses();
440
441 /* Third, we run through the table tweaking interrupt sources. */
442 mptable_parse_ints();
443
444 /* Fourth, we register all the I/O APIC's. */
445 for (i = 0; i <= IOAPIC_MAX_ID; i++)
446 if (ioapics[i] != NULL)
447 ioapic_register(ioapics[i]);
448
449 /* Fifth, we setup data structures to handle PCI interrupt routing. */
450 mptable_pci_setup();
451
452 /* Finally, we throw the switch to enable the I/O APIC's. */
453 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
454 outb(0x22, 0x70); /* select IMCR */
455 byte = inb(0x23); /* current contents */
456 byte |= 0x01; /* mask external INTR */
457 outb(0x23, byte); /* disconnect 8259s/NMI */
458 }
459
460 return (0);
461 }
462
463 static void
mptable_register(void * dummy __unused)464 mptable_register(void *dummy __unused)
465 {
466
467 apic_register_enumerator(&mptable_enumerator);
468 }
469 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST, mptable_register,
470 NULL);
471
472 /*
473 * Call the handler routine for each entry in the MP config base table.
474 */
475 static void
mptable_walk_table(mptable_entry_handler * handler,void * arg)476 mptable_walk_table(mptable_entry_handler *handler, void *arg)
477 {
478 u_int i;
479 u_char *entry;
480
481 entry = (u_char *)(mpct + 1);
482 for (i = 0; i < mpct->entry_count; i++) {
483 switch (*entry) {
484 case MPCT_ENTRY_PROCESSOR:
485 case MPCT_ENTRY_IOAPIC:
486 case MPCT_ENTRY_BUS:
487 case MPCT_ENTRY_INT:
488 case MPCT_ENTRY_LOCAL_INT:
489 break;
490 default:
491 panic("%s: Unknown MP Config Entry %d\n", __func__,
492 (int)*entry);
493 }
494 handler(entry, arg);
495 entry += basetable_entry_types[*entry].length;
496 }
497 }
498
499 /*
500 * Call the handler routine for each entry in the MP config extended
501 * table.
502 */
503 static void
mptable_walk_extended_table(mptable_extended_entry_handler * handler,void * arg)504 mptable_walk_extended_table(mptable_extended_entry_handler *handler, void *arg)
505 {
506 ext_entry_ptr end, entry;
507
508 if (mpet == NULL)
509 return;
510 entry = mpet;
511 end = (ext_entry_ptr)((char *)mpet + mpct->extended_table_length);
512 while (entry < end) {
513 handler(entry, arg);
514 entry = (ext_entry_ptr)((char *)entry + entry->length);
515 }
516 }
517
518 static void
mptable_probe_cpus_handler(u_char * entry,void * arg)519 mptable_probe_cpus_handler(u_char *entry, void *arg)
520 {
521 proc_entry_ptr proc;
522
523 switch (*entry) {
524 case MPCT_ENTRY_PROCESSOR:
525 proc = (proc_entry_ptr)entry;
526 if (proc->cpu_flags & PROCENTRY_FLAG_EN &&
527 proc->apic_id < MAX_LAPIC_ID && mp_ncpus < MAXCPU) {
528 #ifdef SMP
529 mp_ncpus++;
530 mp_maxid = mp_ncpus - 1;
531 #endif
532 max_apic_id = max(max_apic_id, proc->apic_id);
533 }
534 break;
535 }
536 }
537
538 static void
mptable_setup_cpus_handler(u_char * entry,void * arg)539 mptable_setup_cpus_handler(u_char *entry, void *arg)
540 {
541 proc_entry_ptr proc;
542 u_int *cpu_mask;
543
544 switch (*entry) {
545 case MPCT_ENTRY_PROCESSOR:
546 proc = (proc_entry_ptr)entry;
547 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
548 lapic_create(proc->apic_id, proc->cpu_flags &
549 PROCENTRY_FLAG_BP);
550 if (proc->apic_id < MAX_LAPIC_ID) {
551 cpu_mask = (u_int *)arg;
552 *cpu_mask |= (1ul << proc->apic_id);
553 }
554 }
555 break;
556 }
557 }
558
559 static void
mptable_count_items_handler(u_char * entry,void * arg __unused)560 mptable_count_items_handler(u_char *entry, void *arg __unused)
561 {
562 io_apic_entry_ptr apic;
563 bus_entry_ptr bus;
564
565 switch (*entry) {
566 case MPCT_ENTRY_BUS:
567 bus = (bus_entry_ptr)entry;
568 mptable_nbusses++;
569 if (bus->bus_id > mptable_maxbusid)
570 mptable_maxbusid = bus->bus_id;
571 break;
572 case MPCT_ENTRY_IOAPIC:
573 apic = (io_apic_entry_ptr)entry;
574 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
575 mptable_nioapics++;
576 break;
577 }
578 }
579
580 /*
581 * Count items in the table.
582 */
583 static void
mptable_count_items(void)584 mptable_count_items(void)
585 {
586
587 /* Is this a pre-defined config? */
588 if (mpfps->config_type != 0) {
589 mptable_nioapics = 1;
590 switch (mpfps->config_type) {
591 case 1:
592 case 2:
593 case 3:
594 case 4:
595 mptable_nbusses = 1;
596 break;
597 case 5:
598 case 6:
599 case 7:
600 mptable_nbusses = 2;
601 break;
602 default:
603 panic("Unknown pre-defined MP Table config type %d",
604 mpfps->config_type);
605 }
606 mptable_maxbusid = mptable_nbusses - 1;
607 } else
608 mptable_walk_table(mptable_count_items_handler, NULL);
609 }
610
611 /*
612 * Add a bus or I/O APIC from an entry in the table.
613 */
614 static void
mptable_parse_apics_and_busses_handler(u_char * entry,void * arg __unused)615 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
616 {
617 io_apic_entry_ptr apic;
618 bus_entry_ptr bus;
619 enum busTypes bus_type;
620 int i;
621
622 switch (*entry) {
623 case MPCT_ENTRY_BUS:
624 bus = (bus_entry_ptr)entry;
625 bus_type = lookup_bus_type(bus->bus_type);
626 if (bus_type == UNKNOWN_BUSTYPE) {
627 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
628 for (i = 0; i < 6; i++)
629 printf("%c", bus->bus_type[i]);
630 printf("\"\n");
631 }
632 busses[bus->bus_id].bus_id = bus->bus_id;
633 busses[bus->bus_id].bus_type = bus_type;
634 break;
635 case MPCT_ENTRY_IOAPIC:
636 apic = (io_apic_entry_ptr)entry;
637 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
638 break;
639 if (apic->apic_id > IOAPIC_MAX_ID)
640 panic("%s: I/O APIC ID %d too high", __func__,
641 apic->apic_id);
642 if (ioapics[apic->apic_id] != NULL)
643 panic("%s: Double APIC ID %d", __func__,
644 apic->apic_id);
645 ioapics[apic->apic_id] = ioapic_create(apic->apic_address,
646 apic->apic_id, -1);
647 break;
648 default:
649 break;
650 }
651 }
652
653 /*
654 * Enumerate I/O APIC's and buses.
655 */
656 static void
mptable_parse_apics_and_busses(void)657 mptable_parse_apics_and_busses(void)
658 {
659
660 /* Is this a pre-defined config? */
661 if (mpfps->config_type != 0) {
662 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
663 busses[0].bus_id = 0;
664 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
665 if (mptable_nbusses > 1) {
666 busses[1].bus_id = 1;
667 busses[1].bus_type =
668 default_data[mpfps->config_type - 1][4];
669 }
670 } else
671 mptable_walk_table(mptable_parse_apics_and_busses_handler,
672 NULL);
673 }
674
675 /*
676 * Determine conforming polarity for a given bus type.
677 */
678 static enum intr_polarity
conforming_polarity(u_char src_bus,u_char src_bus_irq)679 conforming_polarity(u_char src_bus, u_char src_bus_irq)
680 {
681
682 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
683 switch (busses[src_bus].bus_type) {
684 case ISA:
685 case EISA:
686 return (INTR_POLARITY_HIGH);
687 case PCI:
688 return (INTR_POLARITY_LOW);
689 default:
690 panic("%s: unknown bus type %d", __func__,
691 busses[src_bus].bus_type);
692 }
693 }
694
695 /*
696 * Determine conforming trigger for a given bus type.
697 */
698 static enum intr_trigger
conforming_trigger(u_char src_bus,u_char src_bus_irq)699 conforming_trigger(u_char src_bus, u_char src_bus_irq)
700 {
701
702 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
703 switch (busses[src_bus].bus_type) {
704 case ISA:
705 if (elcr_found)
706 return (elcr_read_trigger(src_bus_irq));
707 else
708 return (INTR_TRIGGER_EDGE);
709 case PCI:
710 return (INTR_TRIGGER_LEVEL);
711
712 case EISA:
713 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
714 KASSERT(elcr_found, ("Missing ELCR"));
715 return (elcr_read_trigger(src_bus_irq));
716
717 default:
718 panic("%s: unknown bus type %d", __func__,
719 busses[src_bus].bus_type);
720 }
721 }
722
723 static enum intr_polarity
intentry_polarity(int_entry_ptr intr)724 intentry_polarity(int_entry_ptr intr)
725 {
726
727 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
728 case INTENTRY_FLAGS_POLARITY_CONFORM:
729 return (conforming_polarity(intr->src_bus_id,
730 intr->src_bus_irq));
731 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
732 return (INTR_POLARITY_HIGH);
733 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
734 return (INTR_POLARITY_LOW);
735 default:
736 panic("Bogus interrupt flags");
737 }
738 }
739
740 static enum intr_trigger
intentry_trigger(int_entry_ptr intr)741 intentry_trigger(int_entry_ptr intr)
742 {
743
744 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
745 case INTENTRY_FLAGS_TRIGGER_CONFORM:
746 return (conforming_trigger(intr->src_bus_id,
747 intr->src_bus_irq));
748 case INTENTRY_FLAGS_TRIGGER_EDGE:
749 return (INTR_TRIGGER_EDGE);
750 case INTENTRY_FLAGS_TRIGGER_LEVEL:
751 return (INTR_TRIGGER_LEVEL);
752 default:
753 panic("Bogus interrupt flags");
754 }
755 }
756
757 /*
758 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
759 */
760 static void
mptable_parse_io_int(int_entry_ptr intr)761 mptable_parse_io_int(int_entry_ptr intr)
762 {
763 void *ioapic;
764 u_int pin, apic_id;
765
766 apic_id = intr->dst_apic_id;
767 if (intr->dst_apic_id == 0xff) {
768 /*
769 * An APIC ID of 0xff means that the interrupt is connected
770 * to the specified pin on all I/O APICs in the system. If
771 * there is only one I/O APIC, then use that APIC to route
772 * the interrupts. If there is more than one I/O APIC, then
773 * punt.
774 */
775 if (mptable_nioapics == 1) {
776 apic_id = 0;
777 while (ioapics[apic_id] == NULL)
778 apic_id++;
779 } else {
780 printf(
781 "MPTable: Ignoring global interrupt entry for pin %d\n",
782 intr->dst_apic_int);
783 return;
784 }
785 }
786 if (apic_id > IOAPIC_MAX_ID) {
787 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
788 intr->dst_apic_id);
789 return;
790 }
791 ioapic = ioapics[apic_id];
792 if (ioapic == NULL) {
793 printf(
794 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
795 apic_id);
796 return;
797 }
798 pin = intr->dst_apic_int;
799 switch (intr->int_type) {
800 case INTENTRY_TYPE_INT:
801 switch (busses[intr->src_bus_id].bus_type) {
802 case NOBUS:
803 panic("interrupt from missing bus");
804 case ISA:
805 case EISA:
806 if (busses[intr->src_bus_id].bus_type == ISA)
807 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
808 else
809 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
810 if (intr->src_bus_irq == pin)
811 break;
812 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
813 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
814 intr->src_bus_irq)
815 ioapic_disable_pin(ioapic, intr->src_bus_irq);
816 break;
817 case PCI:
818 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
819 break;
820 default:
821 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
822 break;
823 }
824 break;
825 case INTENTRY_TYPE_NMI:
826 ioapic_set_nmi(ioapic, pin);
827 break;
828 case INTENTRY_TYPE_SMI:
829 ioapic_set_smi(ioapic, pin);
830 break;
831 case INTENTRY_TYPE_EXTINT:
832 ioapic_set_extint(ioapic, pin);
833 break;
834 default:
835 panic("%s: invalid interrupt entry type %d\n", __func__,
836 intr->int_type);
837 }
838 if (intr->int_type == INTENTRY_TYPE_INT ||
839 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
840 INTENTRY_FLAGS_TRIGGER_CONFORM)
841 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
842 if (intr->int_type == INTENTRY_TYPE_INT ||
843 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
844 INTENTRY_FLAGS_POLARITY_CONFORM)
845 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
846 }
847
848 /*
849 * Parse an interrupt entry for a local APIC LVT pin.
850 */
851 static void
mptable_parse_local_int(int_entry_ptr intr)852 mptable_parse_local_int(int_entry_ptr intr)
853 {
854 u_int apic_id, pin;
855
856 if (intr->dst_apic_id == 0xff)
857 apic_id = APIC_ID_ALL;
858 else
859 apic_id = intr->dst_apic_id;
860 if (intr->dst_apic_int == 0)
861 pin = APIC_LVT_LINT0;
862 else
863 pin = APIC_LVT_LINT1;
864 switch (intr->int_type) {
865 case INTENTRY_TYPE_INT:
866 #if 1
867 printf(
868 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
869 intr->dst_apic_int, intr->src_bus_irq);
870 return;
871 #else
872 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
873 break;
874 #endif
875 case INTENTRY_TYPE_NMI:
876 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
877 break;
878 case INTENTRY_TYPE_SMI:
879 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
880 break;
881 case INTENTRY_TYPE_EXTINT:
882 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
883 break;
884 default:
885 panic("%s: invalid interrupt entry type %d\n", __func__,
886 intr->int_type);
887 }
888 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
889 INTENTRY_FLAGS_TRIGGER_CONFORM)
890 lapic_set_lvt_triggermode(apic_id, pin,
891 intentry_trigger(intr));
892 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
893 INTENTRY_FLAGS_POLARITY_CONFORM)
894 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
895 }
896
897 /*
898 * Parse interrupt entries.
899 */
900 static void
mptable_parse_ints_handler(u_char * entry,void * arg __unused)901 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
902 {
903 int_entry_ptr intr;
904
905 intr = (int_entry_ptr)entry;
906 switch (*entry) {
907 case MPCT_ENTRY_INT:
908 mptable_parse_io_int(intr);
909 break;
910 case MPCT_ENTRY_LOCAL_INT:
911 mptable_parse_local_int(intr);
912 break;
913 }
914 }
915
916 /*
917 * Configure interrupt pins for a default configuration. For details see
918 * Table 5-2 in Section 5 of the MP Table specification.
919 */
920 static void
mptable_parse_default_config_ints(void)921 mptable_parse_default_config_ints(void)
922 {
923 struct INTENTRY entry;
924 int pin;
925
926 /*
927 * All default configs route IRQs from bus 0 to the first 16 pins
928 * of the first I/O APIC with an APIC ID of 2.
929 */
930 entry.type = MPCT_ENTRY_INT;
931 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
932 INTENTRY_FLAGS_TRIGGER_CONFORM;
933 entry.src_bus_id = 0;
934 entry.dst_apic_id = 2;
935
936 /* Run through all 16 pins. */
937 for (pin = 0; pin < 16; pin++) {
938 entry.dst_apic_int = pin;
939 switch (pin) {
940 case 0:
941 /* Pin 0 is an ExtINT pin. */
942 entry.int_type = INTENTRY_TYPE_EXTINT;
943 break;
944 case 2:
945 /* IRQ 0 is routed to pin 2. */
946 entry.int_type = INTENTRY_TYPE_INT;
947 entry.src_bus_irq = 0;
948 break;
949 default:
950 /* All other pins are identity mapped. */
951 entry.int_type = INTENTRY_TYPE_INT;
952 entry.src_bus_irq = pin;
953 break;
954 }
955 mptable_parse_io_int(&entry);
956 }
957
958 /* Certain configs disable certain pins. */
959 if (mpfps->config_type == 7)
960 ioapic_disable_pin(ioapics[2], 0);
961 if (mpfps->config_type == 2) {
962 ioapic_disable_pin(ioapics[2], 2);
963 ioapic_disable_pin(ioapics[2], 13);
964 }
965 }
966
967 /*
968 * Configure the interrupt pins
969 */
970 static void
mptable_parse_ints(void)971 mptable_parse_ints(void)
972 {
973
974 /* Is this a pre-defined config? */
975 if (mpfps->config_type != 0) {
976 /* Configure LINT pins. */
977 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT0,
978 APIC_LVT_DM_EXTINT);
979 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT1, APIC_LVT_DM_NMI);
980
981 /* Configure I/O APIC pins. */
982 mptable_parse_default_config_ints();
983 } else
984 mptable_walk_table(mptable_parse_ints_handler, NULL);
985 }
986
987 #ifdef MPTABLE_FORCE_HTT
988 /*
989 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
990 * that aren't already listed in the table.
991 *
992 * XXX: We assume that all of the physical CPUs in the
993 * system have the same number of logical CPUs.
994 *
995 * XXX: We assume that APIC ID's are allocated such that
996 * the APIC ID's for a physical processor are aligned
997 * with the number of logical CPU's in the processor.
998 */
999 static void
mptable_hyperthread_fixup(u_int id_mask)1000 mptable_hyperthread_fixup(u_int id_mask)
1001 {
1002 u_int i, id, logical_cpus;
1003
1004 /* Nothing to do if there is no HTT support. */
1005 if ((cpu_feature & CPUID_HTT) == 0)
1006 return;
1007 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
1008 if (logical_cpus <= 1)
1009 return;
1010
1011 /*
1012 * For each APIC ID of a CPU that is set in the mask,
1013 * scan the other candidate APIC ID's for this
1014 * physical processor. If any of those ID's are
1015 * already in the table, then kill the fixup.
1016 */
1017 for (id = 0; id <= MAX_LAPIC_ID; id++) {
1018 if ((id_mask & 1 << id) == 0)
1019 continue;
1020 /* First, make sure we are on a logical_cpus boundary. */
1021 if (id % logical_cpus != 0)
1022 return;
1023 for (i = id + 1; i < id + logical_cpus; i++)
1024 if ((id_mask & 1 << i) != 0)
1025 return;
1026 }
1027
1028 /*
1029 * Ok, the ID's checked out, so perform the fixup by
1030 * adding the logical CPUs.
1031 */
1032 while ((id = ffs(id_mask)) != 0) {
1033 id--;
1034 for (i = id + 1; i < id + logical_cpus; i++) {
1035 if (bootverbose)
1036 printf(
1037 "MPTable: Adding logical CPU %d from main CPU %d\n",
1038 i, id);
1039 lapic_create(i, 0);
1040 }
1041 id_mask &= ~(1 << id);
1042 }
1043 }
1044 #endif /* MPTABLE_FORCE_HTT */
1045
1046 /*
1047 * Support code for routing PCI interrupts using the MP Table.
1048 */
1049 static void
mptable_pci_setup(void)1050 mptable_pci_setup(void)
1051 {
1052 int i;
1053
1054 /*
1055 * Find the first pci bus and call it 0. Panic if pci0 is not
1056 * bus zero and there are multiple PCI buses.
1057 */
1058 for (i = 0; i <= mptable_maxbusid; i++)
1059 if (busses[i].bus_type == PCI) {
1060 if (pci0 == -1)
1061 pci0 = i;
1062 else if (pci0 != 0)
1063 panic(
1064 "MPTable contains multiple PCI buses but no PCI bus 0");
1065 }
1066 }
1067
1068 static void
mptable_pci_probe_table_handler(u_char * entry,void * arg)1069 mptable_pci_probe_table_handler(u_char *entry, void *arg)
1070 {
1071 struct pci_probe_table_args *args;
1072 int_entry_ptr intr;
1073
1074 if (*entry != MPCT_ENTRY_INT)
1075 return;
1076 intr = (int_entry_ptr)entry;
1077 args = (struct pci_probe_table_args *)arg;
1078 KASSERT(args->bus <= mptable_maxbusid,
1079 ("bus %d is too big", args->bus));
1080 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
1081 if (intr->src_bus_id == args->bus)
1082 args->found = 1;
1083 }
1084
1085 int
mptable_pci_probe_table(int bus)1086 mptable_pci_probe_table(int bus)
1087 {
1088 struct pci_probe_table_args args;
1089
1090 if (bus < 0)
1091 return (EINVAL);
1092 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
1093 return (ENXIO);
1094 if (busses[pci0 + bus].bus_type != PCI)
1095 return (ENXIO);
1096 args.bus = pci0 + bus;
1097 args.found = 0;
1098 mptable_walk_table(mptable_pci_probe_table_handler, &args);
1099 if (args.found == 0)
1100 return (ENXIO);
1101 return (0);
1102 }
1103
1104 static void
mptable_pci_route_interrupt_handler(u_char * entry,void * arg)1105 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
1106 {
1107 struct pci_route_interrupt_args *args;
1108 int_entry_ptr intr;
1109 int vector;
1110
1111 if (*entry != MPCT_ENTRY_INT)
1112 return;
1113 intr = (int_entry_ptr)entry;
1114 args = (struct pci_route_interrupt_args *)arg;
1115 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
1116 return;
1117
1118 /* Make sure the APIC maps to a known APIC. */
1119 KASSERT(ioapics[intr->dst_apic_id] != NULL,
1120 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1121
1122 /*
1123 * Look up the vector for this APIC / pin combination. If we
1124 * have previously matched an entry for this PCI IRQ but it
1125 * has the same vector as this entry, just return. Otherwise,
1126 * we use the vector for this APIC / pin combination.
1127 */
1128 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1129 intr->dst_apic_int);
1130 if (args->vector == vector)
1131 return;
1132 KASSERT(args->vector == -1,
1133 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1134 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1135 vector));
1136 args->vector = vector;
1137 }
1138
1139 int
mptable_pci_route_interrupt(device_t pcib,device_t dev,int pin)1140 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1141 {
1142 struct pci_route_interrupt_args args;
1143 int slot;
1144
1145 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1146 pin--;
1147 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1148 args.bus = pci_get_bus(dev) + pci0;
1149 slot = pci_get_slot(dev);
1150
1151 /*
1152 * PCI interrupt entries in the MP Table encode both the slot and
1153 * pin into the IRQ with the pin being the two least significant
1154 * bits, the slot being the next five bits, and the most significant
1155 * bit being reserved.
1156 */
1157 args.irq = slot << 2 | pin;
1158 args.vector = -1;
1159 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1160 if (args.vector < 0) {
1161 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1162 'A' + pin);
1163 return (PCI_INVALID_IRQ);
1164 }
1165 if (bootverbose)
1166 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1167 'A' + pin, args.vector);
1168 return (args.vector);
1169 }
1170
1171 struct host_res_args {
1172 struct mptable_hostb_softc *sc;
1173 device_t dev;
1174 u_char bus;
1175 };
1176
1177 /*
1178 * Initialize a Host-PCI bridge so it can restrict resource allocation
1179 * requests to the resources it actually decodes according to MP
1180 * config table extended entries.
1181 */
1182 static void
mptable_host_res_handler(ext_entry_ptr entry,void * arg)1183 mptable_host_res_handler(ext_entry_ptr entry, void *arg)
1184 {
1185 struct host_res_args *args;
1186 cbasm_entry_ptr cbasm;
1187 sas_entry_ptr sas;
1188 const char *name;
1189 uint64_t start, end;
1190 int error, *flagp, flags, type;
1191
1192 args = arg;
1193 switch (entry->type) {
1194 case MPCT_EXTENTRY_SAS:
1195 sas = (sas_entry_ptr)entry;
1196 if (sas->bus_id != args->bus)
1197 break;
1198 switch (sas->address_type) {
1199 case SASENTRY_TYPE_IO:
1200 type = SYS_RES_IOPORT;
1201 flags = 0;
1202 break;
1203 case SASENTRY_TYPE_MEMORY:
1204 type = SYS_RES_MEMORY;
1205 flags = 0;
1206 break;
1207 case SASENTRY_TYPE_PREFETCH:
1208 type = SYS_RES_MEMORY;
1209 flags = RF_PREFETCHABLE;
1210 break;
1211 default:
1212 printf(
1213 "MPTable: Unknown systems address space type for bus %u: %d\n",
1214 sas->bus_id, sas->address_type);
1215 return;
1216 }
1217 start = sas->address_base;
1218 end = sas->address_base + sas->address_length - 1;
1219 #ifdef __i386__
1220 if (start > ULONG_MAX) {
1221 device_printf(args->dev,
1222 "Ignoring %d range above 4GB (%#jx-%#jx)\n",
1223 type, (uintmax_t)start, (uintmax_t)end);
1224 break;
1225 }
1226 if (end > ULONG_MAX) {
1227 device_printf(args->dev,
1228 "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
1229 type, (uintmax_t)start, (uintmax_t)end);
1230 end = ULONG_MAX;
1231 }
1232 #endif
1233 error = pcib_host_res_decodes(&args->sc->sc_host_res, type,
1234 start, end, flags);
1235 if (error)
1236 panic("Failed to manage %d range (%#jx-%#jx): %d",
1237 type, (uintmax_t)start, (uintmax_t)end, error);
1238 break;
1239 case MPCT_EXTENTRY_CBASM:
1240 cbasm = (cbasm_entry_ptr)entry;
1241 if (cbasm->bus_id != args->bus)
1242 break;
1243 switch (cbasm->predefined_range) {
1244 case CBASMENTRY_RANGE_ISA_IO:
1245 flagp = &args->sc->sc_decodes_isa_io;
1246 name = "ISA I/O";
1247 break;
1248 case CBASMENTRY_RANGE_VGA_IO:
1249 flagp = &args->sc->sc_decodes_vga_io;
1250 name = "VGA I/O";
1251 break;
1252 default:
1253 printf(
1254 "MPTable: Unknown compatibility address space range for bus %u: %d\n",
1255 cbasm->bus_id, cbasm->predefined_range);
1256 return;
1257 }
1258 if (*flagp != 0)
1259 printf(
1260 "MPTable: Duplicate compatibility %s range for bus %u\n",
1261 name, cbasm->bus_id);
1262 switch (cbasm->address_mod) {
1263 case CBASMENTRY_ADDRESS_MOD_ADD:
1264 *flagp = 1;
1265 if (bootverbose)
1266 device_printf(args->dev, "decoding %s ports\n",
1267 name);
1268 break;
1269 case CBASMENTRY_ADDRESS_MOD_SUBTRACT:
1270 *flagp = -1;
1271 if (bootverbose)
1272 device_printf(args->dev,
1273 "not decoding %s ports\n", name);
1274 break;
1275 default:
1276 printf(
1277 "MPTable: Unknown compatibility address space modifier: %u\n",
1278 cbasm->address_mod);
1279 break;
1280 }
1281 break;
1282 }
1283 }
1284
1285 void
mptable_pci_host_res_init(device_t pcib)1286 mptable_pci_host_res_init(device_t pcib)
1287 {
1288 struct host_res_args args;
1289
1290 KASSERT(pci0 != -1, ("do not know how to map PCI bus IDs"));
1291 args.bus = legacy_get_pcibus(pcib) + pci0;
1292 args.dev = pcib;
1293 args.sc = device_get_softc(pcib);
1294 if (pcib_host_res_init(pcib, &args.sc->sc_host_res) != 0)
1295 panic("failed to init hostb resources");
1296 mptable_walk_extended_table(mptable_host_res_handler, &args);
1297 }
1298