1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23 * The full GNU General Public License is included in this distribution
24 * in the file called LICENSE.GPL.
25 *
26 * BSD LICENSE
27 *
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 *
35 * * Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * * Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in
39 * the documentation and/or other materials provided with the
40 * distribution.
41 *
42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53 */
54
55 #include <sys/cdefs.h>
56 /**
57 * @file
58 *
59 * @brief This file contains the implementation of the public methods for a
60 * SCIC_SDS_LIBRARY object.
61 */
62
63 #include <dev/isci/scil/scic_library.h>
64 #include <dev/isci/scil/scic_sds_library.h>
65 #include <dev/isci/scil/scic_sds_controller.h>
66 #include <dev/isci/scil/scic_sds_request.h>
67 #include <dev/isci/scil/scic_sds_remote_device.h>
68 #include <dev/isci/scil/intel_pci.h>
69 #include <dev/isci/scil/scic_sds_pci.h>
70 #include <dev/isci/scil/scu_constants.h>
71
72 struct SCIC_SDS_CONTROLLER;
73
74 #define SCIC_LIBRARY_CONTROLLER_MEMORY_START(library) \
75 ((char *)(library) + sizeof(SCIC_SDS_LIBRARY_T))
76
77 // ---------------------------------------------------------------------------
78
scic_library_get_object_size(U8 max_controller_count)79 U32 scic_library_get_object_size(
80 U8 max_controller_count
81 )
82 {
83 return sizeof(SCIC_SDS_LIBRARY_T)
84 + scic_sds_controller_get_object_size() * max_controller_count;
85 }
86
87 // ---------------------------------------------------------------------------
88
scic_library_construct(void * library_memory,U8 max_controller_count)89 SCI_LIBRARY_HANDLE_T scic_library_construct(
90 void * library_memory,
91 U8 max_controller_count
92 )
93 {
94 SCI_STATUS status;
95 SCIC_SDS_LIBRARY_T *this_library;
96
97 this_library = (SCIC_SDS_LIBRARY_T *)library_memory;
98
99 this_library->max_controller_count = max_controller_count;
100
101 this_library->controllers =
102 (SCIC_SDS_CONTROLLER_T *)((char *)library_memory + sizeof(SCIC_SDS_LIBRARY_T));
103
104 SCI_BASE_LIBRARY_CONSTRUCT(this_library,
105 &this_library->parent,
106 max_controller_count,
107 struct SCIC_SDS_CONTROLLER,
108 status);
109 return this_library;
110 }
111
112 // ---------------------------------------------------------------------------
113
scic_library_set_pci_info(SCI_LIBRARY_HANDLE_T library,SCI_PCI_COMMON_HEADER_T * pci_header)114 void scic_library_set_pci_info(
115 SCI_LIBRARY_HANDLE_T library,
116 SCI_PCI_COMMON_HEADER_T * pci_header
117 )
118 {
119 SCIC_SDS_LIBRARY_T *this_library;
120 this_library = (SCIC_SDS_LIBRARY_T *)library;
121
122 this_library->pci_device = pci_header->device_id;
123
124 #if defined(PBG_HBA_A0_BUILD)
125 this_library->pci_revision = SCIC_SDS_PCI_REVISION_A0;
126 #elif defined(PBG_HBA_A2_BUILD)
127 this_library->pci_revision = SCIC_SDS_PCI_REVISION_A2;
128 #elif defined(PBG_HBA_BETA_BUILD)
129 this_library->pci_revision = SCIC_SDS_PCI_REVISION_B0;
130 #elif defined(PBG_BUILD)
131 // The SCU PCI function revision ID for A0/A2 is not populated
132 // properly. As a result, we force the revision ID to A2 for
133 // this situation. Therefore, the standard PBG build will not
134 // work for A0.
135 if (pci_header->revision == SCIC_SDS_PCI_REVISION_A0)
136 this_library->pci_revision = SCIC_SDS_PCI_REVISION_A2;
137 else
138 this_library->pci_revision = pci_header->revision;
139 #endif
140 }
141
142 // ---------------------------------------------------------------------------
143
scic_library_allocate_controller(SCI_LIBRARY_HANDLE_T library,SCI_CONTROLLER_HANDLE_T * new_controller)144 SCI_STATUS scic_library_allocate_controller(
145 SCI_LIBRARY_HANDLE_T library,
146 SCI_CONTROLLER_HANDLE_T *new_controller
147 )
148 {
149 SCI_STATUS status;
150 SCIC_SDS_LIBRARY_T *this_library;
151
152 this_library = (SCIC_SDS_LIBRARY_T *)library;
153
154 if (
155 ( (this_library->pci_device >= 0x1D60)
156 && (this_library->pci_device <= 0x1D62)
157 )
158 || ( (this_library->pci_device >= 0x1D64)
159 && (this_library->pci_device <= 0x1D65)
160 )
161 || ( (this_library->pci_device >= 0x1D68)
162 && (this_library->pci_device <= 0x1D6F)
163 )
164 )
165 {
166 SCI_BASE_LIBRARY_ALLOCATE_CONTROLLER(
167 this_library, new_controller, &status);
168 }
169 else
170 status = SCI_FAILURE_UNSUPPORTED_PCI_DEVICE_ID;
171
172 return status;
173 }
174
175 // ---------------------------------------------------------------------------
176
scic_library_free_controller(SCI_LIBRARY_HANDLE_T library,SCI_CONTROLLER_HANDLE_T controller)177 SCI_STATUS scic_library_free_controller(
178 SCI_LIBRARY_HANDLE_T library,
179 SCI_CONTROLLER_HANDLE_T controller
180 )
181 {
182 SCI_STATUS status;
183 SCIC_SDS_LIBRARY_T *this_library;
184 this_library = (SCIC_SDS_LIBRARY_T *)library;
185
186 SCI_BASE_LIBRARY_FREE_CONTROLLER(
187 this_library, controller, struct SCIC_SDS_CONTROLLER, &status);
188
189 return status;
190 }
191
192 // ---------------------------------------------------------------------------
193
scic_library_get_pci_device_controller_count(SCI_LIBRARY_HANDLE_T library)194 U8 scic_library_get_pci_device_controller_count(
195 SCI_LIBRARY_HANDLE_T library
196 )
197 {
198 SCIC_SDS_LIBRARY_T *this_library;
199 U16 device_id;
200
201 this_library = (SCIC_SDS_LIBRARY_T *)library;
202 device_id = this_library->pci_device;
203
204 //Check if we are on a b0 or c0 which has 2 controllers
205 if (
206 // Warning: If 0x1d66 is ever defined to be a single controller
207 // this logic will fail.
208 // If 0x1d63 or 0x1d67 is ever defined to be dual
209 // controller this logic will fail.
210 ((device_id & 0xFFF1) == 0x1D60)
211 && (
212 (this_library->pci_revision == SCU_PBG_HBA_REV_B0)
213 || (this_library->pci_revision == SCU_PBG_HBA_REV_C0)
214 || (this_library->pci_revision == SCU_PBG_HBA_REV_C1)
215 )
216 )
217 return 2;
218 else
219 return 1;
220 }
221
222 // ---------------------------------------------------------------------------
223
scic_library_get_max_sge_size(SCI_LIBRARY_HANDLE_T library)224 U32 scic_library_get_max_sge_size(
225 SCI_LIBRARY_HANDLE_T library
226 )
227 {
228 return SCU_IO_REQUEST_MAX_SGE_SIZE;
229 }
230
231 // ---------------------------------------------------------------------------
232
scic_library_get_max_sge_count(SCI_LIBRARY_HANDLE_T library)233 U32 scic_library_get_max_sge_count(
234 SCI_LIBRARY_HANDLE_T library
235 )
236 {
237 return SCU_IO_REQUEST_SGE_COUNT;
238 }
239
240 // ---------------------------------------------------------------------------
241
scic_library_get_max_io_length(SCI_LIBRARY_HANDLE_T library)242 U32 scic_library_get_max_io_length(
243 SCI_LIBRARY_HANDLE_T library
244 )
245 {
246 return SCU_IO_REQUEST_MAX_TRANSFER_LENGTH;
247 }
248
249 // ---------------------------------------------------------------------------
250
scic_library_get_min_timer_count(void)251 U16 scic_library_get_min_timer_count(void)
252 {
253 return (U16) (scic_sds_controller_get_min_timer_count()
254 + scic_sds_remote_device_get_min_timer_count()
255 + scic_sds_request_get_min_timer_count());
256 }
257
258 // ---------------------------------------------------------------------------
259
scic_library_get_max_timer_count(void)260 U16 scic_library_get_max_timer_count(void)
261 {
262 return (U16) (scic_sds_controller_get_max_timer_count()
263 + scic_sds_remote_device_get_max_timer_count()
264 + scic_sds_request_get_max_timer_count());
265 }
266
267 /**
268 *
269 */
scic_sds_library_get_controller_index(SCIC_SDS_LIBRARY_T * library,SCIC_SDS_CONTROLLER_T * controller)270 U8 scic_sds_library_get_controller_index(
271 SCIC_SDS_LIBRARY_T * library,
272 SCIC_SDS_CONTROLLER_T * controller
273 )
274 {
275 U8 index;
276
277 for (index = 0; index < library->max_controller_count; index++)
278 {
279 if (controller == &library->controllers[index])
280 {
281 return index;
282 }
283 }
284
285 return 0xff;
286 }
287
288