1 /*-
2 * Copyright (C) 2009 Nathan Whitehorn
3 * Copyright (C) 2015 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Portions of this software were developed by Andrew Turner
7 * under sponsorship from the FreeBSD Foundation.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/malloc.h>
36 #include <sys/bus.h>
37 #include <sys/cpu.h>
38 #include <machine/bus.h>
39
40 #include <dev/ofw/openfirm.h>
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
43 #include <dev/ofw/ofw_cpu.h>
44
45 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
46 #include <dev/clk/clk.h>
47 #endif
48
49 static int ofw_cpulist_probe(device_t);
50 static int ofw_cpulist_attach(device_t);
51 static const struct ofw_bus_devinfo *ofw_cpulist_get_devinfo(device_t dev,
52 device_t child);
53
54 static MALLOC_DEFINE(M_OFWCPU, "ofwcpu", "OFW CPU device information");
55
56 struct ofw_cpulist_softc {
57 pcell_t sc_addr_cells;
58 };
59
60 static device_method_t ofw_cpulist_methods[] = {
61 /* Device interface */
62 DEVMETHOD(device_probe, ofw_cpulist_probe),
63 DEVMETHOD(device_attach, ofw_cpulist_attach),
64
65 /* Bus interface */
66 DEVMETHOD(bus_add_child, bus_generic_add_child),
67 DEVMETHOD(bus_child_pnpinfo, ofw_bus_gen_child_pnpinfo),
68 DEVMETHOD(bus_get_device_path, ofw_bus_gen_get_device_path),
69
70 /* ofw_bus interface */
71 DEVMETHOD(ofw_bus_get_devinfo, ofw_cpulist_get_devinfo),
72 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
73 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
74 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
75 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
76 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
77
78 DEVMETHOD_END
79 };
80
81 static driver_t ofw_cpulist_driver = {
82 "cpulist",
83 ofw_cpulist_methods,
84 sizeof(struct ofw_cpulist_softc)
85 };
86
87 DRIVER_MODULE(ofw_cpulist, ofwbus, ofw_cpulist_driver, 0, 0);
88
89 static int
ofw_cpulist_probe(device_t dev)90 ofw_cpulist_probe(device_t dev)
91 {
92 const char *name;
93
94 name = ofw_bus_get_name(dev);
95
96 if (name == NULL || strcmp(name, "cpus") != 0)
97 return (ENXIO);
98
99 device_set_desc(dev, "Open Firmware CPU Group");
100
101 return (0);
102 }
103
104 static int
ofw_cpulist_attach(device_t dev)105 ofw_cpulist_attach(device_t dev)
106 {
107 struct ofw_cpulist_softc *sc;
108 phandle_t root, child;
109 device_t cdev;
110 struct ofw_bus_devinfo *dinfo;
111
112 sc = device_get_softc(dev);
113 root = ofw_bus_get_node(dev);
114
115 sc->sc_addr_cells = 1;
116 OF_getencprop(root, "#address-cells", &sc->sc_addr_cells,
117 sizeof(sc->sc_addr_cells));
118
119 for (child = OF_child(root); child != 0; child = OF_peer(child)) {
120 dinfo = malloc(sizeof(*dinfo), M_OFWCPU, M_WAITOK | M_ZERO);
121
122 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) {
123 free(dinfo, M_OFWCPU);
124 continue;
125 }
126 cdev = device_add_child(dev, NULL, DEVICE_UNIT_ANY);
127 if (cdev == NULL) {
128 device_printf(dev, "<%s>: device_add_child failed\n",
129 dinfo->obd_name);
130 ofw_bus_gen_destroy_devinfo(dinfo);
131 free(dinfo, M_OFWCPU);
132 continue;
133 }
134 device_set_ivars(cdev, dinfo);
135 }
136
137 bus_attach_children(dev);
138 return (0);
139 }
140
141 static const struct ofw_bus_devinfo *
ofw_cpulist_get_devinfo(device_t dev,device_t child)142 ofw_cpulist_get_devinfo(device_t dev, device_t child)
143 {
144 return (device_get_ivars(child));
145 }
146
147 static int ofw_cpu_probe(device_t);
148 static int ofw_cpu_attach(device_t);
149 static int ofw_cpu_read_ivar(device_t dev, device_t child, int index,
150 uintptr_t *result);
151
152 struct ofw_cpu_softc {
153 struct pcpu *sc_cpu_pcpu;
154 uint32_t sc_nominal_mhz;
155 bool sc_reg_valid;
156 pcell_t sc_reg[2];
157 };
158
159 static device_method_t ofw_cpu_methods[] = {
160 /* Device interface */
161 DEVMETHOD(device_probe, ofw_cpu_probe),
162 DEVMETHOD(device_attach, ofw_cpu_attach),
163
164 /* Bus interface */
165 DEVMETHOD(bus_add_child, bus_generic_add_child),
166 DEVMETHOD(bus_read_ivar, ofw_cpu_read_ivar),
167 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
168 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
169 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
170 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
171 DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
172
173 DEVMETHOD_END
174 };
175
176 static driver_t ofw_cpu_driver = {
177 "cpu",
178 ofw_cpu_methods,
179 sizeof(struct ofw_cpu_softc)
180 };
181
182 DRIVER_MODULE(ofw_cpu, cpulist, ofw_cpu_driver, 0, 0);
183
184 static int
ofw_cpu_probe(device_t dev)185 ofw_cpu_probe(device_t dev)
186 {
187 const char *type = ofw_bus_get_type(dev);
188
189 if (type == NULL || strcmp(type, "cpu") != 0)
190 return (ENXIO);
191
192 device_set_desc(dev, "Open Firmware CPU");
193 if (!bootverbose && device_get_unit(dev) != 0) {
194 device_quiet(dev);
195 device_quiet_children(dev);
196 }
197
198 return (0);
199 }
200
201 static int
ofw_cpu_attach(device_t dev)202 ofw_cpu_attach(device_t dev)
203 {
204 struct ofw_cpulist_softc *psc;
205 struct ofw_cpu_softc *sc;
206 phandle_t node;
207 pcell_t cell;
208 int rv;
209 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
210 clk_t cpuclk;
211 uint64_t freq;
212 #endif
213
214 sc = device_get_softc(dev);
215 psc = device_get_softc(device_get_parent(dev));
216
217 if (nitems(sc->sc_reg) < psc->sc_addr_cells) {
218 if (bootverbose)
219 device_printf(dev, "Too many address cells\n");
220 return (EINVAL);
221 }
222
223 node = ofw_bus_get_node(dev);
224
225 /* Read and validate the reg property for use later */
226 sc->sc_reg_valid = false;
227 rv = OF_getencprop(node, "reg", sc->sc_reg, sizeof(sc->sc_reg));
228 if (rv < 0)
229 device_printf(dev, "missing 'reg' property\n");
230 else if ((rv % 4) != 0) {
231 if (bootverbose)
232 device_printf(dev, "Malformed reg property\n");
233 } else if ((rv / 4) != psc->sc_addr_cells) {
234 if (bootverbose)
235 device_printf(dev, "Invalid reg size %u\n", rv);
236 } else
237 sc->sc_reg_valid = true;
238
239 #ifdef __powerpc__
240 /*
241 * On powerpc, "interrupt-servers" denotes a SMT CPU. Look for any
242 * thread on this CPU, and assign that.
243 */
244 if (OF_hasprop(node, "ibm,ppc-interrupt-server#s")) {
245 struct cpuref cpuref;
246 cell_t *servers;
247 int i, nservers, rv;
248
249 if ((nservers = OF_getencprop_alloc(node,
250 "ibm,ppc-interrupt-server#s", (void **)&servers)) < 0)
251 return (ENXIO);
252 nservers /= sizeof(cell_t);
253 for (i = 0; i < nservers; i++) {
254 for (rv = platform_smp_first_cpu(&cpuref); rv == 0;
255 rv = platform_smp_next_cpu(&cpuref)) {
256 if (cpuref.cr_hwref == servers[i]) {
257 sc->sc_cpu_pcpu =
258 pcpu_find(cpuref.cr_cpuid);
259 if (sc->sc_cpu_pcpu == NULL) {
260 OF_prop_free(servers);
261 return (ENXIO);
262 }
263 break;
264 }
265 }
266 if (rv != ENOENT)
267 break;
268 }
269 OF_prop_free(servers);
270 if (sc->sc_cpu_pcpu == NULL) {
271 device_printf(dev, "No CPU found for this device.\n");
272 return (ENXIO);
273 }
274 } else
275 #endif
276 sc->sc_cpu_pcpu = pcpu_find(device_get_unit(dev));
277
278 if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) < 0) {
279 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
280 rv = clk_get_by_ofw_index(dev, 0, 0, &cpuclk);
281 if (rv == 0) {
282 rv = clk_get_freq(cpuclk, &freq);
283 if (rv != 0 && bootverbose)
284 device_printf(dev,
285 "Cannot get freq of property clocks\n");
286 else
287 sc->sc_nominal_mhz = freq / 1000000;
288 } else
289 #endif
290 {
291 if (bootverbose)
292 device_printf(dev,
293 "missing 'clock-frequency' property\n");
294 }
295 } else
296 sc->sc_nominal_mhz = cell / 1000000; /* convert to MHz */
297
298 if (sc->sc_nominal_mhz != 0 && bootverbose)
299 device_printf(dev, "Nominal frequency %dMhz\n",
300 sc->sc_nominal_mhz);
301 bus_identify_children(dev);
302 bus_attach_children(dev);
303 return (0);
304 }
305
306 static int
ofw_cpu_read_ivar(device_t dev,device_t child,int index,uintptr_t * result)307 ofw_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
308 {
309 struct ofw_cpulist_softc *psc;
310 struct ofw_cpu_softc *sc;
311
312 sc = device_get_softc(dev);
313
314 switch (index) {
315 case CPU_IVAR_PCPU:
316 *result = (uintptr_t)sc->sc_cpu_pcpu;
317 return (0);
318 case CPU_IVAR_NOMINAL_MHZ:
319 if (sc->sc_nominal_mhz > 0) {
320 *result = (uintptr_t)sc->sc_nominal_mhz;
321 return (0);
322 }
323 break;
324 case CPU_IVAR_CPUID_SIZE:
325 psc = device_get_softc(device_get_parent(dev));
326 *result = psc->sc_addr_cells;
327 return (0);
328 case CPU_IVAR_CPUID:
329 if (sc->sc_reg_valid) {
330 *result = (uintptr_t)sc->sc_reg;
331 return (0);
332 }
333 break;
334 }
335
336 return (ENOENT);
337 }
338
339 int
ofw_cpu_early_foreach(ofw_cpu_foreach_cb callback,bool only_runnable)340 ofw_cpu_early_foreach(ofw_cpu_foreach_cb callback, bool only_runnable)
341 {
342 phandle_t node, child;
343 pcell_t addr_cells, reg[2];
344 char status[16];
345 char device_type[16];
346 u_int id, next_id;
347 int count, rv;
348
349 count = 0;
350 id = 0;
351 next_id = 0;
352
353 node = OF_finddevice("/cpus");
354 if (node == -1)
355 return (-1);
356
357 /* Find the number of cells in the cpu register */
358 if (OF_getencprop(node, "#address-cells", &addr_cells,
359 sizeof(addr_cells)) < 0)
360 return (-1);
361
362 for (child = OF_child(node); child != 0; child = OF_peer(child),
363 id = next_id) {
364 /* Check if child is a CPU */
365 memset(device_type, 0, sizeof(device_type));
366 rv = OF_getprop(child, "device_type", device_type,
367 sizeof(device_type) - 1);
368 if (rv < 0)
369 continue;
370 if (strcmp(device_type, "cpu") != 0)
371 continue;
372
373 /* We're processing CPU, update next_id used in the next iteration */
374 next_id++;
375
376 /*
377 * If we are filtering by runnable then limit to only
378 * those that have been enabled, or do provide a method
379 * to enable them.
380 */
381 if (only_runnable) {
382 status[0] = '\0';
383 OF_getprop(child, "status", status, sizeof(status));
384 if (status[0] != '\0' && strcmp(status, "okay") != 0 &&
385 strcmp(status, "ok") != 0 &&
386 !OF_hasprop(child, "enable-method"))
387 continue;
388 }
389
390 /*
391 * Check we have a register to identify the cpu
392 */
393 rv = OF_getencprop(child, "reg", reg,
394 addr_cells * sizeof(cell_t));
395 if (rv != addr_cells * sizeof(cell_t))
396 continue;
397
398 if (callback == NULL || callback(id, child, addr_cells, reg))
399 count++;
400 }
401
402 return (only_runnable ? count : id);
403 }
404