1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 *
5 */
6
7 #include <linux/bitfield.h>
8 #include <linux/bitmap.h>
9 #include <linux/bitops.h>
10 #include <linux/cleanup.h>
11 #include <linux/device.h>
12 #include <linux/io.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/mutex.h>
16 #include <linux/nvmem-consumer.h>
17 #include <linux/of.h>
18 #include <linux/regmap.h>
19 #include <linux/sizes.h>
20 #include <linux/slab.h>
21 #include <linux/soc/qcom/llcc-qcom.h>
22
23 #define ACTIVATE BIT(0)
24 #define DEACTIVATE BIT(1)
25 #define ACT_CLEAR BIT(0)
26 #define ACT_COMPLETE BIT(4)
27 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0)
28 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1)
29 #define ACT_CTRL_ACT_TRIG BIT(0)
30 #define ACT_CTRL_OPCODE_SHIFT 1
31 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 2
32 #define ATTR1_FIXED_SIZE_SHIFT 3
33 #define ATTR1_PRIORITY_SHIFT 4
34 #define ATTR1_MAX_CAP_SHIFT 16
35 #define ATTR0_RES_WAYS_MASK GENMASK(15, 0)
36 #define ATTR0_BONUS_WAYS_MASK GENMASK(31, 16)
37 #define ATTR0_BONUS_WAYS_SHIFT 16
38 #define LLCC_STATUS_READ_DELAY 100
39
40 #define CACHE_LINE_SIZE_SHIFT 6
41
42 #define LLCC_LB_CNT_MASK GENMASK(31, 28)
43 #define LLCC_LB_CNT_SHIFT 28
44
45 #define MAX_CAP_TO_BYTES(n) (n * SZ_1K)
46 #define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K)
47 #define LLCC_TRP_ACT_CLEARn(n) (8 + n * SZ_4K)
48 #define LLCC_TRP_STATUSn(n) (4 + n * SZ_4K)
49 #define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n)
50 #define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n)
51 #define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n)
52
53 #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00
54 #define LLCC_TRP_PCB_ACT 0x21f04
55 #define LLCC_TRP_ALGO_CFG1 0x21f0c
56 #define LLCC_TRP_ALGO_CFG2 0x21f10
57 #define LLCC_TRP_ALGO_CFG3 0x21f14
58 #define LLCC_TRP_ALGO_CFG4 0x21f18
59 #define LLCC_TRP_ALGO_CFG5 0x21f1c
60 #define LLCC_TRP_WRSC_EN 0x21f20
61 #define LLCC_TRP_ALGO_CFG6 0x21f24
62 #define LLCC_TRP_ALGO_CFG7 0x21f28
63 #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c
64 #define LLCC_TRP_ALGO_CFG8 0x21f30
65
66 #define LLCC_VERSION_2_0_0_0 0x02000000
67 #define LLCC_VERSION_2_1_0_0 0x02010000
68 #define LLCC_VERSION_4_1_0_0 0x04010000
69
70 /**
71 * struct llcc_slice_config - Data associated with the llcc slice
72 * @usecase_id: Unique id for the client's use case
73 * @slice_id: llcc slice id for each client
74 * @max_cap: The maximum capacity of the cache slice provided in KB
75 * @priority: Priority of the client used to select victim line for replacement
76 * @fixed_size: Boolean indicating if the slice has a fixed capacity
77 * @bonus_ways: Bonus ways are additional ways to be used for any slice,
78 * if client ends up using more than reserved cache ways. Bonus
79 * ways are allocated only if they are not reserved for some
80 * other client.
81 * @res_ways: Reserved ways for the cache slice, the reserved ways cannot
82 * be used by any other client than the one its assigned to.
83 * @cache_mode: Each slice operates as a cache, this controls the mode of the
84 * slice: normal or TCM(Tightly Coupled Memory)
85 * @probe_target_ways: Determines what ways to probe for access hit. When
86 * configured to 1 only bonus and reserved ways are probed.
87 * When configured to 0 all ways in llcc are probed.
88 * @dis_cap_alloc: Disable capacity based allocation for a client
89 * @retain_on_pc: If this bit is set and client has maintained active vote
90 * then the ways assigned to this client are not flushed on power
91 * collapse.
92 * @activate_on_init: Activate the slice immediately after it is programmed
93 * @write_scid_en: Bit enables write cache support for a given scid.
94 * @write_scid_cacheable_en: Enables write cache cacheable support for a
95 * given scid (not supported on v2 or older hardware).
96 * @stale_en: Bit enables stale.
97 * @stale_cap_en: Bit enables stale only if current scid is over-cap.
98 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is
99 * under-cap.
100 * @mru_rollover: Roll-over on reserved cache ways.
101 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no
102 * same-scid lines for replacement.
103 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID.
104 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority
105 * over-cap scid. Depends on corresponding bit being set in
106 * ovcap_en.
107 * @vict_prio: When current scid is under-capacity, allocate over other
108 * lower-than victim priority-line threshold scid.
109 */
110 struct llcc_slice_config {
111 u32 usecase_id;
112 u32 slice_id;
113 u32 max_cap;
114 u32 priority;
115 bool fixed_size;
116 u32 bonus_ways;
117 u32 res_ways;
118 u32 cache_mode;
119 u32 probe_target_ways;
120 bool dis_cap_alloc;
121 bool retain_on_pc;
122 bool activate_on_init;
123 bool write_scid_en;
124 bool write_scid_cacheable_en;
125 bool stale_en;
126 bool stale_cap_en;
127 bool mru_uncap_en;
128 bool mru_rollover;
129 bool alloc_oneway_en;
130 bool ovcap_en;
131 bool ovcap_prio;
132 bool vict_prio;
133 };
134
135 struct qcom_llcc_config {
136 const struct llcc_slice_config *sct_data;
137 const u32 *reg_offset;
138 const struct llcc_edac_reg_offset *edac_reg_offset;
139 u32 max_cap_shift; /* instead of ATTR1_MAX_CAP_SHIFT */
140 u32 num_banks;
141 int size;
142 bool skip_llcc_cfg;
143 bool no_edac;
144 bool irq_configured;
145 };
146
147 struct qcom_sct_config {
148 const struct qcom_llcc_config *llcc_config;
149 int num_config;
150 };
151
152 enum llcc_reg_offset {
153 LLCC_COMMON_HW_INFO,
154 LLCC_COMMON_STATUS0,
155 };
156
157 static const struct llcc_slice_config sa8775p_data[] = {
158 {
159 .usecase_id = LLCC_CPUSS,
160 .slice_id = 1,
161 .max_cap = 2048,
162 .priority = 1,
163 .bonus_ways = 0xff,
164 .cache_mode = 0,
165 .retain_on_pc = true,
166 .activate_on_init = true,
167 }, {
168 .usecase_id = LLCC_VIDSC0,
169 .slice_id = 2,
170 .max_cap = 512,
171 .priority = 3,
172 .fixed_size = true,
173 .bonus_ways = 0xff,
174 .cache_mode = 0,
175 .retain_on_pc = true,
176 }, {
177 .usecase_id = LLCC_CPUSS1,
178 .slice_id = 3,
179 .max_cap = 1024,
180 .priority = 1,
181 .fixed_size = true,
182 .bonus_ways = 0xff,
183 .cache_mode = 0,
184 .retain_on_pc = true,
185 }, {
186 .usecase_id = LLCC_CPUHWT,
187 .slice_id = 5,
188 .max_cap = 512,
189 .priority = 1,
190 .fixed_size = true,
191 .bonus_ways = 0xff,
192 .cache_mode = 0,
193 .retain_on_pc = true,
194 }, {
195 .usecase_id = LLCC_AUDIO,
196 .slice_id = 6,
197 .max_cap = 1024,
198 .priority = 1,
199 .fixed_size = true,
200 .bonus_ways = 0xff,
201 .cache_mode = 0,
202 }, {
203 .usecase_id = LLCC_CMPT,
204 .slice_id = 10,
205 .max_cap = 4096,
206 .priority = 1,
207 .fixed_size = true,
208 .bonus_ways = 0xff,
209 .cache_mode = 0,
210 .retain_on_pc = true,
211 }, {
212 .usecase_id = LLCC_GPUHTW,
213 .slice_id = 11,
214 .max_cap = 1024,
215 .priority = 1,
216 .fixed_size = true,
217 .bonus_ways = 0xff,
218 .cache_mode = 0,
219 .retain_on_pc = true,
220 }, {
221 .usecase_id = LLCC_GPU,
222 .slice_id = 12,
223 .max_cap = 1024,
224 .priority = 1,
225 .fixed_size = true,
226 .bonus_ways = 0xff,
227 .cache_mode = 0,
228 .retain_on_pc = true,
229 .write_scid_en = true,
230 }, {
231 .usecase_id = LLCC_MMUHWT,
232 .slice_id = 13,
233 .max_cap = 1024,
234 .priority = 1,
235 .fixed_size = true,
236 .bonus_ways = 0xff,
237 .cache_mode = 0,
238 .activate_on_init = true,
239 }, {
240 .usecase_id = LLCC_CMPTDMA,
241 .slice_id = 15,
242 .max_cap = 1024,
243 .priority = 1,
244 .fixed_size = true,
245 .bonus_ways = 0xff,
246 .cache_mode = 0,
247 .retain_on_pc = true,
248 }, {
249 .usecase_id = LLCC_DISP,
250 .slice_id = 16,
251 .max_cap = 4096,
252 .priority = 2,
253 .fixed_size = true,
254 .bonus_ways = 0xff,
255 .cache_mode = 0,
256 .retain_on_pc = true,
257 }, {
258 .usecase_id = LLCC_VIDFW,
259 .slice_id = 17,
260 .max_cap = 3072,
261 .priority = 1,
262 .bonus_ways = 0xff,
263 .cache_mode = 0,
264 .retain_on_pc = true,
265 }, {
266 .usecase_id = LLCC_AUDHW,
267 .slice_id = 22,
268 .max_cap = 1024,
269 .priority = 1,
270 .fixed_size = true,
271 .bonus_ways = 0xff,
272 .cache_mode = 0,
273 }, {
274 .usecase_id = LLCC_CVP,
275 .slice_id = 28,
276 .max_cap = 256,
277 .priority = 3,
278 .fixed_size = true,
279 .bonus_ways = 0xff,
280 .cache_mode = 0,
281 .retain_on_pc = true,
282 }, {
283 .usecase_id = LLCC_APTCM,
284 .slice_id = 30,
285 .max_cap = 1024,
286 .priority = 3,
287 .fixed_size = true,
288 .res_ways = 0xf0,
289 .cache_mode = 1,
290 .retain_on_pc = true,
291 }, {
292 .usecase_id = LLCC_WRCACHE,
293 .slice_id = 31,
294 .max_cap = 512,
295 .priority = 1,
296 .fixed_size = true,
297 .bonus_ways = 0xff,
298 .cache_mode = 0,
299 .activate_on_init = true,
300 },
301 };
302
303 static const struct llcc_slice_config sar1130p_data[] = {
304 {
305 .usecase_id = LLCC_CPUSS,
306 .slice_id = 1,
307 .max_cap = 4096,
308 .priority = 1,
309 .bonus_ways = 0x1fff,
310 .res_ways = 0x0,
311 .cache_mode = 0,
312 .retain_on_pc = true,
313 .activate_on_init = true,
314 }, {
315 .usecase_id = LLCC_VIDSC0,
316 .slice_id = 2,
317 .max_cap = 512,
318 .priority = 3,
319 .fixed_size = true,
320 .bonus_ways = 0x1fff,
321 .res_ways = 0x0,
322 .cache_mode = 0,
323 .retain_on_pc = true,
324 }, {
325 .usecase_id = LLCC_AUDIO,
326 .slice_id = 6,
327 .max_cap = 1024,
328 .priority = 3,
329 .fixed_size = true,
330 .bonus_ways = 0x1fff,
331 .res_ways = 0x0,
332 .cache_mode = 0,
333 .retain_on_pc = true,
334 }, {
335 .usecase_id = LLCC_CMPT,
336 .slice_id = 10,
337 .max_cap = 1024,
338 .priority = 1,
339 .fixed_size = true,
340 .bonus_ways = 0x1fff,
341 .res_ways = 0x0,
342 .cache_mode = 0,
343 .retain_on_pc = true,
344 }, {
345 .usecase_id = LLCC_GPUHTW,
346 .slice_id = 11,
347 .max_cap = 0,
348 .priority = 1,
349 .fixed_size = true,
350 .bonus_ways = 0x1fff,
351 .res_ways = 0x0,
352 .cache_mode = 0,
353 .retain_on_pc = true,
354 }, {
355 .usecase_id = LLCC_GPU,
356 .slice_id = 12,
357 .max_cap = 3072,
358 .priority = 3,
359 .fixed_size = true,
360 .bonus_ways = 0x1fff,
361 .res_ways = 0x0,
362 .cache_mode = 0,
363 .retain_on_pc = true,
364 .write_scid_en = true,
365 }, {
366 .usecase_id = LLCC_MMUHWT,
367 .slice_id = 13,
368 .max_cap = 512,
369 .priority = 1,
370 .fixed_size = true,
371 .bonus_ways = 0x1fff,
372 .res_ways = 0x0,
373 .cache_mode = 0,
374 }, {
375 .usecase_id = LLCC_DISP,
376 .slice_id = 16,
377 .max_cap = 12800,
378 .priority = 1,
379 .fixed_size = true,
380 .bonus_ways = 0x1fff,
381 .res_ways = 0x0,
382 .cache_mode = 0,
383 .retain_on_pc = true,
384 }, {
385 .usecase_id = LLCC_CVP,
386 .slice_id = 28,
387 .max_cap = 256,
388 .priority = 3,
389 .fixed_size = true,
390 .bonus_ways = 0x1fff,
391 .res_ways = 0x0,
392 .cache_mode = 0,
393 .retain_on_pc = true,
394 }, {
395 .usecase_id = LLCC_APTCM,
396 .slice_id = 26,
397 .max_cap = 2048,
398 .priority = 3,
399 .fixed_size = true,
400 .bonus_ways = 0x0,
401 .res_ways = 0x3,
402 .cache_mode = true,
403 .dis_cap_alloc = true,
404 .retain_on_pc = true,
405 }, {
406 .usecase_id = LLCC_WRCACHE,
407 .slice_id = 31,
408 .max_cap = 256,
409 .priority = 1,
410 .fixed_size = true,
411 .bonus_ways = 0x1fff,
412 .res_ways = 0x0,
413 .cache_mode = 0,
414 .activate_on_init = true,
415 }, {
416 .usecase_id = LLCC_AENPU,
417 .slice_id = 30,
418 .max_cap = 3072,
419 .priority = 3,
420 .fixed_size = true,
421 .bonus_ways = 0x1fff,
422 .res_ways = 0x0,
423 .cache_mode = 0,
424 .retain_on_pc = true,
425 }, {
426 .usecase_id = LLCC_DISP_LEFT,
427 .slice_id = 17,
428 .max_cap = 0,
429 .priority = 1,
430 .fixed_size = true,
431 .bonus_ways = 0x0,
432 .res_ways = 0x0,
433 .cache_mode = 0,
434 .retain_on_pc = true,
435 }, {
436 .usecase_id = LLCC_DISP_RIGHT,
437 .slice_id = 18,
438 .max_cap = 0,
439 .priority = 1,
440 .fixed_size = true,
441 .bonus_ways = 0x0,
442 .res_ways = 0x0,
443 .cache_mode = 0,
444 .retain_on_pc = true,
445 }, {
446 .usecase_id = LLCC_EVCS_LEFT,
447 .slice_id = 22,
448 .max_cap = 0,
449 .priority = 1,
450 .fixed_size = true,
451 .bonus_ways = 0x0,
452 .res_ways = 0x0,
453 .cache_mode = 0,
454 .retain_on_pc = true,
455 }, {
456 .usecase_id = LLCC_EVCS_RIGHT,
457 .slice_id = 23,
458 .max_cap = 0,
459 .priority = 1,
460 .fixed_size = true,
461 .bonus_ways = 0x0,
462 .res_ways = 0x0,
463 .cache_mode = 0,
464 .retain_on_pc = true,
465 },
466 };
467
468 static const struct llcc_slice_config sar2130p_data[] = {
469 {
470 .usecase_id = LLCC_CPUSS,
471 .slice_id = 1,
472 .max_cap = 6144,
473 .priority = 1,
474 .fixed_size = 0,
475 .bonus_ways = 0x3fffffff,
476 .res_ways = 0x0,
477 .cache_mode = 0,
478 .retain_on_pc = true,
479 .activate_on_init = true,
480 }, {
481 .usecase_id = LLCC_VIDSC0,
482 .slice_id = 2,
483 .max_cap = 128,
484 .priority = 2,
485 .fixed_size = true,
486 .bonus_ways = 0x3fffffff,
487 .res_ways = 0x0,
488 .cache_mode = 0,
489 .retain_on_pc = true,
490 }, {
491 .usecase_id = LLCC_AUDIO,
492 .slice_id = 6,
493 .max_cap = 1024,
494 .priority = 3,
495 .fixed_size = true,
496 .bonus_ways = 0x3fffffff,
497 .res_ways = 0x0,
498 .cache_mode = 0,
499 .retain_on_pc = true,
500 }, {
501 .usecase_id = LLCC_CMPT,
502 .slice_id = 10,
503 .max_cap = 1024,
504 .priority = 1,
505 .fixed_size = true,
506 .bonus_ways = 0x3fffffff,
507 .res_ways = 0x0,
508 .cache_mode = 0,
509 .retain_on_pc = true,
510 }, {
511 .usecase_id = LLCC_GPUHTW,
512 .slice_id = 11,
513 .max_cap = 0,
514 .priority = 1,
515 .fixed_size = true,
516 .bonus_ways = 0x3fffffff,
517 .res_ways = 0x0,
518 .cache_mode = 0,
519 .retain_on_pc = true,
520 }, {
521 .usecase_id = LLCC_GPU,
522 .slice_id = 12,
523 .max_cap = 1536,
524 .priority = 2,
525 .fixed_size = true,
526 .bonus_ways = 0x3fffffff,
527 .res_ways = 0x0,
528 .cache_mode = 0,
529 .retain_on_pc = true,
530 .write_scid_en = true,
531 }, {
532 .usecase_id = LLCC_MMUHWT,
533 .slice_id = 13,
534 .max_cap = 1024,
535 .priority = 1,
536 .fixed_size = true,
537 .bonus_ways = 0x3fffffff,
538 .res_ways = 0x0,
539 .cache_mode = 0,
540 .activate_on_init = true,
541 }, {
542 .usecase_id = LLCC_DISP,
543 .slice_id = 16,
544 .max_cap = 0,
545 .priority = 1,
546 .fixed_size = true,
547 .bonus_ways = 0x3fffffff,
548 .res_ways = 0x0,
549 .cache_mode = 0,
550 .retain_on_pc = true,
551 }, {
552 .usecase_id = LLCC_APTCM,
553 .slice_id = 26,
554 .max_cap = 2048,
555 .priority = 3,
556 .fixed_size = true,
557 .bonus_ways = 0x0,
558 .res_ways = 0x3,
559 .cache_mode = true,
560 .dis_cap_alloc = true,
561 .retain_on_pc = true,
562 }, {
563 .usecase_id = LLCC_WRCACHE,
564 .slice_id = 31,
565 .max_cap = 256,
566 .priority = 1,
567 .fixed_size = true,
568 .bonus_ways = 0x3fffffff,
569 .res_ways = 0x0,
570 .cache_mode = 0,
571 .activate_on_init = true,
572 }, {
573 .usecase_id = LLCC_VIEYE,
574 .slice_id = 7,
575 .max_cap = 7168,
576 .priority = 4,
577 .fixed_size = true,
578 .bonus_ways = 0x3fffffff,
579 .res_ways = 0x0,
580 .cache_mode = 0,
581 .retain_on_pc = true,
582 }, {
583 .usecase_id = LLCC_VIDPTH,
584 .slice_id = 8,
585 .max_cap = 7168,
586 .priority = 4,
587 .fixed_size = true,
588 .bonus_ways = 0x3fffffff,
589 .res_ways = 0x0,
590 .cache_mode = 0,
591 .retain_on_pc = true,
592 }, {
593 .usecase_id = LLCC_GPUMV,
594 .slice_id = 9,
595 .max_cap = 2048,
596 .priority = 2,
597 .fixed_size = true,
598 .bonus_ways = 0x3fffffff,
599 .res_ways = 0x0,
600 .cache_mode = 0,
601 .retain_on_pc = true,
602 }, {
603 .usecase_id = LLCC_EVA_LEFT,
604 .slice_id = 20,
605 .max_cap = 7168,
606 .priority = 5,
607 .fixed_size = true,
608 .bonus_ways = 0x3ffffffc,
609 .res_ways = 0x0,
610 .cache_mode = 0,
611 .retain_on_pc = true,
612 }, {
613 .usecase_id = LLCC_EVA_RIGHT,
614 .slice_id = 21,
615 .max_cap = 7168,
616 .priority = 5,
617 .fixed_size = true,
618 .bonus_ways = 0x3ffffffc,
619 .res_ways = 0x0,
620 .cache_mode = 0,
621 .retain_on_pc = true,
622 }, {
623 .usecase_id = LLCC_EVAGAIN,
624 .slice_id = 25,
625 .max_cap = 1024,
626 .priority = 2,
627 .fixed_size = true,
628 .bonus_ways = 0x3fffffff,
629 .res_ways = 0x0,
630 .cache_mode = 0,
631 .retain_on_pc = true,
632 }, {
633 .usecase_id = LLCC_AENPU,
634 .slice_id = 30,
635 .max_cap = 3072,
636 .priority = 3,
637 .fixed_size = true,
638 .bonus_ways = 0x3fffffff,
639 .res_ways = 0x0,
640 .cache_mode = 0,
641 .retain_on_pc = true,
642 }, {
643 .usecase_id = LLCC_VIPTH,
644 .slice_id = 29,
645 .max_cap = 1024,
646 .priority = 4,
647 .fixed_size = true,
648 .bonus_ways = 0x3fffffff,
649 .res_ways = 0x0,
650 .cache_mode = 0,
651 .retain_on_pc = true,
652 }, {
653 .usecase_id = LLCC_DISP_LEFT,
654 .slice_id = 17,
655 .max_cap = 0,
656 .priority = 1,
657 .fixed_size = true,
658 .bonus_ways = 0x0,
659 .res_ways = 0x0,
660 .cache_mode = 0,
661 .retain_on_pc = true,
662 }, {
663 .usecase_id = LLCC_DISP_RIGHT,
664 .slice_id = 18,
665 .max_cap = 0,
666 .priority = 1,
667 .fixed_size = true,
668 .bonus_ways = 0x0,
669 .res_ways = 0x0,
670 .cache_mode = 0,
671 .retain_on_pc = true,
672 }, {
673 .usecase_id = LLCC_EVCS_LEFT,
674 .slice_id = 22,
675 .max_cap = 0,
676 .priority = 1,
677 .fixed_size = true,
678 .bonus_ways = 0x0,
679 .res_ways = 0x0,
680 .cache_mode = 0,
681 .retain_on_pc = true,
682 }, {
683 .usecase_id = LLCC_EVCS_RIGHT,
684 .slice_id = 23,
685 .max_cap = 0,
686 .priority = 1,
687 .fixed_size = true,
688 .bonus_ways = 0x0,
689 .res_ways = 0x0,
690 .cache_mode = 0,
691 .retain_on_pc = true,
692 }, {
693 .usecase_id = LLCC_SPAD,
694 .slice_id = 24,
695 .max_cap = 7168,
696 .priority = 1,
697 .fixed_size = true,
698 .bonus_ways = 0x0,
699 .res_ways = 0x0,
700 .cache_mode = 0,
701 .retain_on_pc = true,
702 },
703 };
704
705 static const struct llcc_slice_config sc7180_data[] = {
706 {
707 .usecase_id = LLCC_CPUSS,
708 .slice_id = 1,
709 .max_cap = 256,
710 .priority = 1,
711 .bonus_ways = 0xf,
712 .cache_mode = 0,
713 .retain_on_pc = true,
714 .activate_on_init = true,
715 }, {
716 .usecase_id = LLCC_MDM,
717 .slice_id = 8,
718 .max_cap = 128,
719 .priority = 1,
720 .bonus_ways = 0xf,
721 .cache_mode = 0,
722 .retain_on_pc = true,
723 }, {
724 .usecase_id = LLCC_GPUHTW,
725 .slice_id = 11,
726 .max_cap = 128,
727 .priority = 1,
728 .bonus_ways = 0xf,
729 .cache_mode = 0,
730 .retain_on_pc = true,
731 }, {
732 .usecase_id = LLCC_GPU,
733 .slice_id = 12,
734 .max_cap = 128,
735 .priority = 1,
736 .bonus_ways = 0xf,
737 .cache_mode = 0,
738 .retain_on_pc = true,
739 },
740 };
741
742 static const struct llcc_slice_config sc7280_data[] = {
743 {
744 .usecase_id = LLCC_CPUSS,
745 .slice_id = 1,
746 .max_cap = 768,
747 .priority = 1,
748 .bonus_ways = 0x3f,
749 .cache_mode = 0,
750 .retain_on_pc = true,
751 .activate_on_init = true,
752 }, {
753 .usecase_id = LLCC_MDMHPGRW,
754 .slice_id = 7,
755 .max_cap = 512,
756 .priority = 2,
757 .fixed_size = true,
758 .bonus_ways = 0x3f,
759 .cache_mode = 0,
760 .retain_on_pc = true,
761 }, {
762 .usecase_id = LLCC_CMPT,
763 .slice_id = 10,
764 .max_cap = 768,
765 .priority = 1,
766 .fixed_size = true,
767 .bonus_ways = 0x3f,
768 .cache_mode = 0,
769 .retain_on_pc = true,
770 }, {
771 .usecase_id = LLCC_GPUHTW,
772 .slice_id = 11,
773 .max_cap = 256,
774 .priority = 1,
775 .fixed_size = true,
776 .bonus_ways = 0x3f,
777 .cache_mode = 0,
778 .retain_on_pc = true,
779 }, {
780 .usecase_id = LLCC_GPU,
781 .slice_id = 12,
782 .max_cap = 512,
783 .priority = 1,
784 .bonus_ways = 0x3f,
785 .cache_mode = 0,
786 .retain_on_pc = true,
787 }, {
788 .usecase_id = LLCC_MMUHWT,
789 .slice_id = 13,
790 .max_cap = 256,
791 .priority = 1,
792 .fixed_size = true,
793 .bonus_ways = 0x3f,
794 .cache_mode = 0,
795 .activate_on_init = true,
796 }, {
797 .usecase_id = LLCC_MDMPNG,
798 .slice_id = 21,
799 .max_cap = 768,
800 .priority = 0,
801 .fixed_size = true,
802 .bonus_ways = 0x3f,
803 .cache_mode = 0,
804 .retain_on_pc = true,
805 }, {
806 .usecase_id = LLCC_WLHW,
807 .slice_id = 24,
808 .max_cap = 256,
809 .priority = 1,
810 .fixed_size = true,
811 .bonus_ways = 0x3f,
812 .cache_mode = 0,
813 .retain_on_pc = true,
814 }, {
815 .usecase_id = LLCC_MODPE,
816 .slice_id = 29,
817 .max_cap = 64,
818 .priority = 1,
819 .fixed_size = true,
820 .bonus_ways = 0x3f,
821 .cache_mode = 0,
822 .retain_on_pc = true,
823 },
824 };
825
826 static const struct llcc_slice_config sc8180x_data[] = {
827 {
828 .usecase_id = LLCC_CPUSS,
829 .slice_id = 1,
830 .max_cap = 6144,
831 .priority = 1,
832 .fixed_size = true,
833 .bonus_ways = 0xfff,
834 .cache_mode = 0,
835 .retain_on_pc = true,
836 .activate_on_init = true,
837 }, {
838 .usecase_id = LLCC_VIDSC0,
839 .slice_id = 2,
840 .max_cap = 512,
841 .priority = 2,
842 .fixed_size = true,
843 .bonus_ways = 0xfff,
844 .cache_mode = 0,
845 .retain_on_pc = true,
846 }, {
847 .usecase_id = LLCC_VIDSC1,
848 .slice_id = 3,
849 .max_cap = 512,
850 .priority = 2,
851 .fixed_size = true,
852 .bonus_ways = 0xfff,
853 .cache_mode = 0,
854 .retain_on_pc = true,
855 }, {
856 .usecase_id = LLCC_AUDIO,
857 .slice_id = 6,
858 .max_cap = 1024,
859 .priority = 1,
860 .fixed_size = true,
861 .bonus_ways = 0xfff,
862 .cache_mode = 0,
863 .retain_on_pc = true,
864 }, {
865 .usecase_id = LLCC_MDMHPGRW,
866 .slice_id = 7,
867 .max_cap = 3072,
868 .priority = 1,
869 .fixed_size = true,
870 .bonus_ways = 0x3ff,
871 .res_ways = 0xc00,
872 .cache_mode = 0,
873 .retain_on_pc = true,
874 }, {
875 .usecase_id = LLCC_MDM,
876 .slice_id = 8,
877 .max_cap = 3072,
878 .priority = 1,
879 .fixed_size = true,
880 .bonus_ways = 0xfff,
881 .cache_mode = 0,
882 .retain_on_pc = true,
883 }, {
884 .usecase_id = LLCC_MODHW,
885 .slice_id = 9,
886 .max_cap = 1024,
887 .priority = 1,
888 .fixed_size = true,
889 .bonus_ways = 0xfff,
890 .cache_mode = 0,
891 .retain_on_pc = true,
892 }, {
893 .usecase_id = LLCC_CMPT,
894 .slice_id = 10,
895 .max_cap = 6144,
896 .priority = 1,
897 .fixed_size = true,
898 .bonus_ways = 0xfff,
899 .cache_mode = 0,
900 .retain_on_pc = true,
901 }, {
902 .usecase_id = LLCC_GPUHTW,
903 .slice_id = 11,
904 .max_cap = 1024,
905 .priority = 1,
906 .fixed_size = true,
907 .bonus_ways = 0xfff,
908 .cache_mode = 0,
909 .retain_on_pc = true,
910 }, {
911 .usecase_id = LLCC_GPU,
912 .slice_id = 12,
913 .max_cap = 5120,
914 .priority = 1,
915 .fixed_size = true,
916 .bonus_ways = 0xfff,
917 .cache_mode = 0,
918 .retain_on_pc = true,
919 }, {
920 .usecase_id = LLCC_MMUHWT,
921 .slice_id = 13,
922 .max_cap = 1024,
923 .priority = 1,
924 .fixed_size = true,
925 .bonus_ways = 0xfff,
926 .cache_mode = 0,
927 .activate_on_init = true,
928 }, {
929 .usecase_id = LLCC_CMPTDMA,
930 .slice_id = 15,
931 .max_cap = 6144,
932 .priority = 1,
933 .fixed_size = true,
934 .bonus_ways = 0xfff,
935 .cache_mode = 0,
936 .retain_on_pc = true,
937 }, {
938 .usecase_id = LLCC_DISP,
939 .slice_id = 16,
940 .max_cap = 6144,
941 .priority = 1,
942 .fixed_size = true,
943 .bonus_ways = 0xfff,
944 .cache_mode = 0,
945 .retain_on_pc = true,
946 }, {
947 .usecase_id = LLCC_VIDFW,
948 .slice_id = 17,
949 .max_cap = 1024,
950 .priority = 1,
951 .fixed_size = true,
952 .bonus_ways = 0xfff,
953 .cache_mode = 0,
954 .retain_on_pc = true,
955 }, {
956 .usecase_id = LLCC_MDMHPFX,
957 .slice_id = 20,
958 .max_cap = 1024,
959 .priority = 2,
960 .fixed_size = true,
961 .bonus_ways = 0xfff,
962 .cache_mode = 0,
963 .retain_on_pc = true,
964 }, {
965 .usecase_id = LLCC_MDMPNG,
966 .slice_id = 21,
967 .max_cap = 1024,
968 .priority = 0,
969 .fixed_size = true,
970 .bonus_ways = 0xc,
971 .cache_mode = 0,
972 .retain_on_pc = true,
973 }, {
974 .usecase_id = LLCC_AUDHW,
975 .slice_id = 22,
976 .max_cap = 1024,
977 .priority = 1,
978 .fixed_size = true,
979 .bonus_ways = 0xfff,
980 .cache_mode = 0,
981 .retain_on_pc = true,
982 }, {
983 .usecase_id = LLCC_NPU,
984 .slice_id = 23,
985 .max_cap = 6144,
986 .priority = 1,
987 .fixed_size = true,
988 .bonus_ways = 0xfff,
989 .cache_mode = 0,
990 .retain_on_pc = true,
991 }, {
992 .usecase_id = LLCC_WLHW,
993 .slice_id = 24,
994 .max_cap = 6144,
995 .priority = 1,
996 .fixed_size = true,
997 .bonus_ways = 0xfff,
998 .cache_mode = 0,
999 .retain_on_pc = true,
1000 }, {
1001 .usecase_id = LLCC_MODPE,
1002 .slice_id = 29,
1003 .max_cap = 512,
1004 .priority = 1,
1005 .fixed_size = true,
1006 .bonus_ways = 0xc,
1007 .cache_mode = 0,
1008 .retain_on_pc = true,
1009 }, {
1010 .usecase_id = LLCC_APTCM,
1011 .slice_id = 30,
1012 .max_cap = 512,
1013 .priority = 3,
1014 .fixed_size = true,
1015 .res_ways = 0x1,
1016 .cache_mode = 1,
1017 .retain_on_pc = true,
1018 }, {
1019 .usecase_id = LLCC_WRCACHE,
1020 .slice_id = 31,
1021 .max_cap = 128,
1022 .priority = 1,
1023 .fixed_size = true,
1024 .bonus_ways = 0xfff,
1025 .cache_mode = 0,
1026 },
1027 };
1028
1029 static const struct llcc_slice_config sc8280xp_data[] = {
1030 {
1031 .usecase_id = LLCC_CPUSS,
1032 .slice_id = 1,
1033 .max_cap = 6144,
1034 .priority = 1,
1035 .fixed_size = true,
1036 .bonus_ways = 0xfff,
1037 .cache_mode = 0,
1038 .retain_on_pc = true,
1039 .activate_on_init = true,
1040 }, {
1041 .usecase_id = LLCC_VIDSC0,
1042 .slice_id = 2,
1043 .max_cap = 512,
1044 .priority = 3,
1045 .fixed_size = true,
1046 .bonus_ways = 0xfff,
1047 .cache_mode = 0,
1048 .retain_on_pc = true,
1049 }, {
1050 .usecase_id = LLCC_AUDIO,
1051 .slice_id = 6,
1052 .max_cap = 1024,
1053 .priority = 1,
1054 .fixed_size = true,
1055 .bonus_ways = 0xfff,
1056 .cache_mode = 0,
1057 }, {
1058 .usecase_id = LLCC_CMPT,
1059 .slice_id = 10,
1060 .max_cap = 6144,
1061 .priority = 1,
1062 .fixed_size = true,
1063 .bonus_ways = 0xfff,
1064 .cache_mode = 0,
1065 }, {
1066 .usecase_id = LLCC_GPUHTW,
1067 .slice_id = 11,
1068 .max_cap = 1024,
1069 .priority = 1,
1070 .fixed_size = true,
1071 .bonus_ways = 0xfff,
1072 .cache_mode = 0,
1073 .retain_on_pc = true,
1074 }, {
1075 .usecase_id = LLCC_GPU,
1076 .slice_id = 12,
1077 .max_cap = 4096,
1078 .priority = 1,
1079 .fixed_size = true,
1080 .bonus_ways = 0xfff,
1081 .cache_mode = 0,
1082 .retain_on_pc = true,
1083 .write_scid_en = true,
1084 }, {
1085 .usecase_id = LLCC_MMUHWT,
1086 .slice_id = 13,
1087 .max_cap = 1024,
1088 .priority = 1,
1089 .fixed_size = true,
1090 .bonus_ways = 0xfff,
1091 .cache_mode = 0,
1092 .activate_on_init = true,
1093 }, {
1094 .usecase_id = LLCC_DISP,
1095 .slice_id = 16,
1096 .max_cap = 6144,
1097 .priority = 1,
1098 .fixed_size = true,
1099 .bonus_ways = 0xfff,
1100 .cache_mode = 0,
1101 .retain_on_pc = true,
1102 }, {
1103 .usecase_id = LLCC_AUDHW,
1104 .slice_id = 22,
1105 .max_cap = 2048,
1106 .priority = 1,
1107 .fixed_size = true,
1108 .bonus_ways = 0xfff,
1109 .cache_mode = 0,
1110 .retain_on_pc = true,
1111 }, {
1112 .usecase_id = LLCC_ECC,
1113 .slice_id = 26,
1114 .max_cap = 1024,
1115 .priority = 1,
1116 .fixed_size = true,
1117 .bonus_ways = 0xfff,
1118 .cache_mode = 0,
1119 .retain_on_pc = true,
1120 }, {
1121 .usecase_id = LLCC_CVP,
1122 .slice_id = 28,
1123 .max_cap = 512,
1124 .priority = 3,
1125 .fixed_size = true,
1126 .bonus_ways = 0xfff,
1127 .cache_mode = 0,
1128 .retain_on_pc = true,
1129 }, {
1130 .usecase_id = LLCC_APTCM,
1131 .slice_id = 30,
1132 .max_cap = 1024,
1133 .priority = 3,
1134 .fixed_size = true,
1135 .res_ways = 0x1,
1136 .cache_mode = 1,
1137 .retain_on_pc = true,
1138 }, {
1139 .usecase_id = LLCC_WRCACHE,
1140 .slice_id = 31,
1141 .max_cap = 1024,
1142 .priority = 1,
1143 .fixed_size = true,
1144 .bonus_ways = 0xfff,
1145 .cache_mode = 0,
1146 .activate_on_init = true,
1147 }, {
1148 .usecase_id = LLCC_CVPFW,
1149 .slice_id = 17,
1150 .max_cap = 512,
1151 .priority = 1,
1152 .bonus_ways = 0xfff,
1153 .cache_mode = 0,
1154 .retain_on_pc = true,
1155 }, {
1156 .usecase_id = LLCC_CPUSS1,
1157 .slice_id = 3,
1158 .max_cap = 2048,
1159 .priority = 1,
1160 .fixed_size = true,
1161 .bonus_ways = 0xfff,
1162 .cache_mode = 0,
1163 .retain_on_pc = true,
1164 }, {
1165 .usecase_id = LLCC_CPUHWT,
1166 .slice_id = 5,
1167 .max_cap = 512,
1168 .priority = 1,
1169 .fixed_size = true,
1170 .bonus_ways = 0xfff,
1171 .cache_mode = 0,
1172 .activate_on_init = true,
1173 },
1174 };
1175
1176 static const struct llcc_slice_config sdm845_data[] = {{
1177 .usecase_id = LLCC_CPUSS,
1178 .slice_id = 1,
1179 .max_cap = 2816,
1180 .priority = 1,
1181 .bonus_ways = 0xffc,
1182 .res_ways = 0x2,
1183 .cache_mode = 0,
1184 .dis_cap_alloc = true,
1185 .retain_on_pc = true,
1186 .activate_on_init = true,
1187 }, {
1188 .usecase_id = LLCC_VIDSC0,
1189 .slice_id = 2,
1190 .max_cap = 512,
1191 .priority = 2,
1192 .fixed_size = true,
1193 .res_ways = 0xf0,
1194 .cache_mode = 0,
1195 .dis_cap_alloc = true,
1196 .retain_on_pc = true,
1197 }, {
1198 .usecase_id = LLCC_VIDSC1,
1199 .slice_id = 3,
1200 .max_cap = 512,
1201 .priority = 2,
1202 .fixed_size = true,
1203 .res_ways = 0xf0,
1204 .cache_mode = 0,
1205 .dis_cap_alloc = true,
1206 .retain_on_pc = true,
1207 }, {
1208 .usecase_id = LLCC_ROTATOR,
1209 .slice_id = 4,
1210 .max_cap = 563,
1211 .priority = 2,
1212 .fixed_size = true,
1213 .res_ways = 0xe,
1214 .cache_mode = 2,
1215 .dis_cap_alloc = true,
1216 .retain_on_pc = true,
1217 }, {
1218 .usecase_id = LLCC_VOICE,
1219 .slice_id = 5,
1220 .max_cap = 2816,
1221 .priority = 1,
1222 .bonus_ways = 0xffc,
1223 .res_ways = 0x2,
1224 .cache_mode = 0,
1225 .dis_cap_alloc = true,
1226 .retain_on_pc = true,
1227 }, {
1228 .usecase_id = LLCC_AUDIO,
1229 .slice_id = 6,
1230 .max_cap = 2816,
1231 .priority = 1,
1232 .bonus_ways = 0xffc,
1233 .res_ways = 0x2,
1234 .cache_mode = 0,
1235 .dis_cap_alloc = true,
1236 .retain_on_pc = true,
1237 }, {
1238 .usecase_id = LLCC_MDMHPGRW,
1239 .slice_id = 7,
1240 .max_cap = 1024,
1241 .priority = 2,
1242 .bonus_ways = 0xfc,
1243 .res_ways = 0xf00,
1244 .cache_mode = 0,
1245 .dis_cap_alloc = true,
1246 .retain_on_pc = true,
1247 }, {
1248 .usecase_id = LLCC_MDM,
1249 .slice_id = 8,
1250 .max_cap = 2816,
1251 .priority = 1,
1252 .bonus_ways = 0xffc,
1253 .res_ways = 0x2,
1254 .cache_mode = 0,
1255 .dis_cap_alloc = true,
1256 .retain_on_pc = true,
1257 }, {
1258 .usecase_id = LLCC_CMPT,
1259 .slice_id = 10,
1260 .max_cap = 2816,
1261 .priority = 1,
1262 .bonus_ways = 0xffc,
1263 .res_ways = 0x2,
1264 .cache_mode = 0,
1265 .dis_cap_alloc = true,
1266 .retain_on_pc = true,
1267 }, {
1268 .usecase_id = LLCC_GPUHTW,
1269 .slice_id = 11,
1270 .max_cap = 512,
1271 .priority = 1,
1272 .fixed_size = true,
1273 .bonus_ways = 0xc,
1274 .cache_mode = 0,
1275 .dis_cap_alloc = true,
1276 .retain_on_pc = true,
1277 }, {
1278 .usecase_id = LLCC_GPU,
1279 .slice_id = 12,
1280 .max_cap = 2304,
1281 .priority = 1,
1282 .bonus_ways = 0xff0,
1283 .res_ways = 0x2,
1284 .cache_mode = 0,
1285 .dis_cap_alloc = true,
1286 .retain_on_pc = true,
1287 }, {
1288 .usecase_id = LLCC_MMUHWT,
1289 .slice_id = 13,
1290 .max_cap = 256,
1291 .priority = 2,
1292 .res_ways = 0x1,
1293 .cache_mode = 0,
1294 .dis_cap_alloc = true,
1295 .activate_on_init = true,
1296 }, {
1297 .usecase_id = LLCC_CMPTDMA,
1298 .slice_id = 15,
1299 .max_cap = 2816,
1300 .priority = 1,
1301 .bonus_ways = 0xffc,
1302 .res_ways = 0x2,
1303 .cache_mode = 0,
1304 .dis_cap_alloc = true,
1305 .retain_on_pc = true,
1306 }, {
1307 .usecase_id = LLCC_DISP,
1308 .slice_id = 16,
1309 .max_cap = 2816,
1310 .priority = 1,
1311 .bonus_ways = 0xffc,
1312 .res_ways = 0x2,
1313 .cache_mode = 0,
1314 .dis_cap_alloc = true,
1315 .retain_on_pc = true,
1316 }, {
1317 .usecase_id = LLCC_VIDFW,
1318 .slice_id = 17,
1319 .max_cap = 2816,
1320 .priority = 1,
1321 .bonus_ways = 0xffc,
1322 .res_ways = 0x2,
1323 .cache_mode = 0,
1324 .dis_cap_alloc = true,
1325 .retain_on_pc = true,
1326 }, {
1327 .usecase_id = LLCC_MDMHPFX,
1328 .slice_id = 20,
1329 .max_cap = 1024,
1330 .priority = 2,
1331 .fixed_size = true,
1332 .res_ways = 0xf00,
1333 .cache_mode = 0,
1334 .dis_cap_alloc = true,
1335 .retain_on_pc = true,
1336 }, {
1337 .usecase_id = LLCC_MDMPNG,
1338 .slice_id = 21,
1339 .max_cap = 1024,
1340 .priority = 0,
1341 .fixed_size = true,
1342 .bonus_ways = 0x1e,
1343 .cache_mode = 0,
1344 .dis_cap_alloc = true,
1345 .retain_on_pc = true,
1346 }, {
1347 .usecase_id = LLCC_AUDHW,
1348 .slice_id = 22,
1349 .max_cap = 1024,
1350 .priority = 1,
1351 .fixed_size = true,
1352 .bonus_ways = 0xffc,
1353 .res_ways = 0x2,
1354 .cache_mode = 0,
1355 .dis_cap_alloc = true,
1356 .retain_on_pc = true,
1357 },
1358 };
1359
1360 static const struct llcc_slice_config sm6350_data[] = {
1361 {
1362 .usecase_id = LLCC_CPUSS,
1363 .slice_id = 1,
1364 .max_cap = 768,
1365 .priority = 1,
1366 .bonus_ways = 0xfff,
1367 .cache_mode = 0,
1368 .activate_on_init = true,
1369 .write_scid_en = true,
1370 }, {
1371 .usecase_id = LLCC_MDM,
1372 .slice_id = 8,
1373 .max_cap = 512,
1374 .priority = 2,
1375 .bonus_ways = 0xfff,
1376 .cache_mode = 0,
1377 .activate_on_init = true,
1378 }, {
1379 .usecase_id = LLCC_GPUHTW,
1380 .slice_id = 11,
1381 .max_cap = 256,
1382 .priority = 1,
1383 .bonus_ways = 0xfff,
1384 .cache_mode = 0,
1385 .activate_on_init = true,
1386 }, {
1387 .usecase_id = LLCC_GPU,
1388 .slice_id = 12,
1389 .max_cap = 512,
1390 .priority = 1,
1391 .bonus_ways = 0xfff,
1392 .cache_mode = 0,
1393 .activate_on_init = true,
1394 }, {
1395 .usecase_id = LLCC_MDMPNG,
1396 .slice_id = 21,
1397 .max_cap = 768,
1398 .priority = 0,
1399 .fixed_size = true,
1400 .bonus_ways = 0xfff,
1401 .cache_mode = 0,
1402 .activate_on_init = true,
1403 }, {
1404 .usecase_id = LLCC_NPU,
1405 .slice_id = 23,
1406 .max_cap = 768,
1407 .priority = 1,
1408 .bonus_ways = 0xfff,
1409 .cache_mode = 0,
1410 .activate_on_init = true,
1411 }, {
1412 .usecase_id = LLCC_MODPE,
1413 .slice_id = 29,
1414 .max_cap = 64,
1415 .priority = 1,
1416 .fixed_size = true,
1417 .bonus_ways = 0xfff,
1418 .cache_mode = 0,
1419 .activate_on_init = true,
1420 },
1421 };
1422
1423 static const struct llcc_slice_config sm7150_data[] = {
1424 {
1425 .usecase_id = LLCC_CPUSS,
1426 .slice_id = 1,
1427 .max_cap = 512,
1428 .priority = 1,
1429 .bonus_ways = 0xf,
1430 .cache_mode = 0,
1431 .retain_on_pc = true,
1432 .activate_on_init = true,
1433 }, {
1434 .usecase_id = LLCC_MDM,
1435 .slice_id = 8,
1436 .max_cap = 128,
1437 .priority = 2,
1438 .bonus_ways = 0xf,
1439 .cache_mode = 0,
1440 .retain_on_pc = true,
1441 }, {
1442 .usecase_id = LLCC_GPUHTW,
1443 .slice_id = 11,
1444 .max_cap = 256,
1445 .priority = 1,
1446 .fixed_size = true,
1447 .bonus_ways = 0xf,
1448 .cache_mode = 0,
1449 .retain_on_pc = true,
1450 }, {
1451 .usecase_id = LLCC_GPU,
1452 .slice_id = 12,
1453 .max_cap = 256,
1454 .priority = 1,
1455 .fixed_size = true,
1456 .bonus_ways = 0xf,
1457 .cache_mode = 0,
1458 .retain_on_pc = true,
1459 }, {
1460 .usecase_id = LLCC_NPU,
1461 .slice_id = 23,
1462 .max_cap = 512,
1463 .priority = 1,
1464 .bonus_ways = 0xf,
1465 .cache_mode = 0,
1466 .retain_on_pc = true,
1467 },
1468 };
1469
1470 static const struct llcc_slice_config sm8150_data[] = {
1471 {
1472 .usecase_id = LLCC_CPUSS,
1473 .slice_id = 1,
1474 .max_cap = 3072,
1475 .priority = 1,
1476 .fixed_size = true,
1477 .bonus_ways = 0xfff,
1478 .cache_mode = 0,
1479 .retain_on_pc = true,
1480 .activate_on_init = true,
1481 }, {
1482 .usecase_id = LLCC_VIDSC0,
1483 .slice_id = 2,
1484 .max_cap = 512,
1485 .priority = 2,
1486 .fixed_size = true,
1487 .bonus_ways = 0xfff,
1488 .cache_mode = 0,
1489 .retain_on_pc = true,
1490 }, {
1491 .usecase_id = LLCC_VIDSC1,
1492 .slice_id = 3,
1493 .max_cap = 512,
1494 .priority = 2,
1495 .fixed_size = true,
1496 .bonus_ways = 0xfff,
1497 .cache_mode = 0,
1498 .retain_on_pc = true,
1499 }, {
1500 .usecase_id = LLCC_AUDIO,
1501 .slice_id = 6,
1502 .max_cap = 1024,
1503 .priority = 1,
1504 .fixed_size = true,
1505 .bonus_ways = 0xfff,
1506 .cache_mode = 0,
1507 .retain_on_pc = true,
1508 }, {
1509 .usecase_id = LLCC_MDMHPGRW,
1510 .slice_id = 7,
1511 .max_cap = 3072,
1512 .priority = 1,
1513 .bonus_ways = 0xff,
1514 .res_ways = 0xf00,
1515 .cache_mode = 0,
1516 .retain_on_pc = true,
1517 }, {
1518 .usecase_id = LLCC_MDM,
1519 .slice_id = 8,
1520 .max_cap = 3072,
1521 .priority = 1,
1522 .fixed_size = true,
1523 .bonus_ways = 0xfff,
1524 .cache_mode = 0,
1525 .retain_on_pc = true,
1526 }, {
1527 .usecase_id = LLCC_MODHW,
1528 .slice_id = 9,
1529 .max_cap = 1024,
1530 .priority = 1,
1531 .fixed_size = true,
1532 .bonus_ways = 0xfff,
1533 .cache_mode = 0,
1534 .retain_on_pc = true,
1535 }, {
1536 .usecase_id = LLCC_CMPT,
1537 .slice_id = 10,
1538 .max_cap = 3072,
1539 .priority = 1,
1540 .fixed_size = true,
1541 .bonus_ways = 0xfff,
1542 .cache_mode = 0,
1543 .retain_on_pc = true,
1544 }, {
1545 .usecase_id = LLCC_GPUHTW,
1546 .slice_id = 11,
1547 .max_cap = 512,
1548 .priority = 1,
1549 .fixed_size = true,
1550 .bonus_ways = 0xfff,
1551 .cache_mode = 0,
1552 .retain_on_pc = true,
1553 }, {
1554 .usecase_id = LLCC_GPU,
1555 .slice_id = 12,
1556 .max_cap = 2560,
1557 .priority = 1,
1558 .fixed_size = true,
1559 .bonus_ways = 0xfff,
1560 .cache_mode = 0,
1561 .retain_on_pc = true,
1562 }, {
1563 .usecase_id = LLCC_MMUHWT,
1564 .slice_id = 13,
1565 .max_cap = 1024,
1566 .priority = 1,
1567 .fixed_size = true,
1568 .bonus_ways = 0xfff,
1569 .cache_mode = 0,
1570 .activate_on_init = true,
1571 }, {
1572 .usecase_id = LLCC_CMPTDMA,
1573 .slice_id = 15,
1574 .max_cap = 3072,
1575 .priority = 1,
1576 .fixed_size = true,
1577 .bonus_ways = 0xfff,
1578 .cache_mode = 0,
1579 .retain_on_pc = true,
1580 }, {
1581 .usecase_id = LLCC_DISP,
1582 .slice_id = 16,
1583 .max_cap = 3072,
1584 .priority = 1,
1585 .fixed_size = true,
1586 .bonus_ways = 0xfff,
1587 .cache_mode = 0,
1588 .retain_on_pc = true,
1589 }, {
1590 .usecase_id = LLCC_MDMHPFX,
1591 .slice_id = 20,
1592 .max_cap = 1024,
1593 .priority = 2,
1594 .fixed_size = true,
1595 .bonus_ways = 0xfff,
1596 .cache_mode = 0,
1597 .retain_on_pc = true,
1598 }, {
1599 .usecase_id = LLCC_MDMHPFX,
1600 .slice_id = 21,
1601 .max_cap = 1024,
1602 .priority = 0,
1603 .fixed_size = true,
1604 .bonus_ways = 0xf,
1605 .cache_mode = 0,
1606 .retain_on_pc = true,
1607 }, {
1608 .usecase_id = LLCC_AUDHW,
1609 .slice_id = 22,
1610 .max_cap = 1024,
1611 .priority = 1,
1612 .fixed_size = true,
1613 .bonus_ways = 0xfff,
1614 .cache_mode = 0,
1615 .retain_on_pc = true,
1616 }, {
1617 .usecase_id = LLCC_NPU,
1618 .slice_id = 23,
1619 .max_cap = 3072,
1620 .priority = 1,
1621 .fixed_size = true,
1622 .bonus_ways = 0xfff,
1623 .cache_mode = 0,
1624 .retain_on_pc = true,
1625 }, {
1626 .usecase_id = LLCC_WLHW,
1627 .slice_id = 24,
1628 .max_cap = 3072,
1629 .priority = 1,
1630 .fixed_size = true,
1631 .bonus_ways = 0xfff,
1632 .cache_mode = 0,
1633 .retain_on_pc = true,
1634 }, {
1635 .usecase_id = LLCC_MODPE,
1636 .slice_id = 29,
1637 .max_cap = 256,
1638 .priority = 1,
1639 .fixed_size = true,
1640 .bonus_ways = 0xf,
1641 .cache_mode = 0,
1642 .retain_on_pc = true,
1643 }, {
1644 .usecase_id = LLCC_APTCM,
1645 .slice_id = 30,
1646 .max_cap = 256,
1647 .priority = 3,
1648 .fixed_size = true,
1649 .res_ways = 0x1,
1650 .cache_mode = 1,
1651 .retain_on_pc = true,
1652 }, {
1653 .usecase_id = LLCC_WRCACHE,
1654 .slice_id = 31,
1655 .max_cap = 128,
1656 .priority = 1,
1657 .fixed_size = true,
1658 .bonus_ways = 0xfff,
1659 .cache_mode = 0,
1660 },
1661 };
1662
1663 static const struct llcc_slice_config sm8250_data[] = {
1664 {
1665 .usecase_id = LLCC_CPUSS,
1666 .slice_id = 1,
1667 .max_cap = 3072,
1668 .priority = 1,
1669 .fixed_size = true,
1670 .bonus_ways = 0xfff,
1671 .cache_mode = 0,
1672 .retain_on_pc = true,
1673 .activate_on_init = true,
1674 }, {
1675 .usecase_id = LLCC_VIDSC0,
1676 .slice_id = 2,
1677 .max_cap = 512,
1678 .priority = 3,
1679 .fixed_size = true,
1680 .bonus_ways = 0xfff,
1681 .cache_mode = 0,
1682 .retain_on_pc = true,
1683 }, {
1684 .usecase_id = LLCC_AUDIO,
1685 .slice_id = 6,
1686 .max_cap = 1024,
1687 .priority = 1,
1688 .bonus_ways = 0xfff,
1689 .cache_mode = 0,
1690 }, {
1691 .usecase_id = LLCC_CMPT,
1692 .slice_id = 10,
1693 .max_cap = 1024,
1694 .priority = 1,
1695 .bonus_ways = 0xfff,
1696 .cache_mode = 0,
1697 }, {
1698 .usecase_id = LLCC_GPUHTW,
1699 .slice_id = 11,
1700 .max_cap = 1024,
1701 .priority = 1,
1702 .fixed_size = true,
1703 .bonus_ways = 0xfff,
1704 .cache_mode = 0,
1705 .retain_on_pc = true,
1706 }, {
1707 .usecase_id = LLCC_GPU,
1708 .slice_id = 12,
1709 .max_cap = 1024,
1710 .priority = 1,
1711 .bonus_ways = 0xfff,
1712 .cache_mode = 0,
1713 .retain_on_pc = true,
1714 .write_scid_en = true,
1715 }, {
1716 .usecase_id = LLCC_MMUHWT,
1717 .slice_id = 13,
1718 .max_cap = 1024,
1719 .priority = 1,
1720 .fixed_size = true,
1721 .bonus_ways = 0xfff,
1722 .cache_mode = 0,
1723 .activate_on_init = true,
1724 }, {
1725 .usecase_id = LLCC_CMPTDMA,
1726 .slice_id = 15,
1727 .max_cap = 1024,
1728 .priority = 1,
1729 .bonus_ways = 0xfff,
1730 .cache_mode = 0,
1731 .retain_on_pc = true,
1732 }, {
1733 .usecase_id = LLCC_DISP,
1734 .slice_id = 16,
1735 .max_cap = 3072,
1736 .priority = 1,
1737 .fixed_size = true,
1738 .bonus_ways = 0xfff,
1739 .cache_mode = 0,
1740 .retain_on_pc = true,
1741 }, {
1742 .usecase_id = LLCC_VIDFW,
1743 .slice_id = 17,
1744 .max_cap = 512,
1745 .priority = 1,
1746 .bonus_ways = 0xfff,
1747 .cache_mode = 0,
1748 .retain_on_pc = true,
1749 }, {
1750 .usecase_id = LLCC_AUDHW,
1751 .slice_id = 22,
1752 .max_cap = 1024,
1753 .priority = 1,
1754 .fixed_size = true,
1755 .bonus_ways = 0xfff,
1756 .cache_mode = 0,
1757 .retain_on_pc = true,
1758 }, {
1759 .usecase_id = LLCC_NPU,
1760 .slice_id = 23,
1761 .max_cap = 3072,
1762 .priority = 1,
1763 .fixed_size = true,
1764 .bonus_ways = 0xfff,
1765 .cache_mode = 0,
1766 .retain_on_pc = true,
1767 }, {
1768 .usecase_id = LLCC_WLHW,
1769 .slice_id = 24,
1770 .max_cap = 1024,
1771 .priority = 1,
1772 .bonus_ways = 0xfff,
1773 .cache_mode = 0,
1774 .retain_on_pc = true,
1775 }, {
1776 .usecase_id = LLCC_CVP,
1777 .slice_id = 28,
1778 .max_cap = 256,
1779 .priority = 3,
1780 .fixed_size = true,
1781 .bonus_ways = 0xfff,
1782 .cache_mode = 0,
1783 .retain_on_pc = true,
1784 }, {
1785 .usecase_id = LLCC_APTCM,
1786 .slice_id = 30,
1787 .max_cap = 128,
1788 .priority = 3,
1789 .res_ways = 0x3,
1790 .cache_mode = 1,
1791 .retain_on_pc = true,
1792 }, {
1793 .usecase_id = LLCC_WRCACHE,
1794 .slice_id = 31,
1795 .max_cap = 256,
1796 .priority = 1,
1797 .fixed_size = true,
1798 .bonus_ways = 0xfff,
1799 .cache_mode = 0,
1800 .activate_on_init = true,
1801 },
1802 };
1803
1804 static const struct llcc_slice_config sm8350_data[] = {
1805 {
1806 .usecase_id = LLCC_CPUSS,
1807 .slice_id = 1,
1808 .max_cap = 3072,
1809 .priority = 1,
1810 .fixed_size = true,
1811 .bonus_ways = 0xfff,
1812 .cache_mode = 0,
1813 .activate_on_init = true,
1814 .write_scid_en = true,
1815 }, {
1816 .usecase_id = LLCC_VIDSC0,
1817 .slice_id = 2,
1818 .max_cap = 512,
1819 .priority = 3,
1820 .fixed_size = true,
1821 .bonus_ways = 0xfff,
1822 .cache_mode = 0,
1823 .activate_on_init = true,
1824 }, {
1825 .usecase_id = LLCC_AUDIO,
1826 .slice_id = 6,
1827 .max_cap = 1024,
1828 .priority = 1,
1829 .fixed_size = true,
1830 .bonus_ways = 0xfff,
1831 .cache_mode = 0,
1832 }, {
1833 .usecase_id = LLCC_MDMHPGRW,
1834 .slice_id = 7,
1835 .max_cap = 1024,
1836 .priority = 3,
1837 .bonus_ways = 0xfff,
1838 .cache_mode = 0,
1839 .activate_on_init = true,
1840 }, {
1841 .usecase_id = LLCC_MODHW,
1842 .slice_id = 9,
1843 .max_cap = 1024,
1844 .priority = 1,
1845 .fixed_size = true,
1846 .bonus_ways = 0xfff,
1847 .cache_mode = 0,
1848 .activate_on_init = true,
1849 }, {
1850 .usecase_id = LLCC_CMPT,
1851 .slice_id = 10,
1852 .max_cap = 3072,
1853 .priority = 1,
1854 .fixed_size = true,
1855 .bonus_ways = 0xfff,
1856 .cache_mode = 0,
1857 .activate_on_init = true,
1858 }, {
1859 .usecase_id = LLCC_GPUHTW,
1860 .slice_id = 11,
1861 .max_cap = 1024,
1862 .priority = 1,
1863 .fixed_size = true,
1864 .bonus_ways = 0xfff,
1865 .cache_mode = 0,
1866 .activate_on_init = true,
1867 }, {
1868 .usecase_id = LLCC_GPU,
1869 .slice_id = 12,
1870 .max_cap = 1024,
1871 .priority = 1,
1872 .bonus_ways = 0xfff,
1873 .cache_mode = 0,
1874 .retain_on_pc = true,
1875 .activate_on_init = true,
1876 }, {
1877 .usecase_id = LLCC_MMUHWT,
1878 .slice_id = 13,
1879 .max_cap = 1024,
1880 .priority = 1,
1881 .fixed_size = true,
1882 .bonus_ways = 0xfff,
1883 .cache_mode = 0,
1884 .write_scid_en = true,
1885 }, {
1886 .usecase_id = LLCC_DISP,
1887 .slice_id = 16,
1888 .max_cap = 3072,
1889 .priority = 2,
1890 .fixed_size = true,
1891 .bonus_ways = 0xfff,
1892 .cache_mode = 0,
1893 .activate_on_init = true,
1894 }, {
1895 .usecase_id = LLCC_MDMPNG,
1896 .slice_id = 21,
1897 .max_cap = 1024,
1898 .priority = 0,
1899 .fixed_size = true,
1900 .bonus_ways = 0xf,
1901 .cache_mode = 0,
1902 .activate_on_init = true,
1903 }, {
1904 .usecase_id = LLCC_AUDHW,
1905 .slice_id = 22,
1906 .max_cap = 1024,
1907 .priority = 1,
1908 .fixed_size = true,
1909 .bonus_ways = 0xfff,
1910 .cache_mode = 0,
1911 .activate_on_init = true,
1912 }, {
1913 .usecase_id = LLCC_CVP,
1914 .slice_id = 28,
1915 .max_cap = 512,
1916 .priority = 3,
1917 .fixed_size = true,
1918 .bonus_ways = 0xfff,
1919 .cache_mode = 0,
1920 .activate_on_init = true,
1921 }, {
1922 .usecase_id = LLCC_MODPE,
1923 .slice_id = 29,
1924 .max_cap = 256,
1925 .priority = 1,
1926 .fixed_size = true,
1927 .bonus_ways = 0xf,
1928 .cache_mode = 0,
1929 .activate_on_init = true,
1930 }, {
1931 .usecase_id = LLCC_APTCM,
1932 .slice_id = 30,
1933 .max_cap = 1024,
1934 .priority = 3,
1935 .fixed_size = true,
1936 .res_ways = 0x1,
1937 .cache_mode = 1,
1938 .activate_on_init = true,
1939 }, {
1940 .usecase_id = LLCC_WRCACHE,
1941 .slice_id = 31,
1942 .max_cap = 512,
1943 .priority = 1,
1944 .fixed_size = true,
1945 .bonus_ways = 0xfff,
1946 .cache_mode = 0,
1947 .write_scid_en = true,
1948 }, {
1949 .usecase_id = LLCC_CVPFW,
1950 .slice_id = 17,
1951 .max_cap = 512,
1952 .priority = 1,
1953 .bonus_ways = 0xfff,
1954 .cache_mode = 0,
1955 .activate_on_init = true,
1956 }, {
1957 .usecase_id = LLCC_CPUSS1,
1958 .slice_id = 3,
1959 .max_cap = 1024,
1960 .priority = 1,
1961 .fixed_size = true,
1962 .bonus_ways = 0xfff,
1963 .cache_mode = 0,
1964 .activate_on_init = true,
1965 }, {
1966 .usecase_id = LLCC_CPUHWT,
1967 .slice_id = 5,
1968 .max_cap = 512,
1969 .priority = 1,
1970 .fixed_size = true,
1971 .bonus_ways = 0xfff,
1972 .cache_mode = 0,
1973 .write_scid_en = true,
1974 },
1975 };
1976
1977 static const struct llcc_slice_config sm8450_data[] = {
1978 {
1979 .usecase_id = LLCC_CPUSS,
1980 .slice_id = 1,
1981 .max_cap = 3072,
1982 .priority = 1,
1983 .bonus_ways = 0xffff,
1984 .cache_mode = 0,
1985 .retain_on_pc = true,
1986 .activate_on_init = true,
1987 }, {
1988 .usecase_id = LLCC_VIDSC0,
1989 .slice_id = 2,
1990 .max_cap = 512,
1991 .priority = 3,
1992 .fixed_size = true,
1993 .bonus_ways = 0xffff,
1994 .cache_mode = 0,
1995 .retain_on_pc = true,
1996 }, {
1997 .usecase_id = LLCC_AUDIO,
1998 .slice_id = 6,
1999 .max_cap = 1024,
2000 .priority = 1,
2001 .fixed_size = true,
2002 .bonus_ways = 0xffff,
2003 .cache_mode = 0,
2004 }, {
2005 .usecase_id = LLCC_MDMHPGRW,
2006 .slice_id = 7,
2007 .max_cap = 1024,
2008 .priority = 3,
2009 .bonus_ways = 0xffff,
2010 .cache_mode = 0,
2011 .retain_on_pc = true,
2012 }, {
2013 .usecase_id = LLCC_MODHW,
2014 .slice_id = 9,
2015 .max_cap = 1024,
2016 .priority = 1,
2017 .fixed_size = true,
2018 .bonus_ways = 0xffff,
2019 .cache_mode = 0,
2020 .retain_on_pc = true,
2021 }, {
2022 .usecase_id = LLCC_CMPT,
2023 .slice_id = 10,
2024 .max_cap = 4096,
2025 .priority = 1,
2026 .fixed_size = true,
2027 .bonus_ways = 0xffff,
2028 .cache_mode = 0,
2029 .retain_on_pc = true,
2030 }, {
2031 .usecase_id = LLCC_GPUHTW,
2032 .slice_id = 11,
2033 .max_cap = 512,
2034 .priority = 1,
2035 .fixed_size = true,
2036 .bonus_ways = 0xffff,
2037 .cache_mode = 0,
2038 .retain_on_pc = true,
2039 }, {
2040 .usecase_id = LLCC_GPU,
2041 .slice_id = 12,
2042 .max_cap = 2048,
2043 .priority = 1,
2044 .fixed_size = true,
2045 .bonus_ways = 0xffff,
2046 .cache_mode = 0,
2047 .retain_on_pc = true,
2048 .write_scid_en = true,
2049 }, {
2050 .usecase_id = LLCC_MMUHWT,
2051 .slice_id = 13,
2052 .max_cap = 768,
2053 .priority = 1,
2054 .fixed_size = true,
2055 .bonus_ways = 0xffff,
2056 .cache_mode = 0,
2057 .activate_on_init = true,
2058 }, {
2059 .usecase_id = LLCC_DISP,
2060 .slice_id = 16,
2061 .max_cap = 4096,
2062 .priority = 2,
2063 .fixed_size = true,
2064 .bonus_ways = 0xffff,
2065 .cache_mode = 0,
2066 .retain_on_pc = true,
2067 }, {
2068 .usecase_id = LLCC_MDMPNG,
2069 .slice_id = 21,
2070 .max_cap = 1024,
2071 .priority = 1,
2072 .fixed_size = true,
2073 .bonus_ways = 0xf000,
2074 .cache_mode = 0,
2075 .retain_on_pc = true,
2076 }, {
2077 .usecase_id = LLCC_AUDHW,
2078 .slice_id = 22,
2079 .max_cap = 1024,
2080 .priority = 1,
2081 .fixed_size = true,
2082 .bonus_ways = 0xffff,
2083 .cache_mode = 0,
2084 }, {
2085 .usecase_id = LLCC_CVP,
2086 .slice_id = 28,
2087 .max_cap = 256,
2088 .priority = 3,
2089 .fixed_size = true,
2090 .bonus_ways = 0xffff,
2091 .cache_mode = 0,
2092 .retain_on_pc = true,
2093 }, {
2094 .usecase_id = LLCC_MODPE,
2095 .slice_id = 29,
2096 .max_cap = 64,
2097 .priority = 1,
2098 .fixed_size = true,
2099 .bonus_ways = 0xf000,
2100 .cache_mode = 0,
2101 .retain_on_pc = true,
2102 }, {
2103 .usecase_id = LLCC_APTCM,
2104 .slice_id = 30,
2105 .max_cap = 1024,
2106 .priority = 3,
2107 .fixed_size = true,
2108 .res_ways = 0xf0,
2109 .cache_mode = 1,
2110 .retain_on_pc = true,
2111 }, {
2112 .usecase_id = LLCC_WRCACHE,
2113 .slice_id = 31,
2114 .max_cap = 512,
2115 .priority = 1,
2116 .fixed_size = true,
2117 .bonus_ways = 0xffff,
2118 .cache_mode = 0,
2119 .activate_on_init = true,
2120 }, {
2121 .usecase_id = LLCC_CVPFW,
2122 .slice_id = 17,
2123 .max_cap = 512,
2124 .priority = 1,
2125 .fixed_size = true,
2126 .bonus_ways = 0xffff,
2127 .cache_mode = 0,
2128 .retain_on_pc = true,
2129 }, {
2130 .usecase_id = LLCC_CPUSS1,
2131 .slice_id = 3,
2132 .max_cap = 1024,
2133 .priority = 1,
2134 .fixed_size = true,
2135 .bonus_ways = 0xffff,
2136 .cache_mode = 0,
2137 .retain_on_pc = true,
2138 }, {
2139 .usecase_id = LLCC_CAMEXP0,
2140 .slice_id = 4,
2141 .max_cap = 256,
2142 .priority = 3,
2143 .fixed_size = true,
2144 .bonus_ways = 0xffff,
2145 .cache_mode = 0,
2146 .retain_on_pc = true,
2147 }, {
2148 .usecase_id = LLCC_CPUMTE,
2149 .slice_id = 23,
2150 .max_cap = 256,
2151 .priority = 1,
2152 .fixed_size = true,
2153 .bonus_ways = 0xfff,
2154 .cache_mode = 0,
2155 .activate_on_init = true,
2156 }, {
2157 .usecase_id = LLCC_CPUHWT,
2158 .slice_id = 5,
2159 .max_cap = 512,
2160 .priority = 1,
2161 .fixed_size = true,
2162 .bonus_ways = 0xffff,
2163 .cache_mode = 0,
2164 .retain_on_pc = true,
2165 .activate_on_init = true,
2166 }, {
2167 .usecase_id = LLCC_CAMEXP1,
2168 .slice_id = 27,
2169 .max_cap = 256,
2170 .priority = 3,
2171 .fixed_size = true,
2172 .bonus_ways = 0xffff,
2173 .cache_mode = 0,
2174 .retain_on_pc = true,
2175 }, {
2176 .usecase_id = LLCC_AENPU,
2177 .slice_id = 8,
2178 .max_cap = 2048,
2179 .priority = 1,
2180 .fixed_size = true,
2181 .bonus_ways = 0xffff,
2182 .cache_mode = 0,
2183 },
2184 };
2185
2186 static const struct llcc_slice_config sm8550_data[] = {
2187 {
2188 .usecase_id = LLCC_CPUSS,
2189 .slice_id = 1,
2190 .max_cap = 5120,
2191 .priority = 1,
2192 .bonus_ways = 0xffffff,
2193 .cache_mode = 0,
2194 .activate_on_init = true,
2195 .write_scid_en = true,
2196 }, {
2197 .usecase_id = LLCC_VIDSC0,
2198 .slice_id = 2,
2199 .max_cap = 512,
2200 .priority = 4,
2201 .fixed_size = true,
2202 .bonus_ways = 0xffffff,
2203 .cache_mode = 0,
2204 }, {
2205 .usecase_id = LLCC_AUDIO,
2206 .slice_id = 6,
2207 .max_cap = 1024,
2208 .priority = 1,
2209 .fixed_size = true,
2210 .bonus_ways = 0xffffff,
2211 .cache_mode = 0,
2212 }, {
2213 .usecase_id = LLCC_MDMHPGRW,
2214 .slice_id = 25,
2215 .max_cap = 1024,
2216 .priority = 4,
2217 .bonus_ways = 0xffffff,
2218 .cache_mode = 0,
2219 }, {
2220 .usecase_id = LLCC_MODHW,
2221 .slice_id = 26,
2222 .max_cap = 1024,
2223 .priority = 1,
2224 .fixed_size = true,
2225 .bonus_ways = 0xffffff,
2226 .cache_mode = 0,
2227 }, {
2228 .usecase_id = LLCC_CMPT,
2229 .slice_id = 10,
2230 .max_cap = 4096,
2231 .priority = 1,
2232 .fixed_size = true,
2233 .bonus_ways = 0xffffff,
2234 .cache_mode = 0,
2235 }, {
2236 .usecase_id = LLCC_GPUHTW,
2237 .slice_id = 11,
2238 .max_cap = 512,
2239 .priority = 1,
2240 .fixed_size = true,
2241 .bonus_ways = 0xffffff,
2242 .cache_mode = 0,
2243 }, {
2244 .usecase_id = LLCC_GPU,
2245 .slice_id = 9,
2246 .max_cap = 3096,
2247 .priority = 1,
2248 .bonus_ways = 0xffffff,
2249 .cache_mode = 0,
2250 .write_scid_en = true,
2251 .write_scid_cacheable_en = true,
2252 }, {
2253 .usecase_id = LLCC_MMUHWT,
2254 .slice_id = 18,
2255 .max_cap = 768,
2256 .priority = 1,
2257 .fixed_size = true,
2258 .bonus_ways = 0xffffff,
2259 .cache_mode = 0,
2260 .activate_on_init = true,
2261 }, {
2262 .usecase_id = LLCC_DISP,
2263 .slice_id = 16,
2264 .max_cap = 6144,
2265 .priority = 1,
2266 .fixed_size = true,
2267 .bonus_ways = 0xffffff,
2268 .cache_mode = 2,
2269 }, {
2270 .usecase_id = LLCC_MDMPNG,
2271 .slice_id = 27,
2272 .max_cap = 1024,
2273 .priority = 0,
2274 .fixed_size = true,
2275 .bonus_ways = 0xf00000,
2276 .cache_mode = 0,
2277 }, {
2278 .usecase_id = LLCC_AUDHW,
2279 .slice_id = 22,
2280 .max_cap = 1024,
2281 .priority = 1,
2282 .fixed_size = true,
2283 .bonus_ways = 0xffffff,
2284 .cache_mode = 0,
2285 }, {
2286 .usecase_id = LLCC_CVP,
2287 .slice_id = 8,
2288 .max_cap = 256,
2289 .priority = 4,
2290 .fixed_size = true,
2291 .bonus_ways = 0xffffff,
2292 .cache_mode = 0,
2293 }, {
2294 .usecase_id = LLCC_MODPE,
2295 .slice_id = 29,
2296 .max_cap = 64,
2297 .priority = 1,
2298 .fixed_size = true,
2299 .bonus_ways = 0xf00000,
2300 .cache_mode = 0,
2301 .alloc_oneway_en = true,
2302 .vict_prio = true,
2303 }, {
2304 .usecase_id = LLCC_WRCACHE,
2305 .slice_id = 31,
2306 .max_cap = 512,
2307 .priority = 1,
2308 .fixed_size = true,
2309 .bonus_ways = 0xffffff,
2310 .cache_mode = 0,
2311 .activate_on_init = true,
2312 }, {
2313 .usecase_id = LLCC_CAMEXP0,
2314 .slice_id = 4,
2315 .max_cap = 256,
2316 .priority = 4,
2317 .fixed_size = true,
2318 .bonus_ways = 0xf,
2319 .cache_mode = 0,
2320 }, {
2321 .usecase_id = LLCC_CPUHWT,
2322 .slice_id = 5,
2323 .max_cap = 512,
2324 .priority = 1,
2325 .fixed_size = true,
2326 .bonus_ways = 0xffffff,
2327 .cache_mode = 0,
2328 .activate_on_init = true,
2329 }, {
2330 .usecase_id = LLCC_CAMEXP1,
2331 .slice_id = 7,
2332 .max_cap = 3200,
2333 .priority = 3,
2334 .fixed_size = true,
2335 .bonus_ways = 0xfffff0,
2336 .cache_mode = 2,
2337 }, {
2338 .usecase_id = LLCC_CMPTHCP,
2339 .slice_id = 17,
2340 .max_cap = 256,
2341 .priority = 4,
2342 .fixed_size = true,
2343 .bonus_ways = 0xffffff,
2344 .cache_mode = 0,
2345 }, {
2346 .usecase_id = LLCC_LCPDARE,
2347 .slice_id = 30,
2348 .max_cap = 128,
2349 .priority = 4,
2350 .fixed_size = true,
2351 .bonus_ways = 0xffffff,
2352 .cache_mode = 0,
2353 .activate_on_init = true,
2354 .alloc_oneway_en = true,
2355 .vict_prio = true,
2356 }, {
2357 .usecase_id = LLCC_AENPU,
2358 .slice_id = 3,
2359 .max_cap = 3072,
2360 .priority = 1,
2361 .fixed_size = true,
2362 .bonus_ways = 0xfe01ff,
2363 .cache_mode = 2,
2364 }, {
2365 .usecase_id = LLCC_ISLAND1,
2366 .slice_id = 12,
2367 .max_cap = 1792,
2368 .priority = 7,
2369 .fixed_size = true,
2370 .bonus_ways = 0xfe00,
2371 .cache_mode = 0,
2372 }, {
2373 .usecase_id = LLCC_ISLAND4,
2374 .slice_id = 15,
2375 .max_cap = 256,
2376 .priority = 7,
2377 .fixed_size = true,
2378 .bonus_ways = 0x10000,
2379 .cache_mode = 0,
2380 }, {
2381 .usecase_id = LLCC_CAMEXP2,
2382 .slice_id = 19,
2383 .max_cap = 3200,
2384 .priority = 3,
2385 .fixed_size = true,
2386 .bonus_ways = 0xfffff0,
2387 .cache_mode = 2,
2388 }, {
2389 .usecase_id = LLCC_CAMEXP3,
2390 .slice_id = 20,
2391 .max_cap = 3200,
2392 .priority = 2,
2393 .fixed_size = true,
2394 .bonus_ways = 0xfffff0,
2395 .cache_mode = 2,
2396 }, {
2397 .usecase_id = LLCC_CAMEXP4,
2398 .slice_id = 21,
2399 .max_cap = 3200,
2400 .priority = 2,
2401 .fixed_size = true,
2402 .bonus_ways = 0xfffff0,
2403 .cache_mode = 2,
2404 }, {
2405 .usecase_id = LLCC_DISP_WB,
2406 .slice_id = 23,
2407 .max_cap = 1024,
2408 .priority = 4,
2409 .fixed_size = true,
2410 .bonus_ways = 0xffffff,
2411 .cache_mode = 0,
2412 }, {
2413 .usecase_id = LLCC_DISP_1,
2414 .slice_id = 24,
2415 .max_cap = 6144,
2416 .priority = 1,
2417 .fixed_size = true,
2418 .bonus_ways = 0xffffff,
2419 .cache_mode = 2,
2420 }, {
2421 .usecase_id = LLCC_VIDVSP,
2422 .slice_id = 28,
2423 .max_cap = 256,
2424 .priority = 4,
2425 .fixed_size = true,
2426 .bonus_ways = 0xffffff,
2427 .cache_mode = 0,
2428 },
2429 };
2430
2431 static const struct llcc_slice_config sm8650_data[] = {
2432 {
2433 .usecase_id = LLCC_CPUSS,
2434 .slice_id = 1,
2435 .max_cap = 5120,
2436 .priority = 1,
2437 .bonus_ways = 0xffffff,
2438 .cache_mode = 0,
2439 .activate_on_init = true,
2440 .stale_en = true,
2441 }, {
2442 .usecase_id = LLCC_VIDSC0,
2443 .slice_id = 2,
2444 .max_cap = 512,
2445 .priority = 3,
2446 .fixed_size = true,
2447 .bonus_ways = 0xffffff,
2448 .cache_mode = 0,
2449 }, {
2450 .usecase_id = LLCC_AUDIO,
2451 .slice_id = 6,
2452 .max_cap = 512,
2453 .priority = 1,
2454 .fixed_size = true,
2455 .bonus_ways = 0xffffff,
2456 .cache_mode = 0,
2457 }, {
2458 .usecase_id = LLCC_MDMHPGRW,
2459 .slice_id = 25,
2460 .max_cap = 1024,
2461 .priority = 3,
2462 .bonus_ways = 0xffffff,
2463 .cache_mode = 0,
2464 }, {
2465 .usecase_id = LLCC_MODHW,
2466 .slice_id = 26,
2467 .max_cap = 1024,
2468 .priority = 1,
2469 .fixed_size = true,
2470 .bonus_ways = 0xffffff,
2471 .cache_mode = 0,
2472 }, {
2473 .usecase_id = LLCC_CMPT,
2474 .slice_id = 10,
2475 .max_cap = 4096,
2476 .priority = 1,
2477 .fixed_size = true,
2478 .bonus_ways = 0xffffff,
2479 .cache_mode = 0,
2480 }, {
2481 .usecase_id = LLCC_GPUHTW,
2482 .slice_id = 11,
2483 .max_cap = 512,
2484 .priority = 1,
2485 .fixed_size = true,
2486 .bonus_ways = 0xffffff,
2487 .cache_mode = 0,
2488 }, {
2489 .usecase_id = LLCC_GPU,
2490 .slice_id = 9,
2491 .max_cap = 3096,
2492 .priority = 1,
2493 .bonus_ways = 0xffffff,
2494 .cache_mode = 0,
2495 .write_scid_en = true,
2496 .write_scid_cacheable_en = true,
2497 }, {
2498 .usecase_id = LLCC_MMUHWT,
2499 .slice_id = 18,
2500 .max_cap = 768,
2501 .priority = 1,
2502 .fixed_size = true,
2503 .bonus_ways = 0xffffff,
2504 .cache_mode = 0,
2505 .activate_on_init = true,
2506 }, {
2507 .usecase_id = LLCC_DISP,
2508 .slice_id = 16,
2509 .max_cap = 6144,
2510 .priority = 1,
2511 .fixed_size = true,
2512 .bonus_ways = 0xffffff,
2513 .cache_mode = 2,
2514 }, {
2515 .usecase_id = LLCC_MDMHPFX,
2516 .slice_id = 24,
2517 .max_cap = 1024,
2518 .priority = 3,
2519 .fixed_size = true,
2520 .bonus_ways = 0xffffff,
2521 .cache_mode = 0,
2522 }, {
2523 .usecase_id = LLCC_MDMPNG,
2524 .slice_id = 27,
2525 .max_cap = 1024,
2526 .priority = 0,
2527 .fixed_size = true,
2528 .cache_mode = 0,
2529 }, {
2530 .usecase_id = LLCC_AUDHW,
2531 .slice_id = 22,
2532 .max_cap = 1024,
2533 .priority = 1,
2534 .fixed_size = true,
2535 .bonus_ways = 0xffffff,
2536 .cache_mode = 0,
2537 }, {
2538 .usecase_id = LLCC_CVP,
2539 .slice_id = 8,
2540 .max_cap = 256,
2541 .priority = 3,
2542 .fixed_size = true,
2543 .bonus_ways = 0xffffff,
2544 .cache_mode = 0,
2545 }, {
2546 .usecase_id = LLCC_MODPE,
2547 .slice_id = 29,
2548 .max_cap = 128,
2549 .priority = 1,
2550 .fixed_size = true,
2551 .bonus_ways = 0xf00000,
2552 .cache_mode = 0,
2553 .alloc_oneway_en = true,
2554 }, {
2555 .usecase_id = LLCC_WRCACHE,
2556 .slice_id = 31,
2557 .max_cap = 512,
2558 .priority = 1,
2559 .fixed_size = true,
2560 .bonus_ways = 0xffffff,
2561 .cache_mode = 0,
2562 .activate_on_init = true,
2563 }, {
2564 .usecase_id = LLCC_CAMEXP0,
2565 .slice_id = 4,
2566 .max_cap = 256,
2567 .priority = 3,
2568 .fixed_size = true,
2569 .bonus_ways = 0xf,
2570 .cache_mode = 0,
2571 }, {
2572 .usecase_id = LLCC_CAMEXP1,
2573 .slice_id = 7,
2574 .max_cap = 3200,
2575 .priority = 3,
2576 .fixed_size = true,
2577 .bonus_ways = 0xfffff0,
2578 .cache_mode = 2,
2579 }, {
2580 .usecase_id = LLCC_CMPTHCP,
2581 .slice_id = 17,
2582 .max_cap = 256,
2583 .priority = 3,
2584 .fixed_size = true,
2585 .bonus_ways = 0xffffff,
2586 .cache_mode = 0,
2587 }, {
2588 .usecase_id = LLCC_LCPDARE,
2589 .slice_id = 30,
2590 .max_cap = 128,
2591 .priority = 3,
2592 .fixed_size = true,
2593 .bonus_ways = 0xffffff,
2594 .cache_mode = 0,
2595 .activate_on_init = true,
2596 .alloc_oneway_en = true,
2597 }, {
2598 .usecase_id = LLCC_AENPU,
2599 .slice_id = 3,
2600 .max_cap = 3072,
2601 .priority = 1,
2602 .fixed_size = true,
2603 .bonus_ways = 0xffffff,
2604 .cache_mode = 2,
2605 }, {
2606 .usecase_id = LLCC_ISLAND1,
2607 .slice_id = 12,
2608 .max_cap = 5888,
2609 .priority = 7,
2610 .fixed_size = true,
2611 .res_ways = 0x7fffff,
2612 .cache_mode = 0,
2613 }, {
2614 .usecase_id = LLCC_DISP_WB,
2615 .slice_id = 23,
2616 .max_cap = 1024,
2617 .priority = 3,
2618 .fixed_size = true,
2619 .bonus_ways = 0xffffff,
2620 .cache_mode = 0,
2621 }, {
2622 .usecase_id = LLCC_VIDVSP,
2623 .slice_id = 28,
2624 .max_cap = 256,
2625 .priority = 3,
2626 .fixed_size = true,
2627 .bonus_ways = 0xffffff,
2628 .cache_mode = 0,
2629 },
2630 };
2631
2632 static const struct llcc_slice_config qcs615_data[] = {
2633 {
2634 .usecase_id = LLCC_CPUSS,
2635 .slice_id = 1,
2636 .max_cap = 128,
2637 .priority = 1,
2638 .bonus_ways = 0xf,
2639 .cache_mode = 0,
2640 .activate_on_init = true,
2641 .write_scid_en = true,
2642 }, {
2643 .usecase_id = LLCC_MDM,
2644 .slice_id = 8,
2645 .max_cap = 256,
2646 .priority = 0,
2647 .fixed_size = true,
2648 .bonus_ways = 0xf,
2649 .cache_mode = 0,
2650 .activate_on_init = true,
2651 }, {
2652 .usecase_id = LLCC_GPUHTW,
2653 .slice_id = 11,
2654 .max_cap = 128,
2655 .priority = 1,
2656 .fixed_size = true,
2657 .bonus_ways = 0xf,
2658 .cache_mode = 0,
2659 .activate_on_init = true,
2660 }, {
2661 .usecase_id = LLCC_GPU,
2662 .slice_id = 12,
2663 .max_cap = 128,
2664 .priority = 1,
2665 .bonus_ways = 0xf,
2666 .cache_mode = 0,
2667 .activate_on_init = true,
2668 },
2669 };
2670
2671 static const struct llcc_slice_config qcs8300_data[] = {
2672 {
2673 .usecase_id = LLCC_GPUHTW,
2674 .slice_id = 11,
2675 .max_cap = 128,
2676 .priority = 1,
2677 .fixed_size = true,
2678 .bonus_ways = 0xf,
2679 .cache_mode = 0,
2680 .retain_on_pc = true,
2681 }, {
2682 .usecase_id = LLCC_GPU,
2683 .slice_id = 12,
2684 .max_cap = 512,
2685 .priority = 1,
2686 .fixed_size = true,
2687 .bonus_ways = 0xf,
2688 .cache_mode = 0,
2689 .retain_on_pc = true,
2690 .write_scid_en = true,
2691 }, {
2692 .usecase_id = LLCC_MMUHWT,
2693 .slice_id = 13,
2694 .max_cap = 128,
2695 .priority = 1,
2696 .fixed_size = true,
2697 .bonus_ways = 0xf,
2698 .cache_mode = 0,
2699 .activate_on_init = true,
2700 }, {
2701 .usecase_id = LLCC_ECC,
2702 .slice_id = 26,
2703 .max_cap = 256,
2704 .priority = 3,
2705 .fixed_size = true,
2706 .bonus_ways = 0xf,
2707 .cache_mode = 0,
2708 .activate_on_init = true,
2709 }, {
2710 .usecase_id = LLCC_WRCACHE,
2711 .slice_id = 31,
2712 .max_cap = 128,
2713 .priority = 1,
2714 .fixed_size = true,
2715 .bonus_ways = 0xf,
2716 .cache_mode = 0,
2717 .activate_on_init = true,
2718 },
2719 };
2720
2721 static const struct llcc_slice_config qdu1000_data_2ch[] = {
2722 {
2723 .usecase_id = LLCC_MDMHPGRW,
2724 .slice_id = 7,
2725 .max_cap = 512,
2726 .priority = 1,
2727 .fixed_size = true,
2728 .bonus_ways = 0xfff,
2729 .cache_mode = 0,
2730 .retain_on_pc = true,
2731 }, {
2732 .usecase_id = LLCC_MODHW,
2733 .slice_id = 9,
2734 .max_cap = 256,
2735 .priority = 1,
2736 .fixed_size = true,
2737 .bonus_ways = 0xfff,
2738 .cache_mode = 0,
2739 .retain_on_pc = true,
2740 }, {
2741 .usecase_id = LLCC_MDMPNG,
2742 .slice_id = 21,
2743 .max_cap = 256,
2744 .priority = 0,
2745 .fixed_size = true,
2746 .bonus_ways = 0x3,
2747 .cache_mode = 0,
2748 .retain_on_pc = true,
2749 }, {
2750 .usecase_id = LLCC_ECC,
2751 .slice_id = 26,
2752 .max_cap = 512,
2753 .priority = 3,
2754 .fixed_size = true,
2755 .bonus_ways = 0xffc,
2756 .cache_mode = 0,
2757 .activate_on_init = true,
2758 }, {
2759 .usecase_id = LLCC_MODPE,
2760 .slice_id = 29,
2761 .max_cap = 256,
2762 .priority = 1,
2763 .fixed_size = true,
2764 .bonus_ways = 0xfff,
2765 .cache_mode = 0,
2766 .retain_on_pc = true,
2767 }, {
2768 .usecase_id = LLCC_APTCM,
2769 .slice_id = 30,
2770 .max_cap = 256,
2771 .priority = 3,
2772 .fixed_size = true,
2773 .res_ways = 0xc,
2774 .cache_mode = 1,
2775 .retain_on_pc = true,
2776 }, {
2777 .usecase_id = LLCC_WRCACHE,
2778 .slice_id = 31,
2779 .max_cap = 128,
2780 .priority = 1,
2781 .fixed_size = true,
2782 .bonus_ways = 0x3,
2783 .cache_mode = 0,
2784 .activate_on_init = true,
2785 },
2786 };
2787
2788 static const struct llcc_slice_config qdu1000_data_4ch[] = {
2789 {
2790 .usecase_id = LLCC_MDMHPGRW,
2791 .slice_id = 7,
2792 .max_cap = 1024,
2793 .priority = 1,
2794 .fixed_size = true,
2795 .bonus_ways = 0xfff,
2796 .cache_mode = 0,
2797 .retain_on_pc = true,
2798 }, {
2799 .usecase_id = LLCC_MODHW,
2800 .slice_id = 9,
2801 .max_cap = 512,
2802 .priority = 1,
2803 .fixed_size = true,
2804 .bonus_ways = 0xfff,
2805 .cache_mode = 0,
2806 .retain_on_pc = true,
2807 }, {
2808 .usecase_id = LLCC_MDMPNG,
2809 .slice_id = 21,
2810 .max_cap = 512,
2811 .priority = 0,
2812 .fixed_size = true,
2813 .bonus_ways = 0x3,
2814 .cache_mode = 0,
2815 .retain_on_pc = true,
2816 }, {
2817 .usecase_id = LLCC_ECC,
2818 .slice_id = 26,
2819 .max_cap = 1024,
2820 .priority = 3,
2821 .fixed_size = true,
2822 .bonus_ways = 0xffc,
2823 .cache_mode = 0,
2824 .activate_on_init = true,
2825 }, {
2826 .usecase_id = LLCC_MODPE,
2827 .slice_id = 29,
2828 .max_cap = 512,
2829 .priority = 1,
2830 .fixed_size = true,
2831 .bonus_ways = 0xfff,
2832 .cache_mode = 0,
2833 .retain_on_pc = true,
2834 }, {
2835 .usecase_id = LLCC_APTCM,
2836 .slice_id = 30,
2837 .max_cap = 512,
2838 .priority = 3,
2839 .fixed_size = true,
2840 .res_ways = 0xc,
2841 .cache_mode = 1,
2842 .retain_on_pc = true,
2843 }, {
2844 .usecase_id = LLCC_WRCACHE,
2845 .slice_id = 31,
2846 .max_cap = 256,
2847 .priority = 1,
2848 .fixed_size = true,
2849 .bonus_ways = 0x3,
2850 .cache_mode = 0,
2851 .activate_on_init = true,
2852 },
2853 };
2854
2855 static const struct llcc_slice_config qdu1000_data_8ch[] = {
2856 {
2857 .usecase_id = LLCC_MDMHPGRW,
2858 .slice_id = 7,
2859 .max_cap = 2048,
2860 .priority = 1,
2861 .fixed_size = true,
2862 .bonus_ways = 0xfff,
2863 .cache_mode = 0,
2864 .retain_on_pc = true,
2865 }, {
2866 .usecase_id = LLCC_MODHW,
2867 .slice_id = 9,
2868 .max_cap = 1024,
2869 .priority = 1,
2870 .fixed_size = true,
2871 .bonus_ways = 0xfff,
2872 .cache_mode = 0,
2873 .retain_on_pc = true,
2874 }, {
2875 .usecase_id = LLCC_MDMPNG,
2876 .slice_id = 21,
2877 .max_cap = 1024,
2878 .priority = 0,
2879 .fixed_size = true,
2880 .bonus_ways = 0x3,
2881 .cache_mode = 0,
2882 .retain_on_pc = true,
2883 }, {
2884 .usecase_id = LLCC_ECC,
2885 .slice_id = 26,
2886 .max_cap = 2048,
2887 .priority = 3,
2888 .fixed_size = true,
2889 .bonus_ways = 0xffc,
2890 .cache_mode = 0,
2891 .activate_on_init = true,
2892 }, {
2893 .usecase_id = LLCC_MODPE,
2894 .slice_id = 29,
2895 .max_cap = 1024,
2896 .priority = 1,
2897 .fixed_size = true,
2898 .bonus_ways = 0xfff,
2899 .cache_mode = 0,
2900 .retain_on_pc = true,
2901 }, {
2902 .usecase_id = LLCC_APTCM,
2903 .slice_id = 30,
2904 .max_cap = 1024,
2905 .priority = 3,
2906 .fixed_size = true,
2907 .res_ways = 0xc,
2908 .cache_mode = 1,
2909 .retain_on_pc = true,
2910 }, {
2911 .usecase_id = LLCC_WRCACHE,
2912 .slice_id = 31,
2913 .max_cap = 512,
2914 .priority = 1,
2915 .fixed_size = true,
2916 .bonus_ways = 0x3,
2917 .cache_mode = 0,
2918 .activate_on_init = true,
2919 },
2920 };
2921
2922 static const struct llcc_slice_config x1e80100_data[] = {
2923 {
2924 .usecase_id = LLCC_CPUSS,
2925 .slice_id = 1,
2926 .max_cap = 6144,
2927 .priority = 1,
2928 .fixed_size = true,
2929 .bonus_ways = 0xfff,
2930 .cache_mode = 0,
2931 .activate_on_init = true,
2932 }, {
2933 .usecase_id = LLCC_VIDSC0,
2934 .slice_id = 2,
2935 .max_cap = 512,
2936 .priority = 4,
2937 .fixed_size = true,
2938 .bonus_ways = 0xfff,
2939 .cache_mode = 0,
2940 }, {
2941 .usecase_id = LLCC_AUDIO,
2942 .slice_id = 6,
2943 .max_cap = 1024,
2944 .priority = 1,
2945 .fixed_size = true,
2946 .bonus_ways = 0xfff,
2947 .cache_mode = 0,
2948 }, {
2949 .usecase_id = LLCC_CMPT,
2950 .slice_id = 10,
2951 .max_cap = 6144,
2952 .priority = 1,
2953 .fixed_size = true,
2954 .bonus_ways = 0xfff,
2955 .cache_mode = 0,
2956 }, {
2957 .usecase_id = LLCC_GPUHTW,
2958 .slice_id = 11,
2959 .max_cap = 512,
2960 .priority = 1,
2961 .fixed_size = true,
2962 .bonus_ways = 0xfff,
2963 .cache_mode = 0,
2964 }, {
2965 .usecase_id = LLCC_GPU,
2966 .slice_id = 9,
2967 .max_cap = 4608,
2968 .priority = 1,
2969 .bonus_ways = 0xfff,
2970 .cache_mode = 0,
2971 .write_scid_en = true,
2972 .write_scid_cacheable_en = true,
2973 .stale_en = true,
2974 }, {
2975 .usecase_id = LLCC_MMUHWT,
2976 .slice_id = 18,
2977 .max_cap = 512,
2978 .priority = 1,
2979 .fixed_size = true,
2980 .bonus_ways = 0xfff,
2981 .cache_mode = 0,
2982 .activate_on_init = true,
2983 }, {
2984 .usecase_id = LLCC_AUDHW,
2985 .slice_id = 22,
2986 .max_cap = 1024,
2987 .priority = 1,
2988 .fixed_size = true,
2989 .bonus_ways = 0xfff,
2990 .cache_mode = 0,
2991 }, {
2992 .usecase_id = LLCC_CVP,
2993 .slice_id = 8,
2994 .max_cap = 512,
2995 .priority = 4,
2996 .fixed_size = true,
2997 .bonus_ways = 0xfff,
2998 .cache_mode = 0,
2999 }, {
3000 .usecase_id = LLCC_WRCACHE,
3001 .slice_id = 31,
3002 .max_cap = 1024,
3003 .priority = 1,
3004 .fixed_size = true,
3005 .bonus_ways = 0xfff,
3006 .cache_mode = 0,
3007 }, {
3008 .usecase_id = LLCC_CAMEXP0,
3009 .slice_id = 4,
3010 .max_cap = 256,
3011 .priority = 4,
3012 .fixed_size = true,
3013 .bonus_ways = 0x3,
3014 .cache_mode = 0,
3015 }, {
3016 .usecase_id = LLCC_CAMEXP1,
3017 .slice_id = 7,
3018 .max_cap = 3072,
3019 .priority = 3,
3020 .fixed_size = true,
3021 .bonus_ways = 0xffc,
3022 .cache_mode = 2,
3023 }, {
3024 .usecase_id = LLCC_LCPDARE,
3025 .slice_id = 30,
3026 .max_cap = 512,
3027 .priority = 3,
3028 .fixed_size = true,
3029 .bonus_ways = 0xfff,
3030 .cache_mode = 0,
3031 .activate_on_init = true,
3032 .alloc_oneway_en = true,
3033 }, {
3034 .usecase_id = LLCC_AENPU,
3035 .slice_id = 3,
3036 .max_cap = 3072,
3037 .priority = 1,
3038 .fixed_size = true,
3039 .bonus_ways = 0xfff,
3040 .cache_mode = 2,
3041 }, {
3042 .usecase_id = LLCC_ISLAND1,
3043 .slice_id = 12,
3044 .max_cap = 2048,
3045 .priority = 7,
3046 .fixed_size = true,
3047 .res_ways = 0xf,
3048 .cache_mode = 0,
3049 }, {
3050 .usecase_id = LLCC_CAMEXP2,
3051 .slice_id = 19,
3052 .max_cap = 3072,
3053 .priority = 3,
3054 .fixed_size = true,
3055 .bonus_ways = 0xffc,
3056 .cache_mode = 2,
3057 }, {
3058 .usecase_id = LLCC_CAMEXP3,
3059 .slice_id = 20,
3060 .max_cap = 3072,
3061 .priority = 2,
3062 .fixed_size = true,
3063 .bonus_ways = 0xffc,
3064 .cache_mode = 2,
3065 }, {
3066 .usecase_id = LLCC_CAMEXP4,
3067 .slice_id = 21,
3068 .max_cap = 3072,
3069 .priority = 2,
3070 .fixed_size = true,
3071 .bonus_ways = 0xffc,
3072 .cache_mode = 2,
3073 },
3074 };
3075
3076 static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = {
3077 .trp_ecc_error_status0 = 0x20344,
3078 .trp_ecc_error_status1 = 0x20348,
3079 .trp_ecc_sb_err_syn0 = 0x2304c,
3080 .trp_ecc_db_err_syn0 = 0x20370,
3081 .trp_ecc_error_cntr_clear = 0x20440,
3082 .trp_interrupt_0_status = 0x20480,
3083 .trp_interrupt_0_clear = 0x20484,
3084 .trp_interrupt_0_enable = 0x20488,
3085
3086 /* LLCC Common registers */
3087 .cmn_status0 = 0x3000c,
3088 .cmn_interrupt_0_enable = 0x3001c,
3089 .cmn_interrupt_2_enable = 0x3003c,
3090
3091 /* LLCC DRP registers */
3092 .drp_ecc_error_cfg = 0x40000,
3093 .drp_ecc_error_cntr_clear = 0x40004,
3094 .drp_interrupt_status = 0x41000,
3095 .drp_interrupt_clear = 0x41008,
3096 .drp_interrupt_enable = 0x4100c,
3097 .drp_ecc_error_status0 = 0x42044,
3098 .drp_ecc_error_status1 = 0x42048,
3099 .drp_ecc_sb_err_syn0 = 0x4204c,
3100 .drp_ecc_db_err_syn0 = 0x42070,
3101 };
3102
3103 static const struct llcc_edac_reg_offset llcc_v2_1_edac_reg_offset = {
3104 .trp_ecc_error_status0 = 0x20344,
3105 .trp_ecc_error_status1 = 0x20348,
3106 .trp_ecc_sb_err_syn0 = 0x2034c,
3107 .trp_ecc_db_err_syn0 = 0x20370,
3108 .trp_ecc_error_cntr_clear = 0x20440,
3109 .trp_interrupt_0_status = 0x20480,
3110 .trp_interrupt_0_clear = 0x20484,
3111 .trp_interrupt_0_enable = 0x20488,
3112
3113 /* LLCC Common registers */
3114 .cmn_status0 = 0x3400c,
3115 .cmn_interrupt_0_enable = 0x3401c,
3116 .cmn_interrupt_2_enable = 0x3403c,
3117
3118 /* LLCC DRP registers */
3119 .drp_ecc_error_cfg = 0x50000,
3120 .drp_ecc_error_cntr_clear = 0x50004,
3121 .drp_interrupt_status = 0x50020,
3122 .drp_interrupt_clear = 0x50028,
3123 .drp_interrupt_enable = 0x5002c,
3124 .drp_ecc_error_status0 = 0x520f4,
3125 .drp_ecc_error_status1 = 0x520f8,
3126 .drp_ecc_sb_err_syn0 = 0x520fc,
3127 .drp_ecc_db_err_syn0 = 0x52120,
3128 };
3129
3130 /* LLCC register offset starting from v1.0.0 */
3131 static const u32 llcc_v1_reg_offset[] = {
3132 [LLCC_COMMON_HW_INFO] = 0x00030000,
3133 [LLCC_COMMON_STATUS0] = 0x0003000c,
3134 };
3135
3136 /* LLCC register offset starting from v2.0.1 */
3137 static const u32 llcc_v2_1_reg_offset[] = {
3138 [LLCC_COMMON_HW_INFO] = 0x00034000,
3139 [LLCC_COMMON_STATUS0] = 0x0003400c,
3140 };
3141
3142 static const struct qcom_llcc_config qcs615_cfg[] = {
3143 {
3144 .sct_data = qcs615_data,
3145 .size = ARRAY_SIZE(qcs615_data),
3146 .reg_offset = llcc_v1_reg_offset,
3147 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3148 },
3149 };
3150
3151 static const struct qcom_llcc_config qcs8300_cfg[] = {
3152 {
3153 .sct_data = qcs8300_data,
3154 .size = ARRAY_SIZE(qcs8300_data),
3155 .reg_offset = llcc_v2_1_reg_offset,
3156 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3157 .num_banks = 4,
3158 },
3159 };
3160
3161 static const struct qcom_llcc_config qdu1000_cfg[] = {
3162 {
3163 .sct_data = qdu1000_data_8ch,
3164 .size = ARRAY_SIZE(qdu1000_data_8ch),
3165 .reg_offset = llcc_v2_1_reg_offset,
3166 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3167 },
3168 {
3169 .sct_data = qdu1000_data_4ch,
3170 .size = ARRAY_SIZE(qdu1000_data_4ch),
3171 .reg_offset = llcc_v2_1_reg_offset,
3172 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3173 },
3174 {
3175 .sct_data = qdu1000_data_4ch,
3176 .size = ARRAY_SIZE(qdu1000_data_4ch),
3177 .reg_offset = llcc_v2_1_reg_offset,
3178 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3179 },
3180 {
3181 .sct_data = qdu1000_data_2ch,
3182 .size = ARRAY_SIZE(qdu1000_data_2ch),
3183 .reg_offset = llcc_v2_1_reg_offset,
3184 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3185 },
3186 };
3187
3188 static const struct qcom_llcc_config sa8775p_cfg[] = {
3189 {
3190 .sct_data = sa8775p_data,
3191 .size = ARRAY_SIZE(sa8775p_data),
3192 .reg_offset = llcc_v2_1_reg_offset,
3193 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3194 },
3195 };
3196
3197 static const struct qcom_llcc_config sar1130p_cfg[] = {
3198 {
3199 .sct_data = sar1130p_data,
3200 .size = ARRAY_SIZE(sar1130p_data),
3201 .reg_offset = llcc_v2_1_reg_offset,
3202 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3203 .max_cap_shift = 14,
3204 .num_banks = 2,
3205 },
3206 };
3207
3208 static const struct qcom_llcc_config sar2130p_cfg[] = {
3209 {
3210 .sct_data = sar2130p_data,
3211 .size = ARRAY_SIZE(sar2130p_data),
3212 .reg_offset = llcc_v2_1_reg_offset,
3213 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3214 .max_cap_shift = 14,
3215 .num_banks = 2,
3216 },
3217 };
3218
3219 static const struct qcom_llcc_config sc7180_cfg[] = {
3220 {
3221 .sct_data = sc7180_data,
3222 .size = ARRAY_SIZE(sc7180_data),
3223 .reg_offset = llcc_v1_reg_offset,
3224 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3225 },
3226 };
3227
3228 static const struct qcom_llcc_config sc7280_cfg[] = {
3229 {
3230 .sct_data = sc7280_data,
3231 .size = ARRAY_SIZE(sc7280_data),
3232 .reg_offset = llcc_v1_reg_offset,
3233 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3234 },
3235 };
3236
3237 static const struct qcom_llcc_config sc8180x_cfg[] = {
3238 {
3239 .sct_data = sc8180x_data,
3240 .size = ARRAY_SIZE(sc8180x_data),
3241 .reg_offset = llcc_v1_reg_offset,
3242 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3243 },
3244 };
3245
3246 static const struct qcom_llcc_config sc8280xp_cfg[] = {
3247 {
3248 .sct_data = sc8280xp_data,
3249 .size = ARRAY_SIZE(sc8280xp_data),
3250 .reg_offset = llcc_v1_reg_offset,
3251 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3252 },
3253 };
3254
3255 static const struct qcom_llcc_config sdm845_cfg[] = {
3256 {
3257 .sct_data = sdm845_data,
3258 .size = ARRAY_SIZE(sdm845_data),
3259 .skip_llcc_cfg = true,
3260 .reg_offset = llcc_v1_reg_offset,
3261 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3262 .no_edac = true,
3263 },
3264 };
3265
3266 static const struct qcom_llcc_config sm6350_cfg[] = {
3267 {
3268 .sct_data = sm6350_data,
3269 .size = ARRAY_SIZE(sm6350_data),
3270 .reg_offset = llcc_v1_reg_offset,
3271 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3272 },
3273 };
3274
3275 static const struct qcom_llcc_config sm7150_cfg[] = {
3276 {
3277 .sct_data = sm7150_data,
3278 .size = ARRAY_SIZE(sm7150_data),
3279 .reg_offset = llcc_v1_reg_offset,
3280 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3281 },
3282 };
3283
3284 static const struct qcom_llcc_config sm8150_cfg[] = {
3285 {
3286 .sct_data = sm8150_data,
3287 .size = ARRAY_SIZE(sm8150_data),
3288 .reg_offset = llcc_v1_reg_offset,
3289 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3290 },
3291 };
3292
3293 static const struct qcom_llcc_config sm8250_cfg[] = {
3294 {
3295 .sct_data = sm8250_data,
3296 .size = ARRAY_SIZE(sm8250_data),
3297 .reg_offset = llcc_v1_reg_offset,
3298 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3299 },
3300 };
3301
3302 static const struct qcom_llcc_config sm8350_cfg[] = {
3303 {
3304 .sct_data = sm8350_data,
3305 .size = ARRAY_SIZE(sm8350_data),
3306 .reg_offset = llcc_v1_reg_offset,
3307 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3308 },
3309 };
3310
3311 static const struct qcom_llcc_config sm8450_cfg[] = {
3312 {
3313 .sct_data = sm8450_data,
3314 .size = ARRAY_SIZE(sm8450_data),
3315 .reg_offset = llcc_v2_1_reg_offset,
3316 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3317 },
3318 };
3319
3320 static const struct qcom_llcc_config sm8550_cfg[] = {
3321 {
3322 .sct_data = sm8550_data,
3323 .size = ARRAY_SIZE(sm8550_data),
3324 .reg_offset = llcc_v2_1_reg_offset,
3325 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3326 },
3327 };
3328
3329 static const struct qcom_llcc_config sm8650_cfg[] = {
3330 {
3331 .sct_data = sm8650_data,
3332 .size = ARRAY_SIZE(sm8650_data),
3333 .reg_offset = llcc_v2_1_reg_offset,
3334 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3335 },
3336 };
3337
3338 static const struct qcom_llcc_config x1e80100_cfg[] = {
3339 {
3340 .sct_data = x1e80100_data,
3341 .size = ARRAY_SIZE(x1e80100_data),
3342 .reg_offset = llcc_v2_1_reg_offset,
3343 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3344 .irq_configured = true,
3345 },
3346 };
3347
3348 static const struct qcom_sct_config qcs615_cfgs = {
3349 .llcc_config = qcs615_cfg,
3350 .num_config = ARRAY_SIZE(qcs615_cfg),
3351 };
3352
3353 static const struct qcom_sct_config qcs8300_cfgs = {
3354 .llcc_config = qcs8300_cfg,
3355 .num_config = ARRAY_SIZE(qcs8300_cfg),
3356 };
3357
3358 static const struct qcom_sct_config qdu1000_cfgs = {
3359 .llcc_config = qdu1000_cfg,
3360 .num_config = ARRAY_SIZE(qdu1000_cfg),
3361 };
3362
3363 static const struct qcom_sct_config sa8775p_cfgs = {
3364 .llcc_config = sa8775p_cfg,
3365 .num_config = ARRAY_SIZE(sa8775p_cfg),
3366 };
3367
3368 static const struct qcom_sct_config sar1130p_cfgs = {
3369 .llcc_config = sar1130p_cfg,
3370 .num_config = ARRAY_SIZE(sar1130p_cfg),
3371 };
3372
3373 static const struct qcom_sct_config sar2130p_cfgs = {
3374 .llcc_config = sar2130p_cfg,
3375 .num_config = ARRAY_SIZE(sar2130p_cfg),
3376 };
3377
3378 static const struct qcom_sct_config sc7180_cfgs = {
3379 .llcc_config = sc7180_cfg,
3380 .num_config = ARRAY_SIZE(sc7180_cfg),
3381 };
3382
3383 static const struct qcom_sct_config sc7280_cfgs = {
3384 .llcc_config = sc7280_cfg,
3385 .num_config = ARRAY_SIZE(sc7280_cfg),
3386 };
3387
3388 static const struct qcom_sct_config sc8180x_cfgs = {
3389 .llcc_config = sc8180x_cfg,
3390 .num_config = ARRAY_SIZE(sc8180x_cfg),
3391 };
3392
3393 static const struct qcom_sct_config sc8280xp_cfgs = {
3394 .llcc_config = sc8280xp_cfg,
3395 .num_config = ARRAY_SIZE(sc8280xp_cfg),
3396 };
3397
3398 static const struct qcom_sct_config sdm845_cfgs = {
3399 .llcc_config = sdm845_cfg,
3400 .num_config = ARRAY_SIZE(sdm845_cfg),
3401 };
3402
3403 static const struct qcom_sct_config sm6350_cfgs = {
3404 .llcc_config = sm6350_cfg,
3405 .num_config = ARRAY_SIZE(sm6350_cfg),
3406 };
3407
3408 static const struct qcom_sct_config sm7150_cfgs = {
3409 .llcc_config = sm7150_cfg,
3410 .num_config = ARRAY_SIZE(sm7150_cfg),
3411 };
3412
3413 static const struct qcom_sct_config sm8150_cfgs = {
3414 .llcc_config = sm8150_cfg,
3415 .num_config = ARRAY_SIZE(sm8150_cfg),
3416 };
3417
3418 static const struct qcom_sct_config sm8250_cfgs = {
3419 .llcc_config = sm8250_cfg,
3420 .num_config = ARRAY_SIZE(sm8250_cfg),
3421 };
3422
3423 static const struct qcom_sct_config sm8350_cfgs = {
3424 .llcc_config = sm8350_cfg,
3425 .num_config = ARRAY_SIZE(sm8350_cfg),
3426 };
3427
3428 static const struct qcom_sct_config sm8450_cfgs = {
3429 .llcc_config = sm8450_cfg,
3430 .num_config = ARRAY_SIZE(sm8450_cfg),
3431 };
3432
3433 static const struct qcom_sct_config sm8550_cfgs = {
3434 .llcc_config = sm8550_cfg,
3435 .num_config = ARRAY_SIZE(sm8550_cfg),
3436 };
3437
3438 static const struct qcom_sct_config sm8650_cfgs = {
3439 .llcc_config = sm8650_cfg,
3440 .num_config = ARRAY_SIZE(sm8650_cfg),
3441 };
3442
3443 static const struct qcom_sct_config x1e80100_cfgs = {
3444 .llcc_config = x1e80100_cfg,
3445 .num_config = ARRAY_SIZE(x1e80100_cfg),
3446 };
3447
3448 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
3449
3450 /**
3451 * llcc_slice_getd - get llcc slice descriptor
3452 * @uid: usecase_id for the client
3453 *
3454 * A pointer to llcc slice descriptor will be returned on success
3455 * and error pointer is returned on failure
3456 */
llcc_slice_getd(u32 uid)3457 struct llcc_slice_desc *llcc_slice_getd(u32 uid)
3458 {
3459 const struct llcc_slice_config *cfg;
3460 struct llcc_slice_desc *desc;
3461 u32 sz, count;
3462
3463 if (IS_ERR(drv_data))
3464 return ERR_CAST(drv_data);
3465
3466 cfg = drv_data->cfg;
3467 sz = drv_data->cfg_size;
3468
3469 for (count = 0; cfg && count < sz; count++, cfg++)
3470 if (cfg->usecase_id == uid)
3471 break;
3472
3473 if (count == sz || !cfg)
3474 return ERR_PTR(-ENODEV);
3475
3476 desc = kzalloc(sizeof(*desc), GFP_KERNEL);
3477 if (!desc)
3478 return ERR_PTR(-ENOMEM);
3479
3480 desc->slice_id = cfg->slice_id;
3481 desc->slice_size = cfg->max_cap;
3482
3483 return desc;
3484 }
3485 EXPORT_SYMBOL_GPL(llcc_slice_getd);
3486
3487 /**
3488 * llcc_slice_putd - llcc slice descriptor
3489 * @desc: Pointer to llcc slice descriptor
3490 */
llcc_slice_putd(struct llcc_slice_desc * desc)3491 void llcc_slice_putd(struct llcc_slice_desc *desc)
3492 {
3493 if (!IS_ERR_OR_NULL(desc))
3494 kfree(desc);
3495 }
3496 EXPORT_SYMBOL_GPL(llcc_slice_putd);
3497
llcc_update_act_ctrl(u32 sid,u32 act_ctrl_reg_val,u32 status)3498 static int llcc_update_act_ctrl(u32 sid,
3499 u32 act_ctrl_reg_val, u32 status)
3500 {
3501 struct regmap *regmap;
3502 u32 act_ctrl_reg;
3503 u32 act_clear_reg;
3504 u32 status_reg;
3505 u32 slice_status;
3506 int ret;
3507
3508 if (IS_ERR(drv_data))
3509 return PTR_ERR(drv_data);
3510
3511 act_ctrl_reg = LLCC_TRP_ACT_CTRLn(sid);
3512 act_clear_reg = LLCC_TRP_ACT_CLEARn(sid);
3513 status_reg = LLCC_TRP_STATUSn(sid);
3514
3515 /* Set the ACTIVE trigger */
3516 act_ctrl_reg_val |= ACT_CTRL_ACT_TRIG;
3517 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
3518 act_ctrl_reg_val);
3519 if (ret)
3520 return ret;
3521
3522 /* Clear the ACTIVE trigger */
3523 act_ctrl_reg_val &= ~ACT_CTRL_ACT_TRIG;
3524 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
3525 act_ctrl_reg_val);
3526 if (ret)
3527 return ret;
3528
3529 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3530 regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
3531 ret = regmap_read_poll_timeout(regmap, status_reg,
3532 slice_status, (slice_status & ACT_COMPLETE),
3533 0, LLCC_STATUS_READ_DELAY);
3534 if (ret)
3535 return ret;
3536 }
3537
3538 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
3539 slice_status, !(slice_status & status),
3540 0, LLCC_STATUS_READ_DELAY);
3541 if (ret)
3542 return ret;
3543
3544 if (drv_data->version >= LLCC_VERSION_4_1_0_0)
3545 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg,
3546 ACT_CLEAR);
3547
3548 return ret;
3549 }
3550
3551 /**
3552 * llcc_slice_activate - Activate the llcc slice
3553 * @desc: Pointer to llcc slice descriptor
3554 *
3555 * A value of zero will be returned on success and a negative errno will
3556 * be returned in error cases
3557 */
llcc_slice_activate(struct llcc_slice_desc * desc)3558 int llcc_slice_activate(struct llcc_slice_desc *desc)
3559 {
3560 int ret;
3561 u32 act_ctrl_val;
3562
3563 if (IS_ERR(drv_data))
3564 return PTR_ERR(drv_data);
3565
3566 if (IS_ERR_OR_NULL(desc))
3567 return -EINVAL;
3568
3569 mutex_lock(&drv_data->lock);
3570 if (test_bit(desc->slice_id, drv_data->bitmap)) {
3571 mutex_unlock(&drv_data->lock);
3572 return 0;
3573 }
3574
3575 act_ctrl_val = ACT_CTRL_OPCODE_ACTIVATE << ACT_CTRL_OPCODE_SHIFT;
3576
3577 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
3578 DEACTIVATE);
3579 if (ret) {
3580 mutex_unlock(&drv_data->lock);
3581 return ret;
3582 }
3583
3584 __set_bit(desc->slice_id, drv_data->bitmap);
3585 mutex_unlock(&drv_data->lock);
3586
3587 return ret;
3588 }
3589 EXPORT_SYMBOL_GPL(llcc_slice_activate);
3590
3591 /**
3592 * llcc_slice_deactivate - Deactivate the llcc slice
3593 * @desc: Pointer to llcc slice descriptor
3594 *
3595 * A value of zero will be returned on success and a negative errno will
3596 * be returned in error cases
3597 */
llcc_slice_deactivate(struct llcc_slice_desc * desc)3598 int llcc_slice_deactivate(struct llcc_slice_desc *desc)
3599 {
3600 u32 act_ctrl_val;
3601 int ret;
3602
3603 if (IS_ERR(drv_data))
3604 return PTR_ERR(drv_data);
3605
3606 if (IS_ERR_OR_NULL(desc))
3607 return -EINVAL;
3608
3609 mutex_lock(&drv_data->lock);
3610 if (!test_bit(desc->slice_id, drv_data->bitmap)) {
3611 mutex_unlock(&drv_data->lock);
3612 return 0;
3613 }
3614 act_ctrl_val = ACT_CTRL_OPCODE_DEACTIVATE << ACT_CTRL_OPCODE_SHIFT;
3615
3616 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
3617 ACTIVATE);
3618 if (ret) {
3619 mutex_unlock(&drv_data->lock);
3620 return ret;
3621 }
3622
3623 __clear_bit(desc->slice_id, drv_data->bitmap);
3624 mutex_unlock(&drv_data->lock);
3625
3626 return ret;
3627 }
3628 EXPORT_SYMBOL_GPL(llcc_slice_deactivate);
3629
3630 /**
3631 * llcc_get_slice_id - return the slice id
3632 * @desc: Pointer to llcc slice descriptor
3633 */
llcc_get_slice_id(struct llcc_slice_desc * desc)3634 int llcc_get_slice_id(struct llcc_slice_desc *desc)
3635 {
3636 if (IS_ERR_OR_NULL(desc))
3637 return -EINVAL;
3638
3639 return desc->slice_id;
3640 }
3641 EXPORT_SYMBOL_GPL(llcc_get_slice_id);
3642
3643 /**
3644 * llcc_get_slice_size - return the slice id
3645 * @desc: Pointer to llcc slice descriptor
3646 */
llcc_get_slice_size(struct llcc_slice_desc * desc)3647 size_t llcc_get_slice_size(struct llcc_slice_desc *desc)
3648 {
3649 if (IS_ERR_OR_NULL(desc))
3650 return 0;
3651
3652 return desc->slice_size;
3653 }
3654 EXPORT_SYMBOL_GPL(llcc_get_slice_size);
3655
_qcom_llcc_cfg_program(const struct llcc_slice_config * config,const struct qcom_llcc_config * cfg)3656 static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config,
3657 const struct qcom_llcc_config *cfg)
3658 {
3659 int ret;
3660 u32 attr2_cfg;
3661 u32 attr1_cfg;
3662 u32 attr0_cfg;
3663 u32 attr2_val;
3664 u32 attr1_val;
3665 u32 attr0_val;
3666 u32 max_cap_cacheline;
3667 struct llcc_slice_desc desc;
3668
3669 attr1_val = config->cache_mode;
3670 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT;
3671 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT;
3672 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT;
3673
3674 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap);
3675
3676 /*
3677 * LLCC instances can vary for each target.
3678 * The SW writes to broadcast register which gets propagated
3679 * to each llcc instance (llcc0,.. llccN).
3680 * Since the size of the memory is divided equally amongst the
3681 * llcc instances, we need to configure the max cap accordingly.
3682 */
3683 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks;
3684 max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT;
3685 if (cfg->max_cap_shift)
3686 attr1_val |= max_cap_cacheline << cfg->max_cap_shift;
3687 else
3688 attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT;
3689
3690 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id);
3691
3692 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
3693 if (ret)
3694 return ret;
3695
3696 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3697 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id);
3698 attr0_val = config->res_ways;
3699 attr2_val = config->bonus_ways;
3700 } else {
3701 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK;
3702 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT;
3703 }
3704
3705 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id);
3706
3707 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
3708 if (ret)
3709 return ret;
3710
3711 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3712 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
3713 if (ret)
3714 return ret;
3715 }
3716
3717 /* At least SDM845 disallows non-secure writes to these registers */
3718 if (!cfg->skip_llcc_cfg) {
3719 u32 disable_cap_alloc, retain_pc;
3720
3721 disable_cap_alloc = config->dis_cap_alloc << config->slice_id;
3722 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC,
3723 BIT(config->slice_id), disable_cap_alloc);
3724 if (ret)
3725 return ret;
3726
3727 if (drv_data->version < LLCC_VERSION_4_1_0_0) {
3728 retain_pc = config->retain_on_pc << config->slice_id;
3729 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT,
3730 BIT(config->slice_id), retain_pc);
3731 if (ret)
3732 return ret;
3733 }
3734 }
3735
3736 if (drv_data->version >= LLCC_VERSION_2_0_0_0) {
3737 u32 wren;
3738
3739 wren = config->write_scid_en << config->slice_id;
3740 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN,
3741 BIT(config->slice_id), wren);
3742 if (ret)
3743 return ret;
3744 }
3745
3746 if (drv_data->version >= LLCC_VERSION_2_1_0_0) {
3747 u32 wr_cache_en;
3748
3749 wr_cache_en = config->write_scid_cacheable_en << config->slice_id;
3750 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN,
3751 BIT(config->slice_id), wr_cache_en);
3752 if (ret)
3753 return ret;
3754 }
3755
3756 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3757 u32 stale_en;
3758 u32 stale_cap_en;
3759 u32 mru_uncap_en;
3760 u32 mru_rollover;
3761 u32 alloc_oneway_en;
3762 u32 ovcap_en;
3763 u32 ovcap_prio;
3764 u32 vict_prio;
3765
3766 stale_en = config->stale_en << config->slice_id;
3767 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1,
3768 BIT(config->slice_id), stale_en);
3769 if (ret)
3770 return ret;
3771
3772 stale_cap_en = config->stale_cap_en << config->slice_id;
3773 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2,
3774 BIT(config->slice_id), stale_cap_en);
3775 if (ret)
3776 return ret;
3777
3778 mru_uncap_en = config->mru_uncap_en << config->slice_id;
3779 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3,
3780 BIT(config->slice_id), mru_uncap_en);
3781 if (ret)
3782 return ret;
3783
3784 mru_rollover = config->mru_rollover << config->slice_id;
3785 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4,
3786 BIT(config->slice_id), mru_rollover);
3787 if (ret)
3788 return ret;
3789
3790 alloc_oneway_en = config->alloc_oneway_en << config->slice_id;
3791 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5,
3792 BIT(config->slice_id), alloc_oneway_en);
3793 if (ret)
3794 return ret;
3795
3796 ovcap_en = config->ovcap_en << config->slice_id;
3797 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6,
3798 BIT(config->slice_id), ovcap_en);
3799 if (ret)
3800 return ret;
3801
3802 ovcap_prio = config->ovcap_prio << config->slice_id;
3803 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7,
3804 BIT(config->slice_id), ovcap_prio);
3805 if (ret)
3806 return ret;
3807
3808 vict_prio = config->vict_prio << config->slice_id;
3809 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8,
3810 BIT(config->slice_id), vict_prio);
3811 if (ret)
3812 return ret;
3813 }
3814
3815 if (config->activate_on_init) {
3816 desc.slice_id = config->slice_id;
3817 ret = llcc_slice_activate(&desc);
3818 }
3819
3820 return ret;
3821 }
3822
qcom_llcc_cfg_program(struct platform_device * pdev,const struct qcom_llcc_config * cfg)3823 static int qcom_llcc_cfg_program(struct platform_device *pdev,
3824 const struct qcom_llcc_config *cfg)
3825 {
3826 int i;
3827 u32 sz;
3828 int ret = 0;
3829 const struct llcc_slice_config *llcc_table;
3830
3831 sz = drv_data->cfg_size;
3832 llcc_table = drv_data->cfg;
3833
3834 for (i = 0; i < sz; i++) {
3835 ret = _qcom_llcc_cfg_program(&llcc_table[i], cfg);
3836 if (ret)
3837 return ret;
3838 }
3839
3840 return ret;
3841 }
3842
qcom_llcc_get_cfg_index(struct platform_device * pdev,u8 * cfg_index,int num_config)3843 static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
3844 {
3845 int ret;
3846
3847 ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
3848 if (ret == -ENOENT || ret == -EOPNOTSUPP) {
3849 if (num_config > 1)
3850 return -EINVAL;
3851 *cfg_index = 0;
3852 return 0;
3853 }
3854
3855 if (!ret && *cfg_index >= num_config)
3856 ret = -EINVAL;
3857
3858 return ret;
3859 }
3860
qcom_llcc_remove(struct platform_device * pdev)3861 static void qcom_llcc_remove(struct platform_device *pdev)
3862 {
3863 /* Set the global pointer to a error code to avoid referencing it */
3864 drv_data = ERR_PTR(-ENODEV);
3865 }
3866
qcom_llcc_init_mmio(struct platform_device * pdev,u8 index,const char * name)3867 static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index,
3868 const char *name)
3869 {
3870 void __iomem *base;
3871 struct regmap_config llcc_regmap_config = {
3872 .reg_bits = 32,
3873 .reg_stride = 4,
3874 .val_bits = 32,
3875 .fast_io = true,
3876 };
3877
3878 base = devm_platform_ioremap_resource(pdev, index);
3879 if (IS_ERR(base))
3880 return ERR_CAST(base);
3881
3882 llcc_regmap_config.name = name;
3883 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config);
3884 }
3885
qcom_llcc_probe(struct platform_device * pdev)3886 static int qcom_llcc_probe(struct platform_device *pdev)
3887 {
3888 u32 num_banks;
3889 struct device *dev = &pdev->dev;
3890 int ret, i;
3891 struct platform_device *llcc_edac;
3892 const struct qcom_sct_config *cfgs;
3893 const struct qcom_llcc_config *cfg;
3894 const struct llcc_slice_config *llcc_cfg;
3895 u32 sz;
3896 u8 cfg_index;
3897 u32 version;
3898 struct regmap *regmap;
3899
3900 if (!IS_ERR(drv_data))
3901 return -EBUSY;
3902
3903 drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL);
3904 if (!drv_data) {
3905 ret = -ENOMEM;
3906 goto err;
3907 }
3908
3909 /* Initialize the first LLCC bank regmap */
3910 regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base");
3911 if (IS_ERR(regmap)) {
3912 ret = PTR_ERR(regmap);
3913 goto err;
3914 }
3915
3916 cfgs = of_device_get_match_data(&pdev->dev);
3917 if (!cfgs) {
3918 ret = -EINVAL;
3919 goto err;
3920 }
3921 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
3922 if (ret)
3923 goto err;
3924 cfg = &cfgs->llcc_config[cfg_index];
3925
3926 if (cfg->num_banks) {
3927 num_banks = cfg->num_banks;
3928 } else {
3929 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
3930 if (ret)
3931 goto err;
3932
3933 num_banks &= LLCC_LB_CNT_MASK;
3934 num_banks >>= LLCC_LB_CNT_SHIFT;
3935 }
3936
3937 drv_data->num_banks = num_banks;
3938
3939 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL);
3940 if (!drv_data->regmaps) {
3941 ret = -ENOMEM;
3942 goto err;
3943 }
3944
3945 drv_data->regmaps[0] = regmap;
3946
3947 /* Initialize rest of LLCC bank regmaps */
3948 for (i = 1; i < num_banks; i++) {
3949 char *base __free(kfree) = kasprintf(GFP_KERNEL, "llcc%d_base", i);
3950
3951 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base);
3952 if (IS_ERR(drv_data->regmaps[i])) {
3953 ret = PTR_ERR(drv_data->regmaps[i]);
3954 goto err;
3955 }
3956 }
3957
3958 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
3959 if (IS_ERR(drv_data->bcast_regmap)) {
3960 ret = PTR_ERR(drv_data->bcast_regmap);
3961 goto err;
3962 }
3963
3964 /* Extract version of the IP */
3965 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO],
3966 &version);
3967 if (ret)
3968 goto err;
3969
3970 drv_data->version = version;
3971
3972 /* Applicable only when drv_data->version >= 4.1 */
3973 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3974 drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
3975 if (IS_ERR(drv_data->bcast_and_regmap)) {
3976 ret = PTR_ERR(drv_data->bcast_and_regmap);
3977 if (ret == -EINVAL)
3978 drv_data->bcast_and_regmap = NULL;
3979 else
3980 goto err;
3981 }
3982 }
3983
3984 llcc_cfg = cfg->sct_data;
3985 sz = cfg->size;
3986
3987 for (i = 0; i < sz; i++)
3988 if (llcc_cfg[i].slice_id > drv_data->max_slices)
3989 drv_data->max_slices = llcc_cfg[i].slice_id;
3990
3991 drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices,
3992 GFP_KERNEL);
3993 if (!drv_data->bitmap) {
3994 ret = -ENOMEM;
3995 goto err;
3996 }
3997
3998 drv_data->cfg = llcc_cfg;
3999 drv_data->cfg_size = sz;
4000 drv_data->edac_reg_offset = cfg->edac_reg_offset;
4001 drv_data->ecc_irq_configured = cfg->irq_configured;
4002 mutex_init(&drv_data->lock);
4003 platform_set_drvdata(pdev, drv_data);
4004
4005 ret = qcom_llcc_cfg_program(pdev, cfg);
4006 if (ret)
4007 goto err;
4008
4009 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0);
4010
4011 /*
4012 * On some platforms, the access to EDAC registers will be locked by
4013 * the bootloader. So probing the EDAC driver will result in a crash.
4014 * Hence, disable the creation of EDAC platform device for the
4015 * problematic platforms.
4016 */
4017 if (!cfg->no_edac) {
4018 llcc_edac = platform_device_register_data(&pdev->dev,
4019 "qcom_llcc_edac", -1, drv_data,
4020 sizeof(*drv_data));
4021 if (IS_ERR(llcc_edac))
4022 dev_err(dev, "Failed to register llcc edac driver\n");
4023 }
4024
4025 return 0;
4026 err:
4027 drv_data = ERR_PTR(-ENODEV);
4028 return ret;
4029 }
4030
4031 static const struct of_device_id qcom_llcc_of_match[] = {
4032 { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs},
4033 { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs},
4034 { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
4035 { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
4036 { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs },
4037 { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs },
4038 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
4039 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
4040 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
4041 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
4042 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
4043 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
4044 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
4045 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
4046 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs },
4047 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs },
4048 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
4049 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
4050 { .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs },
4051 { .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs },
4052 { }
4053 };
4054 MODULE_DEVICE_TABLE(of, qcom_llcc_of_match);
4055
4056 static struct platform_driver qcom_llcc_driver = {
4057 .driver = {
4058 .name = "qcom-llcc",
4059 .of_match_table = qcom_llcc_of_match,
4060 },
4061 .probe = qcom_llcc_probe,
4062 .remove = qcom_llcc_remove,
4063 };
4064 module_platform_driver(qcom_llcc_driver);
4065
4066 MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller");
4067 MODULE_LICENSE("GPL v2");
4068