xref: /freebsd/sys/dev/cxgbe/common/common.h (revision 4471ff11969ec6bd2e5d3c745fc5ba90fda596ed)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2011 Chelsio Communications, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  */
29 
30 #ifndef __CHELSIO_COMMON_H
31 #define __CHELSIO_COMMON_H
32 
33 #include "t4_hw.h"
34 
35 enum {
36 	MAX_NPORTS     = 4,     /* max # of ports */
37 	SERNUM_LEN     = 24,    /* Serial # length */
38 	EC_LEN         = 16,    /* E/C length */
39 	ID_LEN         = 16,    /* ID length */
40 	PN_LEN         = 16,    /* Part Number length */
41 	MD_LEN         = 16,    /* MFG diags version length */
42 	MACADDR_LEN    = 12,    /* MAC Address length */
43 };
44 
45 enum {
46 	T4_REGMAP_SIZE = (160 * 1024),
47 	T5_REGMAP_SIZE = (332 * 1024),
48 };
49 
50 enum { MEM_EDC0, MEM_EDC1, MEM_MC, MEM_MC0 = MEM_MC, MEM_MC1, MEM_HMA };
51 
52 enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST };
53 
54 enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR };
55 
56 enum {
57 	PAUSE_RX      = 1 << 0,
58 	PAUSE_TX      = 1 << 1,
59 	PAUSE_AUTONEG = 1 << 2
60 };
61 
62 enum {
63 	/*
64 	 * Real FECs.  In the same order as the FEC portion of caps32 so that
65 	 * the code can do (fec & M_FW_PORT_CAP32_FEC) to get all the real FECs.
66 	 */
67 	FEC_RS        = 1 << 0,	/* Reed-Solomon */
68 	FEC_BASER_RS  = 1 << 1,	/* BASE-R, aka Firecode */
69 	FEC_NONE      = 1 << 2,	/* no FEC */
70 
71 	/*
72 	 * Pseudo FECs that translate to real FECs.  The firmware knows nothing
73 	 * about these and they start at M_FW_PORT_CAP32_FEC + 1.  AUTO should
74 	 * be set all by itself.
75 	 */
76 	FEC_AUTO      = 1 << 5,
77 	FEC_MODULE    = 1 << 6,	/* FEC suggested by the cable/transceiver. */
78 };
79 
80 enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS };
81 
82 struct port_stats {
83 	u64 tx_octets;            /* total # of octets in good frames */
84 	u64 tx_frames;            /* all good frames */
85 	u64 tx_bcast_frames;      /* all broadcast frames */
86 	u64 tx_mcast_frames;      /* all multicast frames */
87 	u64 tx_ucast_frames;      /* all unicast frames */
88 	u64 tx_error_frames;      /* all error frames */
89 
90 	u64 tx_frames_64;         /* # of Tx frames in a particular range */
91 	u64 tx_frames_65_127;
92 	u64 tx_frames_128_255;
93 	u64 tx_frames_256_511;
94 	u64 tx_frames_512_1023;
95 	u64 tx_frames_1024_1518;
96 	u64 tx_frames_1519_max;
97 
98 	u64 tx_drop;              /* # of dropped Tx frames */
99 	u64 tx_pause;             /* # of transmitted pause frames */
100 	u64 tx_ppp0;              /* # of transmitted PPP prio 0 frames */
101 	u64 tx_ppp1;              /* # of transmitted PPP prio 1 frames */
102 	u64 tx_ppp2;              /* # of transmitted PPP prio 2 frames */
103 	u64 tx_ppp3;              /* # of transmitted PPP prio 3 frames */
104 	u64 tx_ppp4;              /* # of transmitted PPP prio 4 frames */
105 	u64 tx_ppp5;              /* # of transmitted PPP prio 5 frames */
106 	u64 tx_ppp6;              /* # of transmitted PPP prio 6 frames */
107 	u64 tx_ppp7;              /* # of transmitted PPP prio 7 frames */
108 
109 	u64 rx_octets;            /* total # of octets in good frames */
110 	u64 rx_frames;            /* all good frames */
111 	u64 rx_bcast_frames;      /* all broadcast frames */
112 	u64 rx_mcast_frames;      /* all multicast frames */
113 	u64 rx_ucast_frames;      /* all unicast frames */
114 	u64 rx_too_long;          /* # of frames exceeding MTU */
115 	u64 rx_jabber;            /* # of jabber frames */
116 	u64 rx_fcs_err;           /* # of received frames with bad FCS */
117 	u64 rx_len_err;           /* # of received frames with length error */
118 	u64 rx_symbol_err;        /* symbol errors */
119 	u64 rx_runt;              /* # of short frames */
120 
121 	u64 rx_frames_64;         /* # of Rx frames in a particular range */
122 	u64 rx_frames_65_127;
123 	u64 rx_frames_128_255;
124 	u64 rx_frames_256_511;
125 	u64 rx_frames_512_1023;
126 	u64 rx_frames_1024_1518;
127 	u64 rx_frames_1519_max;
128 
129 	u64 rx_pause;             /* # of received pause frames */
130 	u64 rx_ppp0;              /* # of received PPP prio 0 frames */
131 	u64 rx_ppp1;              /* # of received PPP prio 1 frames */
132 	u64 rx_ppp2;              /* # of received PPP prio 2 frames */
133 	u64 rx_ppp3;              /* # of received PPP prio 3 frames */
134 	u64 rx_ppp4;              /* # of received PPP prio 4 frames */
135 	u64 rx_ppp5;              /* # of received PPP prio 5 frames */
136 	u64 rx_ppp6;              /* # of received PPP prio 6 frames */
137 	u64 rx_ppp7;              /* # of received PPP prio 7 frames */
138 
139 	u64 rx_ovflow0;           /* drops due to buffer-group 0 overflows */
140 	u64 rx_ovflow1;           /* drops due to buffer-group 1 overflows */
141 	u64 rx_ovflow2;           /* drops due to buffer-group 2 overflows */
142 	u64 rx_ovflow3;           /* drops due to buffer-group 3 overflows */
143 	u64 rx_trunc0;            /* buffer-group 0 truncated packets */
144 	u64 rx_trunc1;            /* buffer-group 1 truncated packets */
145 	u64 rx_trunc2;            /* buffer-group 2 truncated packets */
146 	u64 rx_trunc3;            /* buffer-group 3 truncated packets */
147 };
148 
149 struct lb_port_stats {
150 	u64 octets;
151 	u64 frames;
152 	u64 bcast_frames;
153 	u64 mcast_frames;
154 	u64 ucast_frames;
155 	u64 error_frames;
156 
157 	u64 frames_64;
158 	u64 frames_65_127;
159 	u64 frames_128_255;
160 	u64 frames_256_511;
161 	u64 frames_512_1023;
162 	u64 frames_1024_1518;
163 	u64 frames_1519_max;
164 
165 	u64 drop;
166 
167 	u64 ovflow0;
168 	u64 ovflow1;
169 	u64 ovflow2;
170 	u64 ovflow3;
171 	u64 trunc0;
172 	u64 trunc1;
173 	u64 trunc2;
174 	u64 trunc3;
175 };
176 
177 struct tp_tcp_stats {
178 	u32 tcp_out_rsts;
179 	u64 tcp_in_segs;
180 	u64 tcp_out_segs;
181 	u64 tcp_retrans_segs;
182 };
183 
184 struct tp_usm_stats {
185 	u32 frames;
186 	u32 drops;
187 	u64 octets;
188 };
189 
190 struct tp_tid_stats {
191 	u32 del;
192 	u32 inv;
193 	u32 act;
194 	u32 pas;
195 };
196 
197 struct tp_fcoe_stats {
198 	u32 frames_ddp;
199 	u32 frames_drop;
200 	u64 octets_ddp;
201 };
202 
203 struct tp_err_stats {
204 	u32 mac_in_errs[MAX_NCHAN];
205 	u32 hdr_in_errs[MAX_NCHAN];
206 	u32 tcp_in_errs[MAX_NCHAN];
207 	u32 tnl_cong_drops[MAX_NCHAN];
208 	u32 ofld_chan_drops[MAX_NCHAN];
209 	u32 tnl_tx_drops[MAX_NCHAN];
210 	u32 ofld_vlan_drops[MAX_NCHAN];
211 	u32 tcp6_in_errs[MAX_NCHAN];
212 	u32 ofld_no_neigh;
213 	u32 ofld_cong_defer;
214 };
215 
216 struct tp_tnl_stats {
217 	u32 out_pkt[MAX_NCHAN];
218 	u32 in_pkt[MAX_NCHAN];
219 };
220 
221 struct tp_proxy_stats {
222 	u32 proxy[MAX_NCHAN];
223 };
224 
225 struct tp_cpl_stats {
226 	u32 req[MAX_NCHAN];
227 	u32 rsp[MAX_NCHAN];
228 };
229 
230 struct tp_rdma_stats {
231 	u32 rqe_dfr_pkt;
232 	u32 rqe_dfr_mod;
233 };
234 
235 struct sge_params {
236 	int timer_val[SGE_NTIMERS];	/* final, scaled values */
237 	int counter_val[SGE_NCOUNTERS];
238 	int fl_starve_threshold;
239 	int fl_starve_threshold2;
240 	int page_shift;
241 	int eq_s_qpp;
242 	int iq_s_qpp;
243 	int spg_len;
244 	int pad_boundary;
245 	int pack_boundary;
246 	int fl_pktshift;
247 	u32 sge_control;
248 	u32 sge_fl_buffer_size[SGE_FLBUF_SIZES];
249 };
250 
251 struct tp_params {
252 	unsigned int tre;            /* log2 of core clocks per TP tick */
253 	unsigned int dack_re;        /* DACK timer resolution */
254 	unsigned int la_mask;        /* what events are recorded by TP LA */
255 
256 	uint16_t filter_mode;
257 	uint16_t filter_mask;	/* Used by TOE and hashfilters */
258 	int vnic_mode;
259 	uint32_t max_rx_pdu;
260 	uint32_t max_tx_pdu;
261 	bool rx_pkt_encap;
262 
263 	int8_t fcoe_shift;
264 	int8_t port_shift;
265 	int8_t vnic_shift;
266 	int8_t vlan_shift;
267 	int8_t tos_shift;
268 	int8_t protocol_shift;
269 	int8_t ethertype_shift;
270 	int8_t macmatch_shift;
271 	int8_t matchtype_shift;
272 	int8_t frag_shift;
273 };
274 
275 /* Use same modulation queue as the tx channel. */
276 #define TX_MODQ(tx_chan) (tx_chan)
277 
278 struct vpd_params {
279 	unsigned int cclk;
280 	u8 ec[EC_LEN + 1];
281 	u8 sn[SERNUM_LEN + 1];
282 	u8 id[ID_LEN + 1];
283 	u8 pn[PN_LEN + 1];
284 	u8 na[MACADDR_LEN + 1];
285 	u8 md[MD_LEN + 1];
286 };
287 
288 struct pci_params {
289 	unsigned int vpd_cap_addr;
290 	unsigned int mps;
291 	unsigned short speed;
292 	unsigned short width;
293 };
294 
295 /*
296  * Firmware device log.
297  */
298 struct devlog_params {
299 	u32 memtype;			/* which memory (FW_MEMTYPE_* ) */
300 	u32 start;			/* start of log in firmware memory */
301 	u32 size;			/* size of log */
302 	u32 addr;			/* start address in flat addr space */
303 };
304 
305 /* Stores chip specific parameters */
306 struct chip_params {
307 	u8 nchan;
308 	u8 pm_stats_cnt;
309 	u8 cng_ch_bits_log;		/* congestion channel map bits width */
310 	u8 nsched_cls;
311 	u8 cim_num_obq;
312 	u8 filter_opt_len;
313 	u16 mps_rplc_size;
314 	u16 vfcount;
315 	u32 sge_fl_db;
316 	u16 mps_tcam_size;
317 	u16 rss_nentries;
318 	u16 cim_la_size;
319 };
320 
321 /* VF-only parameters. */
322 
323 /*
324  * Global Receive Side Scaling (RSS) parameters in host-native format.
325  */
326 struct rss_params {
327 	unsigned int mode;		/* RSS mode */
328 	union {
329 	    struct {
330 		u_int synmapen:1;	/* SYN Map Enable */
331 		u_int syn4tupenipv6:1;	/* enable hashing 4-tuple IPv6 SYNs */
332 		u_int syn2tupenipv6:1;	/* enable hashing 2-tuple IPv6 SYNs */
333 		u_int syn4tupenipv4:1;	/* enable hashing 4-tuple IPv4 SYNs */
334 		u_int syn2tupenipv4:1;	/* enable hashing 2-tuple IPv4 SYNs */
335 		u_int ofdmapen:1;	/* Offload Map Enable */
336 		u_int tnlmapen:1;	/* Tunnel Map Enable */
337 		u_int tnlalllookup:1;	/* Tunnel All Lookup */
338 		u_int hashtoeplitz:1;	/* use Toeplitz hash */
339 	    } basicvirtual;
340 	} u;
341 };
342 
343 /*
344  * Maximum resources provisioned for a PCI VF.
345  */
346 struct vf_resources {
347 	unsigned int nvi;		/* N virtual interfaces */
348 	unsigned int neq;		/* N egress Qs */
349 	unsigned int nethctrl;		/* N egress ETH or CTRL Qs */
350 	unsigned int niqflint;		/* N ingress Qs/w free list(s) & intr */
351 	unsigned int niq;		/* N ingress Qs */
352 	unsigned int tc;		/* PCI-E traffic class */
353 	unsigned int pmask;		/* port access rights mask */
354 	unsigned int nexactf;		/* N exact MPS filters */
355 	unsigned int r_caps;		/* read capabilities */
356 	unsigned int wx_caps;		/* write/execute capabilities */
357 };
358 
359 struct adapter_params {
360 	struct sge_params sge;
361 	struct tp_params  tp;		/* PF-only */
362 	struct vpd_params vpd;
363 	struct pci_params pci;
364 	struct devlog_params devlog;	/* PF-only */
365 	struct rss_params rss;		/* VF-only */
366 	struct vf_resources vfres;	/* VF-only */
367 	unsigned int core_vdd;
368 
369 	unsigned int sf_size;             /* serial flash size in bytes */
370 	unsigned int sf_nsec;             /* # of flash sectors */
371 
372 	unsigned int fw_vers;		/* firmware version */
373 	unsigned int bs_vers;		/* bootstrap version */
374 	unsigned int tp_vers;		/* TP microcode version */
375 	unsigned int er_vers;		/* expansion ROM version */
376 	unsigned int scfg_vers;		/* Serial Configuration version */
377 	unsigned int vpd_vers;		/* VPD version */
378 
379 	unsigned short mtus[NMTUS];
380 	unsigned short a_wnd[NCCTRL_WIN];
381 	unsigned short b_wnd[NCCTRL_WIN];
382 
383 	unsigned int cim_la_size;
384 
385 	uint8_t nports;		/* # of ethernet ports */
386 	uint8_t portvec;
387 	unsigned int chipid:4;	/* chip ID.  T4 = 4, T5 = 5, ... */
388 	unsigned int rev:4;	/* chip revision */
389 	unsigned int fpga:1;	/* this is an FPGA */
390 	unsigned int offload:1;	/* hw is TOE capable, fw has divvied up card
391 				   resources for TOE operation. */
392 	unsigned int bypass:1;	/* this is a bypass card */
393 	unsigned int ethoffload:1;
394 	unsigned int hash_filter:1;
395 	unsigned int filter2_wr_support:1;
396 	unsigned int port_caps32:1;
397 	unsigned int smac_add_support:1;
398 
399 	unsigned int ofldq_wr_cred;
400 	unsigned int eo_wr_cred;
401 
402 	unsigned int max_ordird_qp;
403 	unsigned int max_ird_adapter;
404 
405 	/* These values are for all ports (8b/port, upto 4 ports) */
406 	uint32_t mps_bg_map;	/* MPS rx buffer group map */
407 	uint32_t tp_ch_map;	/* TPCHMAP from firmware */
408 
409 	bool ulptx_memwrite_dsgl;	/* use of T5 DSGL allowed */
410 	bool fr_nsmr_tpte_wr_support;	/* FW support for FR_NSMR_TPTE_WR */
411 	bool dev_512sgl_mr;		/* FW support for 512 SGL per FR MR */
412 	bool viid_smt_extn_support;	/* FW returns vin, vfvld & smt index? */
413 	unsigned int max_pkts_per_eth_tx_pkts_wr;
414 	uint8_t nsched_cls;		/* # of usable sched classes per port */
415 };
416 
417 #define CHELSIO_T4		0x4
418 #define CHELSIO_T5		0x5
419 #define CHELSIO_T6		0x6
420 
421 /*
422  * State needed to monitor the forward progress of SGE Ingress DMA activities
423  * and possible hangs.
424  */
425 struct sge_idma_monitor_state {
426 	unsigned int idma_1s_thresh;	/* 1s threshold in Core Clock ticks */
427 	unsigned int idma_stalled[2];	/* synthesized stalled timers in HZ */
428 	unsigned int idma_state[2];	/* IDMA Hang detect state */
429 	unsigned int idma_qid[2];	/* IDMA Hung Ingress Queue ID */
430 	unsigned int idma_warn[2];	/* time to warning in HZ */
431 };
432 
433 struct trace_params {
434 	u32 data[TRACE_LEN / 4];
435 	u32 mask[TRACE_LEN / 4];
436 	unsigned short snap_len;
437 	unsigned short min_len;
438 	unsigned char skip_ofst;
439 	unsigned char skip_len;
440 	unsigned char invert;
441 	unsigned char port;
442 };
443 
444 struct link_config {
445 	/* OS-specific code owns all the requested_* fields. */
446 	int8_t requested_aneg;	/* link autonegotiation */
447 	int8_t requested_fc;	/* flow control */
448 	int8_t requested_fec;	/* FEC */
449 	int8_t force_fec;	/* FORCE_FEC in L1_CFG32 command. */
450 	u_int requested_speed;	/* speed (Mbps) */
451 	uint32_t requested_caps;/* rcap in last l1cfg issued by the driver. */
452 
453 	/* These are populated with information from the firmware. */
454 	uint32_t pcaps;		/* link capabilities */
455 	uint32_t acaps;		/* advertised capabilities */
456 	uint32_t lpacaps;	/* peer advertised capabilities */
457 	u_int speed;		/* actual link speed (Mbps) */
458 	int8_t fc;		/* actual link flow control */
459 	int8_t fec_hint;	/* cable/transceiver recommended fec */
460 	int8_t fec;		/* actual FEC */
461 	bool link_ok;		/* link up? */
462 	uint8_t link_down_rc;	/* link down reason */
463 };
464 
465 #include "adapter.h"
466 
467 #ifndef PCI_VENDOR_ID_CHELSIO
468 # define PCI_VENDOR_ID_CHELSIO 0x1425
469 #endif
470 
471 #define for_each_port(adapter, iter) \
472 	for (iter = 0; iter < (adapter)->params.nports; ++iter)
473 
is_ftid(const struct adapter * sc,u_int tid)474 static inline int is_ftid(const struct adapter *sc, u_int tid)
475 {
476 
477 	return (sc->tids.nftids > 0 && tid >= sc->tids.ftid_base &&
478 	    tid <= sc->tids.ftid_end);
479 }
480 
is_hpftid(const struct adapter * sc,u_int tid)481 static inline int is_hpftid(const struct adapter *sc, u_int tid)
482 {
483 
484 	return (sc->tids.nhpftids > 0 && tid >= sc->tids.hpftid_base &&
485 	    tid <= sc->tids.hpftid_end);
486 }
487 
is_etid(const struct adapter * sc,u_int tid)488 static inline int is_etid(const struct adapter *sc, u_int tid)
489 {
490 
491 	return (sc->tids.netids > 0 && tid >= sc->tids.etid_base &&
492 	    tid <= sc->tids.etid_end);
493 }
494 
is_offload(const struct adapter * adap)495 static inline int is_offload(const struct adapter *adap)
496 {
497 	return adap->params.offload;
498 }
499 
is_ethoffload(const struct adapter * adap)500 static inline int is_ethoffload(const struct adapter *adap)
501 {
502 	return adap->params.ethoffload;
503 }
504 
is_hashfilter(const struct adapter * adap)505 static inline int is_hashfilter(const struct adapter *adap)
506 {
507 	return adap->params.hash_filter;
508 }
509 
is_ktls(const struct adapter * adap)510 static inline int is_ktls(const struct adapter *adap)
511 {
512 	return adap->cryptocaps & FW_CAPS_CONFIG_TLS_HW;
513 }
514 
chip_id(struct adapter * adap)515 static inline int chip_id(struct adapter *adap)
516 {
517 	return adap->params.chipid;
518 }
519 
chip_rev(struct adapter * adap)520 static inline int chip_rev(struct adapter *adap)
521 {
522 	return adap->params.rev;
523 }
524 
is_t4(struct adapter * adap)525 static inline int is_t4(struct adapter *adap)
526 {
527 	return adap->params.chipid == CHELSIO_T4;
528 }
529 
is_t5(struct adapter * adap)530 static inline int is_t5(struct adapter *adap)
531 {
532 	return adap->params.chipid == CHELSIO_T5;
533 }
534 
is_t6(struct adapter * adap)535 static inline int is_t6(struct adapter *adap)
536 {
537 	return adap->params.chipid == CHELSIO_T6;
538 }
539 
is_fpga(struct adapter * adap)540 static inline int is_fpga(struct adapter *adap)
541 {
542 	 return adap->params.fpga;
543 }
544 
core_ticks_per_usec(const struct adapter * adap)545 static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
546 {
547 	return adap->params.vpd.cclk / 1000;
548 }
549 
us_to_core_ticks(const struct adapter * adap,unsigned int us)550 static inline unsigned int us_to_core_ticks(const struct adapter *adap,
551 					    unsigned int us)
552 {
553 	return (us * adap->params.vpd.cclk) / 1000;
554 }
555 
core_ticks_to_us(const struct adapter * adapter,unsigned int ticks)556 static inline unsigned int core_ticks_to_us(const struct adapter *adapter,
557 					    unsigned int ticks)
558 {
559 	/* add Core Clock / 2 to round ticks to nearest uS */
560 	return ((ticks * 1000 + adapter->params.vpd.cclk/2) /
561 		adapter->params.vpd.cclk);
562 }
563 
dack_ticks_to_usec(const struct adapter * adap,unsigned int ticks)564 static inline unsigned int dack_ticks_to_usec(const struct adapter *adap,
565 					      unsigned int ticks)
566 {
567 	return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
568 }
569 
us_to_tcp_ticks(const struct adapter * adap,u_long us)570 static inline u_int us_to_tcp_ticks(const struct adapter *adap, u_long us)
571 {
572 
573 	return (us * adap->params.vpd.cclk / 1000 >> adap->params.tp.tre);
574 }
575 
tcp_ticks_to_us(const struct adapter * adap,u_int ticks)576 static inline u_int tcp_ticks_to_us(const struct adapter *adap, u_int ticks)
577 {
578 	return ((uint64_t)ticks << adap->params.tp.tre) /
579 	    core_ticks_per_usec(adap);
580 }
581 
582 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);
583 
584 int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd,
585 			    int size, void *rpl, bool sleep_ok, int timeout);
586 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
587 		    void *rpl, bool sleep_ok);
588 void t4_report_fw_error(struct adapter *adap);
589 
t4_wr_mbox_timeout(struct adapter * adap,int mbox,const void * cmd,int size,void * rpl,int timeout)590 static inline int t4_wr_mbox_timeout(struct adapter *adap, int mbox,
591 				     const void *cmd, int size, void *rpl,
592 				     int timeout)
593 {
594 	return t4_wr_mbox_meat_timeout(adap, mbox, cmd, size, rpl, true,
595 				       timeout);
596 }
597 
t4_wr_mbox(struct adapter * adap,int mbox,const void * cmd,int size,void * rpl)598 static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
599 			     int size, void *rpl)
600 {
601 	return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
602 }
603 
t4_wr_mbox_ns(struct adapter * adap,int mbox,const void * cmd,int size,void * rpl)604 static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
605 				int size, void *rpl)
606 {
607 	return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
608 }
609 
610 void t4_read_indirect(struct adapter *adap, unsigned int addr_reg,
611 		      unsigned int data_reg, u32 *vals, unsigned int nregs,
612 		      unsigned int start_idx);
613 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg,
614 		       unsigned int data_reg, const u32 *vals,
615 		       unsigned int nregs, unsigned int start_idx);
616 
617 u32 t4_hw_pci_read_cfg4(adapter_t *adapter, int reg);
618 
619 struct fw_filter_wr;
620 
621 void t4_intr_enable(struct adapter *adapter);
622 void t4_intr_disable(struct adapter *adapter);
623 bool t4_slow_intr_handler(struct adapter *adapter, bool verbose);
624 
625 int t4_hash_mac_addr(const u8 *addr);
626 int t4_link_l1cfg(struct adapter *adap, unsigned int mbox, unsigned int port,
627 		  struct link_config *lc);
628 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
629 int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data);
630 int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data);
631 int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz);
632 int t4_seeprom_wp(struct adapter *adapter, int enable);
633 int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords,
634 		  u32 *data, int byte_oriented);
635 int t4_write_flash(struct adapter *adapter, unsigned int addr,
636 		   unsigned int n, const u8 *data, int byte_oriented);
637 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
638 int t4_fwcache(struct adapter *adap, enum fw_params_param_dev_fwcache op);
639 int t5_fw_init_extern_mem(struct adapter *adap);
640 int t4_load_bootcfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
641 int t4_load_boot(struct adapter *adap, u8 *boot_data,
642                  unsigned int boot_addr, unsigned int size);
643 int t4_flash_erase_sectors(struct adapter *adapter, int start, int end);
644 int t4_flash_cfg_addr(struct adapter *adapter);
645 int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
646 int t4_get_fw_version(struct adapter *adapter, u32 *vers);
647 int t4_get_fw_hdr(struct adapter *adapter, struct fw_hdr *hdr);
648 int t4_get_bs_version(struct adapter *adapter, u32 *vers);
649 int t4_get_tp_version(struct adapter *adapter, u32 *vers);
650 int t4_get_exprom_version(struct adapter *adapter, u32 *vers);
651 int t4_get_scfg_version(struct adapter *adapter, u32 *vers);
652 int t4_get_vpd_version(struct adapter *adapter, u32 *vers);
653 int t4_get_version_info(struct adapter *adapter);
654 int t4_init_hw(struct adapter *adapter, u32 fw_params);
655 const struct chip_params *t4_get_chip_params(int chipid);
656 int t4_prep_adapter(struct adapter *adapter, u32 *buf);
657 int t4_shutdown_adapter(struct adapter *adapter);
658 int t4_init_devlog_params(struct adapter *adapter, int fw_attach);
659 int t4_init_sge_params(struct adapter *adapter);
660 int t4_init_tp_params(struct adapter *adap);
661 int t4_filter_field_shift(const struct adapter *adap, int filter_sel);
662 int t4_port_init(struct adapter *adap, int mbox, int pf, int vf, int port_id);
663 void t4_fatal_err(struct adapter *adapter, bool fw_error);
664 int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp,
665 			int filter_index, int enable);
666 void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
667 			 int filter_index, int *enabled);
668 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
669 			int start, int n, const u16 *rspq, unsigned int nrspq);
670 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
671 		       unsigned int flags);
672 int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid,
673 		     unsigned int flags, unsigned int defq, unsigned int skeyidx,
674 		     unsigned int skey);
675 int t4_read_rss(struct adapter *adapter, u16 *entries);
676 void t4_read_rss_key(struct adapter *adapter, u32 *key, bool sleep_ok);
677 void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx,
678 		      bool sleep_ok);
679 void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index,
680 			   u32 *valp, bool sleep_ok);
681 void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index,
682 			    u32 val, bool sleep_ok);
683 void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index,
684 			   u32 *vfl, u32 *vfh, bool sleep_ok);
685 void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index,
686 			    u32 vfl, u32 vfh, bool sleep_ok);
687 u32 t4_read_rss_pf_map(struct adapter *adapter, bool sleep_ok);
688 void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap, bool sleep_ok);
689 u32 t4_read_rss_pf_mask(struct adapter *adapter, bool sleep_ok);
690 void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask, bool sleep_ok);
691 int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask);
692 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
693 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
694 void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres);
695 int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
696 int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
697 int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n,
698 		unsigned int *valp);
699 int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n,
700 		 const unsigned int *valp);
701 int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n,
702 		    unsigned int *valp);
703 int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr);
704 void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,
705 		unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr);
706 void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp);
707 int t4_get_flash_params(struct adapter *adapter);
708 
709 u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach);
710 int t4_mc_read(struct adapter *adap, int idx, u32 addr,
711 	       __be32 *data, u64 *parity);
712 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity);
713 int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size,
714 		__be32 *data);
715 void t4_idma_monitor_init(struct adapter *adapter,
716 			  struct sge_idma_monitor_state *idma);
717 void t4_idma_monitor(struct adapter *adapter,
718 		     struct sge_idma_monitor_state *idma,
719 		     int hz, int ticks);
720 int t4_set_vf_mac(struct adapter *adapter, unsigned int pf, unsigned int vf,
721 		  unsigned int naddr, u8 *addr);
722 
723 unsigned int t4_get_regs_len(struct adapter *adapter);
724 void t4_get_regs(struct adapter *adap, u8 *buf, size_t buf_size);
725 
726 u32 t4_port_reg(struct adapter *adap, u8 port, u32 reg);
727 const char *t4_get_port_type_description(enum fw_port_type port_type);
728 void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
729 void t4_get_port_stats_offset(struct adapter *adap, int idx,
730 		struct port_stats *stats,
731 		struct port_stats *offset);
732 void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p);
733 void t4_clr_port_stats(struct adapter *adap, int idx);
734 
735 void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
736 void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]);
737 void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]);
738 void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps,
739 		     unsigned int *ipg, bool sleep_ok);
740 void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr,
741 			    unsigned int mask, unsigned int val);
742 void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr);
743 void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st,
744 			 bool sleep_ok);
745 void t4_tp_get_tnl_stats(struct adapter *adap, struct tp_tnl_stats *st,
746 			 bool sleep_ok);
747 void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st,
748     			   bool sleep_ok);
749 void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st,
750 			 bool sleep_ok);
751 void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st,
752 			  bool sleep_ok);
753 void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st,
754 		      bool sleep_ok);
755 void t4_tp_get_tid_stats(struct adapter *adap, struct tp_tid_stats *st,
756 		      bool sleep_ok);
757 void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
758 			 struct tp_tcp_stats *v6, bool sleep_ok);
759 void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx,
760 		       struct tp_fcoe_stats *st, bool sleep_ok);
761 void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
762 		  const unsigned short *alpha, const unsigned short *beta);
763 
764 void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf);
765 
766 int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps);
767 int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg);
768 int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals,
769 		    unsigned int start, unsigned int n);
770 void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate);
771 int t4_set_filter_cfg(struct adapter *adap, int mode, int mask, int vnic_mode);
772 void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid);
773 
774 void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr);
775 int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
776 		      u64 mask0, u64 mask1, unsigned int crc, bool enable);
777 
778 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
779 		enum dev_master master, enum dev_state *state);
780 int t4_fw_bye(struct adapter *adap, unsigned int mbox);
781 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
782 int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force);
783 int t4_fw_restart(struct adapter *adap, unsigned int mbox);
784 int t4_fw_upgrade(struct adapter *adap, unsigned int mbox,
785 		  const u8 *fw_data, unsigned int size, int force);
786 int t4_fw_initialize(struct adapter *adap, unsigned int mbox);
787 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
788 		    unsigned int vf, unsigned int nparams, const u32 *params,
789 		    u32 *val);
790 int t4_query_params_rw(struct adapter *adap, unsigned int mbox, unsigned int pf,
791 		       unsigned int vf, unsigned int nparams, const u32 *params,
792 		       u32 *val, int rw);
793 int t4_set_params_timeout(struct adapter *adap, unsigned int mbox,
794 			  unsigned int pf, unsigned int vf,
795 			  unsigned int nparams, const u32 *params,
796 			  const u32 *val, int timeout);
797 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
798 		  unsigned int vf, unsigned int nparams, const u32 *params,
799 		  const u32 *val);
800 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
801 		unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
802 		unsigned int rxqi, unsigned int rxq, unsigned int tc,
803 		unsigned int vi, unsigned int cmask, unsigned int pmask,
804 		unsigned int exactf, unsigned int rcaps, unsigned int wxcaps);
805 int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,
806 		     unsigned int port, unsigned int pf, unsigned int vf,
807 		     unsigned int nmac, u8 *mac, u16 *rss_size,
808 		     uint8_t *vfvld, uint16_t *vin,
809 		     unsigned int portfunc, unsigned int idstype);
810 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
811 		unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
812 		u16 *rss_size, uint8_t *vfvld, uint16_t *vin);
813 int t4_free_vi(struct adapter *adap, unsigned int mbox,
814 	       unsigned int pf, unsigned int vf,
815 	       unsigned int viid);
816 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
817 		  int mtu, int promisc, int all_multi, int bcast, int vlanex,
818 		  bool sleep_ok);
819 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid,
820 		      bool free, unsigned int naddr, const u8 **addr, u16 *idx,
821 		      u64 *hash, bool sleep_ok);
822 int t4_free_mac_filt(struct adapter *adap, unsigned int mbox,
823 		      unsigned int viid, unsigned int naddr,
824 		      const u8 **addr, bool sleep_ok);
825 int t4_free_encap_mac_filt(struct adapter *adap, unsigned int viid,
826 			   int idx, bool sleep_ok);
827 int t4_free_raw_mac_filt(struct adapter *adap, unsigned int viid,
828 			 const u8 *addr, const u8 *mask, unsigned int idx,
829 			 u8 lookup_type, u8 port_id, bool sleep_ok);
830 int t4_alloc_raw_mac_filt(struct adapter *adap, unsigned int viid,
831 			  const u8 *addr, const u8 *mask, unsigned int idx,
832 			  u8 lookup_type, u8 port_id, bool sleep_ok);
833 int t4_alloc_encap_mac_filt(struct adapter *adap, unsigned int viid,
834 			    const u8 *addr, const u8 *mask, unsigned int vni,
835 			    unsigned int vni_mask, u8 dip_hit, u8 lookup_type,
836 			    bool sleep_ok);
837 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
838 		  int idx, const u8 *addr, bool persist, uint16_t *smt_idx);
839 int t4_del_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
840 	       const u8 *addr, bool smac);
841 int t4_add_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
842 	       int idx, const u8 *addr, bool persist, u8 *smt_idx, bool smac);
843 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
844 		     bool ucast, u64 vec, bool sleep_ok);
845 int t4_enable_vi_params(struct adapter *adap, unsigned int mbox,
846 			unsigned int viid, bool rx_en, bool tx_en, bool dcb_en);
847 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
848 		 bool rx_en, bool tx_en);
849 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
850 		     unsigned int nblinks);
851 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
852 	       unsigned int mmd, unsigned int reg, unsigned int *valp);
853 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
854 	       unsigned int mmd, unsigned int reg, unsigned int val);
855 int t4_i2c_io(struct adapter *adap, unsigned int mbox,
856 	      int port, unsigned int devid,
857 	      unsigned int offset, unsigned int len,
858 	      u8 *buf, bool write);
859 int t4_i2c_rd(struct adapter *adap, unsigned int mbox,
860 	      int port, unsigned int devid,
861 	      unsigned int offset, unsigned int len,
862 	      u8 *buf);
863 int t4_i2c_wr(struct adapter *adap, unsigned int mbox,
864 	      int port, unsigned int devid,
865 	      unsigned int offset, unsigned int len,
866 	      u8 *buf);
867 int t4_iq_stop(struct adapter *adap, unsigned int mbox, unsigned int pf,
868 	       unsigned int vf, unsigned int iqtype, unsigned int iqid,
869 	       unsigned int fl0id, unsigned int fl1id);
870 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
871 	       unsigned int vf, unsigned int iqtype, unsigned int iqid,
872 	       unsigned int fl0id, unsigned int fl1id);
873 int t4_eth_eq_stop(struct adapter *adap, unsigned int mbox, unsigned int pf,
874                    unsigned int vf, unsigned int eqid);
875 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
876 		   unsigned int vf, unsigned int eqid);
877 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
878 		    unsigned int vf, unsigned int eqid);
879 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
880 		    unsigned int vf, unsigned int eqid);
881 int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid,
882 		   enum ctxt_type ctype, u32 *data);
883 int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype,
884 		      u32 *data);
885 int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox, int ctxt_type);
886 const char *t4_link_down_rc_str(unsigned char link_down_rc);
887 int t4_update_port_info(struct port_info *pi);
888 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
889 int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val);
890 int t4_sched_config(struct adapter *adapter, int type, int minmaxen,
891 		    int sleep_ok);
892 int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
893 		    int rateunit, int ratemode, int channel, int cl,
894 		    int minrate, int maxrate, int weight, int pktsize,
895 		    int burstsize, int sleep_ok);
896 int t4_sched_params_ch_rl(struct adapter *adapter, int channel, int ratemode,
897 			  unsigned int maxrate, int sleep_ok);
898 int t4_sched_params_cl_wrr(struct adapter *adapter, int channel, int cl,
899 			   int weight, int sleep_ok);
900 int t4_sched_params_cl_rl_kbps(struct adapter *adapter, int channel, int cl,
901 			       int mode, unsigned int maxrate, int pktsize,
902 			       int sleep_ok);
903 int t4_config_watchdog(struct adapter *adapter, unsigned int mbox,
904 		       unsigned int pf, unsigned int vf,
905 		       unsigned int timeout, unsigned int action);
906 int t4_get_devlog_level(struct adapter *adapter, unsigned int *level);
907 int t4_set_devlog_level(struct adapter *adapter, unsigned int level);
908 void t4_sge_decode_idma_state(struct adapter *adapter, int state);
909 
910 void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs,
911 		    u32 start_index, bool sleep_ok);
912 void t4_tp_pio_write(struct adapter *adap, const u32 *buff, u32 nregs,
913 		     u32 start_index, bool sleep_ok);
914 void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs,
915 		       u32 start_index, bool sleep_ok);
916 void t4_tp_mib_read(struct adapter *adap, u32 *buff, u32 nregs,
917 		    u32 start_index, bool sleep_ok);
918 int t4_configure_ringbb(struct adapter *adap);
919 int t4_configure_add_smac(struct adapter *adap);
920 int t4_set_vlan_acl(struct adapter *adap, unsigned int mbox, unsigned int vf,
921 		    u16 vlan);
922 
t4vf_query_params(struct adapter * adapter,unsigned int nparams,const u32 * params,u32 * vals)923 static inline int t4vf_query_params(struct adapter *adapter,
924 				    unsigned int nparams, const u32 *params,
925 				    u32 *vals)
926 {
927 	return t4_query_params(adapter, 0, 0, 0, nparams, params, vals);
928 }
929 
t4vf_set_params(struct adapter * adapter,unsigned int nparams,const u32 * params,const u32 * vals)930 static inline int t4vf_set_params(struct adapter *adapter,
931 				  unsigned int nparams, const u32 *params,
932 				  const u32 *vals)
933 {
934 	return t4_set_params(adapter, 0, 0, 0, nparams, params, vals);
935 }
936 
t4vf_wr_mbox(struct adapter * adap,const void * cmd,int size,void * rpl)937 static inline int t4vf_wr_mbox(struct adapter *adap, const void *cmd,
938 			       int size, void *rpl)
939 {
940 	return t4_wr_mbox(adap, adap->mbox, cmd, size, rpl);
941 }
942 
943 int t4vf_wait_dev_ready(struct adapter *adapter);
944 int t4vf_fw_reset(struct adapter *adapter);
945 int t4vf_get_sge_params(struct adapter *adapter);
946 int t4vf_get_rss_glb_config(struct adapter *adapter);
947 int t4vf_get_vfres(struct adapter *adapter);
948 int t4vf_prep_adapter(struct adapter *adapter);
949 int t4vf_get_vf_mac(struct adapter *adapter, unsigned int port,
950 		    unsigned int *naddr, u8 *addr);
951 int t4vf_get_vf_vlan(struct adapter *adapter);
952 int t4_bar2_sge_qregs(struct adapter *adapter, unsigned int qid,
953 		enum t4_bar2_qtype qtype, int user, u64 *pbar2_qoffset,
954 		unsigned int *pbar2_qid);
955 unsigned int fwcap_to_speed(uint32_t caps);
956 uint32_t speed_to_fwcap(unsigned int speed);
957 uint32_t fwcap_top_speed(uint32_t caps);
958 
959 static inline int
port_top_speed(const struct port_info * pi)960 port_top_speed(const struct port_info *pi)
961 {
962 
963 	/* Mbps -> Gbps */
964 	return (fwcap_to_speed(pi->link_cfg.pcaps) / 1000);
965 }
966 
967 /* SET_TCB_FIELD sent as a ULP command looks like this */
968 #define LEN__SET_TCB_FIELD_ULP (sizeof(struct ulp_txpkt) + \
969     sizeof(struct ulptx_idata) + sizeof(struct cpl_set_tcb_field_core))
970 
971 static inline void *
mk_set_tcb_field_ulp(struct adapter * sc,void * cur,int tid,uint16_t word,uint64_t mask,uint64_t val)972 mk_set_tcb_field_ulp(struct adapter *sc, void *cur, int tid, uint16_t word,
973     uint64_t mask, uint64_t val)
974 {
975 	struct ulp_txpkt *ulpmc;
976 	struct ulptx_idata *ulpsc;
977 	struct cpl_set_tcb_field_core *req;
978 
979 	MPASS(((uintptr_t)cur & 7) == 0);
980 
981 	ulpmc = cur;
982 	ulpmc->cmd_dest = htobe32(V_ULPTX_CMD(ULP_TX_PKT) |
983 	    V_ULP_TXPKT_DEST(ULP_TXPKT_DEST_TP));
984 	ulpmc->len = htobe32(howmany(LEN__SET_TCB_FIELD_ULP, 16));
985 
986 	ulpsc = (struct ulptx_idata *)(ulpmc + 1);
987 	ulpsc->cmd_more = htobe32(V_ULPTX_CMD(ULP_TX_SC_IMM));
988 	ulpsc->len = htobe32(sizeof(*req));
989 
990 	req = (struct cpl_set_tcb_field_core *)(ulpsc + 1);
991 	OPCODE_TID(req) = htobe32(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
992 	req->reply_ctrl = htobe16(F_NO_REPLY);
993 	req->word_cookie = htobe16(V_WORD(word) | V_COOKIE(0));
994 	req->mask = htobe64(mask);
995 	req->val = htobe64(val);
996 
997 	/*
998 	 * ULP_TX is an 8B processor but the firmware transfers WRs in 16B
999 	 * chunks.  The master command for set_tcb_field does not end at a 16B
1000 	 * boundary so it needs to be padded with a no-op.
1001 	 */
1002 	MPASS((LEN__SET_TCB_FIELD_ULP & 0xf) != 0);
1003 	ulpsc = (struct ulptx_idata *)(req + 1);
1004 	ulpsc->cmd_more = htobe32(V_ULPTX_CMD(ULP_TX_SC_NOOP));
1005 	ulpsc->len = htobe32(0);
1006 
1007 	return (ulpsc + 1);
1008 }
1009 #endif /* __CHELSIO_COMMON_H */
1010