1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
3 */
4
5 #if defined(__FreeBSD__)
6 #define LINUXKPI_PARAM_PREFIX rtw88_
7 #endif
8
9 #include <linux/devcoredump.h>
10
11 #include "main.h"
12 #include "regd.h"
13 #include "fw.h"
14 #include "ps.h"
15 #include "sec.h"
16 #include "mac.h"
17 #include "coex.h"
18 #include "phy.h"
19 #include "reg.h"
20 #include "efuse.h"
21 #include "tx.h"
22 #include "debug.h"
23 #include "bf.h"
24 #include "sar.h"
25 #include "sdio.h"
26
27 bool rtw_disable_lps_deep_mode;
28 EXPORT_SYMBOL(rtw_disable_lps_deep_mode);
29 bool rtw_bf_support = true;
30 unsigned int rtw_debug_mask;
31 EXPORT_SYMBOL(rtw_debug_mask);
32 /* EDCCA is enabled during normal behavior. For debugging purpose in
33 * a noisy environment, it can be disabled via edcca debugfs. Because
34 * all rtw88 devices will probably be affected if environment is noisy,
35 * rtw_edcca_enabled is just declared by driver instead of by device.
36 * So, turning it off will take effect for all rtw88 devices before
37 * there is a tough reason to maintain rtw_edcca_enabled by device.
38 */
39 bool rtw_edcca_enabled = true;
40
41 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644);
42 module_param_named(support_bf, rtw_bf_support, bool, 0644);
43 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
44
45 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS");
46 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support");
47 MODULE_PARM_DESC(debug_mask, "Debugging mask");
48
49 #if defined(__FreeBSD__)
50 static bool rtw_ht_support = false;
51 module_param_named(support_ht, rtw_ht_support, bool, 0644);
52 MODULE_PARM_DESC(support_ht, "Set to Y to enable HT support");
53
54 static bool rtw_vht_support = false;
55 module_param_named(support_vht, rtw_vht_support, bool, 0644);
56 MODULE_PARM_DESC(support_vht, "Set to Y to enable VHT support");
57 #endif
58
59 static struct ieee80211_channel rtw_channeltable_2g[] = {
60 {.center_freq = 2412, .hw_value = 1,},
61 {.center_freq = 2417, .hw_value = 2,},
62 {.center_freq = 2422, .hw_value = 3,},
63 {.center_freq = 2427, .hw_value = 4,},
64 {.center_freq = 2432, .hw_value = 5,},
65 {.center_freq = 2437, .hw_value = 6,},
66 {.center_freq = 2442, .hw_value = 7,},
67 {.center_freq = 2447, .hw_value = 8,},
68 {.center_freq = 2452, .hw_value = 9,},
69 {.center_freq = 2457, .hw_value = 10,},
70 {.center_freq = 2462, .hw_value = 11,},
71 {.center_freq = 2467, .hw_value = 12,},
72 {.center_freq = 2472, .hw_value = 13,},
73 {.center_freq = 2484, .hw_value = 14,},
74 };
75
76 static struct ieee80211_channel rtw_channeltable_5g[] = {
77 {.center_freq = 5180, .hw_value = 36,},
78 {.center_freq = 5200, .hw_value = 40,},
79 {.center_freq = 5220, .hw_value = 44,},
80 {.center_freq = 5240, .hw_value = 48,},
81 {.center_freq = 5260, .hw_value = 52,},
82 {.center_freq = 5280, .hw_value = 56,},
83 {.center_freq = 5300, .hw_value = 60,},
84 {.center_freq = 5320, .hw_value = 64,},
85 {.center_freq = 5500, .hw_value = 100,},
86 {.center_freq = 5520, .hw_value = 104,},
87 {.center_freq = 5540, .hw_value = 108,},
88 {.center_freq = 5560, .hw_value = 112,},
89 {.center_freq = 5580, .hw_value = 116,},
90 {.center_freq = 5600, .hw_value = 120,},
91 {.center_freq = 5620, .hw_value = 124,},
92 {.center_freq = 5640, .hw_value = 128,},
93 {.center_freq = 5660, .hw_value = 132,},
94 {.center_freq = 5680, .hw_value = 136,},
95 {.center_freq = 5700, .hw_value = 140,},
96 {.center_freq = 5720, .hw_value = 144,},
97 {.center_freq = 5745, .hw_value = 149,},
98 {.center_freq = 5765, .hw_value = 153,},
99 {.center_freq = 5785, .hw_value = 157,},
100 {.center_freq = 5805, .hw_value = 161,},
101 {.center_freq = 5825, .hw_value = 165,
102 .flags = IEEE80211_CHAN_NO_HT40MINUS},
103 };
104
105 static struct ieee80211_rate rtw_ratetable[] = {
106 {.bitrate = 10, .hw_value = 0x00,},
107 {.bitrate = 20, .hw_value = 0x01,},
108 {.bitrate = 55, .hw_value = 0x02,},
109 {.bitrate = 110, .hw_value = 0x03,},
110 {.bitrate = 60, .hw_value = 0x04,},
111 {.bitrate = 90, .hw_value = 0x05,},
112 {.bitrate = 120, .hw_value = 0x06,},
113 {.bitrate = 180, .hw_value = 0x07,},
114 {.bitrate = 240, .hw_value = 0x08,},
115 {.bitrate = 360, .hw_value = 0x09,},
116 {.bitrate = 480, .hw_value = 0x0a,},
117 {.bitrate = 540, .hw_value = 0x0b,},
118 };
119
120 static const struct ieee80211_iface_limit rtw_iface_limits[] = {
121 {
122 .max = 1,
123 .types = BIT(NL80211_IFTYPE_STATION),
124 },
125 {
126 .max = 1,
127 .types = BIT(NL80211_IFTYPE_AP),
128 }
129 };
130
131 static const struct ieee80211_iface_combination rtw_iface_combs[] = {
132 {
133 .limits = rtw_iface_limits,
134 .n_limits = ARRAY_SIZE(rtw_iface_limits),
135 .max_interfaces = 2,
136 .num_different_channels = 1,
137 }
138 };
139
rtw_desc_to_bitrate(u8 desc_rate)140 u16 rtw_desc_to_bitrate(u8 desc_rate)
141 {
142 struct ieee80211_rate rate;
143
144 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))
145 return 0;
146
147 rate = rtw_ratetable[desc_rate];
148
149 return rate.bitrate;
150 }
151
152 static struct ieee80211_supported_band rtw_band_2ghz = {
153 .band = NL80211_BAND_2GHZ,
154
155 .channels = rtw_channeltable_2g,
156 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
157
158 .bitrates = rtw_ratetable,
159 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
160
161 .ht_cap = {0},
162 .vht_cap = {0},
163 };
164
165 static struct ieee80211_supported_band rtw_band_5ghz = {
166 .band = NL80211_BAND_5GHZ,
167
168 .channels = rtw_channeltable_5g,
169 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
170
171 /* 5G has no CCK rates */
172 .bitrates = rtw_ratetable + 4,
173 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
174
175 .ht_cap = {0},
176 .vht_cap = {0},
177 };
178
179 struct rtw_watch_dog_iter_data {
180 struct rtw_dev *rtwdev;
181 struct rtw_vif *rtwvif;
182 };
183
rtw_dynamic_csi_rate(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif)184 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)
185 {
186 struct rtw_bf_info *bf_info = &rtwdev->bf_info;
187 u8 fix_rate_enable = 0;
188 u8 new_csi_rate_idx;
189
190 if (rtwvif->bfee.role != RTW_BFEE_SU &&
191 rtwvif->bfee.role != RTW_BFEE_MU)
192 return;
193
194 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi,
195 bf_info->cur_csi_rpt_rate,
196 fix_rate_enable, &new_csi_rate_idx);
197
198 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
199 bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
200 }
201
rtw_vif_watch_dog_iter(void * data,struct ieee80211_vif * vif)202 static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif)
203 {
204 struct rtw_watch_dog_iter_data *iter_data = data;
205 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
206
207 if (vif->type == NL80211_IFTYPE_STATION)
208 if (vif->cfg.assoc)
209 iter_data->rtwvif = rtwvif;
210
211 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif);
212
213 rtwvif->stats.tx_unicast = 0;
214 rtwvif->stats.rx_unicast = 0;
215 rtwvif->stats.tx_cnt = 0;
216 rtwvif->stats.rx_cnt = 0;
217 }
218
219 /* process TX/RX statistics periodically for hardware,
220 * the information helps hardware to enhance performance
221 */
rtw_watch_dog_work(struct work_struct * work)222 static void rtw_watch_dog_work(struct work_struct *work)
223 {
224 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
225 watch_dog_work.work);
226 struct rtw_traffic_stats *stats = &rtwdev->stats;
227 struct rtw_watch_dog_iter_data data = {};
228 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
229 bool ps_active;
230
231 mutex_lock(&rtwdev->mutex);
232
233 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
234 goto unlock;
235
236 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
237 RTW_WATCH_DOG_DELAY_TIME);
238
239 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
240 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
241 else
242 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
243
244 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
245 rtw_coex_wl_status_change_notify(rtwdev, 0);
246
247 if (stats->tx_cnt > RTW_LPS_THRESHOLD ||
248 stats->rx_cnt > RTW_LPS_THRESHOLD)
249 ps_active = true;
250 else
251 ps_active = false;
252
253 ewma_tp_add(&stats->tx_ewma_tp,
254 (u32)(stats->tx_unicast >> RTW_TP_SHIFT));
255 ewma_tp_add(&stats->rx_ewma_tp,
256 (u32)(stats->rx_unicast >> RTW_TP_SHIFT));
257 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
258 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
259
260 /* reset tx/rx statictics */
261 stats->tx_unicast = 0;
262 stats->rx_unicast = 0;
263 stats->tx_cnt = 0;
264 stats->rx_cnt = 0;
265
266 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
267 goto unlock;
268
269 /* make sure BB/RF is working for dynamic mech */
270 rtw_leave_lps(rtwdev);
271 rtw_coex_wl_status_check(rtwdev);
272 rtw_coex_query_bt_hid_list(rtwdev);
273
274 rtw_phy_dynamic_mechanism(rtwdev);
275
276 data.rtwdev = rtwdev;
277 /* rtw_iterate_vifs internally uses an atomic iterator which is needed
278 * to avoid taking local->iflist_mtx mutex
279 */
280 rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data);
281
282 /* fw supports only one station associated to enter lps, if there are
283 * more than two stations associated to the AP, then we can not enter
284 * lps, because fw does not handle the overlapped beacon interval
285 *
286 * rtw_recalc_lps() iterate vifs and determine if driver can enter
287 * ps by vif->type and vif->cfg.ps, all we need to do here is to
288 * get that vif and check if device is having traffic more than the
289 * threshold.
290 */
291 if (rtwdev->ps_enabled && data.rtwvif && !ps_active &&
292 !rtwdev->beacon_loss && !rtwdev->ap_active)
293 rtw_enter_lps(rtwdev, data.rtwvif->port);
294
295 rtwdev->watch_dog_cnt++;
296
297 unlock:
298 mutex_unlock(&rtwdev->mutex);
299 }
300
rtw_c2h_work(struct work_struct * work)301 static void rtw_c2h_work(struct work_struct *work)
302 {
303 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
304 struct sk_buff *skb, *tmp;
305
306 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
307 skb_unlink(skb, &rtwdev->c2h_queue);
308 rtw_fw_c2h_cmd_handle(rtwdev, skb);
309 dev_kfree_skb_any(skb);
310 }
311 }
312
rtw_ips_work(struct work_struct * work)313 static void rtw_ips_work(struct work_struct *work)
314 {
315 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work);
316
317 mutex_lock(&rtwdev->mutex);
318 if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)
319 rtw_enter_ips(rtwdev);
320 mutex_unlock(&rtwdev->mutex);
321 }
322
rtw_acquire_macid(struct rtw_dev * rtwdev)323 static u8 rtw_acquire_macid(struct rtw_dev *rtwdev)
324 {
325 unsigned long mac_id;
326
327 mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM);
328 if (mac_id < RTW_MAX_MAC_ID_NUM)
329 set_bit(mac_id, rtwdev->mac_id_map);
330
331 return mac_id;
332 }
333
rtw_sta_rc_work(struct work_struct * work)334 static void rtw_sta_rc_work(struct work_struct *work)
335 {
336 struct rtw_sta_info *si = container_of(work, struct rtw_sta_info,
337 rc_work);
338 struct rtw_dev *rtwdev = si->rtwdev;
339
340 mutex_lock(&rtwdev->mutex);
341 rtw_update_sta_info(rtwdev, si, true);
342 mutex_unlock(&rtwdev->mutex);
343 }
344
rtw_sta_add(struct rtw_dev * rtwdev,struct ieee80211_sta * sta,struct ieee80211_vif * vif)345 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
346 struct ieee80211_vif *vif)
347 {
348 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
349 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
350 int i;
351
352 si->mac_id = rtw_acquire_macid(rtwdev);
353 if (si->mac_id >= RTW_MAX_MAC_ID_NUM)
354 return -ENOSPC;
355
356 if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc == 0)
357 rtwvif->mac_id = si->mac_id;
358 si->rtwdev = rtwdev;
359 si->sta = sta;
360 si->vif = vif;
361 si->init_ra_lv = 1;
362 ewma_rssi_init(&si->avg_rssi);
363 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
364 rtw_txq_init(rtwdev, sta->txq[i]);
365 INIT_WORK(&si->rc_work, rtw_sta_rc_work);
366
367 rtw_update_sta_info(rtwdev, si, true);
368 rtw_fw_media_status_report(rtwdev, si->mac_id, true);
369
370 rtwdev->sta_cnt++;
371 rtwdev->beacon_loss = false;
372 #if defined(__linux__)
373 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n",
374 sta->addr, si->mac_id);
375 #elif defined(__FreeBSD__)
376 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D joined with macid %d\n",
377 sta->addr, ":", si->mac_id);
378 #endif
379
380 return 0;
381 }
382
rtw_sta_remove(struct rtw_dev * rtwdev,struct ieee80211_sta * sta,bool fw_exist)383 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
384 bool fw_exist)
385 {
386 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
387 int i;
388
389 cancel_work_sync(&si->rc_work);
390
391 rtw_release_macid(rtwdev, si->mac_id);
392 if (fw_exist)
393 rtw_fw_media_status_report(rtwdev, si->mac_id, false);
394
395 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
396 rtw_txq_cleanup(rtwdev, sta->txq[i]);
397
398 kfree(si->mask);
399
400 rtwdev->sta_cnt--;
401 #if defined(__linux__)
402 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n",
403 sta->addr, si->mac_id);
404 #elif defined(__FreeBSD__)
405 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D with macid %d left\n",
406 sta->addr, ":", si->mac_id);
407 #endif
408 }
409
410 struct rtw_fwcd_hdr {
411 u32 item;
412 u32 size;
413 u32 padding1;
414 u32 padding2;
415 } __packed;
416
rtw_fwcd_prep(struct rtw_dev * rtwdev)417 static int rtw_fwcd_prep(struct rtw_dev *rtwdev)
418 {
419 const struct rtw_chip_info *chip = rtwdev->chip;
420 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
421 const struct rtw_fwcd_segs *segs = chip->fwcd_segs;
422 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr);
423 u8 i;
424
425 if (segs) {
426 prep_size += segs->num * sizeof(struct rtw_fwcd_hdr);
427
428 for (i = 0; i < segs->num; i++)
429 prep_size += segs->segs[i];
430 }
431
432 desc->data = vmalloc(prep_size);
433 if (!desc->data)
434 return -ENOMEM;
435
436 desc->size = prep_size;
437 desc->next = desc->data;
438
439 return 0;
440 }
441
rtw_fwcd_next(struct rtw_dev * rtwdev,u32 item,u32 size)442 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size)
443 {
444 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
445 struct rtw_fwcd_hdr *hdr;
446 u8 *next;
447
448 if (!desc->data) {
449 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n");
450 return NULL;
451 }
452
453 next = desc->next + sizeof(struct rtw_fwcd_hdr);
454 if (next - desc->data + size > desc->size) {
455 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n");
456 return NULL;
457 }
458
459 hdr = (struct rtw_fwcd_hdr *)(desc->next);
460 hdr->item = item;
461 hdr->size = size;
462 hdr->padding1 = 0x01234567;
463 hdr->padding2 = 0x89abcdef;
464 desc->next = next + size;
465
466 return next;
467 }
468
rtw_fwcd_dump(struct rtw_dev * rtwdev)469 static void rtw_fwcd_dump(struct rtw_dev *rtwdev)
470 {
471 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
472
473 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n");
474
475 /* Data will be freed after lifetime of device coredump. After calling
476 * dev_coredump, data is supposed to be handled by the device coredump
477 * framework. Note that a new dump will be discarded if a previous one
478 * hasn't been released yet.
479 */
480 dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL);
481 }
482
rtw_fwcd_free(struct rtw_dev * rtwdev,bool free_self)483 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self)
484 {
485 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
486
487 if (free_self) {
488 rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n");
489 vfree(desc->data);
490 }
491
492 desc->data = NULL;
493 desc->next = NULL;
494 }
495
rtw_fw_dump_crash_log(struct rtw_dev * rtwdev)496 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev)
497 {
498 u32 size = rtwdev->chip->fw_rxff_size;
499 u32 *buf;
500 u8 seq;
501
502 buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size);
503 if (!buf)
504 return -ENOMEM;
505
506 if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) {
507 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n");
508 return -EINVAL;
509 }
510
511 if (GET_FW_DUMP_LEN(buf) == 0) {
512 rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n");
513 return -EINVAL;
514 }
515
516 seq = GET_FW_DUMP_SEQ(buf);
517 if (seq > 0) {
518 rtw_dbg(rtwdev, RTW_DBG_FW,
519 "fw crash dump's seq is wrong: %d\n", seq);
520 return -EINVAL;
521 }
522
523 return 0;
524 }
525
rtw_dump_fw(struct rtw_dev * rtwdev,const u32 ocp_src,u32 size,u32 fwcd_item)526 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size,
527 u32 fwcd_item)
528 {
529 u32 rxff = rtwdev->chip->fw_rxff_size;
530 u32 dump_size, done_size = 0;
531 u8 *buf;
532 int ret;
533
534 buf = rtw_fwcd_next(rtwdev, fwcd_item, size);
535 if (!buf)
536 return -ENOMEM;
537
538 while (size) {
539 dump_size = size > rxff ? rxff : size;
540
541 ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size,
542 dump_size);
543 if (ret) {
544 rtw_err(rtwdev,
545 "ddma fw 0x%x [+0x%x] to fw fifo fail\n",
546 ocp_src, done_size);
547 return ret;
548 }
549
550 ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0,
551 dump_size, (u32 *)(buf + done_size));
552 if (ret) {
553 rtw_err(rtwdev,
554 "dump fw 0x%x [+0x%x] from fw fifo fail\n",
555 ocp_src, done_size);
556 return ret;
557 }
558
559 size -= dump_size;
560 done_size += dump_size;
561 }
562
563 return 0;
564 }
565 EXPORT_SYMBOL(rtw_dump_fw);
566
rtw_dump_reg(struct rtw_dev * rtwdev,const u32 addr,const u32 size)567 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size)
568 {
569 u8 *buf;
570 u32 i;
571
572 if (addr & 0x3) {
573 WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr);
574 return -EINVAL;
575 }
576
577 buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size);
578 if (!buf)
579 return -ENOMEM;
580
581 for (i = 0; i < size; i += 4)
582 *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i);
583
584 return 0;
585 }
586 EXPORT_SYMBOL(rtw_dump_reg);
587
rtw_vif_assoc_changed(struct rtw_vif * rtwvif,struct ieee80211_bss_conf * conf)588 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif,
589 struct ieee80211_bss_conf *conf)
590 {
591 struct ieee80211_vif *vif = NULL;
592
593 if (conf)
594 vif = container_of(conf, struct ieee80211_vif, bss_conf);
595
596 if (conf && vif->cfg.assoc) {
597 rtwvif->aid = vif->cfg.aid;
598 rtwvif->net_type = RTW_NET_MGD_LINKED;
599 } else {
600 rtwvif->aid = 0;
601 rtwvif->net_type = RTW_NET_NO_LINK;
602 }
603 }
604
rtw_reset_key_iter(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key,void * data)605 static void rtw_reset_key_iter(struct ieee80211_hw *hw,
606 struct ieee80211_vif *vif,
607 struct ieee80211_sta *sta,
608 struct ieee80211_key_conf *key,
609 void *data)
610 {
611 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
612 struct rtw_sec_desc *sec = &rtwdev->sec;
613
614 rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx);
615 }
616
rtw_reset_sta_iter(void * data,struct ieee80211_sta * sta)617 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta)
618 {
619 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
620
621 if (rtwdev->sta_cnt == 0) {
622 rtw_warn(rtwdev, "sta count before reset should not be 0\n");
623 return;
624 }
625 rtw_sta_remove(rtwdev, sta, false);
626 }
627
rtw_reset_vif_iter(void * data,u8 * mac,struct ieee80211_vif * vif)628 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
629 {
630 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
631 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
632
633 rtw_bf_disassoc(rtwdev, vif, NULL);
634 rtw_vif_assoc_changed(rtwvif, NULL);
635 rtw_txq_cleanup(rtwdev, vif->txq);
636 }
637
rtw_fw_recovery(struct rtw_dev * rtwdev)638 void rtw_fw_recovery(struct rtw_dev *rtwdev)
639 {
640 if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags))
641 ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work);
642 }
643
__fw_recovery_work(struct rtw_dev * rtwdev)644 static void __fw_recovery_work(struct rtw_dev *rtwdev)
645 {
646 int ret = 0;
647
648 set_bit(RTW_FLAG_RESTARTING, rtwdev->flags);
649 clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags);
650
651 ret = rtw_fwcd_prep(rtwdev);
652 if (ret)
653 goto free;
654 ret = rtw_fw_dump_crash_log(rtwdev);
655 if (ret)
656 goto free;
657 ret = rtw_chip_dump_fw_crash(rtwdev);
658 if (ret)
659 goto free;
660
661 rtw_fwcd_dump(rtwdev);
662 free:
663 rtw_fwcd_free(rtwdev, !!ret);
664 rtw_write8(rtwdev, REG_MCU_TST_CFG, 0);
665
666 WARN(1, "firmware crash, start reset and recover\n");
667
668 rcu_read_lock();
669 rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev);
670 rcu_read_unlock();
671 rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev);
672 rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev);
673 bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM);
674 rtw_enter_ips(rtwdev);
675 }
676
rtw_fw_recovery_work(struct work_struct * work)677 static void rtw_fw_recovery_work(struct work_struct *work)
678 {
679 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
680 fw_recovery_work);
681
682 mutex_lock(&rtwdev->mutex);
683 __fw_recovery_work(rtwdev);
684 mutex_unlock(&rtwdev->mutex);
685
686 ieee80211_restart_hw(rtwdev->hw);
687 }
688
689 struct rtw_txq_ba_iter_data {
690 };
691
rtw_txq_ba_iter(void * data,struct ieee80211_sta * sta)692 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)
693 {
694 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
695 int ret;
696 u8 tid;
697
698 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
699 while (tid != IEEE80211_NUM_TIDS) {
700 clear_bit(tid, si->tid_ba);
701 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
702 if (ret == -EINVAL) {
703 struct ieee80211_txq *txq;
704 struct rtw_txq *rtwtxq;
705
706 txq = sta->txq[tid];
707 rtwtxq = (struct rtw_txq *)txq->drv_priv;
708 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);
709 }
710
711 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
712 }
713 }
714
rtw_txq_ba_work(struct work_struct * work)715 static void rtw_txq_ba_work(struct work_struct *work)
716 {
717 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);
718 struct rtw_txq_ba_iter_data data;
719
720 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);
721 }
722
rtw_set_rx_freq_band(struct rtw_rx_pkt_stat * pkt_stat,u8 channel)723 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel)
724 {
725 if (IS_CH_2G_BAND(channel))
726 pkt_stat->band = NL80211_BAND_2GHZ;
727 else if (IS_CH_5G_BAND(channel))
728 pkt_stat->band = NL80211_BAND_5GHZ;
729 else
730 return;
731
732 pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band);
733 }
734 EXPORT_SYMBOL(rtw_set_rx_freq_band);
735
rtw_set_dtim_period(struct rtw_dev * rtwdev,int dtim_period)736 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period)
737 {
738 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE);
739 rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1);
740 }
741
rtw_update_channel(struct rtw_dev * rtwdev,u8 center_channel,u8 primary_channel,enum rtw_supported_band band,enum rtw_bandwidth bandwidth)742 void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel,
743 u8 primary_channel, enum rtw_supported_band band,
744 enum rtw_bandwidth bandwidth)
745 {
746 enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band);
747 struct rtw_hal *hal = &rtwdev->hal;
748 u8 *cch_by_bw = hal->cch_by_bw;
749 u32 center_freq, primary_freq;
750 enum rtw_sar_bands sar_band;
751 u8 primary_channel_idx;
752
753 center_freq = ieee80211_channel_to_frequency(center_channel, nl_band);
754 primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band);
755
756 /* assign the center channel used while 20M bw is selected */
757 cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel;
758
759 /* assign the center channel used while current bw is selected */
760 cch_by_bw[bandwidth] = center_channel;
761
762 switch (bandwidth) {
763 case RTW_CHANNEL_WIDTH_20:
764 default:
765 primary_channel_idx = RTW_SC_DONT_CARE;
766 break;
767 case RTW_CHANNEL_WIDTH_40:
768 if (primary_freq > center_freq)
769 primary_channel_idx = RTW_SC_20_UPPER;
770 else
771 primary_channel_idx = RTW_SC_20_LOWER;
772 break;
773 case RTW_CHANNEL_WIDTH_80:
774 if (primary_freq > center_freq) {
775 if (primary_freq - center_freq == 10)
776 primary_channel_idx = RTW_SC_20_UPPER;
777 else
778 primary_channel_idx = RTW_SC_20_UPMOST;
779
780 /* assign the center channel used
781 * while 40M bw is selected
782 */
783 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4;
784 } else {
785 if (center_freq - primary_freq == 10)
786 primary_channel_idx = RTW_SC_20_LOWER;
787 else
788 primary_channel_idx = RTW_SC_20_LOWEST;
789
790 /* assign the center channel used
791 * while 40M bw is selected
792 */
793 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4;
794 }
795 break;
796 }
797
798 switch (center_channel) {
799 case 1 ... 14:
800 sar_band = RTW_SAR_BAND_0;
801 break;
802 case 36 ... 64:
803 sar_band = RTW_SAR_BAND_1;
804 break;
805 case 100 ... 144:
806 sar_band = RTW_SAR_BAND_3;
807 break;
808 case 149 ... 177:
809 sar_band = RTW_SAR_BAND_4;
810 break;
811 default:
812 WARN(1, "unknown ch(%u) to SAR band\n", center_channel);
813 sar_band = RTW_SAR_BAND_0;
814 break;
815 }
816
817 hal->current_primary_channel_index = primary_channel_idx;
818 hal->current_band_width = bandwidth;
819 hal->primary_channel = primary_channel;
820 hal->current_channel = center_channel;
821 hal->current_band_type = band;
822 hal->sar_band = sar_band;
823 }
824
rtw_get_channel_params(struct cfg80211_chan_def * chandef,struct rtw_channel_params * chan_params)825 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
826 struct rtw_channel_params *chan_params)
827 {
828 struct ieee80211_channel *channel = chandef->chan;
829 enum nl80211_chan_width width = chandef->width;
830 u32 primary_freq, center_freq;
831 u8 center_chan;
832 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
833
834 center_chan = channel->hw_value;
835 primary_freq = channel->center_freq;
836 center_freq = chandef->center_freq1;
837
838 switch (width) {
839 case NL80211_CHAN_WIDTH_20_NOHT:
840 case NL80211_CHAN_WIDTH_20:
841 bandwidth = RTW_CHANNEL_WIDTH_20;
842 break;
843 case NL80211_CHAN_WIDTH_40:
844 bandwidth = RTW_CHANNEL_WIDTH_40;
845 if (primary_freq > center_freq)
846 center_chan -= 2;
847 else
848 center_chan += 2;
849 break;
850 case NL80211_CHAN_WIDTH_80:
851 bandwidth = RTW_CHANNEL_WIDTH_80;
852 if (primary_freq > center_freq) {
853 if (primary_freq - center_freq == 10)
854 center_chan -= 2;
855 else
856 center_chan -= 6;
857 } else {
858 if (center_freq - primary_freq == 10)
859 center_chan += 2;
860 else
861 center_chan += 6;
862 }
863 break;
864 default:
865 center_chan = 0;
866 break;
867 }
868
869 chan_params->center_chan = center_chan;
870 chan_params->bandwidth = bandwidth;
871 chan_params->primary_chan = channel->hw_value;
872 }
873
rtw_set_channel(struct rtw_dev * rtwdev)874 void rtw_set_channel(struct rtw_dev *rtwdev)
875 {
876 const struct rtw_chip_info *chip = rtwdev->chip;
877 struct ieee80211_hw *hw = rtwdev->hw;
878 struct rtw_hal *hal = &rtwdev->hal;
879 struct rtw_channel_params ch_param;
880 u8 center_chan, primary_chan, bandwidth, band;
881
882 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
883 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
884 return;
885
886 center_chan = ch_param.center_chan;
887 primary_chan = ch_param.primary_chan;
888 bandwidth = ch_param.bandwidth;
889 band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
890
891 rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth);
892
893 if (rtwdev->scan_info.op_chan)
894 rtw_store_op_chan(rtwdev, true);
895
896 chip->ops->set_channel(rtwdev, center_chan, bandwidth,
897 hal->current_primary_channel_index);
898
899 if (hal->current_band_type == RTW_BAND_5G) {
900 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
901 } else {
902 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
903 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
904 else
905 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
906 }
907
908 rtw_phy_set_tx_power_level(rtwdev, center_chan);
909
910 /* if the channel isn't set for scanning, we will do RF calibration
911 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration
912 * during scanning on each channel takes too long.
913 */
914 if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
915 rtwdev->need_rfk = true;
916 }
917
rtw_chip_prepare_tx(struct rtw_dev * rtwdev)918 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev)
919 {
920 const struct rtw_chip_info *chip = rtwdev->chip;
921
922 if (rtwdev->need_rfk) {
923 rtwdev->need_rfk = false;
924 chip->ops->phy_calibration(rtwdev);
925 }
926 }
927
rtw_vif_write_addr(struct rtw_dev * rtwdev,u32 start,u8 * addr)928 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
929 {
930 int i;
931
932 for (i = 0; i < ETH_ALEN; i++)
933 rtw_write8(rtwdev, start + i, addr[i]);
934 }
935
rtw_vif_port_config(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,u32 config)936 void rtw_vif_port_config(struct rtw_dev *rtwdev,
937 struct rtw_vif *rtwvif,
938 u32 config)
939 {
940 u32 addr, mask;
941
942 if (config & PORT_SET_MAC_ADDR) {
943 addr = rtwvif->conf->mac_addr.addr;
944 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
945 }
946 if (config & PORT_SET_BSSID) {
947 addr = rtwvif->conf->bssid.addr;
948 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
949 }
950 if (config & PORT_SET_NET_TYPE) {
951 addr = rtwvif->conf->net_type.addr;
952 mask = rtwvif->conf->net_type.mask;
953 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
954 }
955 if (config & PORT_SET_AID) {
956 addr = rtwvif->conf->aid.addr;
957 mask = rtwvif->conf->aid.mask;
958 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
959 }
960 if (config & PORT_SET_BCN_CTRL) {
961 addr = rtwvif->conf->bcn_ctrl.addr;
962 mask = rtwvif->conf->bcn_ctrl.mask;
963 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
964 }
965 }
966
hw_bw_cap_to_bitamp(u8 bw_cap)967 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
968 {
969 u8 bw = 0;
970
971 switch (bw_cap) {
972 case EFUSE_HW_CAP_IGNORE:
973 case EFUSE_HW_CAP_SUPP_BW80:
974 bw |= BIT(RTW_CHANNEL_WIDTH_80);
975 fallthrough;
976 case EFUSE_HW_CAP_SUPP_BW40:
977 bw |= BIT(RTW_CHANNEL_WIDTH_40);
978 fallthrough;
979 default:
980 bw |= BIT(RTW_CHANNEL_WIDTH_20);
981 break;
982 }
983
984 return bw;
985 }
986
rtw_hw_config_rf_ant_num(struct rtw_dev * rtwdev,u8 hw_ant_num)987 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
988 {
989 const struct rtw_chip_info *chip = rtwdev->chip;
990 struct rtw_hal *hal = &rtwdev->hal;
991
992 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
993 hw_ant_num >= hal->rf_path_num)
994 return;
995
996 switch (hw_ant_num) {
997 case 1:
998 hal->rf_type = RF_1T1R;
999 hal->rf_path_num = 1;
1000 if (!chip->fix_rf_phy_num)
1001 hal->rf_phy_num = hal->rf_path_num;
1002 hal->antenna_tx = BB_PATH_A;
1003 hal->antenna_rx = BB_PATH_A;
1004 break;
1005 default:
1006 WARN(1, "invalid hw configuration from efuse\n");
1007 break;
1008 }
1009 }
1010
get_vht_ra_mask(struct ieee80211_sta * sta)1011 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
1012 {
1013 u64 ra_mask = 0;
1014 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
1015 u8 vht_mcs_cap;
1016 int i, nss;
1017
1018 /* 4SS, every two bits for MCS7/8/9 */
1019 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
1020 vht_mcs_cap = mcs_map & 0x3;
1021 switch (vht_mcs_cap) {
1022 case 2: /* MCS9 */
1023 ra_mask |= 0x3ffULL << nss;
1024 break;
1025 case 1: /* MCS8 */
1026 ra_mask |= 0x1ffULL << nss;
1027 break;
1028 case 0: /* MCS7 */
1029 ra_mask |= 0x0ffULL << nss;
1030 break;
1031 default:
1032 break;
1033 }
1034 }
1035
1036 return ra_mask;
1037 }
1038
get_rate_id(u8 wireless_set,enum rtw_bandwidth bw_mode,u8 tx_num)1039 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
1040 {
1041 u8 rate_id = 0;
1042
1043 switch (wireless_set) {
1044 case WIRELESS_CCK:
1045 rate_id = RTW_RATEID_B_20M;
1046 break;
1047 case WIRELESS_OFDM:
1048 rate_id = RTW_RATEID_G;
1049 break;
1050 case WIRELESS_CCK | WIRELESS_OFDM:
1051 rate_id = RTW_RATEID_BG;
1052 break;
1053 case WIRELESS_OFDM | WIRELESS_HT:
1054 if (tx_num == 1)
1055 rate_id = RTW_RATEID_GN_N1SS;
1056 else if (tx_num == 2)
1057 rate_id = RTW_RATEID_GN_N2SS;
1058 else if (tx_num == 3)
1059 rate_id = RTW_RATEID_ARFR5_N_3SS;
1060 break;
1061 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
1062 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
1063 if (tx_num == 1)
1064 rate_id = RTW_RATEID_BGN_40M_1SS;
1065 else if (tx_num == 2)
1066 rate_id = RTW_RATEID_BGN_40M_2SS;
1067 else if (tx_num == 3)
1068 rate_id = RTW_RATEID_ARFR5_N_3SS;
1069 else if (tx_num == 4)
1070 rate_id = RTW_RATEID_ARFR7_N_4SS;
1071 } else {
1072 if (tx_num == 1)
1073 rate_id = RTW_RATEID_BGN_20M_1SS;
1074 else if (tx_num == 2)
1075 rate_id = RTW_RATEID_BGN_20M_2SS;
1076 else if (tx_num == 3)
1077 rate_id = RTW_RATEID_ARFR5_N_3SS;
1078 else if (tx_num == 4)
1079 rate_id = RTW_RATEID_ARFR7_N_4SS;
1080 }
1081 break;
1082 case WIRELESS_OFDM | WIRELESS_VHT:
1083 if (tx_num == 1)
1084 rate_id = RTW_RATEID_ARFR1_AC_1SS;
1085 else if (tx_num == 2)
1086 rate_id = RTW_RATEID_ARFR0_AC_2SS;
1087 else if (tx_num == 3)
1088 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1089 else if (tx_num == 4)
1090 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1091 break;
1092 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
1093 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
1094 if (tx_num == 1)
1095 rate_id = RTW_RATEID_ARFR1_AC_1SS;
1096 else if (tx_num == 2)
1097 rate_id = RTW_RATEID_ARFR0_AC_2SS;
1098 else if (tx_num == 3)
1099 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1100 else if (tx_num == 4)
1101 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1102 } else {
1103 if (tx_num == 1)
1104 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
1105 else if (tx_num == 2)
1106 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
1107 else if (tx_num == 3)
1108 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1109 else if (tx_num == 4)
1110 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1111 }
1112 break;
1113 default:
1114 break;
1115 }
1116
1117 return rate_id;
1118 }
1119
1120 #define RA_MASK_CCK_RATES 0x0000f
1121 #define RA_MASK_OFDM_RATES 0x00ff0
1122 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
1123 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
1124 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
1125 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
1126 RA_MASK_HT_RATES_2SS | \
1127 RA_MASK_HT_RATES_3SS)
1128 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
1129 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
1130 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
1131 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
1132 RA_MASK_VHT_RATES_2SS | \
1133 RA_MASK_VHT_RATES_3SS)
1134 #define RA_MASK_CCK_IN_BG 0x00005
1135 #define RA_MASK_CCK_IN_HT 0x00005
1136 #define RA_MASK_CCK_IN_VHT 0x00005
1137 #define RA_MASK_OFDM_IN_VHT 0x00010
1138 #define RA_MASK_OFDM_IN_HT_2G 0x00010
1139 #define RA_MASK_OFDM_IN_HT_5G 0x00030
1140
rtw_rate_mask_rssi(struct rtw_sta_info * si,u8 wireless_set)1141 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set)
1142 {
1143 u8 rssi_level = si->rssi_level;
1144
1145 if (wireless_set == WIRELESS_CCK)
1146 return 0xffffffffffffffffULL;
1147
1148 if (rssi_level == 0)
1149 return 0xffffffffffffffffULL;
1150 else if (rssi_level == 1)
1151 return 0xfffffffffffffff0ULL;
1152 else if (rssi_level == 2)
1153 return 0xffffffffffffefe0ULL;
1154 else if (rssi_level == 3)
1155 return 0xffffffffffffcfc0ULL;
1156 else if (rssi_level == 4)
1157 return 0xffffffffffff8f80ULL;
1158 else
1159 return 0xffffffffffff0f00ULL;
1160 }
1161
rtw_rate_mask_recover(u64 ra_mask,u64 ra_mask_bak)1162 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak)
1163 {
1164 if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0)
1165 ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1166
1167 if (ra_mask == 0)
1168 ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1169
1170 return ra_mask;
1171 }
1172
rtw_rate_mask_cfg(struct rtw_dev * rtwdev,struct rtw_sta_info * si,u64 ra_mask,bool is_vht_enable)1173 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1174 u64 ra_mask, bool is_vht_enable)
1175 {
1176 struct rtw_hal *hal = &rtwdev->hal;
1177 const struct cfg80211_bitrate_mask *mask = si->mask;
1178 u64 cfg_mask = GENMASK_ULL(63, 0);
1179 u8 band;
1180
1181 if (!si->use_cfg_mask)
1182 return ra_mask;
1183
1184 band = hal->current_band_type;
1185 if (band == RTW_BAND_2G) {
1186 band = NL80211_BAND_2GHZ;
1187 cfg_mask = mask->control[band].legacy;
1188 } else if (band == RTW_BAND_5G) {
1189 band = NL80211_BAND_5GHZ;
1190 cfg_mask = u64_encode_bits(mask->control[band].legacy,
1191 RA_MASK_OFDM_RATES);
1192 }
1193
1194 if (!is_vht_enable) {
1195 if (ra_mask & RA_MASK_HT_RATES_1SS)
1196 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],
1197 RA_MASK_HT_RATES_1SS);
1198 if (ra_mask & RA_MASK_HT_RATES_2SS)
1199 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],
1200 RA_MASK_HT_RATES_2SS);
1201 } else {
1202 if (ra_mask & RA_MASK_VHT_RATES_1SS)
1203 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],
1204 RA_MASK_VHT_RATES_1SS);
1205 if (ra_mask & RA_MASK_VHT_RATES_2SS)
1206 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],
1207 RA_MASK_VHT_RATES_2SS);
1208 }
1209
1210 ra_mask &= cfg_mask;
1211
1212 return ra_mask;
1213 }
1214
rtw_update_sta_info(struct rtw_dev * rtwdev,struct rtw_sta_info * si,bool reset_ra_mask)1215 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1216 bool reset_ra_mask)
1217 {
1218 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1219 struct ieee80211_sta *sta = si->sta;
1220 struct rtw_efuse *efuse = &rtwdev->efuse;
1221 struct rtw_hal *hal = &rtwdev->hal;
1222 u8 wireless_set;
1223 u8 bw_mode;
1224 u8 rate_id;
1225 u8 rf_type = RF_1T1R;
1226 u8 stbc_en = 0;
1227 u8 ldpc_en = 0;
1228 u8 tx_num = 1;
1229 u64 ra_mask = 0;
1230 u64 ra_mask_bak = 0;
1231 bool is_vht_enable = false;
1232 bool is_support_sgi = false;
1233
1234 if (sta->deflink.vht_cap.vht_supported) {
1235 is_vht_enable = true;
1236 ra_mask |= get_vht_ra_mask(sta);
1237 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
1238 stbc_en = VHT_STBC_EN;
1239 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
1240 ldpc_en = VHT_LDPC_EN;
1241 } else if (sta->deflink.ht_cap.ht_supported) {
1242 ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |
1243 (sta->deflink.ht_cap.mcs.rx_mask[0] << 12);
1244 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1245 stbc_en = HT_STBC_EN;
1246 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
1247 ldpc_en = HT_LDPC_EN;
1248 }
1249
1250 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
1251 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
1252
1253 if (hal->current_band_type == RTW_BAND_5G) {
1254 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;
1255 ra_mask_bak = ra_mask;
1256 if (sta->deflink.vht_cap.vht_supported) {
1257 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
1258 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
1259 } else if (sta->deflink.ht_cap.ht_supported) {
1260 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
1261 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
1262 } else {
1263 wireless_set = WIRELESS_OFDM;
1264 }
1265 dm_info->rrsr_val_init = RRSR_INIT_5G;
1266 } else if (hal->current_band_type == RTW_BAND_2G) {
1267 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ];
1268 ra_mask_bak = ra_mask;
1269 if (sta->deflink.vht_cap.vht_supported) {
1270 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
1271 RA_MASK_OFDM_IN_VHT;
1272 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1273 WIRELESS_HT | WIRELESS_VHT;
1274 } else if (sta->deflink.ht_cap.ht_supported) {
1275 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
1276 RA_MASK_OFDM_IN_HT_2G;
1277 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1278 WIRELESS_HT;
1279 #if defined(__linux__)
1280 } else if (sta->deflink.supp_rates[0] <= 0xf) {
1281 #elif defined(__FreeBSD__)
1282 } else if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] <= 0xf) {
1283 #endif
1284 wireless_set = WIRELESS_CCK;
1285 } else {
1286 ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG;
1287 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
1288 }
1289 dm_info->rrsr_val_init = RRSR_INIT_2G;
1290 } else {
1291 rtw_err(rtwdev, "Unknown band type\n");
1292 ra_mask_bak = ra_mask;
1293 wireless_set = 0;
1294 }
1295
1296 switch (sta->deflink.bandwidth) {
1297 case IEEE80211_STA_RX_BW_80:
1298 bw_mode = RTW_CHANNEL_WIDTH_80;
1299 is_support_sgi = sta->deflink.vht_cap.vht_supported &&
1300 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);
1301 break;
1302 case IEEE80211_STA_RX_BW_40:
1303 bw_mode = RTW_CHANNEL_WIDTH_40;
1304 is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1305 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40);
1306 break;
1307 default:
1308 bw_mode = RTW_CHANNEL_WIDTH_20;
1309 is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1310 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20);
1311 break;
1312 }
1313
1314 if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) {
1315 tx_num = 2;
1316 rf_type = RF_2T2R;
1317 } else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) {
1318 tx_num = 2;
1319 rf_type = RF_2T2R;
1320 }
1321
1322 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
1323
1324 ra_mask &= rtw_rate_mask_rssi(si, wireless_set);
1325 ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak);
1326 ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable);
1327
1328 si->bw_mode = bw_mode;
1329 si->stbc_en = stbc_en;
1330 si->ldpc_en = ldpc_en;
1331 si->rf_type = rf_type;
1332 si->sgi_enable = is_support_sgi;
1333 si->vht_enable = is_vht_enable;
1334 si->ra_mask = ra_mask;
1335 si->rate_id = rate_id;
1336
1337 rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask);
1338 }
1339
rtw_wait_firmware_completion(struct rtw_dev * rtwdev)1340 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev)
1341 {
1342 const struct rtw_chip_info *chip = rtwdev->chip;
1343 struct rtw_fw_state *fw;
1344
1345 fw = &rtwdev->fw;
1346 wait_for_completion(&fw->completion);
1347 if (!fw->firmware)
1348 return -EINVAL;
1349
1350 if (chip->wow_fw_name) {
1351 fw = &rtwdev->wow_fw;
1352 wait_for_completion(&fw->completion);
1353 if (!fw->firmware)
1354 return -EINVAL;
1355 }
1356
1357 return 0;
1358 }
1359
rtw_update_lps_deep_mode(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1360 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev,
1361 struct rtw_fw_state *fw)
1362 {
1363 const struct rtw_chip_info *chip = rtwdev->chip;
1364
1365 if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported ||
1366 !fw->feature)
1367 return LPS_DEEP_MODE_NONE;
1368
1369 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) &&
1370 rtw_fw_feature_check(fw, FW_FEATURE_PG))
1371 return LPS_DEEP_MODE_PG;
1372
1373 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) &&
1374 rtw_fw_feature_check(fw, FW_FEATURE_LCLK))
1375 return LPS_DEEP_MODE_LCLK;
1376
1377 return LPS_DEEP_MODE_NONE;
1378 }
1379
rtw_power_on(struct rtw_dev * rtwdev)1380 static int rtw_power_on(struct rtw_dev *rtwdev)
1381 {
1382 const struct rtw_chip_info *chip = rtwdev->chip;
1383 struct rtw_fw_state *fw = &rtwdev->fw;
1384 bool wifi_only;
1385 int ret;
1386
1387 ret = rtw_hci_setup(rtwdev);
1388 if (ret) {
1389 rtw_err(rtwdev, "failed to setup hci\n");
1390 goto err;
1391 }
1392
1393 /* power on MAC before firmware downloaded */
1394 ret = rtw_mac_power_on(rtwdev);
1395 if (ret) {
1396 rtw_err(rtwdev, "failed to power on mac\n");
1397 goto err;
1398 }
1399
1400 ret = rtw_wait_firmware_completion(rtwdev);
1401 if (ret) {
1402 rtw_err(rtwdev, "failed to wait firmware completion\n");
1403 goto err_off;
1404 }
1405
1406 ret = rtw_download_firmware(rtwdev, fw);
1407 if (ret) {
1408 rtw_err(rtwdev, "failed to download firmware\n");
1409 goto err_off;
1410 }
1411
1412 /* config mac after firmware downloaded */
1413 ret = rtw_mac_init(rtwdev);
1414 if (ret) {
1415 rtw_err(rtwdev, "failed to configure mac\n");
1416 goto err_off;
1417 }
1418
1419 chip->ops->phy_set_param(rtwdev);
1420
1421 ret = rtw_hci_start(rtwdev);
1422 if (ret) {
1423 rtw_err(rtwdev, "failed to start hci\n");
1424 goto err_off;
1425 }
1426
1427 /* send H2C after HCI has started */
1428 rtw_fw_send_general_info(rtwdev);
1429 rtw_fw_send_phydm_info(rtwdev);
1430
1431 wifi_only = !rtwdev->efuse.btcoex;
1432 rtw_coex_power_on_setting(rtwdev);
1433 rtw_coex_init_hw_config(rtwdev, wifi_only);
1434
1435 return 0;
1436
1437 err_off:
1438 rtw_mac_power_off(rtwdev);
1439
1440 err:
1441 return ret;
1442 }
1443
rtw_core_fw_scan_notify(struct rtw_dev * rtwdev,bool start)1444 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start)
1445 {
1446 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN))
1447 return;
1448
1449 if (start) {
1450 rtw_fw_scan_notify(rtwdev, true);
1451 } else {
1452 reinit_completion(&rtwdev->fw_scan_density);
1453 rtw_fw_scan_notify(rtwdev, false);
1454 if (!wait_for_completion_timeout(&rtwdev->fw_scan_density,
1455 SCAN_NOTIFY_TIMEOUT))
1456 rtw_warn(rtwdev, "firmware failed to report density after scan\n");
1457 }
1458 }
1459
rtw_core_scan_start(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,const u8 * mac_addr,bool hw_scan)1460 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,
1461 const u8 *mac_addr, bool hw_scan)
1462 {
1463 u32 config = 0;
1464 int ret = 0;
1465
1466 rtw_leave_lps(rtwdev);
1467
1468 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) {
1469 ret = rtw_leave_ips(rtwdev);
1470 if (ret) {
1471 rtw_err(rtwdev, "failed to leave idle state\n");
1472 return;
1473 }
1474 }
1475
1476 ether_addr_copy(rtwvif->mac_addr, mac_addr);
1477 config |= PORT_SET_MAC_ADDR;
1478 rtw_vif_port_config(rtwdev, rtwvif, config);
1479
1480 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START);
1481 rtw_core_fw_scan_notify(rtwdev, true);
1482
1483 set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1484 set_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1485 }
1486
rtw_core_scan_complete(struct rtw_dev * rtwdev,struct ieee80211_vif * vif,bool hw_scan)1487 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
1488 bool hw_scan)
1489 {
1490 struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL;
1491 u32 config = 0;
1492
1493 if (!rtwvif)
1494 return;
1495
1496 clear_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1497 clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1498
1499 rtw_core_fw_scan_notify(rtwdev, false);
1500
1501 ether_addr_copy(rtwvif->mac_addr, vif->addr);
1502 config |= PORT_SET_MAC_ADDR;
1503 rtw_vif_port_config(rtwdev, rtwvif, config);
1504
1505 rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH);
1506
1507 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
1508 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
1509 }
1510
rtw_core_start(struct rtw_dev * rtwdev)1511 int rtw_core_start(struct rtw_dev *rtwdev)
1512 {
1513 int ret;
1514
1515 ret = rtw_power_on(rtwdev);
1516 if (ret)
1517 return ret;
1518
1519 rtw_sec_enable_sec_engine(rtwdev);
1520
1521 rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw);
1522 rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw);
1523
1524 /* rcr reset after powered on */
1525 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
1526
1527 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
1528 RTW_WATCH_DOG_DELAY_TIME);
1529
1530 set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1531
1532 return 0;
1533 }
1534
rtw_power_off(struct rtw_dev * rtwdev)1535 static void rtw_power_off(struct rtw_dev *rtwdev)
1536 {
1537 rtw_hci_stop(rtwdev);
1538 rtw_coex_power_off_setting(rtwdev);
1539 rtw_mac_power_off(rtwdev);
1540 }
1541
rtw_core_stop(struct rtw_dev * rtwdev)1542 void rtw_core_stop(struct rtw_dev *rtwdev)
1543 {
1544 struct rtw_coex *coex = &rtwdev->coex;
1545
1546 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1547 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
1548
1549 mutex_unlock(&rtwdev->mutex);
1550
1551 cancel_work_sync(&rtwdev->c2h_work);
1552 cancel_work_sync(&rtwdev->update_beacon_work);
1553 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
1554 cancel_delayed_work_sync(&coex->bt_relink_work);
1555 cancel_delayed_work_sync(&coex->bt_reenable_work);
1556 cancel_delayed_work_sync(&coex->defreeze_work);
1557 cancel_delayed_work_sync(&coex->wl_remain_work);
1558 cancel_delayed_work_sync(&coex->bt_remain_work);
1559 cancel_delayed_work_sync(&coex->wl_connecting_work);
1560 cancel_delayed_work_sync(&coex->bt_multi_link_remain_work);
1561 cancel_delayed_work_sync(&coex->wl_ccklock_work);
1562
1563 mutex_lock(&rtwdev->mutex);
1564
1565 rtw_power_off(rtwdev);
1566 }
1567
rtw_init_ht_cap(struct rtw_dev * rtwdev,struct ieee80211_sta_ht_cap * ht_cap)1568 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
1569 struct ieee80211_sta_ht_cap *ht_cap)
1570 {
1571 const struct rtw_chip_info *chip = rtwdev->chip;
1572 struct rtw_efuse *efuse = &rtwdev->efuse;
1573
1574 ht_cap->ht_supported = true;
1575 ht_cap->cap = 0;
1576 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
1577 IEEE80211_HT_CAP_MAX_AMSDU |
1578 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
1579
1580 if (rtw_chip_has_rx_ldpc(rtwdev))
1581 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
1582 if (rtw_chip_has_tx_stbc(rtwdev))
1583 ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC;
1584
1585 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1586 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
1587 IEEE80211_HT_CAP_DSSSCCK40 |
1588 IEEE80211_HT_CAP_SGI_40;
1589 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1590 ht_cap->ampdu_density = chip->ampdu_density;
1591 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1592 if (efuse->hw_cap.nss > 1) {
1593 ht_cap->mcs.rx_mask[0] = 0xFF;
1594 ht_cap->mcs.rx_mask[1] = 0xFF;
1595 ht_cap->mcs.rx_mask[4] = 0x01;
1596 ht_cap->mcs.rx_highest = cpu_to_le16(300);
1597 } else {
1598 ht_cap->mcs.rx_mask[0] = 0xFF;
1599 ht_cap->mcs.rx_mask[1] = 0x00;
1600 ht_cap->mcs.rx_mask[4] = 0x01;
1601 ht_cap->mcs.rx_highest = cpu_to_le16(150);
1602 }
1603 }
1604
rtw_init_vht_cap(struct rtw_dev * rtwdev,struct ieee80211_sta_vht_cap * vht_cap)1605 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
1606 struct ieee80211_sta_vht_cap *vht_cap)
1607 {
1608 struct rtw_efuse *efuse = &rtwdev->efuse;
1609 u16 mcs_map;
1610 __le16 highest;
1611
1612 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1613 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1614 return;
1615
1616 vht_cap->vht_supported = true;
1617 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
1618 IEEE80211_VHT_CAP_SHORT_GI_80 |
1619 IEEE80211_VHT_CAP_RXSTBC_1 |
1620 IEEE80211_VHT_CAP_HTC_VHT |
1621 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
1622 0;
1623 if (rtwdev->hal.rf_path_num > 1)
1624 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
1625 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
1626 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
1627 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap <<
1628 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
1629
1630 if (rtw_chip_has_rx_ldpc(rtwdev))
1631 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
1632
1633 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
1634 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
1635 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
1636 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
1637 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
1638 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
1639 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
1640 if (efuse->hw_cap.nss > 1) {
1641 highest = cpu_to_le16(780);
1642 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
1643 } else {
1644 highest = cpu_to_le16(390);
1645 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
1646 }
1647
1648 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
1649 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
1650 vht_cap->vht_mcs.rx_highest = highest;
1651 vht_cap->vht_mcs.tx_highest = highest;
1652 }
1653
rtw_get_max_scan_ie_len(struct rtw_dev * rtwdev)1654 static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev)
1655 {
1656 u16 len;
1657
1658 len = rtwdev->chip->max_scan_ie_len;
1659
1660 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) &&
1661 rtwdev->chip->id == RTW_CHIP_TYPE_8822C)
1662 len = IEEE80211_MAX_DATA_LEN;
1663 else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM))
1664 len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE;
1665
1666 return len;
1667 }
1668
rtw_set_supported_band(struct ieee80211_hw * hw,const struct rtw_chip_info * chip)1669 static void rtw_set_supported_band(struct ieee80211_hw *hw,
1670 const struct rtw_chip_info *chip)
1671 {
1672 struct rtw_dev *rtwdev = hw->priv;
1673 struct ieee80211_supported_band *sband;
1674
1675 if (chip->band & RTW_BAND_2G) {
1676 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
1677 if (!sband)
1678 goto err_out;
1679 #if defined(__linux__)
1680 if (chip->ht_supported)
1681 #elif defined(__FreeBSD__)
1682 if (rtw_ht_support && chip->ht_supported)
1683 #endif
1684 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1685 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
1686 }
1687
1688 if (chip->band & RTW_BAND_5G) {
1689 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
1690 if (!sband)
1691 goto err_out;
1692 #if defined(__linux__)
1693 if (chip->ht_supported)
1694 #elif defined(__FreeBSD__)
1695 if (rtw_ht_support && chip->ht_supported)
1696 #endif
1697 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1698 #if defined(__linux__)
1699 if (chip->vht_supported)
1700 #elif defined(__FreeBSD__)
1701 if (rtw_vht_support && chip->vht_supported)
1702 #endif
1703 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
1704 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
1705 }
1706
1707 return;
1708
1709 err_out:
1710 rtw_err(rtwdev, "failed to set supported band\n");
1711 }
1712
rtw_unset_supported_band(struct ieee80211_hw * hw,const struct rtw_chip_info * chip)1713 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
1714 const struct rtw_chip_info *chip)
1715 {
1716 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
1717 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
1718 }
1719
rtw_vif_smps_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1720 static void rtw_vif_smps_iter(void *data, u8 *mac,
1721 struct ieee80211_vif *vif)
1722 {
1723 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
1724
1725 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
1726 return;
1727
1728 if (rtwdev->hal.txrx_1ss)
1729 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC);
1730 else
1731 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF);
1732 }
1733
rtw_set_txrx_1ss(struct rtw_dev * rtwdev,bool txrx_1ss)1734 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss)
1735 {
1736 const struct rtw_chip_info *chip = rtwdev->chip;
1737 struct rtw_hal *hal = &rtwdev->hal;
1738
1739 if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss)
1740 return;
1741
1742 rtwdev->hal.txrx_1ss = txrx_1ss;
1743 if (txrx_1ss)
1744 chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false);
1745 else
1746 chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx,
1747 hal->antenna_rx, false);
1748 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev);
1749 }
1750
__update_firmware_feature(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1751 static void __update_firmware_feature(struct rtw_dev *rtwdev,
1752 struct rtw_fw_state *fw)
1753 {
1754 u32 feature;
1755 const struct rtw_fw_hdr *fw_hdr =
1756 (const struct rtw_fw_hdr *)fw->firmware->data;
1757
1758 feature = le32_to_cpu(fw_hdr->feature);
1759 fw->feature = feature & FW_FEATURE_SIG ? feature : 0;
1760
1761 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C &&
1762 RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13))
1763 fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM;
1764 }
1765
__update_firmware_info(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1766 static void __update_firmware_info(struct rtw_dev *rtwdev,
1767 struct rtw_fw_state *fw)
1768 {
1769 const struct rtw_fw_hdr *fw_hdr =
1770 (const struct rtw_fw_hdr *)fw->firmware->data;
1771
1772 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver);
1773 fw->version = le16_to_cpu(fw_hdr->version);
1774 fw->sub_version = fw_hdr->subversion;
1775 fw->sub_index = fw_hdr->subindex;
1776
1777 __update_firmware_feature(rtwdev, fw);
1778 }
1779
__update_firmware_info_legacy(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1780 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev,
1781 struct rtw_fw_state *fw)
1782 {
1783 struct rtw_fw_hdr_legacy *legacy =
1784 #if defined(__linux__)
1785 (struct rtw_fw_hdr_legacy *)fw->firmware->data;
1786 #elif defined(__FreeBSD__)
1787 __DECONST(struct rtw_fw_hdr_legacy *, fw->firmware->data);
1788 #endif
1789
1790 fw->h2c_version = 0;
1791 fw->version = le16_to_cpu(legacy->version);
1792 fw->sub_version = legacy->subversion1;
1793 fw->sub_index = legacy->subversion2;
1794 }
1795
update_firmware_info(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1796 static void update_firmware_info(struct rtw_dev *rtwdev,
1797 struct rtw_fw_state *fw)
1798 {
1799 if (rtw_chip_wcpu_11n(rtwdev))
1800 __update_firmware_info_legacy(rtwdev, fw);
1801 else
1802 __update_firmware_info(rtwdev, fw);
1803 }
1804
rtw_load_firmware_cb(const struct firmware * firmware,void * context)1805 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
1806 {
1807 struct rtw_fw_state *fw = context;
1808 struct rtw_dev *rtwdev = fw->rtwdev;
1809
1810 if (!firmware || !firmware->data) {
1811 rtw_err(rtwdev, "failed to request firmware\n");
1812 complete_all(&fw->completion);
1813 return;
1814 }
1815
1816 fw->firmware = firmware;
1817 update_firmware_info(rtwdev, fw);
1818 complete_all(&fw->completion);
1819
1820 rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n",
1821 fw->type == RTW_WOWLAN_FW ? "WOW " : "",
1822 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version);
1823 }
1824
rtw_load_firmware(struct rtw_dev * rtwdev,enum rtw_fw_type type)1825 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type)
1826 {
1827 const char *fw_name;
1828 struct rtw_fw_state *fw;
1829 int ret;
1830
1831 switch (type) {
1832 case RTW_WOWLAN_FW:
1833 fw = &rtwdev->wow_fw;
1834 fw_name = rtwdev->chip->wow_fw_name;
1835 break;
1836
1837 case RTW_NORMAL_FW:
1838 fw = &rtwdev->fw;
1839 fw_name = rtwdev->chip->fw_name;
1840 break;
1841
1842 default:
1843 rtw_warn(rtwdev, "unsupported firmware type\n");
1844 return -ENOENT;
1845 }
1846
1847 fw->type = type;
1848 fw->rtwdev = rtwdev;
1849 init_completion(&fw->completion);
1850
1851 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
1852 GFP_KERNEL, fw, rtw_load_firmware_cb);
1853 if (ret) {
1854 rtw_err(rtwdev, "failed to async firmware request\n");
1855 return ret;
1856 }
1857
1858 return 0;
1859 }
1860
rtw_chip_parameter_setup(struct rtw_dev * rtwdev)1861 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
1862 {
1863 const struct rtw_chip_info *chip = rtwdev->chip;
1864 struct rtw_hal *hal = &rtwdev->hal;
1865 struct rtw_efuse *efuse = &rtwdev->efuse;
1866
1867 switch (rtw_hci_type(rtwdev)) {
1868 case RTW_HCI_TYPE_PCIE:
1869 rtwdev->hci.rpwm_addr = 0x03d9;
1870 rtwdev->hci.cpwm_addr = 0x03da;
1871 break;
1872 case RTW_HCI_TYPE_SDIO:
1873 rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1;
1874 rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2;
1875 break;
1876 case RTW_HCI_TYPE_USB:
1877 rtwdev->hci.rpwm_addr = 0xfe58;
1878 rtwdev->hci.cpwm_addr = 0xfe57;
1879 break;
1880 default:
1881 rtw_err(rtwdev, "unsupported hci type\n");
1882 return -EINVAL;
1883 }
1884
1885 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
1886 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
1887 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
1888 if (hal->chip_version & BIT_RF_TYPE_ID) {
1889 hal->rf_type = RF_2T2R;
1890 hal->rf_path_num = 2;
1891 hal->antenna_tx = BB_PATH_AB;
1892 hal->antenna_rx = BB_PATH_AB;
1893 } else {
1894 hal->rf_type = RF_1T1R;
1895 hal->rf_path_num = 1;
1896 hal->antenna_tx = BB_PATH_A;
1897 hal->antenna_rx = BB_PATH_A;
1898 }
1899 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num :
1900 hal->rf_path_num;
1901
1902 efuse->physical_size = chip->phy_efuse_size;
1903 efuse->logical_size = chip->log_efuse_size;
1904 efuse->protect_size = chip->ptct_efuse_size;
1905
1906 /* default use ack */
1907 rtwdev->hal.rcr |= BIT_VHT_DACK;
1908
1909 hal->bfee_sts_cap = 3;
1910
1911 return 0;
1912 }
1913
rtw_chip_efuse_enable(struct rtw_dev * rtwdev)1914 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
1915 {
1916 struct rtw_fw_state *fw = &rtwdev->fw;
1917 int ret;
1918
1919 ret = rtw_hci_setup(rtwdev);
1920 if (ret) {
1921 rtw_err(rtwdev, "failed to setup hci\n");
1922 goto err;
1923 }
1924
1925 ret = rtw_mac_power_on(rtwdev);
1926 if (ret) {
1927 rtw_err(rtwdev, "failed to power on mac\n");
1928 goto err;
1929 }
1930
1931 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
1932
1933 wait_for_completion(&fw->completion);
1934 if (!fw->firmware) {
1935 ret = -EINVAL;
1936 rtw_err(rtwdev, "failed to load firmware\n");
1937 goto err;
1938 }
1939
1940 ret = rtw_download_firmware(rtwdev, fw);
1941 if (ret) {
1942 rtw_err(rtwdev, "failed to download firmware\n");
1943 goto err_off;
1944 }
1945
1946 return 0;
1947
1948 err_off:
1949 rtw_mac_power_off(rtwdev);
1950
1951 err:
1952 return ret;
1953 }
1954
rtw_dump_hw_feature(struct rtw_dev * rtwdev)1955 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
1956 {
1957 struct rtw_efuse *efuse = &rtwdev->efuse;
1958 u8 hw_feature[HW_FEATURE_LEN];
1959 u8 id;
1960 u8 bw;
1961 int i;
1962
1963 id = rtw_read8(rtwdev, REG_C2HEVT);
1964 if (id != C2H_HW_FEATURE_REPORT) {
1965 rtw_err(rtwdev, "failed to read hw feature report\n");
1966 return -EBUSY;
1967 }
1968
1969 for (i = 0; i < HW_FEATURE_LEN; i++)
1970 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1971
1972 rtw_write8(rtwdev, REG_C2HEVT, 0);
1973
1974 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1975 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1976 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1977 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1978 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1979 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1980
1981 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1982
1983 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1984 efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1985 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1986
1987 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1988 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1989 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1990 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1991
1992 return 0;
1993 }
1994
rtw_chip_efuse_disable(struct rtw_dev * rtwdev)1995 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1996 {
1997 rtw_hci_stop(rtwdev);
1998 rtw_mac_power_off(rtwdev);
1999 }
2000
rtw_chip_efuse_info_setup(struct rtw_dev * rtwdev)2001 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
2002 {
2003 struct rtw_efuse *efuse = &rtwdev->efuse;
2004 int ret;
2005
2006 mutex_lock(&rtwdev->mutex);
2007
2008 /* power on mac to read efuse */
2009 ret = rtw_chip_efuse_enable(rtwdev);
2010 if (ret)
2011 goto out_unlock;
2012
2013 ret = rtw_parse_efuse_map(rtwdev);
2014 if (ret)
2015 goto out_disable;
2016
2017 ret = rtw_dump_hw_feature(rtwdev);
2018 if (ret)
2019 goto out_disable;
2020
2021 ret = rtw_check_supported_rfe(rtwdev);
2022 if (ret)
2023 goto out_disable;
2024
2025 if (efuse->crystal_cap == 0xff)
2026 efuse->crystal_cap = 0;
2027 if (efuse->pa_type_2g == 0xff)
2028 efuse->pa_type_2g = 0;
2029 if (efuse->pa_type_5g == 0xff)
2030 efuse->pa_type_5g = 0;
2031 if (efuse->lna_type_2g == 0xff)
2032 efuse->lna_type_2g = 0;
2033 if (efuse->lna_type_5g == 0xff)
2034 efuse->lna_type_5g = 0;
2035 if (efuse->channel_plan == 0xff)
2036 efuse->channel_plan = 0x7f;
2037 if (efuse->rf_board_option == 0xff)
2038 efuse->rf_board_option = 0;
2039 if (efuse->bt_setting & BIT(0))
2040 efuse->share_ant = true;
2041 if (efuse->regd == 0xff)
2042 efuse->regd = 0;
2043 if (efuse->tx_bb_swing_setting_2g == 0xff)
2044 efuse->tx_bb_swing_setting_2g = 0;
2045 if (efuse->tx_bb_swing_setting_5g == 0xff)
2046 efuse->tx_bb_swing_setting_5g = 0;
2047
2048 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
2049 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
2050 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
2051 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
2052 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
2053
2054 if (!is_valid_ether_addr(efuse->addr)) {
2055 eth_random_addr(efuse->addr);
2056 dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n");
2057 }
2058
2059 out_disable:
2060 rtw_chip_efuse_disable(rtwdev);
2061
2062 out_unlock:
2063 mutex_unlock(&rtwdev->mutex);
2064 return ret;
2065 }
2066
rtw_chip_board_info_setup(struct rtw_dev * rtwdev)2067 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
2068 {
2069 struct rtw_hal *hal = &rtwdev->hal;
2070 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
2071
2072 if (!rfe_def)
2073 return -ENODEV;
2074
2075 rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type);
2076
2077 rtw_phy_init_tx_power(rtwdev);
2078 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
2079 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
2080 rtw_phy_tx_power_by_rate_config(hal);
2081 rtw_phy_tx_power_limit_config(hal);
2082
2083 return 0;
2084 }
2085
rtw_chip_info_setup(struct rtw_dev * rtwdev)2086 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
2087 {
2088 int ret;
2089
2090 ret = rtw_chip_parameter_setup(rtwdev);
2091 if (ret) {
2092 rtw_err(rtwdev, "failed to setup chip parameters\n");
2093 goto err_out;
2094 }
2095
2096 ret = rtw_chip_efuse_info_setup(rtwdev);
2097 if (ret) {
2098 rtw_err(rtwdev, "failed to setup chip efuse info\n");
2099 goto err_out;
2100 }
2101
2102 ret = rtw_chip_board_info_setup(rtwdev);
2103 if (ret) {
2104 rtw_err(rtwdev, "failed to setup chip board info\n");
2105 goto err_out;
2106 }
2107
2108 return 0;
2109
2110 err_out:
2111 return ret;
2112 }
2113 EXPORT_SYMBOL(rtw_chip_info_setup);
2114
rtw_stats_init(struct rtw_dev * rtwdev)2115 static void rtw_stats_init(struct rtw_dev *rtwdev)
2116 {
2117 struct rtw_traffic_stats *stats = &rtwdev->stats;
2118 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
2119 int i;
2120
2121 ewma_tp_init(&stats->tx_ewma_tp);
2122 ewma_tp_init(&stats->rx_ewma_tp);
2123
2124 for (i = 0; i < RTW_EVM_NUM; i++)
2125 ewma_evm_init(&dm_info->ewma_evm[i]);
2126 for (i = 0; i < RTW_SNR_NUM; i++)
2127 ewma_snr_init(&dm_info->ewma_snr[i]);
2128 }
2129
rtw_core_init(struct rtw_dev * rtwdev)2130 int rtw_core_init(struct rtw_dev *rtwdev)
2131 {
2132 const struct rtw_chip_info *chip = rtwdev->chip;
2133 struct rtw_coex *coex = &rtwdev->coex;
2134 int ret;
2135
2136 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
2137 INIT_LIST_HEAD(&rtwdev->txqs);
2138
2139 timer_setup(&rtwdev->tx_report.purge_timer,
2140 rtw_tx_report_purge_timer, 0);
2141 rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
2142 if (!rtwdev->tx_wq) {
2143 rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n");
2144 return -ENOMEM;
2145 }
2146
2147 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
2148 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
2149 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
2150 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
2151 INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work);
2152 INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work);
2153 INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work);
2154 INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work,
2155 rtw_coex_bt_multi_link_remain_work);
2156 INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work);
2157 INIT_WORK(&rtwdev->tx_work, rtw_tx_work);
2158 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
2159 INIT_WORK(&rtwdev->ips_work, rtw_ips_work);
2160 INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work);
2161 INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work);
2162 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);
2163 skb_queue_head_init(&rtwdev->c2h_queue);
2164 skb_queue_head_init(&rtwdev->coex.queue);
2165 skb_queue_head_init(&rtwdev->tx_report.queue);
2166
2167 spin_lock_init(&rtwdev->txq_lock);
2168 spin_lock_init(&rtwdev->tx_report.q_lock);
2169
2170 mutex_init(&rtwdev->mutex);
2171 mutex_init(&rtwdev->hal.tx_power_mutex);
2172
2173 init_waitqueue_head(&rtwdev->coex.wait);
2174 init_completion(&rtwdev->lps_leave_check);
2175 init_completion(&rtwdev->fw_scan_density);
2176
2177 rtwdev->sec.total_cam_num = 32;
2178 rtwdev->hal.current_channel = 1;
2179 rtwdev->dm_info.fix_rate = U8_MAX;
2180 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
2181
2182 rtw_stats_init(rtwdev);
2183
2184 /* default rx filter setting */
2185 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
2186 BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
2187 BIT_AB | BIT_AM | BIT_APM;
2188
2189 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW);
2190 if (ret) {
2191 rtw_warn(rtwdev, "no firmware loaded\n");
2192 goto out;
2193 }
2194
2195 if (chip->wow_fw_name) {
2196 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW);
2197 if (ret) {
2198 rtw_warn(rtwdev, "no wow firmware loaded\n");
2199 wait_for_completion(&rtwdev->fw.completion);
2200 if (rtwdev->fw.firmware)
2201 release_firmware(rtwdev->fw.firmware);
2202 goto out;
2203 }
2204 }
2205
2206 #if defined(__FreeBSD__)
2207 rtw_wait_firmware_completion(rtwdev);
2208 #endif
2209
2210 return 0;
2211
2212 out:
2213 destroy_workqueue(rtwdev->tx_wq);
2214 return ret;
2215 }
2216 EXPORT_SYMBOL(rtw_core_init);
2217
rtw_core_deinit(struct rtw_dev * rtwdev)2218 void rtw_core_deinit(struct rtw_dev *rtwdev)
2219 {
2220 struct rtw_fw_state *fw = &rtwdev->fw;
2221 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw;
2222 struct rtw_rsvd_page *rsvd_pkt, *tmp;
2223 unsigned long flags;
2224
2225 rtw_wait_firmware_completion(rtwdev);
2226
2227 if (fw->firmware)
2228 release_firmware(fw->firmware);
2229
2230 if (wow_fw->firmware)
2231 release_firmware(wow_fw->firmware);
2232
2233 destroy_workqueue(rtwdev->tx_wq);
2234 timer_delete_sync(&rtwdev->tx_report.purge_timer);
2235 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
2236 skb_queue_purge(&rtwdev->tx_report.queue);
2237 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
2238 skb_queue_purge(&rtwdev->coex.queue);
2239 skb_queue_purge(&rtwdev->c2h_queue);
2240
2241 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,
2242 build_list) {
2243 list_del(&rsvd_pkt->build_list);
2244 kfree(rsvd_pkt);
2245 }
2246
2247 mutex_destroy(&rtwdev->mutex);
2248 mutex_destroy(&rtwdev->hal.tx_power_mutex);
2249 }
2250 EXPORT_SYMBOL(rtw_core_deinit);
2251
rtw_register_hw(struct rtw_dev * rtwdev,struct ieee80211_hw * hw)2252 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2253 {
2254 bool sta_mode_only = rtwdev->hci.type == RTW_HCI_TYPE_SDIO;
2255 struct rtw_hal *hal = &rtwdev->hal;
2256 int max_tx_headroom = 0;
2257 int ret;
2258
2259 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
2260
2261 if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO)
2262 max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN;
2263
2264 hw->extra_tx_headroom = max_tx_headroom;
2265 hw->queues = IEEE80211_NUM_ACS;
2266 hw->txq_data_size = sizeof(struct rtw_txq);
2267 hw->sta_data_size = sizeof(struct rtw_sta_info);
2268 hw->vif_data_size = sizeof(struct rtw_vif);
2269
2270 ieee80211_hw_set(hw, SIGNAL_DBM);
2271 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
2272 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2273 ieee80211_hw_set(hw, MFP_CAPABLE);
2274 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2275 ieee80211_hw_set(hw, SUPPORTS_PS);
2276 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
2277 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
2278 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
2279 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2280 ieee80211_hw_set(hw, TX_AMSDU);
2281 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
2282
2283 if (sta_mode_only)
2284 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
2285 else
2286 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2287 BIT(NL80211_IFTYPE_AP) |
2288 BIT(NL80211_IFTYPE_ADHOC);
2289 hw->wiphy->available_antennas_tx = hal->antenna_tx;
2290 hw->wiphy->available_antennas_rx = hal->antenna_rx;
2291
2292 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
2293 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
2294
2295 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
2296 hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS;
2297 hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev);
2298
2299 if (!sta_mode_only && rtwdev->chip->id == RTW_CHIP_TYPE_8822C) {
2300 hw->wiphy->iface_combinations = rtw_iface_combs;
2301 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs);
2302 }
2303
2304 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
2305 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);
2306 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
2307
2308 #ifdef CONFIG_PM
2309 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
2310 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids;
2311 #endif
2312 rtw_set_supported_band(hw, rtwdev->chip);
2313 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
2314
2315 hw->wiphy->sar_capa = &rtw_sar_capa;
2316
2317 ret = rtw_regd_init(rtwdev);
2318 if (ret) {
2319 rtw_err(rtwdev, "failed to init regd\n");
2320 return ret;
2321 }
2322
2323 ret = ieee80211_register_hw(hw);
2324 if (ret) {
2325 rtw_err(rtwdev, "failed to register hw\n");
2326 return ret;
2327 }
2328
2329 ret = rtw_regd_hint(rtwdev);
2330 if (ret) {
2331 rtw_err(rtwdev, "failed to hint regd\n");
2332 return ret;
2333 }
2334
2335 rtw_debugfs_init(rtwdev);
2336
2337 rtwdev->bf_info.bfer_mu_cnt = 0;
2338 rtwdev->bf_info.bfer_su_cnt = 0;
2339
2340 return 0;
2341 }
2342 EXPORT_SYMBOL(rtw_register_hw);
2343
rtw_unregister_hw(struct rtw_dev * rtwdev,struct ieee80211_hw * hw)2344 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2345 {
2346 const struct rtw_chip_info *chip = rtwdev->chip;
2347
2348 ieee80211_unregister_hw(hw);
2349 rtw_unset_supported_band(hw, chip);
2350 }
2351 EXPORT_SYMBOL(rtw_unregister_hw);
2352
2353 static
rtw_swap_reg_nbytes(struct rtw_dev * rtwdev,const struct rtw_hw_reg * reg1,const struct rtw_hw_reg * reg2,u8 nbytes)2354 void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,
2355 const struct rtw_hw_reg *reg2, u8 nbytes)
2356 {
2357 u8 i;
2358
2359 for (i = 0; i < nbytes; i++) {
2360 u8 v1 = rtw_read8(rtwdev, reg1->addr + i);
2361 u8 v2 = rtw_read8(rtwdev, reg2->addr + i);
2362
2363 rtw_write8(rtwdev, reg1->addr + i, v2);
2364 rtw_write8(rtwdev, reg2->addr + i, v1);
2365 }
2366 }
2367
2368 static
rtw_swap_reg_mask(struct rtw_dev * rtwdev,const struct rtw_hw_reg * reg1,const struct rtw_hw_reg * reg2)2369 void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,
2370 const struct rtw_hw_reg *reg2)
2371 {
2372 u32 v1, v2;
2373
2374 v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask);
2375 v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask);
2376 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1);
2377 rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2);
2378 }
2379
2380 struct rtw_iter_port_switch_data {
2381 struct rtw_dev *rtwdev;
2382 struct rtw_vif *rtwvif_ap;
2383 };
2384
rtw_port_switch_iter(void * data,struct ieee80211_vif * vif)2385 static void rtw_port_switch_iter(void *data, struct ieee80211_vif *vif)
2386 {
2387 struct rtw_iter_port_switch_data *iter_data = data;
2388 struct rtw_dev *rtwdev = iter_data->rtwdev;
2389 struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv;
2390 struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap;
2391 const struct rtw_hw_reg *reg1, *reg2;
2392
2393 if (rtwvif_target->port != RTW_PORT_0)
2394 return;
2395
2396 rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n",
2397 rtwvif_ap->port, rtwvif_target->port);
2398
2399 /* Leave LPS so the value swapped are not in PS mode */
2400 rtw_leave_lps(rtwdev);
2401
2402 reg1 = &rtwvif_ap->conf->net_type;
2403 reg2 = &rtwvif_target->conf->net_type;
2404 rtw_swap_reg_mask(rtwdev, reg1, reg2);
2405
2406 reg1 = &rtwvif_ap->conf->mac_addr;
2407 reg2 = &rtwvif_target->conf->mac_addr;
2408 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);
2409
2410 reg1 = &rtwvif_ap->conf->bssid;
2411 reg2 = &rtwvif_target->conf->bssid;
2412 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);
2413
2414 reg1 = &rtwvif_ap->conf->bcn_ctrl;
2415 reg2 = &rtwvif_target->conf->bcn_ctrl;
2416 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1);
2417
2418 swap(rtwvif_target->port, rtwvif_ap->port);
2419 swap(rtwvif_target->conf, rtwvif_ap->conf);
2420
2421 rtw_fw_default_port(rtwdev, rtwvif_target);
2422 }
2423
rtw_core_port_switch(struct rtw_dev * rtwdev,struct ieee80211_vif * vif)2424 void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif)
2425 {
2426 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
2427 struct rtw_iter_port_switch_data iter_data;
2428
2429 if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0)
2430 return;
2431
2432 iter_data.rtwdev = rtwdev;
2433 iter_data.rtwvif_ap = rtwvif;
2434 rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data);
2435 }
2436
rtw_check_sta_active_iter(void * data,struct ieee80211_vif * vif)2437 static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif)
2438 {
2439 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
2440 bool *active = data;
2441
2442 if (*active)
2443 return;
2444
2445 if (vif->type != NL80211_IFTYPE_STATION)
2446 return;
2447
2448 if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid))
2449 *active = true;
2450 }
2451
rtw_core_check_sta_active(struct rtw_dev * rtwdev)2452 bool rtw_core_check_sta_active(struct rtw_dev *rtwdev)
2453 {
2454 bool sta_active = false;
2455
2456 rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active);
2457
2458 return rtwdev->ap_active || sta_active;
2459 }
2460
rtw_core_enable_beacon(struct rtw_dev * rtwdev,bool enable)2461 void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable)
2462 {
2463 if (!rtwdev->ap_active)
2464 return;
2465
2466 if (enable) {
2467 rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
2468 rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);
2469 } else {
2470 rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
2471 rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);
2472 }
2473 }
2474
2475 MODULE_AUTHOR("Realtek Corporation");
2476 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
2477 MODULE_LICENSE("Dual BSD/GPL");
2478