1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
3 */
4
5 #if defined(__FreeBSD__)
6 #define LINUXKPI_PARAM_PREFIX rtw88_
7 #endif
8
9 #include <linux/devcoredump.h>
10
11 #include "main.h"
12 #include "regd.h"
13 #include "fw.h"
14 #include "ps.h"
15 #include "sec.h"
16 #include "mac.h"
17 #include "coex.h"
18 #include "phy.h"
19 #include "reg.h"
20 #include "efuse.h"
21 #include "tx.h"
22 #include "debug.h"
23 #include "bf.h"
24 #include "sar.h"
25 #include "sdio.h"
26 #include "led.h"
27
28 bool rtw_disable_lps_deep_mode;
29 EXPORT_SYMBOL(rtw_disable_lps_deep_mode);
30 bool rtw_bf_support = true;
31 unsigned int rtw_debug_mask;
32 EXPORT_SYMBOL(rtw_debug_mask);
33 /* EDCCA is enabled during normal behavior. For debugging purpose in
34 * a noisy environment, it can be disabled via edcca debugfs. Because
35 * all rtw88 devices will probably be affected if environment is noisy,
36 * rtw_edcca_enabled is just declared by driver instead of by device.
37 * So, turning it off will take effect for all rtw88 devices before
38 * there is a tough reason to maintain rtw_edcca_enabled by device.
39 */
40 bool rtw_edcca_enabled = true;
41
42 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644);
43 module_param_named(support_bf, rtw_bf_support, bool, 0644);
44 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
45
46 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS");
47 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support");
48 MODULE_PARM_DESC(debug_mask, "Debugging mask");
49
50 #if defined(__FreeBSD__)
51 static bool rtw_ht_support = false;
52 module_param_named(support_ht, rtw_ht_support, bool, 0644);
53 MODULE_PARM_DESC(support_ht, "Set to Y to enable HT support");
54
55 static bool rtw_vht_support = false;
56 module_param_named(support_vht, rtw_vht_support, bool, 0644);
57 MODULE_PARM_DESC(support_vht, "Set to Y to enable VHT support");
58 #endif
59
60 #if defined(__FreeBSD__)
61 /* Macros based on rtw89::core.c. */
62 #define RTW88_DEF_CHAN(_freq, _hw_val, _flags, _band) \
63 { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, }
64 #define RTW88_DEF_CHAN_2G(_freq, _hw_val) \
65 RTW88_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ)
66 #define RTW88_DEF_CHAN_5G(_freq, _hw_val) \
67 RTW88_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ)
68 #define RTW88_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val) \
69 RTW88_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ)
70
71 static struct ieee80211_channel rtw_channeltable_2g[] = {
72 RTW88_DEF_CHAN_2G(2412, 1),
73 RTW88_DEF_CHAN_2G(2417, 2),
74 RTW88_DEF_CHAN_2G(2422, 3),
75 RTW88_DEF_CHAN_2G(2427, 4),
76 RTW88_DEF_CHAN_2G(2432, 5),
77 RTW88_DEF_CHAN_2G(2437, 6),
78 RTW88_DEF_CHAN_2G(2442, 7),
79 RTW88_DEF_CHAN_2G(2447, 8),
80 RTW88_DEF_CHAN_2G(2452, 9),
81 RTW88_DEF_CHAN_2G(2457, 10),
82 RTW88_DEF_CHAN_2G(2462, 11),
83 RTW88_DEF_CHAN_2G(2467, 12),
84 RTW88_DEF_CHAN_2G(2472, 13),
85 RTW88_DEF_CHAN_2G(2484, 14),
86 };
87
88 static struct ieee80211_channel rtw_channeltable_5g[] = {
89 RTW88_DEF_CHAN_5G(5180, 36),
90 RTW88_DEF_CHAN_5G(5200, 40),
91 RTW88_DEF_CHAN_5G(5220, 44),
92 RTW88_DEF_CHAN_5G(5240, 48),
93 RTW88_DEF_CHAN_5G(5260, 52),
94 RTW88_DEF_CHAN_5G(5280, 56),
95 RTW88_DEF_CHAN_5G(5300, 60),
96 RTW88_DEF_CHAN_5G(5320, 64),
97 RTW88_DEF_CHAN_5G(5500, 100),
98 RTW88_DEF_CHAN_5G(5520, 104),
99 RTW88_DEF_CHAN_5G(5540, 108),
100 RTW88_DEF_CHAN_5G(5560, 112),
101 RTW88_DEF_CHAN_5G(5580, 116),
102 RTW88_DEF_CHAN_5G(5600, 120),
103 RTW88_DEF_CHAN_5G(5620, 124),
104 RTW88_DEF_CHAN_5G(5640, 128),
105 RTW88_DEF_CHAN_5G(5660, 132),
106 RTW88_DEF_CHAN_5G(5680, 136),
107 RTW88_DEF_CHAN_5G(5700, 140),
108 RTW88_DEF_CHAN_5G(5720, 144),
109 RTW88_DEF_CHAN_5G(5745, 149),
110 RTW88_DEF_CHAN_5G(5765, 153),
111 RTW88_DEF_CHAN_5G(5785, 157),
112 RTW88_DEF_CHAN_5G(5805, 161),
113 RTW88_DEF_CHAN_5G_NO_HT40MINUS(5825, 165),
114 };
115 #elif deifned(__linux__)
116 static struct ieee80211_channel rtw_channeltable_2g[] = {
117 {.center_freq = 2412, .hw_value = 1,},
118 {.center_freq = 2417, .hw_value = 2,},
119 {.center_freq = 2422, .hw_value = 3,},
120 {.center_freq = 2427, .hw_value = 4,},
121 {.center_freq = 2432, .hw_value = 5,},
122 {.center_freq = 2437, .hw_value = 6,},
123 {.center_freq = 2442, .hw_value = 7,},
124 {.center_freq = 2447, .hw_value = 8,},
125 {.center_freq = 2452, .hw_value = 9,},
126 {.center_freq = 2457, .hw_value = 10,},
127 {.center_freq = 2462, .hw_value = 11,},
128 {.center_freq = 2467, .hw_value = 12,},
129 {.center_freq = 2472, .hw_value = 13,},
130 {.center_freq = 2484, .hw_value = 14,},
131 };
132
133 static struct ieee80211_channel rtw_channeltable_5g[] = {
134 {.center_freq = 5180, .hw_value = 36,},
135 {.center_freq = 5200, .hw_value = 40,},
136 {.center_freq = 5220, .hw_value = 44,},
137 {.center_freq = 5240, .hw_value = 48,},
138 {.center_freq = 5260, .hw_value = 52,},
139 {.center_freq = 5280, .hw_value = 56,},
140 {.center_freq = 5300, .hw_value = 60,},
141 {.center_freq = 5320, .hw_value = 64,},
142 {.center_freq = 5500, .hw_value = 100,},
143 {.center_freq = 5520, .hw_value = 104,},
144 {.center_freq = 5540, .hw_value = 108,},
145 {.center_freq = 5560, .hw_value = 112,},
146 {.center_freq = 5580, .hw_value = 116,},
147 {.center_freq = 5600, .hw_value = 120,},
148 {.center_freq = 5620, .hw_value = 124,},
149 {.center_freq = 5640, .hw_value = 128,},
150 {.center_freq = 5660, .hw_value = 132,},
151 {.center_freq = 5680, .hw_value = 136,},
152 {.center_freq = 5700, .hw_value = 140,},
153 {.center_freq = 5720, .hw_value = 144,},
154 {.center_freq = 5745, .hw_value = 149,},
155 {.center_freq = 5765, .hw_value = 153,},
156 {.center_freq = 5785, .hw_value = 157,},
157 {.center_freq = 5805, .hw_value = 161,},
158 {.center_freq = 5825, .hw_value = 165,
159 .flags = IEEE80211_CHAN_NO_HT40MINUS},
160 };
161 #endif
162
163 static struct ieee80211_rate rtw_ratetable[] = {
164 {.bitrate = 10, .hw_value = 0x00,},
165 {.bitrate = 20, .hw_value = 0x01,},
166 {.bitrate = 55, .hw_value = 0x02,},
167 {.bitrate = 110, .hw_value = 0x03,},
168 {.bitrate = 60, .hw_value = 0x04,},
169 {.bitrate = 90, .hw_value = 0x05,},
170 {.bitrate = 120, .hw_value = 0x06,},
171 {.bitrate = 180, .hw_value = 0x07,},
172 {.bitrate = 240, .hw_value = 0x08,},
173 {.bitrate = 360, .hw_value = 0x09,},
174 {.bitrate = 480, .hw_value = 0x0a,},
175 {.bitrate = 540, .hw_value = 0x0b,},
176 };
177
178 static const struct ieee80211_iface_limit rtw_iface_limits[] = {
179 {
180 .max = 1,
181 .types = BIT(NL80211_IFTYPE_STATION),
182 },
183 {
184 .max = 1,
185 .types = BIT(NL80211_IFTYPE_AP),
186 }
187 };
188
189 static const struct ieee80211_iface_combination rtw_iface_combs[] = {
190 {
191 .limits = rtw_iface_limits,
192 .n_limits = ARRAY_SIZE(rtw_iface_limits),
193 .max_interfaces = 2,
194 .num_different_channels = 1,
195 }
196 };
197
rtw_desc_to_bitrate(u8 desc_rate)198 u16 rtw_desc_to_bitrate(u8 desc_rate)
199 {
200 struct ieee80211_rate rate;
201
202 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))
203 return 0;
204
205 rate = rtw_ratetable[desc_rate];
206
207 return rate.bitrate;
208 }
209
210 static struct ieee80211_supported_band rtw_band_2ghz = {
211 .band = NL80211_BAND_2GHZ,
212
213 .channels = rtw_channeltable_2g,
214 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
215
216 .bitrates = rtw_ratetable,
217 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
218
219 .ht_cap = {0},
220 .vht_cap = {0},
221 };
222
223 static struct ieee80211_supported_band rtw_band_5ghz = {
224 .band = NL80211_BAND_5GHZ,
225
226 .channels = rtw_channeltable_5g,
227 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
228
229 /* 5G has no CCK rates */
230 .bitrates = rtw_ratetable + 4,
231 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
232
233 .ht_cap = {0},
234 .vht_cap = {0},
235 };
236
237 struct rtw_watch_dog_iter_data {
238 struct rtw_dev *rtwdev;
239 struct rtw_vif *rtwvif;
240 };
241
rtw_dynamic_csi_rate(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif)242 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)
243 {
244 struct rtw_bf_info *bf_info = &rtwdev->bf_info;
245 u8 fix_rate_enable = 0;
246 u8 new_csi_rate_idx;
247
248 if (rtwvif->bfee.role != RTW_BFEE_SU &&
249 rtwvif->bfee.role != RTW_BFEE_MU)
250 return;
251
252 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi,
253 bf_info->cur_csi_rpt_rate,
254 fix_rate_enable, &new_csi_rate_idx);
255
256 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
257 bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
258 }
259
rtw_vif_watch_dog_iter(void * data,struct ieee80211_vif * vif)260 static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif)
261 {
262 struct rtw_watch_dog_iter_data *iter_data = data;
263 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
264
265 if (vif->type == NL80211_IFTYPE_STATION)
266 if (vif->cfg.assoc)
267 iter_data->rtwvif = rtwvif;
268
269 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif);
270
271 rtwvif->stats.tx_unicast = 0;
272 rtwvif->stats.rx_unicast = 0;
273 rtwvif->stats.tx_cnt = 0;
274 rtwvif->stats.rx_cnt = 0;
275 }
276
rtw_sw_beacon_loss_check(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,int received_beacons)277 static void rtw_sw_beacon_loss_check(struct rtw_dev *rtwdev,
278 struct rtw_vif *rtwvif, int received_beacons)
279 {
280 int watchdog_delay = 2000000 / 1024; /* TU */
281 int beacon_int, expected_beacons;
282
283 if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_BCN_FILTER) || !rtwvif)
284 return;
285
286 beacon_int = rtwvif_to_vif(rtwvif)->bss_conf.beacon_int;
287 expected_beacons = DIV_ROUND_UP(watchdog_delay, beacon_int);
288
289 rtwdev->beacon_loss = received_beacons < expected_beacons / 2;
290 }
291
292 /* process TX/RX statistics periodically for hardware,
293 * the information helps hardware to enhance performance
294 */
rtw_watch_dog_work(struct work_struct * work)295 static void rtw_watch_dog_work(struct work_struct *work)
296 {
297 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
298 watch_dog_work.work);
299 struct rtw_traffic_stats *stats = &rtwdev->stats;
300 struct rtw_watch_dog_iter_data data = {};
301 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
302 int received_beacons = rtwdev->dm_info.cur_pkt_count.num_bcn_pkt;
303 u32 tx_unicast_mbps, rx_unicast_mbps;
304 bool ps_active;
305
306 mutex_lock(&rtwdev->mutex);
307
308 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
309 goto unlock;
310
311 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
312 RTW_WATCH_DOG_DELAY_TIME);
313
314 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
315 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
316 else
317 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
318
319 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
320 rtw_coex_wl_status_change_notify(rtwdev, 0);
321
322 if (stats->tx_cnt > RTW_LPS_THRESHOLD ||
323 stats->rx_cnt > RTW_LPS_THRESHOLD)
324 ps_active = true;
325 else
326 ps_active = false;
327
328 tx_unicast_mbps = stats->tx_unicast >> RTW_TP_SHIFT;
329 rx_unicast_mbps = stats->rx_unicast >> RTW_TP_SHIFT;
330
331 ewma_tp_add(&stats->tx_ewma_tp, tx_unicast_mbps);
332 ewma_tp_add(&stats->rx_ewma_tp, rx_unicast_mbps);
333 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
334 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
335
336 /* reset tx/rx statictics */
337 stats->tx_unicast = 0;
338 stats->rx_unicast = 0;
339 stats->tx_cnt = 0;
340 stats->rx_cnt = 0;
341
342 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
343 goto unlock;
344
345 /* make sure BB/RF is working for dynamic mech */
346 rtw_leave_lps(rtwdev);
347 rtw_coex_wl_status_check(rtwdev);
348 rtw_coex_query_bt_hid_list(rtwdev);
349 rtw_coex_active_query_bt_info(rtwdev);
350
351 rtw_phy_dynamic_mechanism(rtwdev);
352
353 rtw_hci_dynamic_rx_agg(rtwdev,
354 tx_unicast_mbps >= 1 || rx_unicast_mbps >= 1);
355
356 data.rtwdev = rtwdev;
357 /* rtw_iterate_vifs internally uses an atomic iterator which is needed
358 * to avoid taking local->iflist_mtx mutex
359 */
360 rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data);
361
362 rtw_sw_beacon_loss_check(rtwdev, data.rtwvif, received_beacons);
363
364 /* fw supports only one station associated to enter lps, if there are
365 * more than two stations associated to the AP, then we can not enter
366 * lps, because fw does not handle the overlapped beacon interval
367 *
368 * rtw_recalc_lps() iterate vifs and determine if driver can enter
369 * ps by vif->type and vif->cfg.ps, all we need to do here is to
370 * get that vif and check if device is having traffic more than the
371 * threshold.
372 */
373 if (rtwdev->ps_enabled && data.rtwvif && !ps_active &&
374 !rtwdev->beacon_loss && !rtwdev->ap_active)
375 rtw_enter_lps(rtwdev, data.rtwvif->port);
376
377 rtwdev->watch_dog_cnt++;
378
379 unlock:
380 mutex_unlock(&rtwdev->mutex);
381 }
382
rtw_c2h_work(struct work_struct * work)383 static void rtw_c2h_work(struct work_struct *work)
384 {
385 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
386 struct sk_buff *skb, *tmp;
387
388 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
389 skb_unlink(skb, &rtwdev->c2h_queue);
390 rtw_fw_c2h_cmd_handle(rtwdev, skb);
391 dev_kfree_skb_any(skb);
392 }
393 }
394
rtw_ips_work(struct work_struct * work)395 static void rtw_ips_work(struct work_struct *work)
396 {
397 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work);
398
399 mutex_lock(&rtwdev->mutex);
400 if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)
401 rtw_enter_ips(rtwdev);
402 mutex_unlock(&rtwdev->mutex);
403 }
404
rtw_sta_rc_work(struct work_struct * work)405 static void rtw_sta_rc_work(struct work_struct *work)
406 {
407 struct rtw_sta_info *si = container_of(work, struct rtw_sta_info,
408 rc_work);
409 struct rtw_dev *rtwdev = si->rtwdev;
410
411 mutex_lock(&rtwdev->mutex);
412 rtw_update_sta_info(rtwdev, si, true);
413 mutex_unlock(&rtwdev->mutex);
414 }
415
rtw_sta_add(struct rtw_dev * rtwdev,struct ieee80211_sta * sta,struct ieee80211_vif * vif)416 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
417 struct ieee80211_vif *vif)
418 {
419 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
420 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
421 int i;
422
423 if (vif->type == NL80211_IFTYPE_STATION) {
424 si->mac_id = rtwvif->mac_id;
425 } else {
426 si->mac_id = rtw_acquire_macid(rtwdev);
427 if (si->mac_id >= RTW_MAX_MAC_ID_NUM)
428 return -ENOSPC;
429 }
430
431 si->rtwdev = rtwdev;
432 si->sta = sta;
433 si->vif = vif;
434 si->init_ra_lv = 1;
435 ewma_rssi_init(&si->avg_rssi);
436 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
437 rtw_txq_init(rtwdev, sta->txq[i]);
438 INIT_WORK(&si->rc_work, rtw_sta_rc_work);
439
440 rtw_update_sta_info(rtwdev, si, true);
441 rtw_fw_media_status_report(rtwdev, si->mac_id, true);
442
443 rtwdev->sta_cnt++;
444 rtwdev->beacon_loss = false;
445 #if defined(__linux__)
446 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n",
447 sta->addr, si->mac_id);
448 #elif defined(__FreeBSD__)
449 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D joined with macid %d\n",
450 sta->addr, ":", si->mac_id);
451 #endif
452
453 return 0;
454 }
455
rtw_sta_remove(struct rtw_dev * rtwdev,struct ieee80211_sta * sta,bool fw_exist)456 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
457 bool fw_exist)
458 {
459 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
460 struct ieee80211_vif *vif = si->vif;
461 int i;
462
463 cancel_work_sync(&si->rc_work);
464
465 if (vif->type != NL80211_IFTYPE_STATION)
466 rtw_release_macid(rtwdev, si->mac_id);
467 if (fw_exist)
468 rtw_fw_media_status_report(rtwdev, si->mac_id, false);
469
470 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
471 rtw_txq_cleanup(rtwdev, sta->txq[i]);
472
473 kfree(si->mask);
474
475 rtwdev->sta_cnt--;
476 #if defined(__linux__)
477 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n",
478 sta->addr, si->mac_id);
479 #elif defined(__FreeBSD__)
480 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D with macid %d left\n",
481 sta->addr, ":", si->mac_id);
482 #endif
483 }
484
485 struct rtw_fwcd_hdr {
486 u32 item;
487 u32 size;
488 u32 padding1;
489 u32 padding2;
490 } __packed;
491
rtw_fwcd_prep(struct rtw_dev * rtwdev)492 static int rtw_fwcd_prep(struct rtw_dev *rtwdev)
493 {
494 const struct rtw_chip_info *chip = rtwdev->chip;
495 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
496 const struct rtw_fwcd_segs *segs = chip->fwcd_segs;
497 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr);
498 u8 i;
499
500 if (segs) {
501 prep_size += segs->num * sizeof(struct rtw_fwcd_hdr);
502
503 for (i = 0; i < segs->num; i++)
504 prep_size += segs->segs[i];
505 }
506
507 desc->data = vmalloc(prep_size);
508 if (!desc->data)
509 return -ENOMEM;
510
511 desc->size = prep_size;
512 desc->next = desc->data;
513
514 return 0;
515 }
516
rtw_fwcd_next(struct rtw_dev * rtwdev,u32 item,u32 size)517 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size)
518 {
519 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
520 struct rtw_fwcd_hdr *hdr;
521 u8 *next;
522
523 if (!desc->data) {
524 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n");
525 return NULL;
526 }
527
528 next = desc->next + sizeof(struct rtw_fwcd_hdr);
529 if (next - desc->data + size > desc->size) {
530 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n");
531 return NULL;
532 }
533
534 hdr = (struct rtw_fwcd_hdr *)(desc->next);
535 hdr->item = item;
536 hdr->size = size;
537 hdr->padding1 = 0x01234567;
538 hdr->padding2 = 0x89abcdef;
539 desc->next = next + size;
540
541 return next;
542 }
543
rtw_fwcd_dump(struct rtw_dev * rtwdev)544 static void rtw_fwcd_dump(struct rtw_dev *rtwdev)
545 {
546 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
547
548 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n");
549
550 /* Data will be freed after lifetime of device coredump. After calling
551 * dev_coredump, data is supposed to be handled by the device coredump
552 * framework. Note that a new dump will be discarded if a previous one
553 * hasn't been released yet.
554 */
555 dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL);
556 }
557
rtw_fwcd_free(struct rtw_dev * rtwdev,bool free_self)558 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self)
559 {
560 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
561
562 if (free_self) {
563 rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n");
564 vfree(desc->data);
565 }
566
567 desc->data = NULL;
568 desc->next = NULL;
569 }
570
rtw_fw_dump_crash_log(struct rtw_dev * rtwdev)571 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev)
572 {
573 u32 size = rtwdev->chip->fw_rxff_size;
574 u32 *buf;
575 u8 seq;
576
577 buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size);
578 if (!buf)
579 return -ENOMEM;
580
581 if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) {
582 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n");
583 return -EINVAL;
584 }
585
586 if (GET_FW_DUMP_LEN(buf) == 0) {
587 rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n");
588 return -EINVAL;
589 }
590
591 seq = GET_FW_DUMP_SEQ(buf);
592 if (seq > 0) {
593 rtw_dbg(rtwdev, RTW_DBG_FW,
594 "fw crash dump's seq is wrong: %d\n", seq);
595 return -EINVAL;
596 }
597
598 return 0;
599 }
600
rtw_dump_fw(struct rtw_dev * rtwdev,const u32 ocp_src,u32 size,u32 fwcd_item)601 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size,
602 u32 fwcd_item)
603 {
604 u32 rxff = rtwdev->chip->fw_rxff_size;
605 u32 dump_size, done_size = 0;
606 u8 *buf;
607 int ret;
608
609 buf = rtw_fwcd_next(rtwdev, fwcd_item, size);
610 if (!buf)
611 return -ENOMEM;
612
613 while (size) {
614 dump_size = size > rxff ? rxff : size;
615
616 ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size,
617 dump_size);
618 if (ret) {
619 rtw_err(rtwdev,
620 "ddma fw 0x%x [+0x%x] to fw fifo fail\n",
621 ocp_src, done_size);
622 return ret;
623 }
624
625 ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0,
626 dump_size, (u32 *)(buf + done_size));
627 if (ret) {
628 rtw_err(rtwdev,
629 "dump fw 0x%x [+0x%x] from fw fifo fail\n",
630 ocp_src, done_size);
631 return ret;
632 }
633
634 size -= dump_size;
635 done_size += dump_size;
636 }
637
638 return 0;
639 }
640 EXPORT_SYMBOL(rtw_dump_fw);
641
rtw_dump_reg(struct rtw_dev * rtwdev,const u32 addr,const u32 size)642 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size)
643 {
644 u8 *buf;
645 u32 i;
646
647 if (addr & 0x3) {
648 WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr);
649 return -EINVAL;
650 }
651
652 buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size);
653 if (!buf)
654 return -ENOMEM;
655
656 for (i = 0; i < size; i += 4)
657 *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i);
658
659 return 0;
660 }
661 EXPORT_SYMBOL(rtw_dump_reg);
662
rtw_vif_assoc_changed(struct rtw_vif * rtwvif,struct ieee80211_bss_conf * conf)663 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif,
664 struct ieee80211_bss_conf *conf)
665 {
666 struct ieee80211_vif *vif = NULL;
667
668 if (conf)
669 vif = container_of(conf, struct ieee80211_vif, bss_conf);
670
671 if (conf && vif->cfg.assoc) {
672 rtwvif->aid = vif->cfg.aid;
673 rtwvif->net_type = RTW_NET_MGD_LINKED;
674 } else {
675 rtwvif->aid = 0;
676 rtwvif->net_type = RTW_NET_NO_LINK;
677 }
678 }
679
rtw_reset_key_iter(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key,void * data)680 static void rtw_reset_key_iter(struct ieee80211_hw *hw,
681 struct ieee80211_vif *vif,
682 struct ieee80211_sta *sta,
683 struct ieee80211_key_conf *key,
684 void *data)
685 {
686 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
687 struct rtw_sec_desc *sec = &rtwdev->sec;
688
689 rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx);
690 }
691
rtw_reset_sta_iter(void * data,struct ieee80211_sta * sta)692 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta)
693 {
694 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
695
696 if (rtwdev->sta_cnt == 0) {
697 rtw_warn(rtwdev, "sta count before reset should not be 0\n");
698 return;
699 }
700 rtw_sta_remove(rtwdev, sta, false);
701 }
702
rtw_reset_vif_iter(void * data,u8 * mac,struct ieee80211_vif * vif)703 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
704 {
705 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
706 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
707
708 rtw_bf_disassoc(rtwdev, vif, NULL);
709 rtw_vif_assoc_changed(rtwvif, NULL);
710 rtw_txq_cleanup(rtwdev, vif->txq);
711
712 rtw_release_macid(rtwdev, rtwvif->mac_id);
713 }
714
rtw_fw_recovery(struct rtw_dev * rtwdev)715 void rtw_fw_recovery(struct rtw_dev *rtwdev)
716 {
717 if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags))
718 ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work);
719 }
720
__fw_recovery_work(struct rtw_dev * rtwdev)721 static void __fw_recovery_work(struct rtw_dev *rtwdev)
722 {
723 int ret = 0;
724
725 set_bit(RTW_FLAG_RESTARTING, rtwdev->flags);
726 clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags);
727
728 ret = rtw_fwcd_prep(rtwdev);
729 if (ret)
730 goto free;
731 ret = rtw_fw_dump_crash_log(rtwdev);
732 if (ret)
733 goto free;
734 ret = rtw_chip_dump_fw_crash(rtwdev);
735 if (ret)
736 goto free;
737
738 rtw_fwcd_dump(rtwdev);
739 free:
740 rtw_fwcd_free(rtwdev, !!ret);
741 rtw_write8(rtwdev, REG_MCU_TST_CFG, 0);
742
743 WARN(1, "firmware crash, start reset and recover\n");
744
745 rcu_read_lock();
746 rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev);
747 rcu_read_unlock();
748 rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev);
749 rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev);
750 bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM);
751 rtw_enter_ips(rtwdev);
752 }
753
rtw_fw_recovery_work(struct work_struct * work)754 static void rtw_fw_recovery_work(struct work_struct *work)
755 {
756 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
757 fw_recovery_work);
758
759 mutex_lock(&rtwdev->mutex);
760 __fw_recovery_work(rtwdev);
761 mutex_unlock(&rtwdev->mutex);
762
763 ieee80211_restart_hw(rtwdev->hw);
764 }
765
766 struct rtw_txq_ba_iter_data {
767 };
768
rtw_txq_ba_iter(void * data,struct ieee80211_sta * sta)769 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)
770 {
771 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
772 int ret;
773 u8 tid;
774
775 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
776 while (tid != IEEE80211_NUM_TIDS) {
777 clear_bit(tid, si->tid_ba);
778 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
779 if (ret == -EINVAL) {
780 struct ieee80211_txq *txq;
781 struct rtw_txq *rtwtxq;
782
783 txq = sta->txq[tid];
784 rtwtxq = (struct rtw_txq *)txq->drv_priv;
785 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);
786 }
787
788 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
789 }
790 }
791
rtw_txq_ba_work(struct work_struct * work)792 static void rtw_txq_ba_work(struct work_struct *work)
793 {
794 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);
795 struct rtw_txq_ba_iter_data data;
796
797 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);
798 }
799
rtw_set_rx_freq_band(struct rtw_rx_pkt_stat * pkt_stat,u8 channel)800 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel)
801 {
802 if (IS_CH_2G_BAND(channel))
803 pkt_stat->band = NL80211_BAND_2GHZ;
804 else if (IS_CH_5G_BAND(channel))
805 pkt_stat->band = NL80211_BAND_5GHZ;
806 else
807 return;
808
809 pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band);
810 }
811 EXPORT_SYMBOL(rtw_set_rx_freq_band);
812
rtw_set_dtim_period(struct rtw_dev * rtwdev,int dtim_period)813 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period)
814 {
815 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE);
816 rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1);
817 }
818
rtw_update_channel(struct rtw_dev * rtwdev,u8 center_channel,u8 primary_channel,enum rtw_supported_band band,enum rtw_bandwidth bandwidth)819 void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel,
820 u8 primary_channel, enum rtw_supported_band band,
821 enum rtw_bandwidth bandwidth)
822 {
823 enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band);
824 struct rtw_hal *hal = &rtwdev->hal;
825 u8 *cch_by_bw = hal->cch_by_bw;
826 u32 center_freq, primary_freq;
827 enum rtw_sar_bands sar_band;
828 u8 primary_channel_idx;
829
830 center_freq = ieee80211_channel_to_frequency(center_channel, nl_band);
831 primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band);
832
833 /* assign the center channel used while 20M bw is selected */
834 cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel;
835
836 /* assign the center channel used while current bw is selected */
837 cch_by_bw[bandwidth] = center_channel;
838
839 switch (bandwidth) {
840 case RTW_CHANNEL_WIDTH_20:
841 default:
842 primary_channel_idx = RTW_SC_DONT_CARE;
843 break;
844 case RTW_CHANNEL_WIDTH_40:
845 if (primary_freq > center_freq)
846 primary_channel_idx = RTW_SC_20_UPPER;
847 else
848 primary_channel_idx = RTW_SC_20_LOWER;
849 break;
850 case RTW_CHANNEL_WIDTH_80:
851 if (primary_freq > center_freq) {
852 if (primary_freq - center_freq == 10)
853 primary_channel_idx = RTW_SC_20_UPPER;
854 else
855 primary_channel_idx = RTW_SC_20_UPMOST;
856
857 /* assign the center channel used
858 * while 40M bw is selected
859 */
860 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4;
861 } else {
862 if (center_freq - primary_freq == 10)
863 primary_channel_idx = RTW_SC_20_LOWER;
864 else
865 primary_channel_idx = RTW_SC_20_LOWEST;
866
867 /* assign the center channel used
868 * while 40M bw is selected
869 */
870 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4;
871 }
872 break;
873 }
874
875 switch (center_channel) {
876 case 1 ... 14:
877 sar_band = RTW_SAR_BAND_0;
878 break;
879 case 36 ... 64:
880 sar_band = RTW_SAR_BAND_1;
881 break;
882 case 100 ... 144:
883 sar_band = RTW_SAR_BAND_3;
884 break;
885 case 149 ... 177:
886 sar_band = RTW_SAR_BAND_4;
887 break;
888 default:
889 WARN(1, "unknown ch(%u) to SAR band\n", center_channel);
890 sar_band = RTW_SAR_BAND_0;
891 break;
892 }
893
894 hal->current_primary_channel_index = primary_channel_idx;
895 hal->current_band_width = bandwidth;
896 hal->primary_channel = primary_channel;
897 hal->current_channel = center_channel;
898 hal->current_band_type = band;
899 hal->sar_band = sar_band;
900 }
901
rtw_get_channel_params(struct cfg80211_chan_def * chandef,struct rtw_channel_params * chan_params)902 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
903 struct rtw_channel_params *chan_params)
904 {
905 struct ieee80211_channel *channel = chandef->chan;
906 enum nl80211_chan_width width = chandef->width;
907 u32 primary_freq, center_freq;
908 u8 center_chan;
909 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
910
911 center_chan = channel->hw_value;
912 primary_freq = channel->center_freq;
913 center_freq = chandef->center_freq1;
914
915 switch (width) {
916 case NL80211_CHAN_WIDTH_20_NOHT:
917 case NL80211_CHAN_WIDTH_20:
918 bandwidth = RTW_CHANNEL_WIDTH_20;
919 break;
920 case NL80211_CHAN_WIDTH_40:
921 bandwidth = RTW_CHANNEL_WIDTH_40;
922 if (primary_freq > center_freq)
923 center_chan -= 2;
924 else
925 center_chan += 2;
926 break;
927 case NL80211_CHAN_WIDTH_80:
928 bandwidth = RTW_CHANNEL_WIDTH_80;
929 if (primary_freq > center_freq) {
930 if (primary_freq - center_freq == 10)
931 center_chan -= 2;
932 else
933 center_chan -= 6;
934 } else {
935 if (center_freq - primary_freq == 10)
936 center_chan += 2;
937 else
938 center_chan += 6;
939 }
940 break;
941 default:
942 center_chan = 0;
943 break;
944 }
945
946 chan_params->center_chan = center_chan;
947 chan_params->bandwidth = bandwidth;
948 chan_params->primary_chan = channel->hw_value;
949 }
950
rtw_set_channel(struct rtw_dev * rtwdev)951 void rtw_set_channel(struct rtw_dev *rtwdev)
952 {
953 const struct rtw_chip_info *chip = rtwdev->chip;
954 struct ieee80211_hw *hw = rtwdev->hw;
955 struct rtw_hal *hal = &rtwdev->hal;
956 struct rtw_channel_params ch_param;
957 u8 center_chan, primary_chan, bandwidth, band;
958
959 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
960 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
961 return;
962
963 center_chan = ch_param.center_chan;
964 primary_chan = ch_param.primary_chan;
965 bandwidth = ch_param.bandwidth;
966 band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
967
968 rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth);
969
970 if (rtwdev->scan_info.op_chan)
971 rtw_store_op_chan(rtwdev, true);
972
973 chip->ops->set_channel(rtwdev, center_chan, bandwidth,
974 hal->current_primary_channel_index);
975
976 if (hal->current_band_type == RTW_BAND_5G) {
977 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
978 } else {
979 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
980 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
981 else
982 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
983 }
984
985 rtw_phy_set_tx_power_level(rtwdev, center_chan);
986
987 /* if the channel isn't set for scanning, we will do RF calibration
988 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration
989 * during scanning on each channel takes too long.
990 */
991 if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
992 rtwdev->need_rfk = true;
993 }
994
rtw_chip_prepare_tx(struct rtw_dev * rtwdev)995 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev)
996 {
997 const struct rtw_chip_info *chip = rtwdev->chip;
998
999 if (rtwdev->need_rfk) {
1000 rtwdev->need_rfk = false;
1001 chip->ops->phy_calibration(rtwdev);
1002 }
1003 }
1004
rtw_vif_write_addr(struct rtw_dev * rtwdev,u32 start,u8 * addr)1005 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
1006 {
1007 int i;
1008
1009 for (i = 0; i < ETH_ALEN; i++)
1010 rtw_write8(rtwdev, start + i, addr[i]);
1011 }
1012
rtw_vif_port_config(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,u32 config)1013 void rtw_vif_port_config(struct rtw_dev *rtwdev,
1014 struct rtw_vif *rtwvif,
1015 u32 config)
1016 {
1017 u32 addr, mask;
1018
1019 if (config & PORT_SET_MAC_ADDR) {
1020 addr = rtwvif->conf->mac_addr.addr;
1021 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
1022 }
1023 if (config & PORT_SET_BSSID) {
1024 addr = rtwvif->conf->bssid.addr;
1025 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
1026 }
1027 if (config & PORT_SET_NET_TYPE) {
1028 addr = rtwvif->conf->net_type.addr;
1029 mask = rtwvif->conf->net_type.mask;
1030 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
1031 }
1032 if (config & PORT_SET_AID) {
1033 addr = rtwvif->conf->aid.addr;
1034 mask = rtwvif->conf->aid.mask;
1035 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
1036 }
1037 if (config & PORT_SET_BCN_CTRL) {
1038 addr = rtwvif->conf->bcn_ctrl.addr;
1039 mask = rtwvif->conf->bcn_ctrl.mask;
1040 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
1041 }
1042 }
1043
hw_bw_cap_to_bitamp(u8 bw_cap)1044 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
1045 {
1046 u8 bw = 0;
1047
1048 switch (bw_cap) {
1049 case EFUSE_HW_CAP_IGNORE:
1050 case EFUSE_HW_CAP_SUPP_BW80:
1051 bw |= BIT(RTW_CHANNEL_WIDTH_80);
1052 fallthrough;
1053 case EFUSE_HW_CAP_SUPP_BW40:
1054 bw |= BIT(RTW_CHANNEL_WIDTH_40);
1055 fallthrough;
1056 default:
1057 bw |= BIT(RTW_CHANNEL_WIDTH_20);
1058 break;
1059 }
1060
1061 return bw;
1062 }
1063
rtw_hw_config_rf_ant_num(struct rtw_dev * rtwdev,u8 hw_ant_num)1064 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
1065 {
1066 const struct rtw_chip_info *chip = rtwdev->chip;
1067 struct rtw_hal *hal = &rtwdev->hal;
1068
1069 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
1070 hw_ant_num >= hal->rf_path_num)
1071 return;
1072
1073 switch (hw_ant_num) {
1074 case 1:
1075 hal->rf_type = RF_1T1R;
1076 hal->rf_path_num = 1;
1077 if (!chip->fix_rf_phy_num)
1078 hal->rf_phy_num = hal->rf_path_num;
1079 hal->antenna_tx = BB_PATH_A;
1080 hal->antenna_rx = BB_PATH_A;
1081 break;
1082 default:
1083 WARN(1, "invalid hw configuration from efuse\n");
1084 break;
1085 }
1086 }
1087
get_vht_ra_mask(struct ieee80211_sta * sta)1088 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
1089 {
1090 u64 ra_mask = 0;
1091 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
1092 u8 vht_mcs_cap;
1093 int i, nss;
1094
1095 /* 4SS, every two bits for MCS7/8/9 */
1096 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
1097 vht_mcs_cap = mcs_map & 0x3;
1098 switch (vht_mcs_cap) {
1099 case 2: /* MCS9 */
1100 ra_mask |= 0x3ffULL << nss;
1101 break;
1102 case 1: /* MCS8 */
1103 ra_mask |= 0x1ffULL << nss;
1104 break;
1105 case 0: /* MCS7 */
1106 ra_mask |= 0x0ffULL << nss;
1107 break;
1108 default:
1109 break;
1110 }
1111 }
1112
1113 return ra_mask;
1114 }
1115
get_rate_id(u8 wireless_set,enum rtw_bandwidth bw_mode,u8 tx_num)1116 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
1117 {
1118 u8 rate_id = 0;
1119
1120 switch (wireless_set) {
1121 case WIRELESS_CCK:
1122 rate_id = RTW_RATEID_B_20M;
1123 break;
1124 case WIRELESS_OFDM:
1125 rate_id = RTW_RATEID_G;
1126 break;
1127 case WIRELESS_CCK | WIRELESS_OFDM:
1128 rate_id = RTW_RATEID_BG;
1129 break;
1130 case WIRELESS_OFDM | WIRELESS_HT:
1131 if (tx_num == 1)
1132 rate_id = RTW_RATEID_GN_N1SS;
1133 else if (tx_num == 2)
1134 rate_id = RTW_RATEID_GN_N2SS;
1135 else if (tx_num == 3)
1136 rate_id = RTW_RATEID_ARFR5_N_3SS;
1137 break;
1138 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
1139 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
1140 if (tx_num == 1)
1141 rate_id = RTW_RATEID_BGN_40M_1SS;
1142 else if (tx_num == 2)
1143 rate_id = RTW_RATEID_BGN_40M_2SS;
1144 else if (tx_num == 3)
1145 rate_id = RTW_RATEID_ARFR5_N_3SS;
1146 else if (tx_num == 4)
1147 rate_id = RTW_RATEID_ARFR7_N_4SS;
1148 } else {
1149 if (tx_num == 1)
1150 rate_id = RTW_RATEID_BGN_20M_1SS;
1151 else if (tx_num == 2)
1152 rate_id = RTW_RATEID_BGN_20M_2SS;
1153 else if (tx_num == 3)
1154 rate_id = RTW_RATEID_ARFR5_N_3SS;
1155 else if (tx_num == 4)
1156 rate_id = RTW_RATEID_ARFR7_N_4SS;
1157 }
1158 break;
1159 case WIRELESS_OFDM | WIRELESS_VHT:
1160 if (tx_num == 1)
1161 rate_id = RTW_RATEID_ARFR1_AC_1SS;
1162 else if (tx_num == 2)
1163 rate_id = RTW_RATEID_ARFR0_AC_2SS;
1164 else if (tx_num == 3)
1165 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1166 else if (tx_num == 4)
1167 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1168 break;
1169 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
1170 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
1171 if (tx_num == 1)
1172 rate_id = RTW_RATEID_ARFR1_AC_1SS;
1173 else if (tx_num == 2)
1174 rate_id = RTW_RATEID_ARFR0_AC_2SS;
1175 else if (tx_num == 3)
1176 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1177 else if (tx_num == 4)
1178 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1179 } else {
1180 if (tx_num == 1)
1181 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
1182 else if (tx_num == 2)
1183 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
1184 else if (tx_num == 3)
1185 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1186 else if (tx_num == 4)
1187 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1188 }
1189 break;
1190 default:
1191 break;
1192 }
1193
1194 return rate_id;
1195 }
1196
1197 #define RA_MASK_CCK_RATES 0x0000f
1198 #define RA_MASK_OFDM_RATES 0x00ff0
1199 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
1200 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
1201 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
1202 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
1203 RA_MASK_HT_RATES_2SS | \
1204 RA_MASK_HT_RATES_3SS)
1205 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
1206 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
1207 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
1208 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
1209 RA_MASK_VHT_RATES_2SS | \
1210 RA_MASK_VHT_RATES_3SS)
1211 #define RA_MASK_CCK_IN_BG 0x00005
1212 #define RA_MASK_CCK_IN_HT 0x00005
1213 #define RA_MASK_CCK_IN_VHT 0x00005
1214 #define RA_MASK_OFDM_IN_VHT 0x00010
1215 #define RA_MASK_OFDM_IN_HT_2G 0x00010
1216 #define RA_MASK_OFDM_IN_HT_5G 0x00030
1217
rtw_rate_mask_rssi(struct rtw_sta_info * si,u8 wireless_set)1218 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set)
1219 {
1220 u8 rssi_level = si->rssi_level;
1221
1222 if (wireless_set == WIRELESS_CCK)
1223 return 0xffffffffffffffffULL;
1224
1225 if (rssi_level == 0)
1226 return 0xffffffffffffffffULL;
1227 else if (rssi_level == 1)
1228 return 0xfffffffffffffff0ULL;
1229 else if (rssi_level == 2)
1230 return 0xffffffffffffefe0ULL;
1231 else if (rssi_level == 3)
1232 return 0xffffffffffffcfc0ULL;
1233 else if (rssi_level == 4)
1234 return 0xffffffffffff8f80ULL;
1235 else
1236 return 0xffffffffffff0f00ULL;
1237 }
1238
rtw_rate_mask_recover(u64 ra_mask,u64 ra_mask_bak)1239 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak)
1240 {
1241 if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0)
1242 ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1243
1244 if (ra_mask == 0)
1245 ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1246
1247 return ra_mask;
1248 }
1249
rtw_rate_mask_cfg(struct rtw_dev * rtwdev,struct rtw_sta_info * si,u64 ra_mask,bool is_vht_enable)1250 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1251 u64 ra_mask, bool is_vht_enable)
1252 {
1253 struct rtw_hal *hal = &rtwdev->hal;
1254 const struct cfg80211_bitrate_mask *mask = si->mask;
1255 u64 cfg_mask = GENMASK_ULL(63, 0);
1256 u8 band;
1257
1258 if (!si->use_cfg_mask)
1259 return ra_mask;
1260
1261 band = hal->current_band_type;
1262 if (band == RTW_BAND_2G) {
1263 band = NL80211_BAND_2GHZ;
1264 cfg_mask = mask->control[band].legacy;
1265 } else if (band == RTW_BAND_5G) {
1266 band = NL80211_BAND_5GHZ;
1267 cfg_mask = u64_encode_bits(mask->control[band].legacy,
1268 RA_MASK_OFDM_RATES);
1269 }
1270
1271 if (!is_vht_enable) {
1272 if (ra_mask & RA_MASK_HT_RATES_1SS)
1273 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],
1274 RA_MASK_HT_RATES_1SS);
1275 if (ra_mask & RA_MASK_HT_RATES_2SS)
1276 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],
1277 RA_MASK_HT_RATES_2SS);
1278 } else {
1279 if (ra_mask & RA_MASK_VHT_RATES_1SS)
1280 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],
1281 RA_MASK_VHT_RATES_1SS);
1282 if (ra_mask & RA_MASK_VHT_RATES_2SS)
1283 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],
1284 RA_MASK_VHT_RATES_2SS);
1285 }
1286
1287 ra_mask &= cfg_mask;
1288
1289 return ra_mask;
1290 }
1291
rtw_update_sta_info(struct rtw_dev * rtwdev,struct rtw_sta_info * si,bool reset_ra_mask)1292 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1293 bool reset_ra_mask)
1294 {
1295 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1296 struct ieee80211_sta *sta = si->sta;
1297 struct rtw_efuse *efuse = &rtwdev->efuse;
1298 struct rtw_hal *hal = &rtwdev->hal;
1299 u8 wireless_set;
1300 u8 bw_mode;
1301 u8 rate_id;
1302 u8 stbc_en = 0;
1303 u8 ldpc_en = 0;
1304 u8 tx_num = 1;
1305 u64 ra_mask = 0;
1306 u64 ra_mask_bak = 0;
1307 bool is_vht_enable = false;
1308 bool is_support_sgi = false;
1309
1310 if (sta->deflink.vht_cap.vht_supported) {
1311 is_vht_enable = true;
1312 ra_mask |= get_vht_ra_mask(sta);
1313 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
1314 stbc_en = VHT_STBC_EN;
1315 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
1316 ldpc_en = VHT_LDPC_EN;
1317 } else if (sta->deflink.ht_cap.ht_supported) {
1318 ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |
1319 (sta->deflink.ht_cap.mcs.rx_mask[0] << 12);
1320 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1321 stbc_en = HT_STBC_EN;
1322 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
1323 ldpc_en = HT_LDPC_EN;
1324 }
1325
1326 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
1327 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
1328
1329 if (hal->current_band_type == RTW_BAND_5G) {
1330 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;
1331 ra_mask_bak = ra_mask;
1332 if (sta->deflink.vht_cap.vht_supported) {
1333 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
1334 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
1335 } else if (sta->deflink.ht_cap.ht_supported) {
1336 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
1337 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
1338 } else {
1339 wireless_set = WIRELESS_OFDM;
1340 }
1341 dm_info->rrsr_val_init = RRSR_INIT_5G;
1342 } else if (hal->current_band_type == RTW_BAND_2G) {
1343 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ];
1344 ra_mask_bak = ra_mask;
1345 if (sta->deflink.vht_cap.vht_supported) {
1346 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
1347 RA_MASK_OFDM_IN_VHT;
1348 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1349 WIRELESS_HT | WIRELESS_VHT;
1350 } else if (sta->deflink.ht_cap.ht_supported) {
1351 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
1352 RA_MASK_OFDM_IN_HT_2G;
1353 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1354 WIRELESS_HT;
1355 #if defined(__linux__)
1356 } else if (sta->deflink.supp_rates[0] <= 0xf) {
1357 #elif defined(__FreeBSD__)
1358 } else if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] <= 0xf) {
1359 #endif
1360 wireless_set = WIRELESS_CCK;
1361 } else {
1362 ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG;
1363 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
1364 }
1365 dm_info->rrsr_val_init = RRSR_INIT_2G;
1366 } else {
1367 rtw_err(rtwdev, "Unknown band type\n");
1368 ra_mask_bak = ra_mask;
1369 wireless_set = 0;
1370 }
1371
1372 switch (sta->deflink.bandwidth) {
1373 case IEEE80211_STA_RX_BW_80:
1374 bw_mode = RTW_CHANNEL_WIDTH_80;
1375 is_support_sgi = sta->deflink.vht_cap.vht_supported &&
1376 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);
1377 break;
1378 case IEEE80211_STA_RX_BW_40:
1379 bw_mode = RTW_CHANNEL_WIDTH_40;
1380 is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1381 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40);
1382 break;
1383 default:
1384 bw_mode = RTW_CHANNEL_WIDTH_20;
1385 is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1386 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20);
1387 break;
1388 }
1389
1390 if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000)
1391 tx_num = 2;
1392 else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000)
1393 tx_num = 2;
1394
1395 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
1396
1397 ra_mask &= rtw_rate_mask_rssi(si, wireless_set);
1398 ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak);
1399 ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable);
1400
1401 si->bw_mode = bw_mode;
1402 si->stbc_en = stbc_en;
1403 si->ldpc_en = ldpc_en;
1404 si->sgi_enable = is_support_sgi;
1405 si->vht_enable = is_vht_enable;
1406 si->ra_mask = ra_mask;
1407 si->rate_id = rate_id;
1408
1409 rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask);
1410 }
1411
rtw_wait_firmware_completion(struct rtw_dev * rtwdev)1412 int rtw_wait_firmware_completion(struct rtw_dev *rtwdev)
1413 {
1414 const struct rtw_chip_info *chip = rtwdev->chip;
1415 struct rtw_fw_state *fw;
1416 int ret = 0;
1417
1418 fw = &rtwdev->fw;
1419 wait_for_completion(&fw->completion);
1420 if (!fw->firmware)
1421 ret = -EINVAL;
1422
1423 if (chip->wow_fw_name) {
1424 fw = &rtwdev->wow_fw;
1425 wait_for_completion(&fw->completion);
1426 if (!fw->firmware)
1427 ret = -EINVAL;
1428 }
1429
1430 return ret;
1431 }
1432 EXPORT_SYMBOL(rtw_wait_firmware_completion);
1433
rtw_update_lps_deep_mode(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1434 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev,
1435 struct rtw_fw_state *fw)
1436 {
1437 const struct rtw_chip_info *chip = rtwdev->chip;
1438
1439 if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported ||
1440 !fw->feature)
1441 return LPS_DEEP_MODE_NONE;
1442
1443 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) &&
1444 rtw_fw_feature_check(fw, FW_FEATURE_PG))
1445 return LPS_DEEP_MODE_PG;
1446
1447 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) &&
1448 rtw_fw_feature_check(fw, FW_FEATURE_LCLK))
1449 return LPS_DEEP_MODE_LCLK;
1450
1451 return LPS_DEEP_MODE_NONE;
1452 }
1453
rtw_power_on(struct rtw_dev * rtwdev)1454 int rtw_power_on(struct rtw_dev *rtwdev)
1455 {
1456 const struct rtw_chip_info *chip = rtwdev->chip;
1457 struct rtw_fw_state *fw = &rtwdev->fw;
1458 bool wifi_only;
1459 int ret;
1460
1461 ret = rtw_hci_setup(rtwdev);
1462 if (ret) {
1463 rtw_err(rtwdev, "failed to setup hci\n");
1464 goto err;
1465 }
1466
1467 /* power on MAC before firmware downloaded */
1468 ret = rtw_mac_power_on(rtwdev);
1469 if (ret) {
1470 rtw_err(rtwdev, "failed to power on mac\n");
1471 goto err;
1472 }
1473
1474 ret = rtw_wait_firmware_completion(rtwdev);
1475 if (ret) {
1476 rtw_err(rtwdev, "failed to wait firmware completion\n");
1477 goto err_off;
1478 }
1479
1480 ret = rtw_download_firmware(rtwdev, fw);
1481 if (ret) {
1482 rtw_err(rtwdev, "failed to download firmware\n");
1483 goto err_off;
1484 }
1485
1486 /* config mac after firmware downloaded */
1487 ret = rtw_mac_init(rtwdev);
1488 if (ret) {
1489 rtw_err(rtwdev, "failed to configure mac\n");
1490 goto err_off;
1491 }
1492
1493 chip->ops->phy_set_param(rtwdev);
1494
1495 ret = rtw_hci_start(rtwdev);
1496 if (ret) {
1497 rtw_err(rtwdev, "failed to start hci\n");
1498 goto err_off;
1499 }
1500
1501 /* send H2C after HCI has started */
1502 rtw_fw_send_general_info(rtwdev);
1503 rtw_fw_send_phydm_info(rtwdev);
1504
1505 wifi_only = !rtwdev->efuse.btcoex;
1506 rtw_coex_power_on_setting(rtwdev);
1507 rtw_coex_init_hw_config(rtwdev, wifi_only);
1508
1509 return 0;
1510
1511 err_off:
1512 rtw_mac_power_off(rtwdev);
1513
1514 err:
1515 return ret;
1516 }
1517 EXPORT_SYMBOL(rtw_power_on);
1518
rtw_core_fw_scan_notify(struct rtw_dev * rtwdev,bool start)1519 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start)
1520 {
1521 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN))
1522 return;
1523
1524 if (start) {
1525 rtw_fw_scan_notify(rtwdev, true);
1526 } else {
1527 reinit_completion(&rtwdev->fw_scan_density);
1528 rtw_fw_scan_notify(rtwdev, false);
1529 if (!wait_for_completion_timeout(&rtwdev->fw_scan_density,
1530 SCAN_NOTIFY_TIMEOUT))
1531 rtw_warn(rtwdev, "firmware failed to report density after scan\n");
1532 }
1533 }
1534
rtw_core_scan_start(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,const u8 * mac_addr,bool hw_scan)1535 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,
1536 const u8 *mac_addr, bool hw_scan)
1537 {
1538 u32 config = 0;
1539 int ret = 0;
1540
1541 rtw_leave_lps(rtwdev);
1542
1543 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) {
1544 ret = rtw_leave_ips(rtwdev);
1545 if (ret) {
1546 rtw_err(rtwdev, "failed to leave idle state\n");
1547 return;
1548 }
1549 }
1550
1551 ether_addr_copy(rtwvif->mac_addr, mac_addr);
1552 config |= PORT_SET_MAC_ADDR;
1553 rtw_vif_port_config(rtwdev, rtwvif, config);
1554
1555 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START);
1556 rtw_core_fw_scan_notify(rtwdev, true);
1557
1558 set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1559 set_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1560 }
1561
rtw_core_scan_complete(struct rtw_dev * rtwdev,struct ieee80211_vif * vif,bool hw_scan)1562 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
1563 bool hw_scan)
1564 {
1565 struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL;
1566 u32 config = 0;
1567
1568 if (!rtwvif)
1569 return;
1570
1571 clear_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1572 clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1573
1574 rtw_core_fw_scan_notify(rtwdev, false);
1575
1576 ether_addr_copy(rtwvif->mac_addr, vif->addr);
1577 config |= PORT_SET_MAC_ADDR;
1578 rtw_vif_port_config(rtwdev, rtwvif, config);
1579
1580 rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH);
1581
1582 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
1583 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
1584 }
1585
rtw_core_start(struct rtw_dev * rtwdev)1586 int rtw_core_start(struct rtw_dev *rtwdev)
1587 {
1588 int ret;
1589
1590 ret = rtwdev->chip->ops->power_on(rtwdev);
1591 if (ret)
1592 return ret;
1593
1594 rtw_sec_enable_sec_engine(rtwdev);
1595
1596 rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw);
1597 rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw);
1598
1599 /* rcr reset after powered on */
1600 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
1601
1602 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
1603 RTW_WATCH_DOG_DELAY_TIME);
1604
1605 set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1606
1607 return 0;
1608 }
1609
rtw_power_off(struct rtw_dev * rtwdev)1610 void rtw_power_off(struct rtw_dev *rtwdev)
1611 {
1612 rtw_hci_stop(rtwdev);
1613 rtw_coex_power_off_setting(rtwdev);
1614 rtw_mac_power_off(rtwdev);
1615 }
1616 EXPORT_SYMBOL(rtw_power_off);
1617
rtw_core_stop(struct rtw_dev * rtwdev)1618 void rtw_core_stop(struct rtw_dev *rtwdev)
1619 {
1620 struct rtw_coex *coex = &rtwdev->coex;
1621
1622 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1623 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
1624
1625 mutex_unlock(&rtwdev->mutex);
1626
1627 cancel_work_sync(&rtwdev->c2h_work);
1628 cancel_work_sync(&rtwdev->update_beacon_work);
1629 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
1630 cancel_delayed_work_sync(&coex->bt_relink_work);
1631 cancel_delayed_work_sync(&coex->bt_reenable_work);
1632 cancel_delayed_work_sync(&coex->defreeze_work);
1633 cancel_delayed_work_sync(&coex->wl_remain_work);
1634 cancel_delayed_work_sync(&coex->bt_remain_work);
1635 cancel_delayed_work_sync(&coex->wl_connecting_work);
1636 cancel_delayed_work_sync(&coex->bt_multi_link_remain_work);
1637 cancel_delayed_work_sync(&coex->wl_ccklock_work);
1638
1639 mutex_lock(&rtwdev->mutex);
1640
1641 rtwdev->chip->ops->power_off(rtwdev);
1642 }
1643
rtw_init_ht_cap(struct rtw_dev * rtwdev,struct ieee80211_sta_ht_cap * ht_cap)1644 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
1645 struct ieee80211_sta_ht_cap *ht_cap)
1646 {
1647 const struct rtw_chip_info *chip = rtwdev->chip;
1648 struct rtw_efuse *efuse = &rtwdev->efuse;
1649
1650 ht_cap->ht_supported = true;
1651 ht_cap->cap = 0;
1652 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
1653 IEEE80211_HT_CAP_MAX_AMSDU |
1654 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
1655
1656 if (rtw_chip_has_rx_ldpc(rtwdev))
1657 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
1658 if (rtw_chip_has_tx_stbc(rtwdev))
1659 ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC;
1660
1661 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1662 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
1663 IEEE80211_HT_CAP_DSSSCCK40 |
1664 IEEE80211_HT_CAP_SGI_40;
1665 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1666 ht_cap->ampdu_density = chip->ampdu_density;
1667 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1668 if (efuse->hw_cap.nss > 1) {
1669 ht_cap->mcs.rx_mask[0] = 0xFF;
1670 ht_cap->mcs.rx_mask[1] = 0xFF;
1671 ht_cap->mcs.rx_mask[4] = 0x01;
1672 ht_cap->mcs.rx_highest = cpu_to_le16(300);
1673 } else {
1674 ht_cap->mcs.rx_mask[0] = 0xFF;
1675 ht_cap->mcs.rx_mask[1] = 0x00;
1676 ht_cap->mcs.rx_mask[4] = 0x01;
1677 ht_cap->mcs.rx_highest = cpu_to_le16(150);
1678 }
1679 }
1680
rtw_init_vht_cap(struct rtw_dev * rtwdev,struct ieee80211_sta_vht_cap * vht_cap)1681 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
1682 struct ieee80211_sta_vht_cap *vht_cap)
1683 {
1684 struct rtw_efuse *efuse = &rtwdev->efuse;
1685 u16 mcs_map;
1686 __le16 highest;
1687
1688 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1689 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1690 return;
1691
1692 vht_cap->vht_supported = true;
1693 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
1694 IEEE80211_VHT_CAP_SHORT_GI_80 |
1695 IEEE80211_VHT_CAP_RXSTBC_1 |
1696 IEEE80211_VHT_CAP_HTC_VHT |
1697 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
1698 0;
1699 if (rtwdev->hal.rf_path_num > 1)
1700 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
1701 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
1702 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
1703 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap <<
1704 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
1705
1706 if (rtw_chip_has_rx_ldpc(rtwdev))
1707 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
1708
1709 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
1710 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
1711 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
1712 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
1713 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
1714 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
1715 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
1716 if (efuse->hw_cap.nss > 1) {
1717 highest = cpu_to_le16(780);
1718 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
1719 } else {
1720 highest = cpu_to_le16(390);
1721 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
1722 }
1723
1724 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
1725 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
1726 vht_cap->vht_mcs.rx_highest = highest;
1727 vht_cap->vht_mcs.tx_highest = highest;
1728 }
1729
rtw_get_max_scan_ie_len(struct rtw_dev * rtwdev)1730 static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev)
1731 {
1732 u16 len;
1733
1734 len = rtwdev->chip->max_scan_ie_len;
1735
1736 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) &&
1737 rtwdev->chip->id == RTW_CHIP_TYPE_8822C)
1738 len = IEEE80211_MAX_DATA_LEN;
1739 else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM))
1740 len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE;
1741
1742 return len;
1743 }
1744
rtw_set_supported_band(struct ieee80211_hw * hw,const struct rtw_chip_info * chip)1745 static void rtw_set_supported_band(struct ieee80211_hw *hw,
1746 const struct rtw_chip_info *chip)
1747 {
1748 struct rtw_dev *rtwdev = hw->priv;
1749 struct ieee80211_supported_band *sband;
1750
1751 if (chip->band & RTW_BAND_2G) {
1752 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
1753 if (!sband)
1754 goto err_out;
1755 #if defined(__linux__)
1756 if (chip->ht_supported)
1757 #elif defined(__FreeBSD__)
1758 if (rtw_ht_support && chip->ht_supported)
1759 #endif
1760 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1761 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
1762 }
1763
1764 if (chip->band & RTW_BAND_5G) {
1765 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
1766 if (!sband)
1767 goto err_out;
1768 #if defined(__linux__)
1769 if (chip->ht_supported)
1770 #elif defined(__FreeBSD__)
1771 if (rtw_ht_support && chip->ht_supported)
1772 #endif
1773 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1774 #if defined(__linux__)
1775 if (chip->vht_supported)
1776 #elif defined(__FreeBSD__)
1777 if (rtw_vht_support && chip->vht_supported)
1778 #endif
1779 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
1780 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
1781 }
1782
1783 return;
1784
1785 err_out:
1786 rtw_err(rtwdev, "failed to set supported band\n");
1787 }
1788
rtw_unset_supported_band(struct ieee80211_hw * hw,const struct rtw_chip_info * chip)1789 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
1790 const struct rtw_chip_info *chip)
1791 {
1792 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
1793 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
1794 }
1795
rtw_vif_smps_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1796 static void rtw_vif_smps_iter(void *data, u8 *mac,
1797 struct ieee80211_vif *vif)
1798 {
1799 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
1800
1801 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
1802 return;
1803
1804 if (rtwdev->hal.txrx_1ss)
1805 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC);
1806 else
1807 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF);
1808 }
1809
rtw_set_txrx_1ss(struct rtw_dev * rtwdev,bool txrx_1ss)1810 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss)
1811 {
1812 const struct rtw_chip_info *chip = rtwdev->chip;
1813 struct rtw_hal *hal = &rtwdev->hal;
1814
1815 if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss)
1816 return;
1817
1818 rtwdev->hal.txrx_1ss = txrx_1ss;
1819 if (txrx_1ss)
1820 chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false);
1821 else
1822 chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx,
1823 hal->antenna_rx, false);
1824 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev);
1825 }
1826
__update_firmware_feature(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1827 static void __update_firmware_feature(struct rtw_dev *rtwdev,
1828 struct rtw_fw_state *fw)
1829 {
1830 u32 feature;
1831 const struct rtw_fw_hdr *fw_hdr =
1832 (const struct rtw_fw_hdr *)fw->firmware->data;
1833
1834 feature = le32_to_cpu(fw_hdr->feature);
1835 fw->feature = feature & FW_FEATURE_SIG ? feature : 0;
1836
1837 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C &&
1838 RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13))
1839 fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM;
1840 }
1841
__update_firmware_info(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1842 static void __update_firmware_info(struct rtw_dev *rtwdev,
1843 struct rtw_fw_state *fw)
1844 {
1845 const struct rtw_fw_hdr *fw_hdr =
1846 (const struct rtw_fw_hdr *)fw->firmware->data;
1847
1848 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver);
1849 fw->version = le16_to_cpu(fw_hdr->version);
1850 fw->sub_version = fw_hdr->subversion;
1851 fw->sub_index = fw_hdr->subindex;
1852
1853 __update_firmware_feature(rtwdev, fw);
1854 }
1855
__update_firmware_info_legacy(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1856 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev,
1857 struct rtw_fw_state *fw)
1858 {
1859 struct rtw_fw_hdr_legacy *legacy =
1860 #if defined(__linux__)
1861 (struct rtw_fw_hdr_legacy *)fw->firmware->data;
1862 #elif defined(__FreeBSD__)
1863 __DECONST(struct rtw_fw_hdr_legacy *, fw->firmware->data);
1864 #endif
1865
1866 fw->h2c_version = 0;
1867 fw->version = le16_to_cpu(legacy->version);
1868 fw->sub_version = legacy->subversion1;
1869 fw->sub_index = legacy->subversion2;
1870 }
1871
update_firmware_info(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1872 static void update_firmware_info(struct rtw_dev *rtwdev,
1873 struct rtw_fw_state *fw)
1874 {
1875 if (rtw_chip_wcpu_11n(rtwdev))
1876 __update_firmware_info_legacy(rtwdev, fw);
1877 else
1878 __update_firmware_info(rtwdev, fw);
1879 }
1880
rtw_load_firmware_cb(const struct firmware * firmware,void * context)1881 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
1882 {
1883 struct rtw_fw_state *fw = context;
1884 struct rtw_dev *rtwdev = fw->rtwdev;
1885
1886 if (!firmware || !firmware->data) {
1887 rtw_err(rtwdev, "failed to request firmware\n");
1888 complete_all(&fw->completion);
1889 return;
1890 }
1891
1892 fw->firmware = firmware;
1893 update_firmware_info(rtwdev, fw);
1894 complete_all(&fw->completion);
1895
1896 rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n",
1897 fw->type == RTW_WOWLAN_FW ? "WOW " : "",
1898 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version);
1899 }
1900
rtw_load_firmware(struct rtw_dev * rtwdev,enum rtw_fw_type type)1901 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type)
1902 {
1903 const char *fw_name;
1904 struct rtw_fw_state *fw;
1905 int ret;
1906
1907 switch (type) {
1908 case RTW_WOWLAN_FW:
1909 fw = &rtwdev->wow_fw;
1910 fw_name = rtwdev->chip->wow_fw_name;
1911 break;
1912
1913 case RTW_NORMAL_FW:
1914 fw = &rtwdev->fw;
1915 fw_name = rtwdev->chip->fw_name;
1916 break;
1917
1918 default:
1919 rtw_warn(rtwdev, "unsupported firmware type\n");
1920 return -ENOENT;
1921 }
1922
1923 fw->type = type;
1924 fw->rtwdev = rtwdev;
1925 init_completion(&fw->completion);
1926
1927 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
1928 GFP_KERNEL, fw, rtw_load_firmware_cb);
1929 if (ret) {
1930 rtw_err(rtwdev, "failed to async firmware request\n");
1931 return ret;
1932 }
1933
1934 return 0;
1935 }
1936
rtw_chip_parameter_setup(struct rtw_dev * rtwdev)1937 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
1938 {
1939 const struct rtw_chip_info *chip = rtwdev->chip;
1940 struct rtw_hal *hal = &rtwdev->hal;
1941 struct rtw_efuse *efuse = &rtwdev->efuse;
1942
1943 switch (rtw_hci_type(rtwdev)) {
1944 case RTW_HCI_TYPE_PCIE:
1945 rtwdev->hci.rpwm_addr = 0x03d9;
1946 rtwdev->hci.cpwm_addr = 0x03da;
1947 break;
1948 case RTW_HCI_TYPE_SDIO:
1949 rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1;
1950 rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2;
1951 break;
1952 case RTW_HCI_TYPE_USB:
1953 rtwdev->hci.rpwm_addr = 0xfe58;
1954 rtwdev->hci.cpwm_addr = 0xfe57;
1955 break;
1956 default:
1957 rtw_err(rtwdev, "unsupported hci type\n");
1958 return -EINVAL;
1959 }
1960
1961 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
1962 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
1963 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
1964 if (hal->chip_version & BIT_RF_TYPE_ID) {
1965 hal->rf_type = RF_2T2R;
1966 hal->rf_path_num = 2;
1967 hal->antenna_tx = BB_PATH_AB;
1968 hal->antenna_rx = BB_PATH_AB;
1969 } else {
1970 hal->rf_type = RF_1T1R;
1971 hal->rf_path_num = 1;
1972 hal->antenna_tx = BB_PATH_A;
1973 hal->antenna_rx = BB_PATH_A;
1974 }
1975 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num :
1976 hal->rf_path_num;
1977
1978 efuse->physical_size = chip->phy_efuse_size;
1979 efuse->logical_size = chip->log_efuse_size;
1980 efuse->protect_size = chip->ptct_efuse_size;
1981
1982 /* default use ack */
1983 rtwdev->hal.rcr |= BIT_VHT_DACK;
1984
1985 hal->bfee_sts_cap = 3;
1986
1987 return 0;
1988 }
1989
rtw_chip_efuse_enable(struct rtw_dev * rtwdev)1990 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
1991 {
1992 struct rtw_fw_state *fw = &rtwdev->fw;
1993 int ret;
1994
1995 ret = rtw_hci_setup(rtwdev);
1996 if (ret) {
1997 rtw_err(rtwdev, "failed to setup hci\n");
1998 goto err;
1999 }
2000
2001 ret = rtw_mac_power_on(rtwdev);
2002 if (ret) {
2003 rtw_err(rtwdev, "failed to power on mac\n");
2004 goto err;
2005 }
2006
2007 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
2008
2009 wait_for_completion(&fw->completion);
2010 if (!fw->firmware) {
2011 ret = -EINVAL;
2012 rtw_err(rtwdev, "failed to load firmware\n");
2013 goto err;
2014 }
2015
2016 ret = rtw_download_firmware(rtwdev, fw);
2017 if (ret) {
2018 rtw_err(rtwdev, "failed to download firmware\n");
2019 goto err_off;
2020 }
2021
2022 return 0;
2023
2024 err_off:
2025 rtw_mac_power_off(rtwdev);
2026
2027 err:
2028 return ret;
2029 }
2030
rtw_dump_hw_feature(struct rtw_dev * rtwdev)2031 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
2032 {
2033 struct rtw_efuse *efuse = &rtwdev->efuse;
2034 u8 hw_feature[HW_FEATURE_LEN];
2035 u8 id;
2036 u8 bw;
2037 int i;
2038
2039 if (!rtwdev->chip->hw_feature_report)
2040 return 0;
2041
2042 id = rtw_read8(rtwdev, REG_C2HEVT);
2043 if (id != C2H_HW_FEATURE_REPORT) {
2044 rtw_err(rtwdev, "failed to read hw feature report\n");
2045 return -EBUSY;
2046 }
2047
2048 for (i = 0; i < HW_FEATURE_LEN; i++)
2049 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
2050
2051 rtw_write8(rtwdev, REG_C2HEVT, 0);
2052
2053 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
2054 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
2055 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
2056 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
2057 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
2058 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
2059
2060 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
2061
2062 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
2063 efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
2064 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
2065
2066 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
2067 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
2068 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
2069 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
2070
2071 return 0;
2072 }
2073
rtw_chip_efuse_disable(struct rtw_dev * rtwdev)2074 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
2075 {
2076 rtw_hci_stop(rtwdev);
2077 rtw_mac_power_off(rtwdev);
2078 }
2079
rtw_chip_efuse_info_setup(struct rtw_dev * rtwdev)2080 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
2081 {
2082 struct rtw_efuse *efuse = &rtwdev->efuse;
2083 int ret;
2084
2085 mutex_lock(&rtwdev->mutex);
2086
2087 /* power on mac to read efuse */
2088 ret = rtw_chip_efuse_enable(rtwdev);
2089 if (ret)
2090 goto out_unlock;
2091
2092 ret = rtw_parse_efuse_map(rtwdev);
2093 if (ret)
2094 goto out_disable;
2095
2096 ret = rtw_dump_hw_feature(rtwdev);
2097 if (ret)
2098 goto out_disable;
2099
2100 ret = rtw_check_supported_rfe(rtwdev);
2101 if (ret)
2102 goto out_disable;
2103
2104 if (efuse->crystal_cap == 0xff)
2105 efuse->crystal_cap = 0;
2106 if (efuse->pa_type_2g == 0xff)
2107 efuse->pa_type_2g = 0;
2108 if (efuse->pa_type_5g == 0xff)
2109 efuse->pa_type_5g = 0;
2110 if (efuse->lna_type_2g == 0xff)
2111 efuse->lna_type_2g = 0;
2112 if (efuse->lna_type_5g == 0xff)
2113 efuse->lna_type_5g = 0;
2114 if (efuse->channel_plan == 0xff)
2115 efuse->channel_plan = 0x7f;
2116 if (efuse->rf_board_option == 0xff)
2117 efuse->rf_board_option = 0;
2118 if (efuse->bt_setting & BIT(0))
2119 efuse->share_ant = true;
2120 if (efuse->regd == 0xff)
2121 efuse->regd = 0;
2122 if (efuse->tx_bb_swing_setting_2g == 0xff)
2123 efuse->tx_bb_swing_setting_2g = 0;
2124 if (efuse->tx_bb_swing_setting_5g == 0xff)
2125 efuse->tx_bb_swing_setting_5g = 0;
2126
2127 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
2128 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
2129 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
2130 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
2131 efuse->ext_lna_5g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
2132
2133 if (!is_valid_ether_addr(efuse->addr)) {
2134 eth_random_addr(efuse->addr);
2135 dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n");
2136 }
2137
2138 out_disable:
2139 rtw_chip_efuse_disable(rtwdev);
2140
2141 out_unlock:
2142 mutex_unlock(&rtwdev->mutex);
2143 return ret;
2144 }
2145
rtw_chip_board_info_setup(struct rtw_dev * rtwdev)2146 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
2147 {
2148 struct rtw_hal *hal = &rtwdev->hal;
2149 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
2150
2151 if (!rfe_def)
2152 return -ENODEV;
2153
2154 rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type);
2155
2156 rtw_phy_init_tx_power(rtwdev);
2157 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
2158 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
2159 rtw_phy_tx_power_by_rate_config(hal);
2160 rtw_phy_tx_power_limit_config(hal);
2161
2162 return 0;
2163 }
2164
rtw_chip_info_setup(struct rtw_dev * rtwdev)2165 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
2166 {
2167 int ret;
2168
2169 ret = rtw_chip_parameter_setup(rtwdev);
2170 if (ret) {
2171 rtw_err(rtwdev, "failed to setup chip parameters\n");
2172 goto err_out;
2173 }
2174
2175 ret = rtw_chip_efuse_info_setup(rtwdev);
2176 if (ret) {
2177 rtw_err(rtwdev, "failed to setup chip efuse info\n");
2178 goto err_out;
2179 }
2180
2181 ret = rtw_chip_board_info_setup(rtwdev);
2182 if (ret) {
2183 rtw_err(rtwdev, "failed to setup chip board info\n");
2184 goto err_out;
2185 }
2186
2187 return 0;
2188
2189 err_out:
2190 return ret;
2191 }
2192 EXPORT_SYMBOL(rtw_chip_info_setup);
2193
rtw_stats_init(struct rtw_dev * rtwdev)2194 static void rtw_stats_init(struct rtw_dev *rtwdev)
2195 {
2196 struct rtw_traffic_stats *stats = &rtwdev->stats;
2197 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
2198 int i;
2199
2200 ewma_tp_init(&stats->tx_ewma_tp);
2201 ewma_tp_init(&stats->rx_ewma_tp);
2202
2203 for (i = 0; i < RTW_EVM_NUM; i++)
2204 ewma_evm_init(&dm_info->ewma_evm[i]);
2205 for (i = 0; i < RTW_SNR_NUM; i++)
2206 ewma_snr_init(&dm_info->ewma_snr[i]);
2207 }
2208
rtw_core_init(struct rtw_dev * rtwdev)2209 int rtw_core_init(struct rtw_dev *rtwdev)
2210 {
2211 const struct rtw_chip_info *chip = rtwdev->chip;
2212 struct rtw_coex *coex = &rtwdev->coex;
2213 int ret;
2214
2215 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
2216 INIT_LIST_HEAD(&rtwdev->txqs);
2217
2218 timer_setup(&rtwdev->tx_report.purge_timer,
2219 rtw_tx_report_purge_timer, 0);
2220 rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
2221 if (!rtwdev->tx_wq) {
2222 rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n");
2223 return -ENOMEM;
2224 }
2225
2226 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
2227 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
2228 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
2229 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
2230 INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work);
2231 INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work);
2232 INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work);
2233 INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work,
2234 rtw_coex_bt_multi_link_remain_work);
2235 INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work);
2236 INIT_WORK(&rtwdev->tx_work, rtw_tx_work);
2237 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
2238 INIT_WORK(&rtwdev->ips_work, rtw_ips_work);
2239 INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work);
2240 INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work);
2241 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);
2242 skb_queue_head_init(&rtwdev->c2h_queue);
2243 skb_queue_head_init(&rtwdev->coex.queue);
2244 skb_queue_head_init(&rtwdev->tx_report.queue);
2245
2246 spin_lock_init(&rtwdev->txq_lock);
2247 spin_lock_init(&rtwdev->tx_report.q_lock);
2248
2249 mutex_init(&rtwdev->mutex);
2250 mutex_init(&rtwdev->hal.tx_power_mutex);
2251
2252 init_waitqueue_head(&rtwdev->coex.wait);
2253 init_completion(&rtwdev->lps_leave_check);
2254 init_completion(&rtwdev->fw_scan_density);
2255
2256 rtwdev->sec.total_cam_num = 32;
2257 rtwdev->hal.current_channel = 1;
2258 rtwdev->dm_info.fix_rate = U8_MAX;
2259
2260 rtw_stats_init(rtwdev);
2261
2262 /* default rx filter setting */
2263 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
2264 BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
2265 BIT_AB | BIT_AM | BIT_APM;
2266
2267 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW);
2268 if (ret) {
2269 rtw_warn(rtwdev, "no firmware loaded\n");
2270 goto out;
2271 }
2272
2273 if (chip->wow_fw_name) {
2274 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW);
2275 if (ret) {
2276 rtw_warn(rtwdev, "no wow firmware loaded\n");
2277 wait_for_completion(&rtwdev->fw.completion);
2278 if (rtwdev->fw.firmware)
2279 release_firmware(rtwdev->fw.firmware);
2280 goto out;
2281 }
2282 }
2283
2284 #if defined(__FreeBSD__)
2285 rtw_wait_firmware_completion(rtwdev);
2286 #endif
2287
2288 return 0;
2289
2290 out:
2291 destroy_workqueue(rtwdev->tx_wq);
2292 return ret;
2293 }
2294 EXPORT_SYMBOL(rtw_core_init);
2295
rtw_core_deinit(struct rtw_dev * rtwdev)2296 void rtw_core_deinit(struct rtw_dev *rtwdev)
2297 {
2298 struct rtw_fw_state *fw = &rtwdev->fw;
2299 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw;
2300 struct rtw_rsvd_page *rsvd_pkt, *tmp;
2301 unsigned long flags;
2302
2303 rtw_wait_firmware_completion(rtwdev);
2304
2305 if (fw->firmware)
2306 release_firmware(fw->firmware);
2307
2308 if (wow_fw->firmware)
2309 release_firmware(wow_fw->firmware);
2310
2311 destroy_workqueue(rtwdev->tx_wq);
2312 timer_delete_sync(&rtwdev->tx_report.purge_timer);
2313 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
2314 skb_queue_purge(&rtwdev->tx_report.queue);
2315 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
2316 skb_queue_purge(&rtwdev->coex.queue);
2317 skb_queue_purge(&rtwdev->c2h_queue);
2318
2319 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,
2320 build_list) {
2321 list_del(&rsvd_pkt->build_list);
2322 kfree(rsvd_pkt);
2323 }
2324
2325 mutex_destroy(&rtwdev->mutex);
2326 mutex_destroy(&rtwdev->hal.tx_power_mutex);
2327 }
2328 EXPORT_SYMBOL(rtw_core_deinit);
2329
rtw_register_hw(struct rtw_dev * rtwdev,struct ieee80211_hw * hw)2330 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2331 {
2332 bool sta_mode_only = rtwdev->hci.type == RTW_HCI_TYPE_SDIO;
2333 struct rtw_hal *hal = &rtwdev->hal;
2334 int max_tx_headroom = 0;
2335 int ret;
2336
2337 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
2338
2339 if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO)
2340 max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN;
2341
2342 hw->extra_tx_headroom = max_tx_headroom;
2343 hw->queues = IEEE80211_NUM_ACS;
2344 hw->txq_data_size = sizeof(struct rtw_txq);
2345 hw->sta_data_size = sizeof(struct rtw_sta_info);
2346 hw->vif_data_size = sizeof(struct rtw_vif);
2347
2348 ieee80211_hw_set(hw, SIGNAL_DBM);
2349 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
2350 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2351 ieee80211_hw_set(hw, MFP_CAPABLE);
2352 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2353 ieee80211_hw_set(hw, SUPPORTS_PS);
2354 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
2355 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
2356 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
2357 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2358 ieee80211_hw_set(hw, TX_AMSDU);
2359 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
2360
2361 if (sta_mode_only)
2362 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
2363 else
2364 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2365 BIT(NL80211_IFTYPE_AP) |
2366 BIT(NL80211_IFTYPE_ADHOC);
2367 hw->wiphy->available_antennas_tx = hal->antenna_tx;
2368 hw->wiphy->available_antennas_rx = hal->antenna_rx;
2369
2370 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
2371 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
2372
2373 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
2374 hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS;
2375 hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev);
2376
2377 if (!sta_mode_only && rtwdev->chip->id == RTW_CHIP_TYPE_8822C) {
2378 hw->wiphy->iface_combinations = rtw_iface_combs;
2379 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs);
2380 }
2381
2382 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
2383 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);
2384 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
2385
2386 #ifdef CONFIG_PM
2387 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
2388 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids;
2389 #endif
2390 rtw_set_supported_band(hw, rtwdev->chip);
2391 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
2392
2393 hw->wiphy->sar_capa = &rtw_sar_capa;
2394
2395 ret = rtw_regd_init(rtwdev);
2396 if (ret) {
2397 rtw_err(rtwdev, "failed to init regd\n");
2398 return ret;
2399 }
2400
2401 rtw_led_init(rtwdev);
2402
2403 ret = ieee80211_register_hw(hw);
2404 if (ret) {
2405 rtw_err(rtwdev, "failed to register hw\n");
2406 goto led_deinit;
2407 }
2408
2409 ret = rtw_regd_hint(rtwdev);
2410 if (ret) {
2411 rtw_err(rtwdev, "failed to hint regd\n");
2412 goto led_deinit;
2413 }
2414
2415 rtw_debugfs_init(rtwdev);
2416
2417 rtwdev->bf_info.bfer_mu_cnt = 0;
2418 rtwdev->bf_info.bfer_su_cnt = 0;
2419
2420 return 0;
2421
2422 led_deinit:
2423 rtw_led_deinit(rtwdev);
2424 return ret;
2425 }
2426 EXPORT_SYMBOL(rtw_register_hw);
2427
rtw_unregister_hw(struct rtw_dev * rtwdev,struct ieee80211_hw * hw)2428 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2429 {
2430 const struct rtw_chip_info *chip = rtwdev->chip;
2431
2432 ieee80211_unregister_hw(hw);
2433 rtw_unset_supported_band(hw, chip);
2434 rtw_debugfs_deinit(rtwdev);
2435 rtw_led_deinit(rtwdev);
2436 }
2437 EXPORT_SYMBOL(rtw_unregister_hw);
2438
2439 static
rtw_swap_reg_nbytes(struct rtw_dev * rtwdev,const struct rtw_hw_reg * reg1,const struct rtw_hw_reg * reg2,u8 nbytes)2440 void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,
2441 const struct rtw_hw_reg *reg2, u8 nbytes)
2442 {
2443 u8 i;
2444
2445 for (i = 0; i < nbytes; i++) {
2446 u8 v1 = rtw_read8(rtwdev, reg1->addr + i);
2447 u8 v2 = rtw_read8(rtwdev, reg2->addr + i);
2448
2449 rtw_write8(rtwdev, reg1->addr + i, v2);
2450 rtw_write8(rtwdev, reg2->addr + i, v1);
2451 }
2452 }
2453
2454 static
rtw_swap_reg_mask(struct rtw_dev * rtwdev,const struct rtw_hw_reg * reg1,const struct rtw_hw_reg * reg2)2455 void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,
2456 const struct rtw_hw_reg *reg2)
2457 {
2458 u32 v1, v2;
2459
2460 v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask);
2461 v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask);
2462 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1);
2463 rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2);
2464 }
2465
2466 struct rtw_iter_port_switch_data {
2467 struct rtw_dev *rtwdev;
2468 struct rtw_vif *rtwvif_ap;
2469 };
2470
rtw_port_switch_iter(void * data,struct ieee80211_vif * vif)2471 static void rtw_port_switch_iter(void *data, struct ieee80211_vif *vif)
2472 {
2473 struct rtw_iter_port_switch_data *iter_data = data;
2474 struct rtw_dev *rtwdev = iter_data->rtwdev;
2475 struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv;
2476 struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap;
2477 const struct rtw_hw_reg *reg1, *reg2;
2478
2479 if (rtwvif_target->port != RTW_PORT_0)
2480 return;
2481
2482 rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n",
2483 rtwvif_ap->port, rtwvif_target->port);
2484
2485 /* Leave LPS so the value swapped are not in PS mode */
2486 rtw_leave_lps(rtwdev);
2487
2488 reg1 = &rtwvif_ap->conf->net_type;
2489 reg2 = &rtwvif_target->conf->net_type;
2490 rtw_swap_reg_mask(rtwdev, reg1, reg2);
2491
2492 reg1 = &rtwvif_ap->conf->mac_addr;
2493 reg2 = &rtwvif_target->conf->mac_addr;
2494 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);
2495
2496 reg1 = &rtwvif_ap->conf->bssid;
2497 reg2 = &rtwvif_target->conf->bssid;
2498 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);
2499
2500 reg1 = &rtwvif_ap->conf->bcn_ctrl;
2501 reg2 = &rtwvif_target->conf->bcn_ctrl;
2502 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1);
2503
2504 swap(rtwvif_target->port, rtwvif_ap->port);
2505 swap(rtwvif_target->conf, rtwvif_ap->conf);
2506
2507 rtw_fw_default_port(rtwdev, rtwvif_target);
2508 }
2509
rtw_core_port_switch(struct rtw_dev * rtwdev,struct ieee80211_vif * vif)2510 void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif)
2511 {
2512 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
2513 struct rtw_iter_port_switch_data iter_data;
2514
2515 if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0)
2516 return;
2517
2518 iter_data.rtwdev = rtwdev;
2519 iter_data.rtwvif_ap = rtwvif;
2520 rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data);
2521 }
2522
rtw_check_sta_active_iter(void * data,struct ieee80211_vif * vif)2523 static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif)
2524 {
2525 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
2526 bool *active = data;
2527
2528 if (*active)
2529 return;
2530
2531 if (vif->type != NL80211_IFTYPE_STATION)
2532 return;
2533
2534 if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid))
2535 *active = true;
2536 }
2537
rtw_core_check_sta_active(struct rtw_dev * rtwdev)2538 bool rtw_core_check_sta_active(struct rtw_dev *rtwdev)
2539 {
2540 bool sta_active = false;
2541
2542 rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active);
2543
2544 return rtwdev->ap_active || sta_active;
2545 }
2546
rtw_core_enable_beacon(struct rtw_dev * rtwdev,bool enable)2547 void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable)
2548 {
2549 if (!rtwdev->ap_active)
2550 return;
2551
2552 if (enable) {
2553 rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
2554 rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);
2555 } else {
2556 rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
2557 rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);
2558 }
2559 }
2560
2561 MODULE_AUTHOR("Realtek Corporation");
2562 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
2563 MODULE_LICENSE("Dual BSD/GPL");
2564