1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #if defined(__FreeBSD__) 6 #define LINUXKPI_PARAM_PREFIX rtw88_ 7 #endif 8 9 #include <linux/devcoredump.h> 10 11 #include "main.h" 12 #include "regd.h" 13 #include "fw.h" 14 #include "ps.h" 15 #include "sec.h" 16 #include "mac.h" 17 #include "coex.h" 18 #include "phy.h" 19 #include "reg.h" 20 #include "efuse.h" 21 #include "tx.h" 22 #include "debug.h" 23 #include "bf.h" 24 #include "sar.h" 25 #include "sdio.h" 26 27 bool rtw_disable_lps_deep_mode; 28 EXPORT_SYMBOL(rtw_disable_lps_deep_mode); 29 bool rtw_bf_support = true; 30 unsigned int rtw_debug_mask; 31 EXPORT_SYMBOL(rtw_debug_mask); 32 /* EDCCA is enabled during normal behavior. For debugging purpose in 33 * a noisy environment, it can be disabled via edcca debugfs. Because 34 * all rtw88 devices will probably be affected if environment is noisy, 35 * rtw_edcca_enabled is just declared by driver instead of by device. 36 * So, turning it off will take effect for all rtw88 devices before 37 * there is a tough reason to maintain rtw_edcca_enabled by device. 38 */ 39 bool rtw_edcca_enabled = true; 40 41 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644); 42 module_param_named(support_bf, rtw_bf_support, bool, 0644); 43 module_param_named(debug_mask, rtw_debug_mask, uint, 0644); 44 45 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS"); 46 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support"); 47 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 48 49 static struct ieee80211_channel rtw_channeltable_2g[] = { 50 {.center_freq = 2412, .hw_value = 1,}, 51 {.center_freq = 2417, .hw_value = 2,}, 52 {.center_freq = 2422, .hw_value = 3,}, 53 {.center_freq = 2427, .hw_value = 4,}, 54 {.center_freq = 2432, .hw_value = 5,}, 55 {.center_freq = 2437, .hw_value = 6,}, 56 {.center_freq = 2442, .hw_value = 7,}, 57 {.center_freq = 2447, .hw_value = 8,}, 58 {.center_freq = 2452, .hw_value = 9,}, 59 {.center_freq = 2457, .hw_value = 10,}, 60 {.center_freq = 2462, .hw_value = 11,}, 61 {.center_freq = 2467, .hw_value = 12,}, 62 {.center_freq = 2472, .hw_value = 13,}, 63 {.center_freq = 2484, .hw_value = 14,}, 64 }; 65 66 static struct ieee80211_channel rtw_channeltable_5g[] = { 67 {.center_freq = 5180, .hw_value = 36,}, 68 {.center_freq = 5200, .hw_value = 40,}, 69 {.center_freq = 5220, .hw_value = 44,}, 70 {.center_freq = 5240, .hw_value = 48,}, 71 {.center_freq = 5260, .hw_value = 52,}, 72 {.center_freq = 5280, .hw_value = 56,}, 73 {.center_freq = 5300, .hw_value = 60,}, 74 {.center_freq = 5320, .hw_value = 64,}, 75 {.center_freq = 5500, .hw_value = 100,}, 76 {.center_freq = 5520, .hw_value = 104,}, 77 {.center_freq = 5540, .hw_value = 108,}, 78 {.center_freq = 5560, .hw_value = 112,}, 79 {.center_freq = 5580, .hw_value = 116,}, 80 {.center_freq = 5600, .hw_value = 120,}, 81 {.center_freq = 5620, .hw_value = 124,}, 82 {.center_freq = 5640, .hw_value = 128,}, 83 {.center_freq = 5660, .hw_value = 132,}, 84 {.center_freq = 5680, .hw_value = 136,}, 85 {.center_freq = 5700, .hw_value = 140,}, 86 {.center_freq = 5720, .hw_value = 144,}, 87 {.center_freq = 5745, .hw_value = 149,}, 88 {.center_freq = 5765, .hw_value = 153,}, 89 {.center_freq = 5785, .hw_value = 157,}, 90 {.center_freq = 5805, .hw_value = 161,}, 91 {.center_freq = 5825, .hw_value = 165, 92 .flags = IEEE80211_CHAN_NO_HT40MINUS}, 93 }; 94 95 static struct ieee80211_rate rtw_ratetable[] = { 96 {.bitrate = 10, .hw_value = 0x00,}, 97 {.bitrate = 20, .hw_value = 0x01,}, 98 {.bitrate = 55, .hw_value = 0x02,}, 99 {.bitrate = 110, .hw_value = 0x03,}, 100 {.bitrate = 60, .hw_value = 0x04,}, 101 {.bitrate = 90, .hw_value = 0x05,}, 102 {.bitrate = 120, .hw_value = 0x06,}, 103 {.bitrate = 180, .hw_value = 0x07,}, 104 {.bitrate = 240, .hw_value = 0x08,}, 105 {.bitrate = 360, .hw_value = 0x09,}, 106 {.bitrate = 480, .hw_value = 0x0a,}, 107 {.bitrate = 540, .hw_value = 0x0b,}, 108 }; 109 110 static const struct ieee80211_iface_limit rtw_iface_limits[] = { 111 { 112 .max = 1, 113 .types = BIT(NL80211_IFTYPE_STATION), 114 }, 115 { 116 .max = 1, 117 .types = BIT(NL80211_IFTYPE_AP), 118 } 119 }; 120 121 static const struct ieee80211_iface_combination rtw_iface_combs[] = { 122 { 123 .limits = rtw_iface_limits, 124 .n_limits = ARRAY_SIZE(rtw_iface_limits), 125 .max_interfaces = 2, 126 .num_different_channels = 1, 127 } 128 }; 129 130 u16 rtw_desc_to_bitrate(u8 desc_rate) 131 { 132 struct ieee80211_rate rate; 133 134 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n")) 135 return 0; 136 137 rate = rtw_ratetable[desc_rate]; 138 139 return rate.bitrate; 140 } 141 142 static struct ieee80211_supported_band rtw_band_2ghz = { 143 .band = NL80211_BAND_2GHZ, 144 145 .channels = rtw_channeltable_2g, 146 .n_channels = ARRAY_SIZE(rtw_channeltable_2g), 147 148 .bitrates = rtw_ratetable, 149 .n_bitrates = ARRAY_SIZE(rtw_ratetable), 150 151 .ht_cap = {0}, 152 .vht_cap = {0}, 153 }; 154 155 static struct ieee80211_supported_band rtw_band_5ghz = { 156 .band = NL80211_BAND_5GHZ, 157 158 .channels = rtw_channeltable_5g, 159 .n_channels = ARRAY_SIZE(rtw_channeltable_5g), 160 161 /* 5G has no CCK rates */ 162 .bitrates = rtw_ratetable + 4, 163 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4, 164 165 .ht_cap = {0}, 166 .vht_cap = {0}, 167 }; 168 169 struct rtw_watch_dog_iter_data { 170 struct rtw_dev *rtwdev; 171 struct rtw_vif *rtwvif; 172 }; 173 174 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif) 175 { 176 struct rtw_bf_info *bf_info = &rtwdev->bf_info; 177 u8 fix_rate_enable = 0; 178 u8 new_csi_rate_idx; 179 180 if (rtwvif->bfee.role != RTW_BFEE_SU && 181 rtwvif->bfee.role != RTW_BFEE_MU) 182 return; 183 184 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi, 185 bf_info->cur_csi_rpt_rate, 186 fix_rate_enable, &new_csi_rate_idx); 187 188 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate) 189 bf_info->cur_csi_rpt_rate = new_csi_rate_idx; 190 } 191 192 static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif) 193 { 194 struct rtw_watch_dog_iter_data *iter_data = data; 195 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 196 197 if (vif->type == NL80211_IFTYPE_STATION) 198 if (vif->cfg.assoc) 199 iter_data->rtwvif = rtwvif; 200 201 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif); 202 203 rtwvif->stats.tx_unicast = 0; 204 rtwvif->stats.rx_unicast = 0; 205 rtwvif->stats.tx_cnt = 0; 206 rtwvif->stats.rx_cnt = 0; 207 } 208 209 /* process TX/RX statistics periodically for hardware, 210 * the information helps hardware to enhance performance 211 */ 212 static void rtw_watch_dog_work(struct work_struct *work) 213 { 214 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 215 watch_dog_work.work); 216 struct rtw_traffic_stats *stats = &rtwdev->stats; 217 struct rtw_watch_dog_iter_data data = {}; 218 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 219 bool ps_active; 220 221 mutex_lock(&rtwdev->mutex); 222 223 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags)) 224 goto unlock; 225 226 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 227 RTW_WATCH_DOG_DELAY_TIME); 228 229 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100) 230 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 231 else 232 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 233 234 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags)) 235 rtw_coex_wl_status_change_notify(rtwdev, 0); 236 237 if (stats->tx_cnt > RTW_LPS_THRESHOLD || 238 stats->rx_cnt > RTW_LPS_THRESHOLD) 239 ps_active = true; 240 else 241 ps_active = false; 242 243 ewma_tp_add(&stats->tx_ewma_tp, 244 (u32)(stats->tx_unicast >> RTW_TP_SHIFT)); 245 ewma_tp_add(&stats->rx_ewma_tp, 246 (u32)(stats->rx_unicast >> RTW_TP_SHIFT)); 247 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp); 248 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp); 249 250 /* reset tx/rx statictics */ 251 stats->tx_unicast = 0; 252 stats->rx_unicast = 0; 253 stats->tx_cnt = 0; 254 stats->rx_cnt = 0; 255 256 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 257 goto unlock; 258 259 /* make sure BB/RF is working for dynamic mech */ 260 rtw_leave_lps(rtwdev); 261 rtw_coex_wl_status_check(rtwdev); 262 rtw_coex_query_bt_hid_list(rtwdev); 263 264 rtw_phy_dynamic_mechanism(rtwdev); 265 266 data.rtwdev = rtwdev; 267 /* rtw_iterate_vifs internally uses an atomic iterator which is needed 268 * to avoid taking local->iflist_mtx mutex 269 */ 270 rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data); 271 272 /* fw supports only one station associated to enter lps, if there are 273 * more than two stations associated to the AP, then we can not enter 274 * lps, because fw does not handle the overlapped beacon interval 275 * 276 * rtw_recalc_lps() iterate vifs and determine if driver can enter 277 * ps by vif->type and vif->cfg.ps, all we need to do here is to 278 * get that vif and check if device is having traffic more than the 279 * threshold. 280 */ 281 if (rtwdev->ps_enabled && data.rtwvif && !ps_active && 282 !rtwdev->beacon_loss && !rtwdev->ap_active) 283 rtw_enter_lps(rtwdev, data.rtwvif->port); 284 285 rtwdev->watch_dog_cnt++; 286 287 unlock: 288 mutex_unlock(&rtwdev->mutex); 289 } 290 291 static void rtw_c2h_work(struct work_struct *work) 292 { 293 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work); 294 struct sk_buff *skb, *tmp; 295 296 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { 297 skb_unlink(skb, &rtwdev->c2h_queue); 298 rtw_fw_c2h_cmd_handle(rtwdev, skb); 299 dev_kfree_skb_any(skb); 300 } 301 } 302 303 static void rtw_ips_work(struct work_struct *work) 304 { 305 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work); 306 307 mutex_lock(&rtwdev->mutex); 308 if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE) 309 rtw_enter_ips(rtwdev); 310 mutex_unlock(&rtwdev->mutex); 311 } 312 313 static u8 rtw_acquire_macid(struct rtw_dev *rtwdev) 314 { 315 unsigned long mac_id; 316 317 mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM); 318 if (mac_id < RTW_MAX_MAC_ID_NUM) 319 set_bit(mac_id, rtwdev->mac_id_map); 320 321 return mac_id; 322 } 323 324 static void rtw_sta_rc_work(struct work_struct *work) 325 { 326 struct rtw_sta_info *si = container_of(work, struct rtw_sta_info, 327 rc_work); 328 struct rtw_dev *rtwdev = si->rtwdev; 329 330 mutex_lock(&rtwdev->mutex); 331 rtw_update_sta_info(rtwdev, si, true); 332 mutex_unlock(&rtwdev->mutex); 333 } 334 335 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, 336 struct ieee80211_vif *vif) 337 { 338 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 339 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 340 int i; 341 342 si->mac_id = rtw_acquire_macid(rtwdev); 343 if (si->mac_id >= RTW_MAX_MAC_ID_NUM) 344 return -ENOSPC; 345 346 if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc == 0) 347 rtwvif->mac_id = si->mac_id; 348 si->rtwdev = rtwdev; 349 si->sta = sta; 350 si->vif = vif; 351 si->init_ra_lv = 1; 352 ewma_rssi_init(&si->avg_rssi); 353 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 354 rtw_txq_init(rtwdev, sta->txq[i]); 355 INIT_WORK(&si->rc_work, rtw_sta_rc_work); 356 357 rtw_update_sta_info(rtwdev, si, true); 358 rtw_fw_media_status_report(rtwdev, si->mac_id, true); 359 360 rtwdev->sta_cnt++; 361 rtwdev->beacon_loss = false; 362 #if defined(__linux__) 363 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n", 364 sta->addr, si->mac_id); 365 #elif defined(__FreeBSD__) 366 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D joined with macid %d\n", 367 sta->addr, ":", si->mac_id); 368 #endif 369 370 return 0; 371 } 372 373 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, 374 bool fw_exist) 375 { 376 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 377 int i; 378 379 cancel_work_sync(&si->rc_work); 380 381 rtw_release_macid(rtwdev, si->mac_id); 382 if (fw_exist) 383 rtw_fw_media_status_report(rtwdev, si->mac_id, false); 384 385 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 386 rtw_txq_cleanup(rtwdev, sta->txq[i]); 387 388 kfree(si->mask); 389 390 rtwdev->sta_cnt--; 391 #if defined(__linux__) 392 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n", 393 sta->addr, si->mac_id); 394 #elif defined(__FreeBSD__) 395 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D with macid %d left\n", 396 sta->addr, ":", si->mac_id); 397 #endif 398 } 399 400 struct rtw_fwcd_hdr { 401 u32 item; 402 u32 size; 403 u32 padding1; 404 u32 padding2; 405 } __packed; 406 407 static int rtw_fwcd_prep(struct rtw_dev *rtwdev) 408 { 409 const struct rtw_chip_info *chip = rtwdev->chip; 410 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 411 const struct rtw_fwcd_segs *segs = chip->fwcd_segs; 412 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr); 413 u8 i; 414 415 if (segs) { 416 prep_size += segs->num * sizeof(struct rtw_fwcd_hdr); 417 418 for (i = 0; i < segs->num; i++) 419 prep_size += segs->segs[i]; 420 } 421 422 desc->data = vmalloc(prep_size); 423 if (!desc->data) 424 return -ENOMEM; 425 426 desc->size = prep_size; 427 desc->next = desc->data; 428 429 return 0; 430 } 431 432 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size) 433 { 434 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 435 struct rtw_fwcd_hdr *hdr; 436 u8 *next; 437 438 if (!desc->data) { 439 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n"); 440 return NULL; 441 } 442 443 next = desc->next + sizeof(struct rtw_fwcd_hdr); 444 if (next - desc->data + size > desc->size) { 445 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n"); 446 return NULL; 447 } 448 449 hdr = (struct rtw_fwcd_hdr *)(desc->next); 450 hdr->item = item; 451 hdr->size = size; 452 hdr->padding1 = 0x01234567; 453 hdr->padding2 = 0x89abcdef; 454 desc->next = next + size; 455 456 return next; 457 } 458 459 static void rtw_fwcd_dump(struct rtw_dev *rtwdev) 460 { 461 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 462 463 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n"); 464 465 /* Data will be freed after lifetime of device coredump. After calling 466 * dev_coredump, data is supposed to be handled by the device coredump 467 * framework. Note that a new dump will be discarded if a previous one 468 * hasn't been released yet. 469 */ 470 dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL); 471 } 472 473 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self) 474 { 475 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 476 477 if (free_self) { 478 rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n"); 479 vfree(desc->data); 480 } 481 482 desc->data = NULL; 483 desc->next = NULL; 484 } 485 486 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev) 487 { 488 u32 size = rtwdev->chip->fw_rxff_size; 489 u32 *buf; 490 u8 seq; 491 492 buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size); 493 if (!buf) 494 return -ENOMEM; 495 496 if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) { 497 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n"); 498 return -EINVAL; 499 } 500 501 if (GET_FW_DUMP_LEN(buf) == 0) { 502 rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n"); 503 return -EINVAL; 504 } 505 506 seq = GET_FW_DUMP_SEQ(buf); 507 if (seq > 0) { 508 rtw_dbg(rtwdev, RTW_DBG_FW, 509 "fw crash dump's seq is wrong: %d\n", seq); 510 return -EINVAL; 511 } 512 513 return 0; 514 } 515 516 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size, 517 u32 fwcd_item) 518 { 519 u32 rxff = rtwdev->chip->fw_rxff_size; 520 u32 dump_size, done_size = 0; 521 u8 *buf; 522 int ret; 523 524 buf = rtw_fwcd_next(rtwdev, fwcd_item, size); 525 if (!buf) 526 return -ENOMEM; 527 528 while (size) { 529 dump_size = size > rxff ? rxff : size; 530 531 ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size, 532 dump_size); 533 if (ret) { 534 rtw_err(rtwdev, 535 "ddma fw 0x%x [+0x%x] to fw fifo fail\n", 536 ocp_src, done_size); 537 return ret; 538 } 539 540 ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, 541 dump_size, (u32 *)(buf + done_size)); 542 if (ret) { 543 rtw_err(rtwdev, 544 "dump fw 0x%x [+0x%x] from fw fifo fail\n", 545 ocp_src, done_size); 546 return ret; 547 } 548 549 size -= dump_size; 550 done_size += dump_size; 551 } 552 553 return 0; 554 } 555 EXPORT_SYMBOL(rtw_dump_fw); 556 557 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size) 558 { 559 u8 *buf; 560 u32 i; 561 562 if (addr & 0x3) { 563 WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr); 564 return -EINVAL; 565 } 566 567 buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size); 568 if (!buf) 569 return -ENOMEM; 570 571 for (i = 0; i < size; i += 4) 572 *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i); 573 574 return 0; 575 } 576 EXPORT_SYMBOL(rtw_dump_reg); 577 578 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif, 579 struct ieee80211_bss_conf *conf) 580 { 581 struct ieee80211_vif *vif = NULL; 582 583 if (conf) 584 vif = container_of(conf, struct ieee80211_vif, bss_conf); 585 586 if (conf && vif->cfg.assoc) { 587 rtwvif->aid = vif->cfg.aid; 588 rtwvif->net_type = RTW_NET_MGD_LINKED; 589 } else { 590 rtwvif->aid = 0; 591 rtwvif->net_type = RTW_NET_NO_LINK; 592 } 593 } 594 595 static void rtw_reset_key_iter(struct ieee80211_hw *hw, 596 struct ieee80211_vif *vif, 597 struct ieee80211_sta *sta, 598 struct ieee80211_key_conf *key, 599 void *data) 600 { 601 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 602 struct rtw_sec_desc *sec = &rtwdev->sec; 603 604 rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx); 605 } 606 607 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta) 608 { 609 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 610 611 if (rtwdev->sta_cnt == 0) { 612 rtw_warn(rtwdev, "sta count before reset should not be 0\n"); 613 return; 614 } 615 rtw_sta_remove(rtwdev, sta, false); 616 } 617 618 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 619 { 620 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 621 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 622 623 rtw_bf_disassoc(rtwdev, vif, NULL); 624 rtw_vif_assoc_changed(rtwvif, NULL); 625 rtw_txq_cleanup(rtwdev, vif->txq); 626 } 627 628 void rtw_fw_recovery(struct rtw_dev *rtwdev) 629 { 630 if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags)) 631 ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work); 632 } 633 634 static void __fw_recovery_work(struct rtw_dev *rtwdev) 635 { 636 int ret = 0; 637 638 set_bit(RTW_FLAG_RESTARTING, rtwdev->flags); 639 clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags); 640 641 ret = rtw_fwcd_prep(rtwdev); 642 if (ret) 643 goto free; 644 ret = rtw_fw_dump_crash_log(rtwdev); 645 if (ret) 646 goto free; 647 ret = rtw_chip_dump_fw_crash(rtwdev); 648 if (ret) 649 goto free; 650 651 rtw_fwcd_dump(rtwdev); 652 free: 653 rtw_fwcd_free(rtwdev, !!ret); 654 rtw_write8(rtwdev, REG_MCU_TST_CFG, 0); 655 656 WARN(1, "firmware crash, start reset and recover\n"); 657 658 rcu_read_lock(); 659 rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev); 660 rcu_read_unlock(); 661 rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev); 662 rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev); 663 bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM); 664 rtw_enter_ips(rtwdev); 665 } 666 667 static void rtw_fw_recovery_work(struct work_struct *work) 668 { 669 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 670 fw_recovery_work); 671 672 mutex_lock(&rtwdev->mutex); 673 __fw_recovery_work(rtwdev); 674 mutex_unlock(&rtwdev->mutex); 675 676 ieee80211_restart_hw(rtwdev->hw); 677 } 678 679 struct rtw_txq_ba_iter_data { 680 }; 681 682 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta) 683 { 684 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 685 int ret; 686 u8 tid; 687 688 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 689 while (tid != IEEE80211_NUM_TIDS) { 690 clear_bit(tid, si->tid_ba); 691 ret = ieee80211_start_tx_ba_session(sta, tid, 0); 692 if (ret == -EINVAL) { 693 struct ieee80211_txq *txq; 694 struct rtw_txq *rtwtxq; 695 696 txq = sta->txq[tid]; 697 rtwtxq = (struct rtw_txq *)txq->drv_priv; 698 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags); 699 } 700 701 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 702 } 703 } 704 705 static void rtw_txq_ba_work(struct work_struct *work) 706 { 707 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work); 708 struct rtw_txq_ba_iter_data data; 709 710 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data); 711 } 712 713 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel) 714 { 715 if (IS_CH_2G_BAND(channel)) 716 pkt_stat->band = NL80211_BAND_2GHZ; 717 else if (IS_CH_5G_BAND(channel)) 718 pkt_stat->band = NL80211_BAND_5GHZ; 719 else 720 return; 721 722 pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band); 723 } 724 EXPORT_SYMBOL(rtw_set_rx_freq_band); 725 726 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period) 727 { 728 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE); 729 rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1); 730 } 731 732 void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel, 733 u8 primary_channel, enum rtw_supported_band band, 734 enum rtw_bandwidth bandwidth) 735 { 736 enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band); 737 struct rtw_hal *hal = &rtwdev->hal; 738 u8 *cch_by_bw = hal->cch_by_bw; 739 u32 center_freq, primary_freq; 740 enum rtw_sar_bands sar_band; 741 u8 primary_channel_idx; 742 743 center_freq = ieee80211_channel_to_frequency(center_channel, nl_band); 744 primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band); 745 746 /* assign the center channel used while 20M bw is selected */ 747 cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel; 748 749 /* assign the center channel used while current bw is selected */ 750 cch_by_bw[bandwidth] = center_channel; 751 752 switch (bandwidth) { 753 case RTW_CHANNEL_WIDTH_20: 754 default: 755 primary_channel_idx = RTW_SC_DONT_CARE; 756 break; 757 case RTW_CHANNEL_WIDTH_40: 758 if (primary_freq > center_freq) 759 primary_channel_idx = RTW_SC_20_UPPER; 760 else 761 primary_channel_idx = RTW_SC_20_LOWER; 762 break; 763 case RTW_CHANNEL_WIDTH_80: 764 if (primary_freq > center_freq) { 765 if (primary_freq - center_freq == 10) 766 primary_channel_idx = RTW_SC_20_UPPER; 767 else 768 primary_channel_idx = RTW_SC_20_UPMOST; 769 770 /* assign the center channel used 771 * while 40M bw is selected 772 */ 773 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4; 774 } else { 775 if (center_freq - primary_freq == 10) 776 primary_channel_idx = RTW_SC_20_LOWER; 777 else 778 primary_channel_idx = RTW_SC_20_LOWEST; 779 780 /* assign the center channel used 781 * while 40M bw is selected 782 */ 783 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4; 784 } 785 break; 786 } 787 788 switch (center_channel) { 789 case 1 ... 14: 790 sar_band = RTW_SAR_BAND_0; 791 break; 792 case 36 ... 64: 793 sar_band = RTW_SAR_BAND_1; 794 break; 795 case 100 ... 144: 796 sar_band = RTW_SAR_BAND_3; 797 break; 798 case 149 ... 177: 799 sar_band = RTW_SAR_BAND_4; 800 break; 801 default: 802 WARN(1, "unknown ch(%u) to SAR band\n", center_channel); 803 sar_band = RTW_SAR_BAND_0; 804 break; 805 } 806 807 hal->current_primary_channel_index = primary_channel_idx; 808 hal->current_band_width = bandwidth; 809 hal->primary_channel = primary_channel; 810 hal->current_channel = center_channel; 811 hal->current_band_type = band; 812 hal->sar_band = sar_band; 813 } 814 815 void rtw_get_channel_params(struct cfg80211_chan_def *chandef, 816 struct rtw_channel_params *chan_params) 817 { 818 struct ieee80211_channel *channel = chandef->chan; 819 enum nl80211_chan_width width = chandef->width; 820 u32 primary_freq, center_freq; 821 u8 center_chan; 822 u8 bandwidth = RTW_CHANNEL_WIDTH_20; 823 824 center_chan = channel->hw_value; 825 primary_freq = channel->center_freq; 826 center_freq = chandef->center_freq1; 827 828 switch (width) { 829 case NL80211_CHAN_WIDTH_20_NOHT: 830 case NL80211_CHAN_WIDTH_20: 831 bandwidth = RTW_CHANNEL_WIDTH_20; 832 break; 833 case NL80211_CHAN_WIDTH_40: 834 bandwidth = RTW_CHANNEL_WIDTH_40; 835 if (primary_freq > center_freq) 836 center_chan -= 2; 837 else 838 center_chan += 2; 839 break; 840 case NL80211_CHAN_WIDTH_80: 841 bandwidth = RTW_CHANNEL_WIDTH_80; 842 if (primary_freq > center_freq) { 843 if (primary_freq - center_freq == 10) 844 center_chan -= 2; 845 else 846 center_chan -= 6; 847 } else { 848 if (center_freq - primary_freq == 10) 849 center_chan += 2; 850 else 851 center_chan += 6; 852 } 853 break; 854 default: 855 center_chan = 0; 856 break; 857 } 858 859 chan_params->center_chan = center_chan; 860 chan_params->bandwidth = bandwidth; 861 chan_params->primary_chan = channel->hw_value; 862 } 863 864 void rtw_set_channel(struct rtw_dev *rtwdev) 865 { 866 const struct rtw_chip_info *chip = rtwdev->chip; 867 struct ieee80211_hw *hw = rtwdev->hw; 868 struct rtw_hal *hal = &rtwdev->hal; 869 struct rtw_channel_params ch_param; 870 u8 center_chan, primary_chan, bandwidth, band; 871 872 rtw_get_channel_params(&hw->conf.chandef, &ch_param); 873 if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) 874 return; 875 876 center_chan = ch_param.center_chan; 877 primary_chan = ch_param.primary_chan; 878 bandwidth = ch_param.bandwidth; 879 band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; 880 881 rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth); 882 883 if (rtwdev->scan_info.op_chan) 884 rtw_store_op_chan(rtwdev, true); 885 886 chip->ops->set_channel(rtwdev, center_chan, bandwidth, 887 hal->current_primary_channel_index); 888 889 if (hal->current_band_type == RTW_BAND_5G) { 890 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G); 891 } else { 892 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 893 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G); 894 else 895 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN); 896 } 897 898 rtw_phy_set_tx_power_level(rtwdev, center_chan); 899 900 /* if the channel isn't set for scanning, we will do RF calibration 901 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration 902 * during scanning on each channel takes too long. 903 */ 904 if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 905 rtwdev->need_rfk = true; 906 } 907 908 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev) 909 { 910 const struct rtw_chip_info *chip = rtwdev->chip; 911 912 if (rtwdev->need_rfk) { 913 rtwdev->need_rfk = false; 914 chip->ops->phy_calibration(rtwdev); 915 } 916 } 917 918 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr) 919 { 920 int i; 921 922 for (i = 0; i < ETH_ALEN; i++) 923 rtw_write8(rtwdev, start + i, addr[i]); 924 } 925 926 void rtw_vif_port_config(struct rtw_dev *rtwdev, 927 struct rtw_vif *rtwvif, 928 u32 config) 929 { 930 u32 addr, mask; 931 932 if (config & PORT_SET_MAC_ADDR) { 933 addr = rtwvif->conf->mac_addr.addr; 934 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr); 935 } 936 if (config & PORT_SET_BSSID) { 937 addr = rtwvif->conf->bssid.addr; 938 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid); 939 } 940 if (config & PORT_SET_NET_TYPE) { 941 addr = rtwvif->conf->net_type.addr; 942 mask = rtwvif->conf->net_type.mask; 943 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); 944 } 945 if (config & PORT_SET_AID) { 946 addr = rtwvif->conf->aid.addr; 947 mask = rtwvif->conf->aid.mask; 948 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); 949 } 950 if (config & PORT_SET_BCN_CTRL) { 951 addr = rtwvif->conf->bcn_ctrl.addr; 952 mask = rtwvif->conf->bcn_ctrl.mask; 953 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl); 954 } 955 } 956 957 static u8 hw_bw_cap_to_bitamp(u8 bw_cap) 958 { 959 u8 bw = 0; 960 961 switch (bw_cap) { 962 case EFUSE_HW_CAP_IGNORE: 963 case EFUSE_HW_CAP_SUPP_BW80: 964 bw |= BIT(RTW_CHANNEL_WIDTH_80); 965 fallthrough; 966 case EFUSE_HW_CAP_SUPP_BW40: 967 bw |= BIT(RTW_CHANNEL_WIDTH_40); 968 fallthrough; 969 default: 970 bw |= BIT(RTW_CHANNEL_WIDTH_20); 971 break; 972 } 973 974 return bw; 975 } 976 977 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) 978 { 979 const struct rtw_chip_info *chip = rtwdev->chip; 980 struct rtw_hal *hal = &rtwdev->hal; 981 982 if (hw_ant_num == EFUSE_HW_CAP_IGNORE || 983 hw_ant_num >= hal->rf_path_num) 984 return; 985 986 switch (hw_ant_num) { 987 case 1: 988 hal->rf_type = RF_1T1R; 989 hal->rf_path_num = 1; 990 if (!chip->fix_rf_phy_num) 991 hal->rf_phy_num = hal->rf_path_num; 992 hal->antenna_tx = BB_PATH_A; 993 hal->antenna_rx = BB_PATH_A; 994 break; 995 default: 996 WARN(1, "invalid hw configuration from efuse\n"); 997 break; 998 } 999 } 1000 1001 static u64 get_vht_ra_mask(struct ieee80211_sta *sta) 1002 { 1003 u64 ra_mask = 0; 1004 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 1005 u8 vht_mcs_cap; 1006 int i, nss; 1007 1008 /* 4SS, every two bits for MCS7/8/9 */ 1009 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) { 1010 vht_mcs_cap = mcs_map & 0x3; 1011 switch (vht_mcs_cap) { 1012 case 2: /* MCS9 */ 1013 ra_mask |= 0x3ffULL << nss; 1014 break; 1015 case 1: /* MCS8 */ 1016 ra_mask |= 0x1ffULL << nss; 1017 break; 1018 case 0: /* MCS7 */ 1019 ra_mask |= 0x0ffULL << nss; 1020 break; 1021 default: 1022 break; 1023 } 1024 } 1025 1026 return ra_mask; 1027 } 1028 1029 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num) 1030 { 1031 u8 rate_id = 0; 1032 1033 switch (wireless_set) { 1034 case WIRELESS_CCK: 1035 rate_id = RTW_RATEID_B_20M; 1036 break; 1037 case WIRELESS_OFDM: 1038 rate_id = RTW_RATEID_G; 1039 break; 1040 case WIRELESS_CCK | WIRELESS_OFDM: 1041 rate_id = RTW_RATEID_BG; 1042 break; 1043 case WIRELESS_OFDM | WIRELESS_HT: 1044 if (tx_num == 1) 1045 rate_id = RTW_RATEID_GN_N1SS; 1046 else if (tx_num == 2) 1047 rate_id = RTW_RATEID_GN_N2SS; 1048 else if (tx_num == 3) 1049 rate_id = RTW_RATEID_ARFR5_N_3SS; 1050 break; 1051 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT: 1052 if (bw_mode == RTW_CHANNEL_WIDTH_40) { 1053 if (tx_num == 1) 1054 rate_id = RTW_RATEID_BGN_40M_1SS; 1055 else if (tx_num == 2) 1056 rate_id = RTW_RATEID_BGN_40M_2SS; 1057 else if (tx_num == 3) 1058 rate_id = RTW_RATEID_ARFR5_N_3SS; 1059 else if (tx_num == 4) 1060 rate_id = RTW_RATEID_ARFR7_N_4SS; 1061 } else { 1062 if (tx_num == 1) 1063 rate_id = RTW_RATEID_BGN_20M_1SS; 1064 else if (tx_num == 2) 1065 rate_id = RTW_RATEID_BGN_20M_2SS; 1066 else if (tx_num == 3) 1067 rate_id = RTW_RATEID_ARFR5_N_3SS; 1068 else if (tx_num == 4) 1069 rate_id = RTW_RATEID_ARFR7_N_4SS; 1070 } 1071 break; 1072 case WIRELESS_OFDM | WIRELESS_VHT: 1073 if (tx_num == 1) 1074 rate_id = RTW_RATEID_ARFR1_AC_1SS; 1075 else if (tx_num == 2) 1076 rate_id = RTW_RATEID_ARFR0_AC_2SS; 1077 else if (tx_num == 3) 1078 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1079 else if (tx_num == 4) 1080 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1081 break; 1082 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT: 1083 if (bw_mode >= RTW_CHANNEL_WIDTH_80) { 1084 if (tx_num == 1) 1085 rate_id = RTW_RATEID_ARFR1_AC_1SS; 1086 else if (tx_num == 2) 1087 rate_id = RTW_RATEID_ARFR0_AC_2SS; 1088 else if (tx_num == 3) 1089 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1090 else if (tx_num == 4) 1091 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1092 } else { 1093 if (tx_num == 1) 1094 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS; 1095 else if (tx_num == 2) 1096 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS; 1097 else if (tx_num == 3) 1098 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1099 else if (tx_num == 4) 1100 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1101 } 1102 break; 1103 default: 1104 break; 1105 } 1106 1107 return rate_id; 1108 } 1109 1110 #define RA_MASK_CCK_RATES 0x0000f 1111 #define RA_MASK_OFDM_RATES 0x00ff0 1112 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0) 1113 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8) 1114 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16) 1115 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \ 1116 RA_MASK_HT_RATES_2SS | \ 1117 RA_MASK_HT_RATES_3SS) 1118 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0) 1119 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10) 1120 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20) 1121 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \ 1122 RA_MASK_VHT_RATES_2SS | \ 1123 RA_MASK_VHT_RATES_3SS) 1124 #define RA_MASK_CCK_IN_BG 0x00005 1125 #define RA_MASK_CCK_IN_HT 0x00005 1126 #define RA_MASK_CCK_IN_VHT 0x00005 1127 #define RA_MASK_OFDM_IN_VHT 0x00010 1128 #define RA_MASK_OFDM_IN_HT_2G 0x00010 1129 #define RA_MASK_OFDM_IN_HT_5G 0x00030 1130 1131 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set) 1132 { 1133 u8 rssi_level = si->rssi_level; 1134 1135 if (wireless_set == WIRELESS_CCK) 1136 return 0xffffffffffffffffULL; 1137 1138 if (rssi_level == 0) 1139 return 0xffffffffffffffffULL; 1140 else if (rssi_level == 1) 1141 return 0xfffffffffffffff0ULL; 1142 else if (rssi_level == 2) 1143 return 0xffffffffffffefe0ULL; 1144 else if (rssi_level == 3) 1145 return 0xffffffffffffcfc0ULL; 1146 else if (rssi_level == 4) 1147 return 0xffffffffffff8f80ULL; 1148 else 1149 return 0xffffffffffff0f00ULL; 1150 } 1151 1152 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak) 1153 { 1154 if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0) 1155 ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); 1156 1157 if (ra_mask == 0) 1158 ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); 1159 1160 return ra_mask; 1161 } 1162 1163 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si, 1164 u64 ra_mask, bool is_vht_enable) 1165 { 1166 struct rtw_hal *hal = &rtwdev->hal; 1167 const struct cfg80211_bitrate_mask *mask = si->mask; 1168 u64 cfg_mask = GENMASK_ULL(63, 0); 1169 u8 band; 1170 1171 if (!si->use_cfg_mask) 1172 return ra_mask; 1173 1174 band = hal->current_band_type; 1175 if (band == RTW_BAND_2G) { 1176 band = NL80211_BAND_2GHZ; 1177 cfg_mask = mask->control[band].legacy; 1178 } else if (band == RTW_BAND_5G) { 1179 band = NL80211_BAND_5GHZ; 1180 cfg_mask = u64_encode_bits(mask->control[band].legacy, 1181 RA_MASK_OFDM_RATES); 1182 } 1183 1184 if (!is_vht_enable) { 1185 if (ra_mask & RA_MASK_HT_RATES_1SS) 1186 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], 1187 RA_MASK_HT_RATES_1SS); 1188 if (ra_mask & RA_MASK_HT_RATES_2SS) 1189 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], 1190 RA_MASK_HT_RATES_2SS); 1191 } else { 1192 if (ra_mask & RA_MASK_VHT_RATES_1SS) 1193 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], 1194 RA_MASK_VHT_RATES_1SS); 1195 if (ra_mask & RA_MASK_VHT_RATES_2SS) 1196 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], 1197 RA_MASK_VHT_RATES_2SS); 1198 } 1199 1200 ra_mask &= cfg_mask; 1201 1202 return ra_mask; 1203 } 1204 1205 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, 1206 bool reset_ra_mask) 1207 { 1208 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 1209 struct ieee80211_sta *sta = si->sta; 1210 struct rtw_efuse *efuse = &rtwdev->efuse; 1211 struct rtw_hal *hal = &rtwdev->hal; 1212 u8 wireless_set; 1213 u8 bw_mode; 1214 u8 rate_id; 1215 u8 rf_type = RF_1T1R; 1216 u8 stbc_en = 0; 1217 u8 ldpc_en = 0; 1218 u8 tx_num = 1; 1219 u64 ra_mask = 0; 1220 u64 ra_mask_bak = 0; 1221 bool is_vht_enable = false; 1222 bool is_support_sgi = false; 1223 1224 if (sta->deflink.vht_cap.vht_supported) { 1225 is_vht_enable = true; 1226 ra_mask |= get_vht_ra_mask(sta); 1227 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) 1228 stbc_en = VHT_STBC_EN; 1229 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) 1230 ldpc_en = VHT_LDPC_EN; 1231 } else if (sta->deflink.ht_cap.ht_supported) { 1232 ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) | 1233 (sta->deflink.ht_cap.mcs.rx_mask[0] << 12); 1234 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 1235 stbc_en = HT_STBC_EN; 1236 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) 1237 ldpc_en = HT_LDPC_EN; 1238 } 1239 1240 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss) 1241 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS; 1242 1243 if (hal->current_band_type == RTW_BAND_5G) { 1244 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4; 1245 ra_mask_bak = ra_mask; 1246 if (sta->deflink.vht_cap.vht_supported) { 1247 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; 1248 wireless_set = WIRELESS_OFDM | WIRELESS_VHT; 1249 } else if (sta->deflink.ht_cap.ht_supported) { 1250 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G; 1251 wireless_set = WIRELESS_OFDM | WIRELESS_HT; 1252 } else { 1253 wireless_set = WIRELESS_OFDM; 1254 } 1255 dm_info->rrsr_val_init = RRSR_INIT_5G; 1256 } else if (hal->current_band_type == RTW_BAND_2G) { 1257 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ]; 1258 ra_mask_bak = ra_mask; 1259 if (sta->deflink.vht_cap.vht_supported) { 1260 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT | 1261 RA_MASK_OFDM_IN_VHT; 1262 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 1263 WIRELESS_HT | WIRELESS_VHT; 1264 } else if (sta->deflink.ht_cap.ht_supported) { 1265 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT | 1266 RA_MASK_OFDM_IN_HT_2G; 1267 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 1268 WIRELESS_HT; 1269 #if defined(__linux__) 1270 } else if (sta->deflink.supp_rates[0] <= 0xf) { 1271 #elif defined(__FreeBSD__) 1272 } else if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] <= 0xf) { 1273 #endif 1274 wireless_set = WIRELESS_CCK; 1275 } else { 1276 ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG; 1277 wireless_set = WIRELESS_CCK | WIRELESS_OFDM; 1278 } 1279 dm_info->rrsr_val_init = RRSR_INIT_2G; 1280 } else { 1281 rtw_err(rtwdev, "Unknown band type\n"); 1282 ra_mask_bak = ra_mask; 1283 wireless_set = 0; 1284 } 1285 1286 switch (sta->deflink.bandwidth) { 1287 case IEEE80211_STA_RX_BW_80: 1288 bw_mode = RTW_CHANNEL_WIDTH_80; 1289 is_support_sgi = sta->deflink.vht_cap.vht_supported && 1290 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); 1291 break; 1292 case IEEE80211_STA_RX_BW_40: 1293 bw_mode = RTW_CHANNEL_WIDTH_40; 1294 is_support_sgi = sta->deflink.ht_cap.ht_supported && 1295 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40); 1296 break; 1297 default: 1298 bw_mode = RTW_CHANNEL_WIDTH_20; 1299 is_support_sgi = sta->deflink.ht_cap.ht_supported && 1300 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20); 1301 break; 1302 } 1303 1304 if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) { 1305 tx_num = 2; 1306 rf_type = RF_2T2R; 1307 } else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) { 1308 tx_num = 2; 1309 rf_type = RF_2T2R; 1310 } 1311 1312 rate_id = get_rate_id(wireless_set, bw_mode, tx_num); 1313 1314 ra_mask &= rtw_rate_mask_rssi(si, wireless_set); 1315 ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak); 1316 ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable); 1317 1318 si->bw_mode = bw_mode; 1319 si->stbc_en = stbc_en; 1320 si->ldpc_en = ldpc_en; 1321 si->rf_type = rf_type; 1322 si->sgi_enable = is_support_sgi; 1323 si->vht_enable = is_vht_enable; 1324 si->ra_mask = ra_mask; 1325 si->rate_id = rate_id; 1326 1327 rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask); 1328 } 1329 1330 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev) 1331 { 1332 const struct rtw_chip_info *chip = rtwdev->chip; 1333 struct rtw_fw_state *fw; 1334 1335 fw = &rtwdev->fw; 1336 wait_for_completion(&fw->completion); 1337 if (!fw->firmware) 1338 return -EINVAL; 1339 1340 if (chip->wow_fw_name) { 1341 fw = &rtwdev->wow_fw; 1342 wait_for_completion(&fw->completion); 1343 if (!fw->firmware) 1344 return -EINVAL; 1345 } 1346 1347 return 0; 1348 } 1349 1350 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev, 1351 struct rtw_fw_state *fw) 1352 { 1353 const struct rtw_chip_info *chip = rtwdev->chip; 1354 1355 if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported || 1356 !fw->feature) 1357 return LPS_DEEP_MODE_NONE; 1358 1359 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) && 1360 rtw_fw_feature_check(fw, FW_FEATURE_PG)) 1361 return LPS_DEEP_MODE_PG; 1362 1363 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) && 1364 rtw_fw_feature_check(fw, FW_FEATURE_LCLK)) 1365 return LPS_DEEP_MODE_LCLK; 1366 1367 return LPS_DEEP_MODE_NONE; 1368 } 1369 1370 static int rtw_power_on(struct rtw_dev *rtwdev) 1371 { 1372 const struct rtw_chip_info *chip = rtwdev->chip; 1373 struct rtw_fw_state *fw = &rtwdev->fw; 1374 bool wifi_only; 1375 int ret; 1376 1377 ret = rtw_hci_setup(rtwdev); 1378 if (ret) { 1379 rtw_err(rtwdev, "failed to setup hci\n"); 1380 goto err; 1381 } 1382 1383 /* power on MAC before firmware downloaded */ 1384 ret = rtw_mac_power_on(rtwdev); 1385 if (ret) { 1386 rtw_err(rtwdev, "failed to power on mac\n"); 1387 goto err; 1388 } 1389 1390 ret = rtw_wait_firmware_completion(rtwdev); 1391 if (ret) { 1392 rtw_err(rtwdev, "failed to wait firmware completion\n"); 1393 goto err_off; 1394 } 1395 1396 ret = rtw_download_firmware(rtwdev, fw); 1397 if (ret) { 1398 rtw_err(rtwdev, "failed to download firmware\n"); 1399 goto err_off; 1400 } 1401 1402 /* config mac after firmware downloaded */ 1403 ret = rtw_mac_init(rtwdev); 1404 if (ret) { 1405 rtw_err(rtwdev, "failed to configure mac\n"); 1406 goto err_off; 1407 } 1408 1409 chip->ops->phy_set_param(rtwdev); 1410 1411 ret = rtw_hci_start(rtwdev); 1412 if (ret) { 1413 rtw_err(rtwdev, "failed to start hci\n"); 1414 goto err_off; 1415 } 1416 1417 /* send H2C after HCI has started */ 1418 rtw_fw_send_general_info(rtwdev); 1419 rtw_fw_send_phydm_info(rtwdev); 1420 1421 wifi_only = !rtwdev->efuse.btcoex; 1422 rtw_coex_power_on_setting(rtwdev); 1423 rtw_coex_init_hw_config(rtwdev, wifi_only); 1424 1425 return 0; 1426 1427 err_off: 1428 rtw_mac_power_off(rtwdev); 1429 1430 err: 1431 return ret; 1432 } 1433 1434 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start) 1435 { 1436 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN)) 1437 return; 1438 1439 if (start) { 1440 rtw_fw_scan_notify(rtwdev, true); 1441 } else { 1442 reinit_completion(&rtwdev->fw_scan_density); 1443 rtw_fw_scan_notify(rtwdev, false); 1444 if (!wait_for_completion_timeout(&rtwdev->fw_scan_density, 1445 SCAN_NOTIFY_TIMEOUT)) 1446 rtw_warn(rtwdev, "firmware failed to report density after scan\n"); 1447 } 1448 } 1449 1450 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, 1451 const u8 *mac_addr, bool hw_scan) 1452 { 1453 u32 config = 0; 1454 int ret = 0; 1455 1456 rtw_leave_lps(rtwdev); 1457 1458 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) { 1459 ret = rtw_leave_ips(rtwdev); 1460 if (ret) { 1461 rtw_err(rtwdev, "failed to leave idle state\n"); 1462 return; 1463 } 1464 } 1465 1466 ether_addr_copy(rtwvif->mac_addr, mac_addr); 1467 config |= PORT_SET_MAC_ADDR; 1468 rtw_vif_port_config(rtwdev, rtwvif, config); 1469 1470 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START); 1471 rtw_core_fw_scan_notify(rtwdev, true); 1472 1473 set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); 1474 set_bit(RTW_FLAG_SCANNING, rtwdev->flags); 1475 } 1476 1477 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, 1478 bool hw_scan) 1479 { 1480 struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL; 1481 u32 config = 0; 1482 1483 if (!rtwvif) 1484 return; 1485 1486 clear_bit(RTW_FLAG_SCANNING, rtwdev->flags); 1487 clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); 1488 1489 rtw_core_fw_scan_notify(rtwdev, false); 1490 1491 ether_addr_copy(rtwvif->mac_addr, vif->addr); 1492 config |= PORT_SET_MAC_ADDR; 1493 rtw_vif_port_config(rtwdev, rtwvif, config); 1494 1495 rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH); 1496 1497 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) 1498 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work); 1499 } 1500 1501 int rtw_core_start(struct rtw_dev *rtwdev) 1502 { 1503 int ret; 1504 1505 ret = rtw_power_on(rtwdev); 1506 if (ret) 1507 return ret; 1508 1509 rtw_sec_enable_sec_engine(rtwdev); 1510 1511 rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw); 1512 rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw); 1513 1514 /* rcr reset after powered on */ 1515 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); 1516 1517 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 1518 RTW_WATCH_DOG_DELAY_TIME); 1519 1520 set_bit(RTW_FLAG_RUNNING, rtwdev->flags); 1521 1522 return 0; 1523 } 1524 1525 static void rtw_power_off(struct rtw_dev *rtwdev) 1526 { 1527 rtw_hci_stop(rtwdev); 1528 rtw_coex_power_off_setting(rtwdev); 1529 rtw_mac_power_off(rtwdev); 1530 } 1531 1532 void rtw_core_stop(struct rtw_dev *rtwdev) 1533 { 1534 struct rtw_coex *coex = &rtwdev->coex; 1535 1536 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags); 1537 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags); 1538 1539 mutex_unlock(&rtwdev->mutex); 1540 1541 cancel_work_sync(&rtwdev->c2h_work); 1542 cancel_work_sync(&rtwdev->update_beacon_work); 1543 cancel_delayed_work_sync(&rtwdev->watch_dog_work); 1544 cancel_delayed_work_sync(&coex->bt_relink_work); 1545 cancel_delayed_work_sync(&coex->bt_reenable_work); 1546 cancel_delayed_work_sync(&coex->defreeze_work); 1547 cancel_delayed_work_sync(&coex->wl_remain_work); 1548 cancel_delayed_work_sync(&coex->bt_remain_work); 1549 cancel_delayed_work_sync(&coex->wl_connecting_work); 1550 cancel_delayed_work_sync(&coex->bt_multi_link_remain_work); 1551 cancel_delayed_work_sync(&coex->wl_ccklock_work); 1552 1553 mutex_lock(&rtwdev->mutex); 1554 1555 rtw_power_off(rtwdev); 1556 } 1557 1558 static void rtw_init_ht_cap(struct rtw_dev *rtwdev, 1559 struct ieee80211_sta_ht_cap *ht_cap) 1560 { 1561 const struct rtw_chip_info *chip = rtwdev->chip; 1562 struct rtw_efuse *efuse = &rtwdev->efuse; 1563 1564 ht_cap->ht_supported = true; 1565 ht_cap->cap = 0; 1566 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | 1567 IEEE80211_HT_CAP_MAX_AMSDU | 1568 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 1569 1570 if (rtw_chip_has_rx_ldpc(rtwdev)) 1571 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; 1572 if (rtw_chip_has_tx_stbc(rtwdev)) 1573 ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; 1574 1575 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) 1576 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 1577 IEEE80211_HT_CAP_DSSSCCK40 | 1578 IEEE80211_HT_CAP_SGI_40; 1579 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 1580 ht_cap->ampdu_density = chip->ampdu_density; 1581 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 1582 if (efuse->hw_cap.nss > 1) { 1583 ht_cap->mcs.rx_mask[0] = 0xFF; 1584 ht_cap->mcs.rx_mask[1] = 0xFF; 1585 ht_cap->mcs.rx_mask[4] = 0x01; 1586 ht_cap->mcs.rx_highest = cpu_to_le16(300); 1587 } else { 1588 ht_cap->mcs.rx_mask[0] = 0xFF; 1589 ht_cap->mcs.rx_mask[1] = 0x00; 1590 ht_cap->mcs.rx_mask[4] = 0x01; 1591 ht_cap->mcs.rx_highest = cpu_to_le16(150); 1592 } 1593 } 1594 1595 static void rtw_init_vht_cap(struct rtw_dev *rtwdev, 1596 struct ieee80211_sta_vht_cap *vht_cap) 1597 { 1598 struct rtw_efuse *efuse = &rtwdev->efuse; 1599 u16 mcs_map; 1600 __le16 highest; 1601 1602 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE && 1603 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT) 1604 return; 1605 1606 vht_cap->vht_supported = true; 1607 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 1608 IEEE80211_VHT_CAP_SHORT_GI_80 | 1609 IEEE80211_VHT_CAP_RXSTBC_1 | 1610 IEEE80211_VHT_CAP_HTC_VHT | 1611 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 1612 0; 1613 if (rtwdev->hal.rf_path_num > 1) 1614 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 1615 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 1616 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; 1617 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap << 1618 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT); 1619 1620 if (rtw_chip_has_rx_ldpc(rtwdev)) 1621 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 1622 1623 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 1624 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 1625 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 1626 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 1627 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 1628 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 1629 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14; 1630 if (efuse->hw_cap.nss > 1) { 1631 highest = cpu_to_le16(780); 1632 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2; 1633 } else { 1634 highest = cpu_to_le16(390); 1635 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2; 1636 } 1637 1638 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); 1639 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); 1640 vht_cap->vht_mcs.rx_highest = highest; 1641 vht_cap->vht_mcs.tx_highest = highest; 1642 } 1643 1644 static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev) 1645 { 1646 u16 len; 1647 1648 len = rtwdev->chip->max_scan_ie_len; 1649 1650 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) && 1651 rtwdev->chip->id == RTW_CHIP_TYPE_8822C) 1652 len = IEEE80211_MAX_DATA_LEN; 1653 else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM)) 1654 len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE; 1655 1656 return len; 1657 } 1658 1659 static void rtw_set_supported_band(struct ieee80211_hw *hw, 1660 const struct rtw_chip_info *chip) 1661 { 1662 struct rtw_dev *rtwdev = hw->priv; 1663 struct ieee80211_supported_band *sband; 1664 1665 if (chip->band & RTW_BAND_2G) { 1666 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL); 1667 if (!sband) 1668 goto err_out; 1669 if (chip->ht_supported) 1670 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1671 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband; 1672 } 1673 1674 if (chip->band & RTW_BAND_5G) { 1675 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL); 1676 if (!sband) 1677 goto err_out; 1678 if (chip->ht_supported) 1679 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1680 if (chip->vht_supported) 1681 rtw_init_vht_cap(rtwdev, &sband->vht_cap); 1682 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband; 1683 } 1684 1685 return; 1686 1687 err_out: 1688 rtw_err(rtwdev, "failed to set supported band\n"); 1689 } 1690 1691 static void rtw_unset_supported_band(struct ieee80211_hw *hw, 1692 const struct rtw_chip_info *chip) 1693 { 1694 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); 1695 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); 1696 } 1697 1698 static void rtw_vif_smps_iter(void *data, u8 *mac, 1699 struct ieee80211_vif *vif) 1700 { 1701 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 1702 1703 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc) 1704 return; 1705 1706 if (rtwdev->hal.txrx_1ss) 1707 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC); 1708 else 1709 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF); 1710 } 1711 1712 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss) 1713 { 1714 const struct rtw_chip_info *chip = rtwdev->chip; 1715 struct rtw_hal *hal = &rtwdev->hal; 1716 1717 if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss) 1718 return; 1719 1720 rtwdev->hal.txrx_1ss = txrx_1ss; 1721 if (txrx_1ss) 1722 chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false); 1723 else 1724 chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx, 1725 hal->antenna_rx, false); 1726 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev); 1727 } 1728 1729 static void __update_firmware_feature(struct rtw_dev *rtwdev, 1730 struct rtw_fw_state *fw) 1731 { 1732 u32 feature; 1733 const struct rtw_fw_hdr *fw_hdr = 1734 (const struct rtw_fw_hdr *)fw->firmware->data; 1735 1736 feature = le32_to_cpu(fw_hdr->feature); 1737 fw->feature = feature & FW_FEATURE_SIG ? feature : 0; 1738 1739 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C && 1740 RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13)) 1741 fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM; 1742 } 1743 1744 static void __update_firmware_info(struct rtw_dev *rtwdev, 1745 struct rtw_fw_state *fw) 1746 { 1747 const struct rtw_fw_hdr *fw_hdr = 1748 (const struct rtw_fw_hdr *)fw->firmware->data; 1749 1750 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver); 1751 fw->version = le16_to_cpu(fw_hdr->version); 1752 fw->sub_version = fw_hdr->subversion; 1753 fw->sub_index = fw_hdr->subindex; 1754 1755 __update_firmware_feature(rtwdev, fw); 1756 } 1757 1758 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev, 1759 struct rtw_fw_state *fw) 1760 { 1761 struct rtw_fw_hdr_legacy *legacy = 1762 #if defined(__linux__) 1763 (struct rtw_fw_hdr_legacy *)fw->firmware->data; 1764 #elif defined(__FreeBSD__) 1765 __DECONST(struct rtw_fw_hdr_legacy *, fw->firmware->data); 1766 #endif 1767 1768 fw->h2c_version = 0; 1769 fw->version = le16_to_cpu(legacy->version); 1770 fw->sub_version = legacy->subversion1; 1771 fw->sub_index = legacy->subversion2; 1772 } 1773 1774 static void update_firmware_info(struct rtw_dev *rtwdev, 1775 struct rtw_fw_state *fw) 1776 { 1777 if (rtw_chip_wcpu_11n(rtwdev)) 1778 __update_firmware_info_legacy(rtwdev, fw); 1779 else 1780 __update_firmware_info(rtwdev, fw); 1781 } 1782 1783 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context) 1784 { 1785 struct rtw_fw_state *fw = context; 1786 struct rtw_dev *rtwdev = fw->rtwdev; 1787 1788 if (!firmware || !firmware->data) { 1789 rtw_err(rtwdev, "failed to request firmware\n"); 1790 complete_all(&fw->completion); 1791 return; 1792 } 1793 1794 fw->firmware = firmware; 1795 update_firmware_info(rtwdev, fw); 1796 complete_all(&fw->completion); 1797 1798 rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n", 1799 fw->type == RTW_WOWLAN_FW ? "WOW " : "", 1800 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version); 1801 } 1802 1803 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type) 1804 { 1805 const char *fw_name; 1806 struct rtw_fw_state *fw; 1807 int ret; 1808 1809 switch (type) { 1810 case RTW_WOWLAN_FW: 1811 fw = &rtwdev->wow_fw; 1812 fw_name = rtwdev->chip->wow_fw_name; 1813 break; 1814 1815 case RTW_NORMAL_FW: 1816 fw = &rtwdev->fw; 1817 fw_name = rtwdev->chip->fw_name; 1818 break; 1819 1820 default: 1821 rtw_warn(rtwdev, "unsupported firmware type\n"); 1822 return -ENOENT; 1823 } 1824 1825 fw->type = type; 1826 fw->rtwdev = rtwdev; 1827 init_completion(&fw->completion); 1828 1829 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, 1830 GFP_KERNEL, fw, rtw_load_firmware_cb); 1831 if (ret) { 1832 rtw_err(rtwdev, "failed to async firmware request\n"); 1833 return ret; 1834 } 1835 1836 return 0; 1837 } 1838 1839 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev) 1840 { 1841 const struct rtw_chip_info *chip = rtwdev->chip; 1842 struct rtw_hal *hal = &rtwdev->hal; 1843 struct rtw_efuse *efuse = &rtwdev->efuse; 1844 1845 switch (rtw_hci_type(rtwdev)) { 1846 case RTW_HCI_TYPE_PCIE: 1847 rtwdev->hci.rpwm_addr = 0x03d9; 1848 rtwdev->hci.cpwm_addr = 0x03da; 1849 break; 1850 case RTW_HCI_TYPE_SDIO: 1851 rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1; 1852 rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2; 1853 break; 1854 case RTW_HCI_TYPE_USB: 1855 rtwdev->hci.rpwm_addr = 0xfe58; 1856 rtwdev->hci.cpwm_addr = 0xfe57; 1857 break; 1858 default: 1859 rtw_err(rtwdev, "unsupported hci type\n"); 1860 return -EINVAL; 1861 } 1862 1863 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1); 1864 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version); 1865 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1; 1866 if (hal->chip_version & BIT_RF_TYPE_ID) { 1867 hal->rf_type = RF_2T2R; 1868 hal->rf_path_num = 2; 1869 hal->antenna_tx = BB_PATH_AB; 1870 hal->antenna_rx = BB_PATH_AB; 1871 } else { 1872 hal->rf_type = RF_1T1R; 1873 hal->rf_path_num = 1; 1874 hal->antenna_tx = BB_PATH_A; 1875 hal->antenna_rx = BB_PATH_A; 1876 } 1877 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num : 1878 hal->rf_path_num; 1879 1880 efuse->physical_size = chip->phy_efuse_size; 1881 efuse->logical_size = chip->log_efuse_size; 1882 efuse->protect_size = chip->ptct_efuse_size; 1883 1884 /* default use ack */ 1885 rtwdev->hal.rcr |= BIT_VHT_DACK; 1886 1887 hal->bfee_sts_cap = 3; 1888 1889 return 0; 1890 } 1891 1892 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev) 1893 { 1894 struct rtw_fw_state *fw = &rtwdev->fw; 1895 int ret; 1896 1897 ret = rtw_hci_setup(rtwdev); 1898 if (ret) { 1899 rtw_err(rtwdev, "failed to setup hci\n"); 1900 goto err; 1901 } 1902 1903 ret = rtw_mac_power_on(rtwdev); 1904 if (ret) { 1905 rtw_err(rtwdev, "failed to power on mac\n"); 1906 goto err; 1907 } 1908 1909 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP); 1910 1911 wait_for_completion(&fw->completion); 1912 if (!fw->firmware) { 1913 ret = -EINVAL; 1914 rtw_err(rtwdev, "failed to load firmware\n"); 1915 goto err; 1916 } 1917 1918 ret = rtw_download_firmware(rtwdev, fw); 1919 if (ret) { 1920 rtw_err(rtwdev, "failed to download firmware\n"); 1921 goto err_off; 1922 } 1923 1924 return 0; 1925 1926 err_off: 1927 rtw_mac_power_off(rtwdev); 1928 1929 err: 1930 return ret; 1931 } 1932 1933 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev) 1934 { 1935 struct rtw_efuse *efuse = &rtwdev->efuse; 1936 u8 hw_feature[HW_FEATURE_LEN]; 1937 u8 id; 1938 u8 bw; 1939 int i; 1940 1941 id = rtw_read8(rtwdev, REG_C2HEVT); 1942 if (id != C2H_HW_FEATURE_REPORT) { 1943 rtw_err(rtwdev, "failed to read hw feature report\n"); 1944 return -EBUSY; 1945 } 1946 1947 for (i = 0; i < HW_FEATURE_LEN; i++) 1948 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i); 1949 1950 rtw_write8(rtwdev, REG_C2HEVT, 0); 1951 1952 bw = GET_EFUSE_HW_CAP_BW(hw_feature); 1953 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw); 1954 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature); 1955 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature); 1956 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature); 1957 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature); 1958 1959 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num); 1960 1961 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE || 1962 efuse->hw_cap.nss > rtwdev->hal.rf_path_num) 1963 efuse->hw_cap.nss = rtwdev->hal.rf_path_num; 1964 1965 rtw_dbg(rtwdev, RTW_DBG_EFUSE, 1966 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n", 1967 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl, 1968 efuse->hw_cap.ant_num, efuse->hw_cap.nss); 1969 1970 return 0; 1971 } 1972 1973 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev) 1974 { 1975 rtw_hci_stop(rtwdev); 1976 rtw_mac_power_off(rtwdev); 1977 } 1978 1979 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev) 1980 { 1981 struct rtw_efuse *efuse = &rtwdev->efuse; 1982 int ret; 1983 1984 mutex_lock(&rtwdev->mutex); 1985 1986 /* power on mac to read efuse */ 1987 ret = rtw_chip_efuse_enable(rtwdev); 1988 if (ret) 1989 goto out_unlock; 1990 1991 ret = rtw_parse_efuse_map(rtwdev); 1992 if (ret) 1993 goto out_disable; 1994 1995 ret = rtw_dump_hw_feature(rtwdev); 1996 if (ret) 1997 goto out_disable; 1998 1999 ret = rtw_check_supported_rfe(rtwdev); 2000 if (ret) 2001 goto out_disable; 2002 2003 if (efuse->crystal_cap == 0xff) 2004 efuse->crystal_cap = 0; 2005 if (efuse->pa_type_2g == 0xff) 2006 efuse->pa_type_2g = 0; 2007 if (efuse->pa_type_5g == 0xff) 2008 efuse->pa_type_5g = 0; 2009 if (efuse->lna_type_2g == 0xff) 2010 efuse->lna_type_2g = 0; 2011 if (efuse->lna_type_5g == 0xff) 2012 efuse->lna_type_5g = 0; 2013 if (efuse->channel_plan == 0xff) 2014 efuse->channel_plan = 0x7f; 2015 if (efuse->rf_board_option == 0xff) 2016 efuse->rf_board_option = 0; 2017 if (efuse->bt_setting & BIT(0)) 2018 efuse->share_ant = true; 2019 if (efuse->regd == 0xff) 2020 efuse->regd = 0; 2021 if (efuse->tx_bb_swing_setting_2g == 0xff) 2022 efuse->tx_bb_swing_setting_2g = 0; 2023 if (efuse->tx_bb_swing_setting_5g == 0xff) 2024 efuse->tx_bb_swing_setting_5g = 0; 2025 2026 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20; 2027 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0; 2028 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0; 2029 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0; 2030 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0; 2031 2032 if (!is_valid_ether_addr(efuse->addr)) { 2033 eth_random_addr(efuse->addr); 2034 dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n"); 2035 } 2036 2037 out_disable: 2038 rtw_chip_efuse_disable(rtwdev); 2039 2040 out_unlock: 2041 mutex_unlock(&rtwdev->mutex); 2042 return ret; 2043 } 2044 2045 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev) 2046 { 2047 struct rtw_hal *hal = &rtwdev->hal; 2048 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev); 2049 2050 if (!rfe_def) 2051 return -ENODEV; 2052 2053 rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type); 2054 2055 rtw_phy_init_tx_power(rtwdev); 2056 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl); 2057 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl); 2058 rtw_phy_tx_power_by_rate_config(hal); 2059 rtw_phy_tx_power_limit_config(hal); 2060 2061 return 0; 2062 } 2063 2064 int rtw_chip_info_setup(struct rtw_dev *rtwdev) 2065 { 2066 int ret; 2067 2068 ret = rtw_chip_parameter_setup(rtwdev); 2069 if (ret) { 2070 rtw_err(rtwdev, "failed to setup chip parameters\n"); 2071 goto err_out; 2072 } 2073 2074 ret = rtw_chip_efuse_info_setup(rtwdev); 2075 if (ret) { 2076 rtw_err(rtwdev, "failed to setup chip efuse info\n"); 2077 goto err_out; 2078 } 2079 2080 ret = rtw_chip_board_info_setup(rtwdev); 2081 if (ret) { 2082 rtw_err(rtwdev, "failed to setup chip board info\n"); 2083 goto err_out; 2084 } 2085 2086 return 0; 2087 2088 err_out: 2089 return ret; 2090 } 2091 EXPORT_SYMBOL(rtw_chip_info_setup); 2092 2093 static void rtw_stats_init(struct rtw_dev *rtwdev) 2094 { 2095 struct rtw_traffic_stats *stats = &rtwdev->stats; 2096 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 2097 int i; 2098 2099 ewma_tp_init(&stats->tx_ewma_tp); 2100 ewma_tp_init(&stats->rx_ewma_tp); 2101 2102 for (i = 0; i < RTW_EVM_NUM; i++) 2103 ewma_evm_init(&dm_info->ewma_evm[i]); 2104 for (i = 0; i < RTW_SNR_NUM; i++) 2105 ewma_snr_init(&dm_info->ewma_snr[i]); 2106 } 2107 2108 int rtw_core_init(struct rtw_dev *rtwdev) 2109 { 2110 const struct rtw_chip_info *chip = rtwdev->chip; 2111 struct rtw_coex *coex = &rtwdev->coex; 2112 int ret; 2113 2114 INIT_LIST_HEAD(&rtwdev->rsvd_page_list); 2115 INIT_LIST_HEAD(&rtwdev->txqs); 2116 2117 timer_setup(&rtwdev->tx_report.purge_timer, 2118 rtw_tx_report_purge_timer, 0); 2119 rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); 2120 if (!rtwdev->tx_wq) { 2121 rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n"); 2122 return -ENOMEM; 2123 } 2124 2125 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work); 2126 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work); 2127 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work); 2128 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work); 2129 INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work); 2130 INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work); 2131 INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work); 2132 INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work, 2133 rtw_coex_bt_multi_link_remain_work); 2134 INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work); 2135 INIT_WORK(&rtwdev->tx_work, rtw_tx_work); 2136 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work); 2137 INIT_WORK(&rtwdev->ips_work, rtw_ips_work); 2138 INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work); 2139 INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work); 2140 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work); 2141 skb_queue_head_init(&rtwdev->c2h_queue); 2142 skb_queue_head_init(&rtwdev->coex.queue); 2143 skb_queue_head_init(&rtwdev->tx_report.queue); 2144 2145 spin_lock_init(&rtwdev->txq_lock); 2146 spin_lock_init(&rtwdev->tx_report.q_lock); 2147 2148 mutex_init(&rtwdev->mutex); 2149 mutex_init(&rtwdev->hal.tx_power_mutex); 2150 2151 init_waitqueue_head(&rtwdev->coex.wait); 2152 init_completion(&rtwdev->lps_leave_check); 2153 init_completion(&rtwdev->fw_scan_density); 2154 2155 rtwdev->sec.total_cam_num = 32; 2156 rtwdev->hal.current_channel = 1; 2157 rtwdev->dm_info.fix_rate = U8_MAX; 2158 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map); 2159 2160 rtw_stats_init(rtwdev); 2161 2162 /* default rx filter setting */ 2163 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV | 2164 BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS | 2165 BIT_AB | BIT_AM | BIT_APM; 2166 2167 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW); 2168 if (ret) { 2169 rtw_warn(rtwdev, "no firmware loaded\n"); 2170 goto out; 2171 } 2172 2173 if (chip->wow_fw_name) { 2174 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW); 2175 if (ret) { 2176 rtw_warn(rtwdev, "no wow firmware loaded\n"); 2177 wait_for_completion(&rtwdev->fw.completion); 2178 if (rtwdev->fw.firmware) 2179 release_firmware(rtwdev->fw.firmware); 2180 goto out; 2181 } 2182 } 2183 2184 #if defined(__FreeBSD__) 2185 rtw_wait_firmware_completion(rtwdev); 2186 #endif 2187 2188 return 0; 2189 2190 out: 2191 destroy_workqueue(rtwdev->tx_wq); 2192 return ret; 2193 } 2194 EXPORT_SYMBOL(rtw_core_init); 2195 2196 void rtw_core_deinit(struct rtw_dev *rtwdev) 2197 { 2198 struct rtw_fw_state *fw = &rtwdev->fw; 2199 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw; 2200 struct rtw_rsvd_page *rsvd_pkt, *tmp; 2201 unsigned long flags; 2202 2203 rtw_wait_firmware_completion(rtwdev); 2204 2205 if (fw->firmware) 2206 release_firmware(fw->firmware); 2207 2208 if (wow_fw->firmware) 2209 release_firmware(wow_fw->firmware); 2210 2211 destroy_workqueue(rtwdev->tx_wq); 2212 timer_delete_sync(&rtwdev->tx_report.purge_timer); 2213 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags); 2214 skb_queue_purge(&rtwdev->tx_report.queue); 2215 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags); 2216 skb_queue_purge(&rtwdev->coex.queue); 2217 skb_queue_purge(&rtwdev->c2h_queue); 2218 2219 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, 2220 build_list) { 2221 list_del(&rsvd_pkt->build_list); 2222 kfree(rsvd_pkt); 2223 } 2224 2225 mutex_destroy(&rtwdev->mutex); 2226 mutex_destroy(&rtwdev->hal.tx_power_mutex); 2227 } 2228 EXPORT_SYMBOL(rtw_core_deinit); 2229 2230 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 2231 { 2232 bool sta_mode_only = rtwdev->hci.type == RTW_HCI_TYPE_SDIO; 2233 struct rtw_hal *hal = &rtwdev->hal; 2234 int max_tx_headroom = 0; 2235 int ret; 2236 2237 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz; 2238 2239 if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) 2240 max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN; 2241 2242 hw->extra_tx_headroom = max_tx_headroom; 2243 hw->queues = IEEE80211_NUM_ACS; 2244 hw->txq_data_size = sizeof(struct rtw_txq); 2245 hw->sta_data_size = sizeof(struct rtw_sta_info); 2246 hw->vif_data_size = sizeof(struct rtw_vif); 2247 2248 ieee80211_hw_set(hw, SIGNAL_DBM); 2249 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 2250 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 2251 ieee80211_hw_set(hw, MFP_CAPABLE); 2252 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 2253 ieee80211_hw_set(hw, SUPPORTS_PS); 2254 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 2255 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); 2256 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); 2257 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 2258 ieee80211_hw_set(hw, TX_AMSDU); 2259 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); 2260 2261 if (sta_mode_only) 2262 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); 2263 else 2264 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 2265 BIT(NL80211_IFTYPE_AP) | 2266 BIT(NL80211_IFTYPE_ADHOC); 2267 hw->wiphy->available_antennas_tx = hal->antenna_tx; 2268 hw->wiphy->available_antennas_rx = hal->antenna_rx; 2269 2270 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | 2271 WIPHY_FLAG_TDLS_EXTERNAL_SETUP; 2272 2273 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; 2274 hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS; 2275 hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev); 2276 2277 if (!sta_mode_only && rtwdev->chip->id == RTW_CHIP_TYPE_8822C) { 2278 hw->wiphy->iface_combinations = rtw_iface_combs; 2279 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs); 2280 } 2281 2282 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); 2283 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN); 2284 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); 2285 2286 #ifdef CONFIG_PM 2287 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub; 2288 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids; 2289 #endif 2290 rtw_set_supported_band(hw, rtwdev->chip); 2291 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr); 2292 2293 hw->wiphy->sar_capa = &rtw_sar_capa; 2294 2295 ret = rtw_regd_init(rtwdev); 2296 if (ret) { 2297 rtw_err(rtwdev, "failed to init regd\n"); 2298 return ret; 2299 } 2300 2301 ret = ieee80211_register_hw(hw); 2302 if (ret) { 2303 rtw_err(rtwdev, "failed to register hw\n"); 2304 return ret; 2305 } 2306 2307 ret = rtw_regd_hint(rtwdev); 2308 if (ret) { 2309 rtw_err(rtwdev, "failed to hint regd\n"); 2310 return ret; 2311 } 2312 2313 rtw_debugfs_init(rtwdev); 2314 2315 rtwdev->bf_info.bfer_mu_cnt = 0; 2316 rtwdev->bf_info.bfer_su_cnt = 0; 2317 2318 return 0; 2319 } 2320 EXPORT_SYMBOL(rtw_register_hw); 2321 2322 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 2323 { 2324 const struct rtw_chip_info *chip = rtwdev->chip; 2325 2326 ieee80211_unregister_hw(hw); 2327 rtw_unset_supported_band(hw, chip); 2328 } 2329 EXPORT_SYMBOL(rtw_unregister_hw); 2330 2331 static 2332 void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, 2333 const struct rtw_hw_reg *reg2, u8 nbytes) 2334 { 2335 u8 i; 2336 2337 for (i = 0; i < nbytes; i++) { 2338 u8 v1 = rtw_read8(rtwdev, reg1->addr + i); 2339 u8 v2 = rtw_read8(rtwdev, reg2->addr + i); 2340 2341 rtw_write8(rtwdev, reg1->addr + i, v2); 2342 rtw_write8(rtwdev, reg2->addr + i, v1); 2343 } 2344 } 2345 2346 static 2347 void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, 2348 const struct rtw_hw_reg *reg2) 2349 { 2350 u32 v1, v2; 2351 2352 v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask); 2353 v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask); 2354 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1); 2355 rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2); 2356 } 2357 2358 struct rtw_iter_port_switch_data { 2359 struct rtw_dev *rtwdev; 2360 struct rtw_vif *rtwvif_ap; 2361 }; 2362 2363 static void rtw_port_switch_iter(void *data, struct ieee80211_vif *vif) 2364 { 2365 struct rtw_iter_port_switch_data *iter_data = data; 2366 struct rtw_dev *rtwdev = iter_data->rtwdev; 2367 struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv; 2368 struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap; 2369 const struct rtw_hw_reg *reg1, *reg2; 2370 2371 if (rtwvif_target->port != RTW_PORT_0) 2372 return; 2373 2374 rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n", 2375 rtwvif_ap->port, rtwvif_target->port); 2376 2377 /* Leave LPS so the value swapped are not in PS mode */ 2378 rtw_leave_lps(rtwdev); 2379 2380 reg1 = &rtwvif_ap->conf->net_type; 2381 reg2 = &rtwvif_target->conf->net_type; 2382 rtw_swap_reg_mask(rtwdev, reg1, reg2); 2383 2384 reg1 = &rtwvif_ap->conf->mac_addr; 2385 reg2 = &rtwvif_target->conf->mac_addr; 2386 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); 2387 2388 reg1 = &rtwvif_ap->conf->bssid; 2389 reg2 = &rtwvif_target->conf->bssid; 2390 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); 2391 2392 reg1 = &rtwvif_ap->conf->bcn_ctrl; 2393 reg2 = &rtwvif_target->conf->bcn_ctrl; 2394 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1); 2395 2396 swap(rtwvif_target->port, rtwvif_ap->port); 2397 swap(rtwvif_target->conf, rtwvif_ap->conf); 2398 2399 rtw_fw_default_port(rtwdev, rtwvif_target); 2400 } 2401 2402 void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 2403 { 2404 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 2405 struct rtw_iter_port_switch_data iter_data; 2406 2407 if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0) 2408 return; 2409 2410 iter_data.rtwdev = rtwdev; 2411 iter_data.rtwvif_ap = rtwvif; 2412 rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data); 2413 } 2414 2415 static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif) 2416 { 2417 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 2418 bool *active = data; 2419 2420 if (*active) 2421 return; 2422 2423 if (vif->type != NL80211_IFTYPE_STATION) 2424 return; 2425 2426 if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid)) 2427 *active = true; 2428 } 2429 2430 bool rtw_core_check_sta_active(struct rtw_dev *rtwdev) 2431 { 2432 bool sta_active = false; 2433 2434 rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active); 2435 2436 return rtwdev->ap_active || sta_active; 2437 } 2438 2439 void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable) 2440 { 2441 if (!rtwdev->ap_active) 2442 return; 2443 2444 if (enable) { 2445 rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); 2446 rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); 2447 } else { 2448 rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); 2449 rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); 2450 } 2451 } 2452 2453 MODULE_AUTHOR("Realtek Corporation"); 2454 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); 2455 MODULE_LICENSE("Dual BSD/GPL"); 2456