1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #if defined(__FreeBSD__) 6 #define LINUXKPI_PARAM_PREFIX rtw88_ 7 #endif 8 9 #include <linux/devcoredump.h> 10 11 #include "main.h" 12 #include "regd.h" 13 #include "fw.h" 14 #include "ps.h" 15 #include "sec.h" 16 #include "mac.h" 17 #include "coex.h" 18 #include "phy.h" 19 #include "reg.h" 20 #include "efuse.h" 21 #include "tx.h" 22 #include "debug.h" 23 #include "bf.h" 24 #include "sar.h" 25 #include "sdio.h" 26 #include "led.h" 27 28 bool rtw_disable_lps_deep_mode; 29 EXPORT_SYMBOL(rtw_disable_lps_deep_mode); 30 bool rtw_bf_support = true; 31 unsigned int rtw_debug_mask; 32 EXPORT_SYMBOL(rtw_debug_mask); 33 /* EDCCA is enabled during normal behavior. For debugging purpose in 34 * a noisy environment, it can be disabled via edcca debugfs. Because 35 * all rtw88 devices will probably be affected if environment is noisy, 36 * rtw_edcca_enabled is just declared by driver instead of by device. 37 * So, turning it off will take effect for all rtw88 devices before 38 * there is a tough reason to maintain rtw_edcca_enabled by device. 39 */ 40 bool rtw_edcca_enabled = true; 41 42 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644); 43 module_param_named(support_bf, rtw_bf_support, bool, 0644); 44 module_param_named(debug_mask, rtw_debug_mask, uint, 0644); 45 46 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS"); 47 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support"); 48 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 49 50 #if defined(__FreeBSD__) 51 static bool rtw_ht_support = false; 52 module_param_named(support_ht, rtw_ht_support, bool, 0644); 53 MODULE_PARM_DESC(support_ht, "Set to Y to enable HT support"); 54 55 static bool rtw_vht_support = false; 56 module_param_named(support_vht, rtw_vht_support, bool, 0644); 57 MODULE_PARM_DESC(support_vht, "Set to Y to enable VHT support"); 58 #endif 59 60 static struct ieee80211_channel rtw_channeltable_2g[] = { 61 {.center_freq = 2412, .hw_value = 1,}, 62 {.center_freq = 2417, .hw_value = 2,}, 63 {.center_freq = 2422, .hw_value = 3,}, 64 {.center_freq = 2427, .hw_value = 4,}, 65 {.center_freq = 2432, .hw_value = 5,}, 66 {.center_freq = 2437, .hw_value = 6,}, 67 {.center_freq = 2442, .hw_value = 7,}, 68 {.center_freq = 2447, .hw_value = 8,}, 69 {.center_freq = 2452, .hw_value = 9,}, 70 {.center_freq = 2457, .hw_value = 10,}, 71 {.center_freq = 2462, .hw_value = 11,}, 72 {.center_freq = 2467, .hw_value = 12,}, 73 {.center_freq = 2472, .hw_value = 13,}, 74 {.center_freq = 2484, .hw_value = 14,}, 75 }; 76 77 static struct ieee80211_channel rtw_channeltable_5g[] = { 78 {.center_freq = 5180, .hw_value = 36,}, 79 {.center_freq = 5200, .hw_value = 40,}, 80 {.center_freq = 5220, .hw_value = 44,}, 81 {.center_freq = 5240, .hw_value = 48,}, 82 {.center_freq = 5260, .hw_value = 52,}, 83 {.center_freq = 5280, .hw_value = 56,}, 84 {.center_freq = 5300, .hw_value = 60,}, 85 {.center_freq = 5320, .hw_value = 64,}, 86 {.center_freq = 5500, .hw_value = 100,}, 87 {.center_freq = 5520, .hw_value = 104,}, 88 {.center_freq = 5540, .hw_value = 108,}, 89 {.center_freq = 5560, .hw_value = 112,}, 90 {.center_freq = 5580, .hw_value = 116,}, 91 {.center_freq = 5600, .hw_value = 120,}, 92 {.center_freq = 5620, .hw_value = 124,}, 93 {.center_freq = 5640, .hw_value = 128,}, 94 {.center_freq = 5660, .hw_value = 132,}, 95 {.center_freq = 5680, .hw_value = 136,}, 96 {.center_freq = 5700, .hw_value = 140,}, 97 {.center_freq = 5720, .hw_value = 144,}, 98 {.center_freq = 5745, .hw_value = 149,}, 99 {.center_freq = 5765, .hw_value = 153,}, 100 {.center_freq = 5785, .hw_value = 157,}, 101 {.center_freq = 5805, .hw_value = 161,}, 102 {.center_freq = 5825, .hw_value = 165, 103 .flags = IEEE80211_CHAN_NO_HT40MINUS}, 104 }; 105 106 static struct ieee80211_rate rtw_ratetable[] = { 107 {.bitrate = 10, .hw_value = 0x00,}, 108 {.bitrate = 20, .hw_value = 0x01,}, 109 {.bitrate = 55, .hw_value = 0x02,}, 110 {.bitrate = 110, .hw_value = 0x03,}, 111 {.bitrate = 60, .hw_value = 0x04,}, 112 {.bitrate = 90, .hw_value = 0x05,}, 113 {.bitrate = 120, .hw_value = 0x06,}, 114 {.bitrate = 180, .hw_value = 0x07,}, 115 {.bitrate = 240, .hw_value = 0x08,}, 116 {.bitrate = 360, .hw_value = 0x09,}, 117 {.bitrate = 480, .hw_value = 0x0a,}, 118 {.bitrate = 540, .hw_value = 0x0b,}, 119 }; 120 121 static const struct ieee80211_iface_limit rtw_iface_limits[] = { 122 { 123 .max = 1, 124 .types = BIT(NL80211_IFTYPE_STATION), 125 }, 126 { 127 .max = 1, 128 .types = BIT(NL80211_IFTYPE_AP), 129 } 130 }; 131 132 static const struct ieee80211_iface_combination rtw_iface_combs[] = { 133 { 134 .limits = rtw_iface_limits, 135 .n_limits = ARRAY_SIZE(rtw_iface_limits), 136 .max_interfaces = 2, 137 .num_different_channels = 1, 138 } 139 }; 140 141 u16 rtw_desc_to_bitrate(u8 desc_rate) 142 { 143 struct ieee80211_rate rate; 144 145 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n")) 146 return 0; 147 148 rate = rtw_ratetable[desc_rate]; 149 150 return rate.bitrate; 151 } 152 153 static struct ieee80211_supported_band rtw_band_2ghz = { 154 .band = NL80211_BAND_2GHZ, 155 156 .channels = rtw_channeltable_2g, 157 .n_channels = ARRAY_SIZE(rtw_channeltable_2g), 158 159 .bitrates = rtw_ratetable, 160 .n_bitrates = ARRAY_SIZE(rtw_ratetable), 161 162 .ht_cap = {0}, 163 .vht_cap = {0}, 164 }; 165 166 static struct ieee80211_supported_band rtw_band_5ghz = { 167 .band = NL80211_BAND_5GHZ, 168 169 .channels = rtw_channeltable_5g, 170 .n_channels = ARRAY_SIZE(rtw_channeltable_5g), 171 172 /* 5G has no CCK rates */ 173 .bitrates = rtw_ratetable + 4, 174 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4, 175 176 .ht_cap = {0}, 177 .vht_cap = {0}, 178 }; 179 180 struct rtw_watch_dog_iter_data { 181 struct rtw_dev *rtwdev; 182 struct rtw_vif *rtwvif; 183 }; 184 185 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif) 186 { 187 struct rtw_bf_info *bf_info = &rtwdev->bf_info; 188 u8 fix_rate_enable = 0; 189 u8 new_csi_rate_idx; 190 191 if (rtwvif->bfee.role != RTW_BFEE_SU && 192 rtwvif->bfee.role != RTW_BFEE_MU) 193 return; 194 195 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi, 196 bf_info->cur_csi_rpt_rate, 197 fix_rate_enable, &new_csi_rate_idx); 198 199 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate) 200 bf_info->cur_csi_rpt_rate = new_csi_rate_idx; 201 } 202 203 static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif) 204 { 205 struct rtw_watch_dog_iter_data *iter_data = data; 206 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 207 208 if (vif->type == NL80211_IFTYPE_STATION) 209 if (vif->cfg.assoc) 210 iter_data->rtwvif = rtwvif; 211 212 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif); 213 214 rtwvif->stats.tx_unicast = 0; 215 rtwvif->stats.rx_unicast = 0; 216 rtwvif->stats.tx_cnt = 0; 217 rtwvif->stats.rx_cnt = 0; 218 } 219 220 static void rtw_sw_beacon_loss_check(struct rtw_dev *rtwdev, 221 struct rtw_vif *rtwvif, int received_beacons) 222 { 223 int watchdog_delay = 2000000 / 1024; /* TU */ 224 int beacon_int, expected_beacons; 225 226 if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_BCN_FILTER) || !rtwvif) 227 return; 228 229 beacon_int = rtwvif_to_vif(rtwvif)->bss_conf.beacon_int; 230 expected_beacons = DIV_ROUND_UP(watchdog_delay, beacon_int); 231 232 rtwdev->beacon_loss = received_beacons < expected_beacons / 2; 233 } 234 235 /* process TX/RX statistics periodically for hardware, 236 * the information helps hardware to enhance performance 237 */ 238 static void rtw_watch_dog_work(struct work_struct *work) 239 { 240 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 241 watch_dog_work.work); 242 struct rtw_traffic_stats *stats = &rtwdev->stats; 243 struct rtw_watch_dog_iter_data data = {}; 244 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 245 int received_beacons = rtwdev->dm_info.cur_pkt_count.num_bcn_pkt; 246 u32 tx_unicast_mbps, rx_unicast_mbps; 247 bool ps_active; 248 249 mutex_lock(&rtwdev->mutex); 250 251 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags)) 252 goto unlock; 253 254 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 255 RTW_WATCH_DOG_DELAY_TIME); 256 257 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100) 258 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 259 else 260 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 261 262 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags)) 263 rtw_coex_wl_status_change_notify(rtwdev, 0); 264 265 if (stats->tx_cnt > RTW_LPS_THRESHOLD || 266 stats->rx_cnt > RTW_LPS_THRESHOLD) 267 ps_active = true; 268 else 269 ps_active = false; 270 271 tx_unicast_mbps = stats->tx_unicast >> RTW_TP_SHIFT; 272 rx_unicast_mbps = stats->rx_unicast >> RTW_TP_SHIFT; 273 274 ewma_tp_add(&stats->tx_ewma_tp, tx_unicast_mbps); 275 ewma_tp_add(&stats->rx_ewma_tp, rx_unicast_mbps); 276 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp); 277 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp); 278 279 /* reset tx/rx statictics */ 280 stats->tx_unicast = 0; 281 stats->rx_unicast = 0; 282 stats->tx_cnt = 0; 283 stats->rx_cnt = 0; 284 285 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 286 goto unlock; 287 288 /* make sure BB/RF is working for dynamic mech */ 289 rtw_leave_lps(rtwdev); 290 rtw_coex_wl_status_check(rtwdev); 291 rtw_coex_query_bt_hid_list(rtwdev); 292 rtw_coex_active_query_bt_info(rtwdev); 293 294 rtw_phy_dynamic_mechanism(rtwdev); 295 296 rtw_hci_dynamic_rx_agg(rtwdev, 297 tx_unicast_mbps >= 1 || rx_unicast_mbps >= 1); 298 299 data.rtwdev = rtwdev; 300 /* rtw_iterate_vifs internally uses an atomic iterator which is needed 301 * to avoid taking local->iflist_mtx mutex 302 */ 303 rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data); 304 305 rtw_sw_beacon_loss_check(rtwdev, data.rtwvif, received_beacons); 306 307 /* fw supports only one station associated to enter lps, if there are 308 * more than two stations associated to the AP, then we can not enter 309 * lps, because fw does not handle the overlapped beacon interval 310 * 311 * rtw_recalc_lps() iterate vifs and determine if driver can enter 312 * ps by vif->type and vif->cfg.ps, all we need to do here is to 313 * get that vif and check if device is having traffic more than the 314 * threshold. 315 */ 316 if (rtwdev->ps_enabled && data.rtwvif && !ps_active && 317 !rtwdev->beacon_loss && !rtwdev->ap_active) 318 rtw_enter_lps(rtwdev, data.rtwvif->port); 319 320 rtwdev->watch_dog_cnt++; 321 322 unlock: 323 mutex_unlock(&rtwdev->mutex); 324 } 325 326 static void rtw_c2h_work(struct work_struct *work) 327 { 328 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work); 329 struct sk_buff *skb, *tmp; 330 331 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { 332 skb_unlink(skb, &rtwdev->c2h_queue); 333 rtw_fw_c2h_cmd_handle(rtwdev, skb); 334 dev_kfree_skb_any(skb); 335 } 336 } 337 338 static void rtw_ips_work(struct work_struct *work) 339 { 340 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work); 341 342 mutex_lock(&rtwdev->mutex); 343 if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE) 344 rtw_enter_ips(rtwdev); 345 mutex_unlock(&rtwdev->mutex); 346 } 347 348 static void rtw_sta_rc_work(struct work_struct *work) 349 { 350 struct rtw_sta_info *si = container_of(work, struct rtw_sta_info, 351 rc_work); 352 struct rtw_dev *rtwdev = si->rtwdev; 353 354 mutex_lock(&rtwdev->mutex); 355 rtw_update_sta_info(rtwdev, si, true); 356 mutex_unlock(&rtwdev->mutex); 357 } 358 359 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, 360 struct ieee80211_vif *vif) 361 { 362 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 363 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 364 int i; 365 366 if (vif->type == NL80211_IFTYPE_STATION) { 367 si->mac_id = rtwvif->mac_id; 368 } else { 369 si->mac_id = rtw_acquire_macid(rtwdev); 370 if (si->mac_id >= RTW_MAX_MAC_ID_NUM) 371 return -ENOSPC; 372 } 373 374 si->rtwdev = rtwdev; 375 si->sta = sta; 376 si->vif = vif; 377 si->init_ra_lv = 1; 378 ewma_rssi_init(&si->avg_rssi); 379 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 380 rtw_txq_init(rtwdev, sta->txq[i]); 381 INIT_WORK(&si->rc_work, rtw_sta_rc_work); 382 383 rtw_update_sta_info(rtwdev, si, true); 384 rtw_fw_media_status_report(rtwdev, si->mac_id, true); 385 386 rtwdev->sta_cnt++; 387 rtwdev->beacon_loss = false; 388 #if defined(__linux__) 389 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n", 390 sta->addr, si->mac_id); 391 #elif defined(__FreeBSD__) 392 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D joined with macid %d\n", 393 sta->addr, ":", si->mac_id); 394 #endif 395 396 return 0; 397 } 398 399 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, 400 bool fw_exist) 401 { 402 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 403 struct ieee80211_vif *vif = si->vif; 404 int i; 405 406 cancel_work_sync(&si->rc_work); 407 408 if (vif->type != NL80211_IFTYPE_STATION) 409 rtw_release_macid(rtwdev, si->mac_id); 410 if (fw_exist) 411 rtw_fw_media_status_report(rtwdev, si->mac_id, false); 412 413 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 414 rtw_txq_cleanup(rtwdev, sta->txq[i]); 415 416 kfree(si->mask); 417 418 rtwdev->sta_cnt--; 419 #if defined(__linux__) 420 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n", 421 sta->addr, si->mac_id); 422 #elif defined(__FreeBSD__) 423 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D with macid %d left\n", 424 sta->addr, ":", si->mac_id); 425 #endif 426 } 427 428 struct rtw_fwcd_hdr { 429 u32 item; 430 u32 size; 431 u32 padding1; 432 u32 padding2; 433 } __packed; 434 435 static int rtw_fwcd_prep(struct rtw_dev *rtwdev) 436 { 437 const struct rtw_chip_info *chip = rtwdev->chip; 438 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 439 const struct rtw_fwcd_segs *segs = chip->fwcd_segs; 440 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr); 441 u8 i; 442 443 if (segs) { 444 prep_size += segs->num * sizeof(struct rtw_fwcd_hdr); 445 446 for (i = 0; i < segs->num; i++) 447 prep_size += segs->segs[i]; 448 } 449 450 desc->data = vmalloc(prep_size); 451 if (!desc->data) 452 return -ENOMEM; 453 454 desc->size = prep_size; 455 desc->next = desc->data; 456 457 return 0; 458 } 459 460 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size) 461 { 462 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 463 struct rtw_fwcd_hdr *hdr; 464 u8 *next; 465 466 if (!desc->data) { 467 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n"); 468 return NULL; 469 } 470 471 next = desc->next + sizeof(struct rtw_fwcd_hdr); 472 if (next - desc->data + size > desc->size) { 473 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n"); 474 return NULL; 475 } 476 477 hdr = (struct rtw_fwcd_hdr *)(desc->next); 478 hdr->item = item; 479 hdr->size = size; 480 hdr->padding1 = 0x01234567; 481 hdr->padding2 = 0x89abcdef; 482 desc->next = next + size; 483 484 return next; 485 } 486 487 static void rtw_fwcd_dump(struct rtw_dev *rtwdev) 488 { 489 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 490 491 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n"); 492 493 /* Data will be freed after lifetime of device coredump. After calling 494 * dev_coredump, data is supposed to be handled by the device coredump 495 * framework. Note that a new dump will be discarded if a previous one 496 * hasn't been released yet. 497 */ 498 dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL); 499 } 500 501 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self) 502 { 503 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 504 505 if (free_self) { 506 rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n"); 507 vfree(desc->data); 508 } 509 510 desc->data = NULL; 511 desc->next = NULL; 512 } 513 514 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev) 515 { 516 u32 size = rtwdev->chip->fw_rxff_size; 517 u32 *buf; 518 u8 seq; 519 520 buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size); 521 if (!buf) 522 return -ENOMEM; 523 524 if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) { 525 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n"); 526 return -EINVAL; 527 } 528 529 if (GET_FW_DUMP_LEN(buf) == 0) { 530 rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n"); 531 return -EINVAL; 532 } 533 534 seq = GET_FW_DUMP_SEQ(buf); 535 if (seq > 0) { 536 rtw_dbg(rtwdev, RTW_DBG_FW, 537 "fw crash dump's seq is wrong: %d\n", seq); 538 return -EINVAL; 539 } 540 541 return 0; 542 } 543 544 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size, 545 u32 fwcd_item) 546 { 547 u32 rxff = rtwdev->chip->fw_rxff_size; 548 u32 dump_size, done_size = 0; 549 u8 *buf; 550 int ret; 551 552 buf = rtw_fwcd_next(rtwdev, fwcd_item, size); 553 if (!buf) 554 return -ENOMEM; 555 556 while (size) { 557 dump_size = size > rxff ? rxff : size; 558 559 ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size, 560 dump_size); 561 if (ret) { 562 rtw_err(rtwdev, 563 "ddma fw 0x%x [+0x%x] to fw fifo fail\n", 564 ocp_src, done_size); 565 return ret; 566 } 567 568 ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, 569 dump_size, (u32 *)(buf + done_size)); 570 if (ret) { 571 rtw_err(rtwdev, 572 "dump fw 0x%x [+0x%x] from fw fifo fail\n", 573 ocp_src, done_size); 574 return ret; 575 } 576 577 size -= dump_size; 578 done_size += dump_size; 579 } 580 581 return 0; 582 } 583 EXPORT_SYMBOL(rtw_dump_fw); 584 585 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size) 586 { 587 u8 *buf; 588 u32 i; 589 590 if (addr & 0x3) { 591 WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr); 592 return -EINVAL; 593 } 594 595 buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size); 596 if (!buf) 597 return -ENOMEM; 598 599 for (i = 0; i < size; i += 4) 600 *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i); 601 602 return 0; 603 } 604 EXPORT_SYMBOL(rtw_dump_reg); 605 606 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif, 607 struct ieee80211_bss_conf *conf) 608 { 609 struct ieee80211_vif *vif = NULL; 610 611 if (conf) 612 vif = container_of(conf, struct ieee80211_vif, bss_conf); 613 614 if (conf && vif->cfg.assoc) { 615 rtwvif->aid = vif->cfg.aid; 616 rtwvif->net_type = RTW_NET_MGD_LINKED; 617 } else { 618 rtwvif->aid = 0; 619 rtwvif->net_type = RTW_NET_NO_LINK; 620 } 621 } 622 623 static void rtw_reset_key_iter(struct ieee80211_hw *hw, 624 struct ieee80211_vif *vif, 625 struct ieee80211_sta *sta, 626 struct ieee80211_key_conf *key, 627 void *data) 628 { 629 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 630 struct rtw_sec_desc *sec = &rtwdev->sec; 631 632 rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx); 633 } 634 635 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta) 636 { 637 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 638 639 if (rtwdev->sta_cnt == 0) { 640 rtw_warn(rtwdev, "sta count before reset should not be 0\n"); 641 return; 642 } 643 rtw_sta_remove(rtwdev, sta, false); 644 } 645 646 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 647 { 648 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 649 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 650 651 rtw_bf_disassoc(rtwdev, vif, NULL); 652 rtw_vif_assoc_changed(rtwvif, NULL); 653 rtw_txq_cleanup(rtwdev, vif->txq); 654 655 rtw_release_macid(rtwdev, rtwvif->mac_id); 656 } 657 658 void rtw_fw_recovery(struct rtw_dev *rtwdev) 659 { 660 if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags)) 661 ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work); 662 } 663 664 static void __fw_recovery_work(struct rtw_dev *rtwdev) 665 { 666 int ret = 0; 667 668 set_bit(RTW_FLAG_RESTARTING, rtwdev->flags); 669 clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags); 670 671 ret = rtw_fwcd_prep(rtwdev); 672 if (ret) 673 goto free; 674 ret = rtw_fw_dump_crash_log(rtwdev); 675 if (ret) 676 goto free; 677 ret = rtw_chip_dump_fw_crash(rtwdev); 678 if (ret) 679 goto free; 680 681 rtw_fwcd_dump(rtwdev); 682 free: 683 rtw_fwcd_free(rtwdev, !!ret); 684 rtw_write8(rtwdev, REG_MCU_TST_CFG, 0); 685 686 WARN(1, "firmware crash, start reset and recover\n"); 687 688 rcu_read_lock(); 689 rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev); 690 rcu_read_unlock(); 691 rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev); 692 rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev); 693 bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM); 694 rtw_enter_ips(rtwdev); 695 } 696 697 static void rtw_fw_recovery_work(struct work_struct *work) 698 { 699 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 700 fw_recovery_work); 701 702 mutex_lock(&rtwdev->mutex); 703 __fw_recovery_work(rtwdev); 704 mutex_unlock(&rtwdev->mutex); 705 706 ieee80211_restart_hw(rtwdev->hw); 707 } 708 709 struct rtw_txq_ba_iter_data { 710 }; 711 712 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta) 713 { 714 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 715 int ret; 716 u8 tid; 717 718 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 719 while (tid != IEEE80211_NUM_TIDS) { 720 clear_bit(tid, si->tid_ba); 721 ret = ieee80211_start_tx_ba_session(sta, tid, 0); 722 if (ret == -EINVAL) { 723 struct ieee80211_txq *txq; 724 struct rtw_txq *rtwtxq; 725 726 txq = sta->txq[tid]; 727 rtwtxq = (struct rtw_txq *)txq->drv_priv; 728 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags); 729 } 730 731 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 732 } 733 } 734 735 static void rtw_txq_ba_work(struct work_struct *work) 736 { 737 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work); 738 struct rtw_txq_ba_iter_data data; 739 740 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data); 741 } 742 743 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel) 744 { 745 if (IS_CH_2G_BAND(channel)) 746 pkt_stat->band = NL80211_BAND_2GHZ; 747 else if (IS_CH_5G_BAND(channel)) 748 pkt_stat->band = NL80211_BAND_5GHZ; 749 else 750 return; 751 752 pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band); 753 } 754 EXPORT_SYMBOL(rtw_set_rx_freq_band); 755 756 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period) 757 { 758 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE); 759 rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1); 760 } 761 762 void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel, 763 u8 primary_channel, enum rtw_supported_band band, 764 enum rtw_bandwidth bandwidth) 765 { 766 enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band); 767 struct rtw_hal *hal = &rtwdev->hal; 768 u8 *cch_by_bw = hal->cch_by_bw; 769 u32 center_freq, primary_freq; 770 enum rtw_sar_bands sar_band; 771 u8 primary_channel_idx; 772 773 center_freq = ieee80211_channel_to_frequency(center_channel, nl_band); 774 primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band); 775 776 /* assign the center channel used while 20M bw is selected */ 777 cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel; 778 779 /* assign the center channel used while current bw is selected */ 780 cch_by_bw[bandwidth] = center_channel; 781 782 switch (bandwidth) { 783 case RTW_CHANNEL_WIDTH_20: 784 default: 785 primary_channel_idx = RTW_SC_DONT_CARE; 786 break; 787 case RTW_CHANNEL_WIDTH_40: 788 if (primary_freq > center_freq) 789 primary_channel_idx = RTW_SC_20_UPPER; 790 else 791 primary_channel_idx = RTW_SC_20_LOWER; 792 break; 793 case RTW_CHANNEL_WIDTH_80: 794 if (primary_freq > center_freq) { 795 if (primary_freq - center_freq == 10) 796 primary_channel_idx = RTW_SC_20_UPPER; 797 else 798 primary_channel_idx = RTW_SC_20_UPMOST; 799 800 /* assign the center channel used 801 * while 40M bw is selected 802 */ 803 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4; 804 } else { 805 if (center_freq - primary_freq == 10) 806 primary_channel_idx = RTW_SC_20_LOWER; 807 else 808 primary_channel_idx = RTW_SC_20_LOWEST; 809 810 /* assign the center channel used 811 * while 40M bw is selected 812 */ 813 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4; 814 } 815 break; 816 } 817 818 switch (center_channel) { 819 case 1 ... 14: 820 sar_band = RTW_SAR_BAND_0; 821 break; 822 case 36 ... 64: 823 sar_band = RTW_SAR_BAND_1; 824 break; 825 case 100 ... 144: 826 sar_band = RTW_SAR_BAND_3; 827 break; 828 case 149 ... 177: 829 sar_band = RTW_SAR_BAND_4; 830 break; 831 default: 832 WARN(1, "unknown ch(%u) to SAR band\n", center_channel); 833 sar_band = RTW_SAR_BAND_0; 834 break; 835 } 836 837 hal->current_primary_channel_index = primary_channel_idx; 838 hal->current_band_width = bandwidth; 839 hal->primary_channel = primary_channel; 840 hal->current_channel = center_channel; 841 hal->current_band_type = band; 842 hal->sar_band = sar_band; 843 } 844 845 void rtw_get_channel_params(struct cfg80211_chan_def *chandef, 846 struct rtw_channel_params *chan_params) 847 { 848 struct ieee80211_channel *channel = chandef->chan; 849 enum nl80211_chan_width width = chandef->width; 850 u32 primary_freq, center_freq; 851 u8 center_chan; 852 u8 bandwidth = RTW_CHANNEL_WIDTH_20; 853 854 center_chan = channel->hw_value; 855 primary_freq = channel->center_freq; 856 center_freq = chandef->center_freq1; 857 858 switch (width) { 859 case NL80211_CHAN_WIDTH_20_NOHT: 860 case NL80211_CHAN_WIDTH_20: 861 bandwidth = RTW_CHANNEL_WIDTH_20; 862 break; 863 case NL80211_CHAN_WIDTH_40: 864 bandwidth = RTW_CHANNEL_WIDTH_40; 865 if (primary_freq > center_freq) 866 center_chan -= 2; 867 else 868 center_chan += 2; 869 break; 870 case NL80211_CHAN_WIDTH_80: 871 bandwidth = RTW_CHANNEL_WIDTH_80; 872 if (primary_freq > center_freq) { 873 if (primary_freq - center_freq == 10) 874 center_chan -= 2; 875 else 876 center_chan -= 6; 877 } else { 878 if (center_freq - primary_freq == 10) 879 center_chan += 2; 880 else 881 center_chan += 6; 882 } 883 break; 884 default: 885 center_chan = 0; 886 break; 887 } 888 889 chan_params->center_chan = center_chan; 890 chan_params->bandwidth = bandwidth; 891 chan_params->primary_chan = channel->hw_value; 892 } 893 894 void rtw_set_channel(struct rtw_dev *rtwdev) 895 { 896 const struct rtw_chip_info *chip = rtwdev->chip; 897 struct ieee80211_hw *hw = rtwdev->hw; 898 struct rtw_hal *hal = &rtwdev->hal; 899 struct rtw_channel_params ch_param; 900 u8 center_chan, primary_chan, bandwidth, band; 901 902 rtw_get_channel_params(&hw->conf.chandef, &ch_param); 903 if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) 904 return; 905 906 center_chan = ch_param.center_chan; 907 primary_chan = ch_param.primary_chan; 908 bandwidth = ch_param.bandwidth; 909 band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; 910 911 rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth); 912 913 if (rtwdev->scan_info.op_chan) 914 rtw_store_op_chan(rtwdev, true); 915 916 chip->ops->set_channel(rtwdev, center_chan, bandwidth, 917 hal->current_primary_channel_index); 918 919 if (hal->current_band_type == RTW_BAND_5G) { 920 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G); 921 } else { 922 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 923 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G); 924 else 925 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN); 926 } 927 928 rtw_phy_set_tx_power_level(rtwdev, center_chan); 929 930 /* if the channel isn't set for scanning, we will do RF calibration 931 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration 932 * during scanning on each channel takes too long. 933 */ 934 if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 935 rtwdev->need_rfk = true; 936 } 937 938 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev) 939 { 940 const struct rtw_chip_info *chip = rtwdev->chip; 941 942 if (rtwdev->need_rfk) { 943 rtwdev->need_rfk = false; 944 chip->ops->phy_calibration(rtwdev); 945 } 946 } 947 948 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr) 949 { 950 int i; 951 952 for (i = 0; i < ETH_ALEN; i++) 953 rtw_write8(rtwdev, start + i, addr[i]); 954 } 955 956 void rtw_vif_port_config(struct rtw_dev *rtwdev, 957 struct rtw_vif *rtwvif, 958 u32 config) 959 { 960 u32 addr, mask; 961 962 if (config & PORT_SET_MAC_ADDR) { 963 addr = rtwvif->conf->mac_addr.addr; 964 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr); 965 } 966 if (config & PORT_SET_BSSID) { 967 addr = rtwvif->conf->bssid.addr; 968 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid); 969 } 970 if (config & PORT_SET_NET_TYPE) { 971 addr = rtwvif->conf->net_type.addr; 972 mask = rtwvif->conf->net_type.mask; 973 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); 974 } 975 if (config & PORT_SET_AID) { 976 addr = rtwvif->conf->aid.addr; 977 mask = rtwvif->conf->aid.mask; 978 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); 979 } 980 if (config & PORT_SET_BCN_CTRL) { 981 addr = rtwvif->conf->bcn_ctrl.addr; 982 mask = rtwvif->conf->bcn_ctrl.mask; 983 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl); 984 } 985 } 986 987 static u8 hw_bw_cap_to_bitamp(u8 bw_cap) 988 { 989 u8 bw = 0; 990 991 switch (bw_cap) { 992 case EFUSE_HW_CAP_IGNORE: 993 case EFUSE_HW_CAP_SUPP_BW80: 994 bw |= BIT(RTW_CHANNEL_WIDTH_80); 995 fallthrough; 996 case EFUSE_HW_CAP_SUPP_BW40: 997 bw |= BIT(RTW_CHANNEL_WIDTH_40); 998 fallthrough; 999 default: 1000 bw |= BIT(RTW_CHANNEL_WIDTH_20); 1001 break; 1002 } 1003 1004 return bw; 1005 } 1006 1007 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) 1008 { 1009 const struct rtw_chip_info *chip = rtwdev->chip; 1010 struct rtw_hal *hal = &rtwdev->hal; 1011 1012 if (hw_ant_num == EFUSE_HW_CAP_IGNORE || 1013 hw_ant_num >= hal->rf_path_num) 1014 return; 1015 1016 switch (hw_ant_num) { 1017 case 1: 1018 hal->rf_type = RF_1T1R; 1019 hal->rf_path_num = 1; 1020 if (!chip->fix_rf_phy_num) 1021 hal->rf_phy_num = hal->rf_path_num; 1022 hal->antenna_tx = BB_PATH_A; 1023 hal->antenna_rx = BB_PATH_A; 1024 break; 1025 default: 1026 WARN(1, "invalid hw configuration from efuse\n"); 1027 break; 1028 } 1029 } 1030 1031 static u64 get_vht_ra_mask(struct ieee80211_sta *sta) 1032 { 1033 u64 ra_mask = 0; 1034 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 1035 u8 vht_mcs_cap; 1036 int i, nss; 1037 1038 /* 4SS, every two bits for MCS7/8/9 */ 1039 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) { 1040 vht_mcs_cap = mcs_map & 0x3; 1041 switch (vht_mcs_cap) { 1042 case 2: /* MCS9 */ 1043 ra_mask |= 0x3ffULL << nss; 1044 break; 1045 case 1: /* MCS8 */ 1046 ra_mask |= 0x1ffULL << nss; 1047 break; 1048 case 0: /* MCS7 */ 1049 ra_mask |= 0x0ffULL << nss; 1050 break; 1051 default: 1052 break; 1053 } 1054 } 1055 1056 return ra_mask; 1057 } 1058 1059 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num) 1060 { 1061 u8 rate_id = 0; 1062 1063 switch (wireless_set) { 1064 case WIRELESS_CCK: 1065 rate_id = RTW_RATEID_B_20M; 1066 break; 1067 case WIRELESS_OFDM: 1068 rate_id = RTW_RATEID_G; 1069 break; 1070 case WIRELESS_CCK | WIRELESS_OFDM: 1071 rate_id = RTW_RATEID_BG; 1072 break; 1073 case WIRELESS_OFDM | WIRELESS_HT: 1074 if (tx_num == 1) 1075 rate_id = RTW_RATEID_GN_N1SS; 1076 else if (tx_num == 2) 1077 rate_id = RTW_RATEID_GN_N2SS; 1078 else if (tx_num == 3) 1079 rate_id = RTW_RATEID_ARFR5_N_3SS; 1080 break; 1081 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT: 1082 if (bw_mode == RTW_CHANNEL_WIDTH_40) { 1083 if (tx_num == 1) 1084 rate_id = RTW_RATEID_BGN_40M_1SS; 1085 else if (tx_num == 2) 1086 rate_id = RTW_RATEID_BGN_40M_2SS; 1087 else if (tx_num == 3) 1088 rate_id = RTW_RATEID_ARFR5_N_3SS; 1089 else if (tx_num == 4) 1090 rate_id = RTW_RATEID_ARFR7_N_4SS; 1091 } else { 1092 if (tx_num == 1) 1093 rate_id = RTW_RATEID_BGN_20M_1SS; 1094 else if (tx_num == 2) 1095 rate_id = RTW_RATEID_BGN_20M_2SS; 1096 else if (tx_num == 3) 1097 rate_id = RTW_RATEID_ARFR5_N_3SS; 1098 else if (tx_num == 4) 1099 rate_id = RTW_RATEID_ARFR7_N_4SS; 1100 } 1101 break; 1102 case WIRELESS_OFDM | WIRELESS_VHT: 1103 if (tx_num == 1) 1104 rate_id = RTW_RATEID_ARFR1_AC_1SS; 1105 else if (tx_num == 2) 1106 rate_id = RTW_RATEID_ARFR0_AC_2SS; 1107 else if (tx_num == 3) 1108 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1109 else if (tx_num == 4) 1110 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1111 break; 1112 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT: 1113 if (bw_mode >= RTW_CHANNEL_WIDTH_80) { 1114 if (tx_num == 1) 1115 rate_id = RTW_RATEID_ARFR1_AC_1SS; 1116 else if (tx_num == 2) 1117 rate_id = RTW_RATEID_ARFR0_AC_2SS; 1118 else if (tx_num == 3) 1119 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1120 else if (tx_num == 4) 1121 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1122 } else { 1123 if (tx_num == 1) 1124 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS; 1125 else if (tx_num == 2) 1126 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS; 1127 else if (tx_num == 3) 1128 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1129 else if (tx_num == 4) 1130 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1131 } 1132 break; 1133 default: 1134 break; 1135 } 1136 1137 return rate_id; 1138 } 1139 1140 #define RA_MASK_CCK_RATES 0x0000f 1141 #define RA_MASK_OFDM_RATES 0x00ff0 1142 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0) 1143 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8) 1144 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16) 1145 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \ 1146 RA_MASK_HT_RATES_2SS | \ 1147 RA_MASK_HT_RATES_3SS) 1148 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0) 1149 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10) 1150 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20) 1151 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \ 1152 RA_MASK_VHT_RATES_2SS | \ 1153 RA_MASK_VHT_RATES_3SS) 1154 #define RA_MASK_CCK_IN_BG 0x00005 1155 #define RA_MASK_CCK_IN_HT 0x00005 1156 #define RA_MASK_CCK_IN_VHT 0x00005 1157 #define RA_MASK_OFDM_IN_VHT 0x00010 1158 #define RA_MASK_OFDM_IN_HT_2G 0x00010 1159 #define RA_MASK_OFDM_IN_HT_5G 0x00030 1160 1161 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set) 1162 { 1163 u8 rssi_level = si->rssi_level; 1164 1165 if (wireless_set == WIRELESS_CCK) 1166 return 0xffffffffffffffffULL; 1167 1168 if (rssi_level == 0) 1169 return 0xffffffffffffffffULL; 1170 else if (rssi_level == 1) 1171 return 0xfffffffffffffff0ULL; 1172 else if (rssi_level == 2) 1173 return 0xffffffffffffefe0ULL; 1174 else if (rssi_level == 3) 1175 return 0xffffffffffffcfc0ULL; 1176 else if (rssi_level == 4) 1177 return 0xffffffffffff8f80ULL; 1178 else 1179 return 0xffffffffffff0f00ULL; 1180 } 1181 1182 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak) 1183 { 1184 if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0) 1185 ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); 1186 1187 if (ra_mask == 0) 1188 ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); 1189 1190 return ra_mask; 1191 } 1192 1193 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si, 1194 u64 ra_mask, bool is_vht_enable) 1195 { 1196 struct rtw_hal *hal = &rtwdev->hal; 1197 const struct cfg80211_bitrate_mask *mask = si->mask; 1198 u64 cfg_mask = GENMASK_ULL(63, 0); 1199 u8 band; 1200 1201 if (!si->use_cfg_mask) 1202 return ra_mask; 1203 1204 band = hal->current_band_type; 1205 if (band == RTW_BAND_2G) { 1206 band = NL80211_BAND_2GHZ; 1207 cfg_mask = mask->control[band].legacy; 1208 } else if (band == RTW_BAND_5G) { 1209 band = NL80211_BAND_5GHZ; 1210 cfg_mask = u64_encode_bits(mask->control[band].legacy, 1211 RA_MASK_OFDM_RATES); 1212 } 1213 1214 if (!is_vht_enable) { 1215 if (ra_mask & RA_MASK_HT_RATES_1SS) 1216 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], 1217 RA_MASK_HT_RATES_1SS); 1218 if (ra_mask & RA_MASK_HT_RATES_2SS) 1219 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], 1220 RA_MASK_HT_RATES_2SS); 1221 } else { 1222 if (ra_mask & RA_MASK_VHT_RATES_1SS) 1223 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], 1224 RA_MASK_VHT_RATES_1SS); 1225 if (ra_mask & RA_MASK_VHT_RATES_2SS) 1226 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], 1227 RA_MASK_VHT_RATES_2SS); 1228 } 1229 1230 ra_mask &= cfg_mask; 1231 1232 return ra_mask; 1233 } 1234 1235 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, 1236 bool reset_ra_mask) 1237 { 1238 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 1239 struct ieee80211_sta *sta = si->sta; 1240 struct rtw_efuse *efuse = &rtwdev->efuse; 1241 struct rtw_hal *hal = &rtwdev->hal; 1242 u8 wireless_set; 1243 u8 bw_mode; 1244 u8 rate_id; 1245 u8 stbc_en = 0; 1246 u8 ldpc_en = 0; 1247 u8 tx_num = 1; 1248 u64 ra_mask = 0; 1249 u64 ra_mask_bak = 0; 1250 bool is_vht_enable = false; 1251 bool is_support_sgi = false; 1252 1253 if (sta->deflink.vht_cap.vht_supported) { 1254 is_vht_enable = true; 1255 ra_mask |= get_vht_ra_mask(sta); 1256 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) 1257 stbc_en = VHT_STBC_EN; 1258 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) 1259 ldpc_en = VHT_LDPC_EN; 1260 } else if (sta->deflink.ht_cap.ht_supported) { 1261 ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) | 1262 (sta->deflink.ht_cap.mcs.rx_mask[0] << 12); 1263 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 1264 stbc_en = HT_STBC_EN; 1265 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) 1266 ldpc_en = HT_LDPC_EN; 1267 } 1268 1269 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss) 1270 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS; 1271 1272 if (hal->current_band_type == RTW_BAND_5G) { 1273 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4; 1274 ra_mask_bak = ra_mask; 1275 if (sta->deflink.vht_cap.vht_supported) { 1276 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; 1277 wireless_set = WIRELESS_OFDM | WIRELESS_VHT; 1278 } else if (sta->deflink.ht_cap.ht_supported) { 1279 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G; 1280 wireless_set = WIRELESS_OFDM | WIRELESS_HT; 1281 } else { 1282 wireless_set = WIRELESS_OFDM; 1283 } 1284 dm_info->rrsr_val_init = RRSR_INIT_5G; 1285 } else if (hal->current_band_type == RTW_BAND_2G) { 1286 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ]; 1287 ra_mask_bak = ra_mask; 1288 if (sta->deflink.vht_cap.vht_supported) { 1289 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT | 1290 RA_MASK_OFDM_IN_VHT; 1291 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 1292 WIRELESS_HT | WIRELESS_VHT; 1293 } else if (sta->deflink.ht_cap.ht_supported) { 1294 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT | 1295 RA_MASK_OFDM_IN_HT_2G; 1296 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 1297 WIRELESS_HT; 1298 #if defined(__linux__) 1299 } else if (sta->deflink.supp_rates[0] <= 0xf) { 1300 #elif defined(__FreeBSD__) 1301 } else if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] <= 0xf) { 1302 #endif 1303 wireless_set = WIRELESS_CCK; 1304 } else { 1305 ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG; 1306 wireless_set = WIRELESS_CCK | WIRELESS_OFDM; 1307 } 1308 dm_info->rrsr_val_init = RRSR_INIT_2G; 1309 } else { 1310 rtw_err(rtwdev, "Unknown band type\n"); 1311 ra_mask_bak = ra_mask; 1312 wireless_set = 0; 1313 } 1314 1315 switch (sta->deflink.bandwidth) { 1316 case IEEE80211_STA_RX_BW_80: 1317 bw_mode = RTW_CHANNEL_WIDTH_80; 1318 is_support_sgi = sta->deflink.vht_cap.vht_supported && 1319 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); 1320 break; 1321 case IEEE80211_STA_RX_BW_40: 1322 bw_mode = RTW_CHANNEL_WIDTH_40; 1323 is_support_sgi = sta->deflink.ht_cap.ht_supported && 1324 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40); 1325 break; 1326 default: 1327 bw_mode = RTW_CHANNEL_WIDTH_20; 1328 is_support_sgi = sta->deflink.ht_cap.ht_supported && 1329 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20); 1330 break; 1331 } 1332 1333 if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) 1334 tx_num = 2; 1335 else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) 1336 tx_num = 2; 1337 1338 rate_id = get_rate_id(wireless_set, bw_mode, tx_num); 1339 1340 ra_mask &= rtw_rate_mask_rssi(si, wireless_set); 1341 ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak); 1342 ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable); 1343 1344 si->bw_mode = bw_mode; 1345 si->stbc_en = stbc_en; 1346 si->ldpc_en = ldpc_en; 1347 si->sgi_enable = is_support_sgi; 1348 si->vht_enable = is_vht_enable; 1349 si->ra_mask = ra_mask; 1350 si->rate_id = rate_id; 1351 1352 rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask); 1353 } 1354 1355 int rtw_wait_firmware_completion(struct rtw_dev *rtwdev) 1356 { 1357 const struct rtw_chip_info *chip = rtwdev->chip; 1358 struct rtw_fw_state *fw; 1359 int ret = 0; 1360 1361 fw = &rtwdev->fw; 1362 wait_for_completion(&fw->completion); 1363 if (!fw->firmware) 1364 ret = -EINVAL; 1365 1366 if (chip->wow_fw_name) { 1367 fw = &rtwdev->wow_fw; 1368 wait_for_completion(&fw->completion); 1369 if (!fw->firmware) 1370 ret = -EINVAL; 1371 } 1372 1373 return ret; 1374 } 1375 EXPORT_SYMBOL(rtw_wait_firmware_completion); 1376 1377 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev, 1378 struct rtw_fw_state *fw) 1379 { 1380 const struct rtw_chip_info *chip = rtwdev->chip; 1381 1382 if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported || 1383 !fw->feature) 1384 return LPS_DEEP_MODE_NONE; 1385 1386 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) && 1387 rtw_fw_feature_check(fw, FW_FEATURE_PG)) 1388 return LPS_DEEP_MODE_PG; 1389 1390 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) && 1391 rtw_fw_feature_check(fw, FW_FEATURE_LCLK)) 1392 return LPS_DEEP_MODE_LCLK; 1393 1394 return LPS_DEEP_MODE_NONE; 1395 } 1396 1397 int rtw_power_on(struct rtw_dev *rtwdev) 1398 { 1399 const struct rtw_chip_info *chip = rtwdev->chip; 1400 struct rtw_fw_state *fw = &rtwdev->fw; 1401 bool wifi_only; 1402 int ret; 1403 1404 ret = rtw_hci_setup(rtwdev); 1405 if (ret) { 1406 rtw_err(rtwdev, "failed to setup hci\n"); 1407 goto err; 1408 } 1409 1410 /* power on MAC before firmware downloaded */ 1411 ret = rtw_mac_power_on(rtwdev); 1412 if (ret) { 1413 rtw_err(rtwdev, "failed to power on mac\n"); 1414 goto err; 1415 } 1416 1417 ret = rtw_wait_firmware_completion(rtwdev); 1418 if (ret) { 1419 rtw_err(rtwdev, "failed to wait firmware completion\n"); 1420 goto err_off; 1421 } 1422 1423 ret = rtw_download_firmware(rtwdev, fw); 1424 if (ret) { 1425 rtw_err(rtwdev, "failed to download firmware\n"); 1426 goto err_off; 1427 } 1428 1429 /* config mac after firmware downloaded */ 1430 ret = rtw_mac_init(rtwdev); 1431 if (ret) { 1432 rtw_err(rtwdev, "failed to configure mac\n"); 1433 goto err_off; 1434 } 1435 1436 chip->ops->phy_set_param(rtwdev); 1437 1438 ret = rtw_hci_start(rtwdev); 1439 if (ret) { 1440 rtw_err(rtwdev, "failed to start hci\n"); 1441 goto err_off; 1442 } 1443 1444 /* send H2C after HCI has started */ 1445 rtw_fw_send_general_info(rtwdev); 1446 rtw_fw_send_phydm_info(rtwdev); 1447 1448 wifi_only = !rtwdev->efuse.btcoex; 1449 rtw_coex_power_on_setting(rtwdev); 1450 rtw_coex_init_hw_config(rtwdev, wifi_only); 1451 1452 return 0; 1453 1454 err_off: 1455 rtw_mac_power_off(rtwdev); 1456 1457 err: 1458 return ret; 1459 } 1460 EXPORT_SYMBOL(rtw_power_on); 1461 1462 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start) 1463 { 1464 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN)) 1465 return; 1466 1467 if (start) { 1468 rtw_fw_scan_notify(rtwdev, true); 1469 } else { 1470 reinit_completion(&rtwdev->fw_scan_density); 1471 rtw_fw_scan_notify(rtwdev, false); 1472 if (!wait_for_completion_timeout(&rtwdev->fw_scan_density, 1473 SCAN_NOTIFY_TIMEOUT)) 1474 rtw_warn(rtwdev, "firmware failed to report density after scan\n"); 1475 } 1476 } 1477 1478 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, 1479 const u8 *mac_addr, bool hw_scan) 1480 { 1481 u32 config = 0; 1482 int ret = 0; 1483 1484 rtw_leave_lps(rtwdev); 1485 1486 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) { 1487 ret = rtw_leave_ips(rtwdev); 1488 if (ret) { 1489 rtw_err(rtwdev, "failed to leave idle state\n"); 1490 return; 1491 } 1492 } 1493 1494 ether_addr_copy(rtwvif->mac_addr, mac_addr); 1495 config |= PORT_SET_MAC_ADDR; 1496 rtw_vif_port_config(rtwdev, rtwvif, config); 1497 1498 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START); 1499 rtw_core_fw_scan_notify(rtwdev, true); 1500 1501 set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); 1502 set_bit(RTW_FLAG_SCANNING, rtwdev->flags); 1503 } 1504 1505 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, 1506 bool hw_scan) 1507 { 1508 struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL; 1509 u32 config = 0; 1510 1511 if (!rtwvif) 1512 return; 1513 1514 clear_bit(RTW_FLAG_SCANNING, rtwdev->flags); 1515 clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); 1516 1517 rtw_core_fw_scan_notify(rtwdev, false); 1518 1519 ether_addr_copy(rtwvif->mac_addr, vif->addr); 1520 config |= PORT_SET_MAC_ADDR; 1521 rtw_vif_port_config(rtwdev, rtwvif, config); 1522 1523 rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH); 1524 1525 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) 1526 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work); 1527 } 1528 1529 int rtw_core_start(struct rtw_dev *rtwdev) 1530 { 1531 int ret; 1532 1533 ret = rtwdev->chip->ops->power_on(rtwdev); 1534 if (ret) 1535 return ret; 1536 1537 rtw_sec_enable_sec_engine(rtwdev); 1538 1539 rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw); 1540 rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw); 1541 1542 /* rcr reset after powered on */ 1543 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); 1544 1545 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 1546 RTW_WATCH_DOG_DELAY_TIME); 1547 1548 set_bit(RTW_FLAG_RUNNING, rtwdev->flags); 1549 1550 return 0; 1551 } 1552 1553 void rtw_power_off(struct rtw_dev *rtwdev) 1554 { 1555 rtw_hci_stop(rtwdev); 1556 rtw_coex_power_off_setting(rtwdev); 1557 rtw_mac_power_off(rtwdev); 1558 } 1559 EXPORT_SYMBOL(rtw_power_off); 1560 1561 void rtw_core_stop(struct rtw_dev *rtwdev) 1562 { 1563 struct rtw_coex *coex = &rtwdev->coex; 1564 1565 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags); 1566 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags); 1567 1568 mutex_unlock(&rtwdev->mutex); 1569 1570 cancel_work_sync(&rtwdev->c2h_work); 1571 cancel_work_sync(&rtwdev->update_beacon_work); 1572 cancel_delayed_work_sync(&rtwdev->watch_dog_work); 1573 cancel_delayed_work_sync(&coex->bt_relink_work); 1574 cancel_delayed_work_sync(&coex->bt_reenable_work); 1575 cancel_delayed_work_sync(&coex->defreeze_work); 1576 cancel_delayed_work_sync(&coex->wl_remain_work); 1577 cancel_delayed_work_sync(&coex->bt_remain_work); 1578 cancel_delayed_work_sync(&coex->wl_connecting_work); 1579 cancel_delayed_work_sync(&coex->bt_multi_link_remain_work); 1580 cancel_delayed_work_sync(&coex->wl_ccklock_work); 1581 1582 mutex_lock(&rtwdev->mutex); 1583 1584 rtwdev->chip->ops->power_off(rtwdev); 1585 } 1586 1587 static void rtw_init_ht_cap(struct rtw_dev *rtwdev, 1588 struct ieee80211_sta_ht_cap *ht_cap) 1589 { 1590 const struct rtw_chip_info *chip = rtwdev->chip; 1591 struct rtw_efuse *efuse = &rtwdev->efuse; 1592 1593 ht_cap->ht_supported = true; 1594 ht_cap->cap = 0; 1595 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | 1596 IEEE80211_HT_CAP_MAX_AMSDU | 1597 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 1598 1599 if (rtw_chip_has_rx_ldpc(rtwdev)) 1600 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; 1601 if (rtw_chip_has_tx_stbc(rtwdev)) 1602 ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; 1603 1604 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) 1605 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 1606 IEEE80211_HT_CAP_DSSSCCK40 | 1607 IEEE80211_HT_CAP_SGI_40; 1608 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 1609 ht_cap->ampdu_density = chip->ampdu_density; 1610 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 1611 if (efuse->hw_cap.nss > 1) { 1612 ht_cap->mcs.rx_mask[0] = 0xFF; 1613 ht_cap->mcs.rx_mask[1] = 0xFF; 1614 ht_cap->mcs.rx_mask[4] = 0x01; 1615 ht_cap->mcs.rx_highest = cpu_to_le16(300); 1616 } else { 1617 ht_cap->mcs.rx_mask[0] = 0xFF; 1618 ht_cap->mcs.rx_mask[1] = 0x00; 1619 ht_cap->mcs.rx_mask[4] = 0x01; 1620 ht_cap->mcs.rx_highest = cpu_to_le16(150); 1621 } 1622 } 1623 1624 static void rtw_init_vht_cap(struct rtw_dev *rtwdev, 1625 struct ieee80211_sta_vht_cap *vht_cap) 1626 { 1627 struct rtw_efuse *efuse = &rtwdev->efuse; 1628 u16 mcs_map; 1629 __le16 highest; 1630 1631 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE && 1632 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT) 1633 return; 1634 1635 vht_cap->vht_supported = true; 1636 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 1637 IEEE80211_VHT_CAP_SHORT_GI_80 | 1638 IEEE80211_VHT_CAP_RXSTBC_1 | 1639 IEEE80211_VHT_CAP_HTC_VHT | 1640 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 1641 0; 1642 if (rtwdev->hal.rf_path_num > 1) 1643 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 1644 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 1645 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; 1646 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap << 1647 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT); 1648 1649 if (rtw_chip_has_rx_ldpc(rtwdev)) 1650 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 1651 1652 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 1653 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 1654 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 1655 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 1656 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 1657 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 1658 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14; 1659 if (efuse->hw_cap.nss > 1) { 1660 highest = cpu_to_le16(780); 1661 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2; 1662 } else { 1663 highest = cpu_to_le16(390); 1664 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2; 1665 } 1666 1667 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); 1668 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); 1669 vht_cap->vht_mcs.rx_highest = highest; 1670 vht_cap->vht_mcs.tx_highest = highest; 1671 } 1672 1673 static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev) 1674 { 1675 u16 len; 1676 1677 len = rtwdev->chip->max_scan_ie_len; 1678 1679 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) && 1680 rtwdev->chip->id == RTW_CHIP_TYPE_8822C) 1681 len = IEEE80211_MAX_DATA_LEN; 1682 else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM)) 1683 len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE; 1684 1685 return len; 1686 } 1687 1688 static void rtw_set_supported_band(struct ieee80211_hw *hw, 1689 const struct rtw_chip_info *chip) 1690 { 1691 struct rtw_dev *rtwdev = hw->priv; 1692 struct ieee80211_supported_band *sband; 1693 1694 if (chip->band & RTW_BAND_2G) { 1695 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL); 1696 if (!sband) 1697 goto err_out; 1698 #if defined(__linux__) 1699 if (chip->ht_supported) 1700 #elif defined(__FreeBSD__) 1701 if (rtw_ht_support && chip->ht_supported) 1702 #endif 1703 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1704 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband; 1705 } 1706 1707 if (chip->band & RTW_BAND_5G) { 1708 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL); 1709 if (!sband) 1710 goto err_out; 1711 #if defined(__linux__) 1712 if (chip->ht_supported) 1713 #elif defined(__FreeBSD__) 1714 if (rtw_ht_support && chip->ht_supported) 1715 #endif 1716 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1717 #if defined(__linux__) 1718 if (chip->vht_supported) 1719 #elif defined(__FreeBSD__) 1720 if (rtw_vht_support && chip->vht_supported) 1721 #endif 1722 rtw_init_vht_cap(rtwdev, &sband->vht_cap); 1723 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband; 1724 } 1725 1726 return; 1727 1728 err_out: 1729 rtw_err(rtwdev, "failed to set supported band\n"); 1730 } 1731 1732 static void rtw_unset_supported_band(struct ieee80211_hw *hw, 1733 const struct rtw_chip_info *chip) 1734 { 1735 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); 1736 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); 1737 } 1738 1739 static void rtw_vif_smps_iter(void *data, u8 *mac, 1740 struct ieee80211_vif *vif) 1741 { 1742 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 1743 1744 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc) 1745 return; 1746 1747 if (rtwdev->hal.txrx_1ss) 1748 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC); 1749 else 1750 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF); 1751 } 1752 1753 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss) 1754 { 1755 const struct rtw_chip_info *chip = rtwdev->chip; 1756 struct rtw_hal *hal = &rtwdev->hal; 1757 1758 if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss) 1759 return; 1760 1761 rtwdev->hal.txrx_1ss = txrx_1ss; 1762 if (txrx_1ss) 1763 chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false); 1764 else 1765 chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx, 1766 hal->antenna_rx, false); 1767 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev); 1768 } 1769 1770 static void __update_firmware_feature(struct rtw_dev *rtwdev, 1771 struct rtw_fw_state *fw) 1772 { 1773 u32 feature; 1774 const struct rtw_fw_hdr *fw_hdr = 1775 (const struct rtw_fw_hdr *)fw->firmware->data; 1776 1777 feature = le32_to_cpu(fw_hdr->feature); 1778 fw->feature = feature & FW_FEATURE_SIG ? feature : 0; 1779 1780 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C && 1781 RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13)) 1782 fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM; 1783 } 1784 1785 static void __update_firmware_info(struct rtw_dev *rtwdev, 1786 struct rtw_fw_state *fw) 1787 { 1788 const struct rtw_fw_hdr *fw_hdr = 1789 (const struct rtw_fw_hdr *)fw->firmware->data; 1790 1791 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver); 1792 fw->version = le16_to_cpu(fw_hdr->version); 1793 fw->sub_version = fw_hdr->subversion; 1794 fw->sub_index = fw_hdr->subindex; 1795 1796 __update_firmware_feature(rtwdev, fw); 1797 } 1798 1799 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev, 1800 struct rtw_fw_state *fw) 1801 { 1802 struct rtw_fw_hdr_legacy *legacy = 1803 #if defined(__linux__) 1804 (struct rtw_fw_hdr_legacy *)fw->firmware->data; 1805 #elif defined(__FreeBSD__) 1806 __DECONST(struct rtw_fw_hdr_legacy *, fw->firmware->data); 1807 #endif 1808 1809 fw->h2c_version = 0; 1810 fw->version = le16_to_cpu(legacy->version); 1811 fw->sub_version = legacy->subversion1; 1812 fw->sub_index = legacy->subversion2; 1813 } 1814 1815 static void update_firmware_info(struct rtw_dev *rtwdev, 1816 struct rtw_fw_state *fw) 1817 { 1818 if (rtw_chip_wcpu_11n(rtwdev)) 1819 __update_firmware_info_legacy(rtwdev, fw); 1820 else 1821 __update_firmware_info(rtwdev, fw); 1822 } 1823 1824 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context) 1825 { 1826 struct rtw_fw_state *fw = context; 1827 struct rtw_dev *rtwdev = fw->rtwdev; 1828 1829 if (!firmware || !firmware->data) { 1830 rtw_err(rtwdev, "failed to request firmware\n"); 1831 complete_all(&fw->completion); 1832 return; 1833 } 1834 1835 fw->firmware = firmware; 1836 update_firmware_info(rtwdev, fw); 1837 complete_all(&fw->completion); 1838 1839 rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n", 1840 fw->type == RTW_WOWLAN_FW ? "WOW " : "", 1841 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version); 1842 } 1843 1844 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type) 1845 { 1846 const char *fw_name; 1847 struct rtw_fw_state *fw; 1848 int ret; 1849 1850 switch (type) { 1851 case RTW_WOWLAN_FW: 1852 fw = &rtwdev->wow_fw; 1853 fw_name = rtwdev->chip->wow_fw_name; 1854 break; 1855 1856 case RTW_NORMAL_FW: 1857 fw = &rtwdev->fw; 1858 fw_name = rtwdev->chip->fw_name; 1859 break; 1860 1861 default: 1862 rtw_warn(rtwdev, "unsupported firmware type\n"); 1863 return -ENOENT; 1864 } 1865 1866 fw->type = type; 1867 fw->rtwdev = rtwdev; 1868 init_completion(&fw->completion); 1869 1870 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, 1871 GFP_KERNEL, fw, rtw_load_firmware_cb); 1872 if (ret) { 1873 rtw_err(rtwdev, "failed to async firmware request\n"); 1874 return ret; 1875 } 1876 1877 return 0; 1878 } 1879 1880 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev) 1881 { 1882 const struct rtw_chip_info *chip = rtwdev->chip; 1883 struct rtw_hal *hal = &rtwdev->hal; 1884 struct rtw_efuse *efuse = &rtwdev->efuse; 1885 1886 switch (rtw_hci_type(rtwdev)) { 1887 case RTW_HCI_TYPE_PCIE: 1888 rtwdev->hci.rpwm_addr = 0x03d9; 1889 rtwdev->hci.cpwm_addr = 0x03da; 1890 break; 1891 case RTW_HCI_TYPE_SDIO: 1892 rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1; 1893 rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2; 1894 break; 1895 case RTW_HCI_TYPE_USB: 1896 rtwdev->hci.rpwm_addr = 0xfe58; 1897 rtwdev->hci.cpwm_addr = 0xfe57; 1898 break; 1899 default: 1900 rtw_err(rtwdev, "unsupported hci type\n"); 1901 return -EINVAL; 1902 } 1903 1904 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1); 1905 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version); 1906 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1; 1907 if (hal->chip_version & BIT_RF_TYPE_ID) { 1908 hal->rf_type = RF_2T2R; 1909 hal->rf_path_num = 2; 1910 hal->antenna_tx = BB_PATH_AB; 1911 hal->antenna_rx = BB_PATH_AB; 1912 } else { 1913 hal->rf_type = RF_1T1R; 1914 hal->rf_path_num = 1; 1915 hal->antenna_tx = BB_PATH_A; 1916 hal->antenna_rx = BB_PATH_A; 1917 } 1918 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num : 1919 hal->rf_path_num; 1920 1921 efuse->physical_size = chip->phy_efuse_size; 1922 efuse->logical_size = chip->log_efuse_size; 1923 efuse->protect_size = chip->ptct_efuse_size; 1924 1925 /* default use ack */ 1926 rtwdev->hal.rcr |= BIT_VHT_DACK; 1927 1928 hal->bfee_sts_cap = 3; 1929 1930 return 0; 1931 } 1932 1933 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev) 1934 { 1935 struct rtw_fw_state *fw = &rtwdev->fw; 1936 int ret; 1937 1938 ret = rtw_hci_setup(rtwdev); 1939 if (ret) { 1940 rtw_err(rtwdev, "failed to setup hci\n"); 1941 goto err; 1942 } 1943 1944 ret = rtw_mac_power_on(rtwdev); 1945 if (ret) { 1946 rtw_err(rtwdev, "failed to power on mac\n"); 1947 goto err; 1948 } 1949 1950 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP); 1951 1952 wait_for_completion(&fw->completion); 1953 if (!fw->firmware) { 1954 ret = -EINVAL; 1955 rtw_err(rtwdev, "failed to load firmware\n"); 1956 goto err; 1957 } 1958 1959 ret = rtw_download_firmware(rtwdev, fw); 1960 if (ret) { 1961 rtw_err(rtwdev, "failed to download firmware\n"); 1962 goto err_off; 1963 } 1964 1965 return 0; 1966 1967 err_off: 1968 rtw_mac_power_off(rtwdev); 1969 1970 err: 1971 return ret; 1972 } 1973 1974 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev) 1975 { 1976 struct rtw_efuse *efuse = &rtwdev->efuse; 1977 u8 hw_feature[HW_FEATURE_LEN]; 1978 u8 id; 1979 u8 bw; 1980 int i; 1981 1982 if (!rtwdev->chip->hw_feature_report) 1983 return 0; 1984 1985 id = rtw_read8(rtwdev, REG_C2HEVT); 1986 if (id != C2H_HW_FEATURE_REPORT) { 1987 rtw_err(rtwdev, "failed to read hw feature report\n"); 1988 return -EBUSY; 1989 } 1990 1991 for (i = 0; i < HW_FEATURE_LEN; i++) 1992 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i); 1993 1994 rtw_write8(rtwdev, REG_C2HEVT, 0); 1995 1996 bw = GET_EFUSE_HW_CAP_BW(hw_feature); 1997 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw); 1998 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature); 1999 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature); 2000 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature); 2001 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature); 2002 2003 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num); 2004 2005 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE || 2006 efuse->hw_cap.nss > rtwdev->hal.rf_path_num) 2007 efuse->hw_cap.nss = rtwdev->hal.rf_path_num; 2008 2009 rtw_dbg(rtwdev, RTW_DBG_EFUSE, 2010 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n", 2011 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl, 2012 efuse->hw_cap.ant_num, efuse->hw_cap.nss); 2013 2014 return 0; 2015 } 2016 2017 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev) 2018 { 2019 rtw_hci_stop(rtwdev); 2020 rtw_mac_power_off(rtwdev); 2021 } 2022 2023 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev) 2024 { 2025 struct rtw_efuse *efuse = &rtwdev->efuse; 2026 int ret; 2027 2028 mutex_lock(&rtwdev->mutex); 2029 2030 /* power on mac to read efuse */ 2031 ret = rtw_chip_efuse_enable(rtwdev); 2032 if (ret) 2033 goto out_unlock; 2034 2035 ret = rtw_parse_efuse_map(rtwdev); 2036 if (ret) 2037 goto out_disable; 2038 2039 ret = rtw_dump_hw_feature(rtwdev); 2040 if (ret) 2041 goto out_disable; 2042 2043 ret = rtw_check_supported_rfe(rtwdev); 2044 if (ret) 2045 goto out_disable; 2046 2047 if (efuse->crystal_cap == 0xff) 2048 efuse->crystal_cap = 0; 2049 if (efuse->pa_type_2g == 0xff) 2050 efuse->pa_type_2g = 0; 2051 if (efuse->pa_type_5g == 0xff) 2052 efuse->pa_type_5g = 0; 2053 if (efuse->lna_type_2g == 0xff) 2054 efuse->lna_type_2g = 0; 2055 if (efuse->lna_type_5g == 0xff) 2056 efuse->lna_type_5g = 0; 2057 if (efuse->channel_plan == 0xff) 2058 efuse->channel_plan = 0x7f; 2059 if (efuse->rf_board_option == 0xff) 2060 efuse->rf_board_option = 0; 2061 if (efuse->bt_setting & BIT(0)) 2062 efuse->share_ant = true; 2063 if (efuse->regd == 0xff) 2064 efuse->regd = 0; 2065 if (efuse->tx_bb_swing_setting_2g == 0xff) 2066 efuse->tx_bb_swing_setting_2g = 0; 2067 if (efuse->tx_bb_swing_setting_5g == 0xff) 2068 efuse->tx_bb_swing_setting_5g = 0; 2069 2070 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20; 2071 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0; 2072 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0; 2073 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0; 2074 efuse->ext_lna_5g = efuse->lna_type_5g & BIT(3) ? 1 : 0; 2075 2076 if (!is_valid_ether_addr(efuse->addr)) { 2077 eth_random_addr(efuse->addr); 2078 dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n"); 2079 } 2080 2081 out_disable: 2082 rtw_chip_efuse_disable(rtwdev); 2083 2084 out_unlock: 2085 mutex_unlock(&rtwdev->mutex); 2086 return ret; 2087 } 2088 2089 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev) 2090 { 2091 struct rtw_hal *hal = &rtwdev->hal; 2092 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev); 2093 2094 if (!rfe_def) 2095 return -ENODEV; 2096 2097 rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type); 2098 2099 rtw_phy_init_tx_power(rtwdev); 2100 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl); 2101 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl); 2102 rtw_phy_tx_power_by_rate_config(hal); 2103 rtw_phy_tx_power_limit_config(hal); 2104 2105 return 0; 2106 } 2107 2108 int rtw_chip_info_setup(struct rtw_dev *rtwdev) 2109 { 2110 int ret; 2111 2112 ret = rtw_chip_parameter_setup(rtwdev); 2113 if (ret) { 2114 rtw_err(rtwdev, "failed to setup chip parameters\n"); 2115 goto err_out; 2116 } 2117 2118 ret = rtw_chip_efuse_info_setup(rtwdev); 2119 if (ret) { 2120 rtw_err(rtwdev, "failed to setup chip efuse info\n"); 2121 goto err_out; 2122 } 2123 2124 ret = rtw_chip_board_info_setup(rtwdev); 2125 if (ret) { 2126 rtw_err(rtwdev, "failed to setup chip board info\n"); 2127 goto err_out; 2128 } 2129 2130 return 0; 2131 2132 err_out: 2133 return ret; 2134 } 2135 EXPORT_SYMBOL(rtw_chip_info_setup); 2136 2137 static void rtw_stats_init(struct rtw_dev *rtwdev) 2138 { 2139 struct rtw_traffic_stats *stats = &rtwdev->stats; 2140 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 2141 int i; 2142 2143 ewma_tp_init(&stats->tx_ewma_tp); 2144 ewma_tp_init(&stats->rx_ewma_tp); 2145 2146 for (i = 0; i < RTW_EVM_NUM; i++) 2147 ewma_evm_init(&dm_info->ewma_evm[i]); 2148 for (i = 0; i < RTW_SNR_NUM; i++) 2149 ewma_snr_init(&dm_info->ewma_snr[i]); 2150 } 2151 2152 int rtw_core_init(struct rtw_dev *rtwdev) 2153 { 2154 const struct rtw_chip_info *chip = rtwdev->chip; 2155 struct rtw_coex *coex = &rtwdev->coex; 2156 int ret; 2157 2158 INIT_LIST_HEAD(&rtwdev->rsvd_page_list); 2159 INIT_LIST_HEAD(&rtwdev->txqs); 2160 2161 timer_setup(&rtwdev->tx_report.purge_timer, 2162 rtw_tx_report_purge_timer, 0); 2163 rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); 2164 if (!rtwdev->tx_wq) { 2165 rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n"); 2166 return -ENOMEM; 2167 } 2168 2169 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work); 2170 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work); 2171 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work); 2172 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work); 2173 INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work); 2174 INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work); 2175 INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work); 2176 INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work, 2177 rtw_coex_bt_multi_link_remain_work); 2178 INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work); 2179 INIT_WORK(&rtwdev->tx_work, rtw_tx_work); 2180 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work); 2181 INIT_WORK(&rtwdev->ips_work, rtw_ips_work); 2182 INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work); 2183 INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work); 2184 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work); 2185 skb_queue_head_init(&rtwdev->c2h_queue); 2186 skb_queue_head_init(&rtwdev->coex.queue); 2187 skb_queue_head_init(&rtwdev->tx_report.queue); 2188 2189 spin_lock_init(&rtwdev->txq_lock); 2190 spin_lock_init(&rtwdev->tx_report.q_lock); 2191 2192 mutex_init(&rtwdev->mutex); 2193 mutex_init(&rtwdev->hal.tx_power_mutex); 2194 2195 init_waitqueue_head(&rtwdev->coex.wait); 2196 init_completion(&rtwdev->lps_leave_check); 2197 init_completion(&rtwdev->fw_scan_density); 2198 2199 rtwdev->sec.total_cam_num = 32; 2200 rtwdev->hal.current_channel = 1; 2201 rtwdev->dm_info.fix_rate = U8_MAX; 2202 2203 rtw_stats_init(rtwdev); 2204 2205 /* default rx filter setting */ 2206 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV | 2207 BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS | 2208 BIT_AB | BIT_AM | BIT_APM; 2209 2210 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW); 2211 if (ret) { 2212 rtw_warn(rtwdev, "no firmware loaded\n"); 2213 goto out; 2214 } 2215 2216 if (chip->wow_fw_name) { 2217 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW); 2218 if (ret) { 2219 rtw_warn(rtwdev, "no wow firmware loaded\n"); 2220 wait_for_completion(&rtwdev->fw.completion); 2221 if (rtwdev->fw.firmware) 2222 release_firmware(rtwdev->fw.firmware); 2223 goto out; 2224 } 2225 } 2226 2227 #if defined(__FreeBSD__) 2228 rtw_wait_firmware_completion(rtwdev); 2229 #endif 2230 2231 return 0; 2232 2233 out: 2234 destroy_workqueue(rtwdev->tx_wq); 2235 return ret; 2236 } 2237 EXPORT_SYMBOL(rtw_core_init); 2238 2239 void rtw_core_deinit(struct rtw_dev *rtwdev) 2240 { 2241 struct rtw_fw_state *fw = &rtwdev->fw; 2242 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw; 2243 struct rtw_rsvd_page *rsvd_pkt, *tmp; 2244 unsigned long flags; 2245 2246 rtw_wait_firmware_completion(rtwdev); 2247 2248 if (fw->firmware) 2249 release_firmware(fw->firmware); 2250 2251 if (wow_fw->firmware) 2252 release_firmware(wow_fw->firmware); 2253 2254 destroy_workqueue(rtwdev->tx_wq); 2255 timer_delete_sync(&rtwdev->tx_report.purge_timer); 2256 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags); 2257 skb_queue_purge(&rtwdev->tx_report.queue); 2258 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags); 2259 skb_queue_purge(&rtwdev->coex.queue); 2260 skb_queue_purge(&rtwdev->c2h_queue); 2261 2262 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, 2263 build_list) { 2264 list_del(&rsvd_pkt->build_list); 2265 kfree(rsvd_pkt); 2266 } 2267 2268 mutex_destroy(&rtwdev->mutex); 2269 mutex_destroy(&rtwdev->hal.tx_power_mutex); 2270 } 2271 EXPORT_SYMBOL(rtw_core_deinit); 2272 2273 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 2274 { 2275 bool sta_mode_only = rtwdev->hci.type == RTW_HCI_TYPE_SDIO; 2276 struct rtw_hal *hal = &rtwdev->hal; 2277 int max_tx_headroom = 0; 2278 int ret; 2279 2280 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz; 2281 2282 if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) 2283 max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN; 2284 2285 hw->extra_tx_headroom = max_tx_headroom; 2286 hw->queues = IEEE80211_NUM_ACS; 2287 hw->txq_data_size = sizeof(struct rtw_txq); 2288 hw->sta_data_size = sizeof(struct rtw_sta_info); 2289 hw->vif_data_size = sizeof(struct rtw_vif); 2290 2291 ieee80211_hw_set(hw, SIGNAL_DBM); 2292 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 2293 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 2294 ieee80211_hw_set(hw, MFP_CAPABLE); 2295 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 2296 ieee80211_hw_set(hw, SUPPORTS_PS); 2297 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 2298 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); 2299 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); 2300 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 2301 ieee80211_hw_set(hw, TX_AMSDU); 2302 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); 2303 2304 if (sta_mode_only) 2305 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); 2306 else 2307 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 2308 BIT(NL80211_IFTYPE_AP) | 2309 BIT(NL80211_IFTYPE_ADHOC); 2310 hw->wiphy->available_antennas_tx = hal->antenna_tx; 2311 hw->wiphy->available_antennas_rx = hal->antenna_rx; 2312 2313 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | 2314 WIPHY_FLAG_TDLS_EXTERNAL_SETUP; 2315 2316 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; 2317 hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS; 2318 hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev); 2319 2320 if (!sta_mode_only && rtwdev->chip->id == RTW_CHIP_TYPE_8822C) { 2321 hw->wiphy->iface_combinations = rtw_iface_combs; 2322 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs); 2323 } 2324 2325 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); 2326 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN); 2327 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); 2328 2329 #ifdef CONFIG_PM 2330 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub; 2331 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids; 2332 #endif 2333 rtw_set_supported_band(hw, rtwdev->chip); 2334 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr); 2335 2336 hw->wiphy->sar_capa = &rtw_sar_capa; 2337 2338 ret = rtw_regd_init(rtwdev); 2339 if (ret) { 2340 rtw_err(rtwdev, "failed to init regd\n"); 2341 return ret; 2342 } 2343 2344 rtw_led_init(rtwdev); 2345 2346 ret = ieee80211_register_hw(hw); 2347 if (ret) { 2348 rtw_err(rtwdev, "failed to register hw\n"); 2349 goto led_deinit; 2350 } 2351 2352 ret = rtw_regd_hint(rtwdev); 2353 if (ret) { 2354 rtw_err(rtwdev, "failed to hint regd\n"); 2355 goto led_deinit; 2356 } 2357 2358 rtw_debugfs_init(rtwdev); 2359 2360 rtwdev->bf_info.bfer_mu_cnt = 0; 2361 rtwdev->bf_info.bfer_su_cnt = 0; 2362 2363 return 0; 2364 2365 led_deinit: 2366 rtw_led_deinit(rtwdev); 2367 return ret; 2368 } 2369 EXPORT_SYMBOL(rtw_register_hw); 2370 2371 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 2372 { 2373 const struct rtw_chip_info *chip = rtwdev->chip; 2374 2375 ieee80211_unregister_hw(hw); 2376 rtw_unset_supported_band(hw, chip); 2377 rtw_debugfs_deinit(rtwdev); 2378 rtw_led_deinit(rtwdev); 2379 } 2380 EXPORT_SYMBOL(rtw_unregister_hw); 2381 2382 static 2383 void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, 2384 const struct rtw_hw_reg *reg2, u8 nbytes) 2385 { 2386 u8 i; 2387 2388 for (i = 0; i < nbytes; i++) { 2389 u8 v1 = rtw_read8(rtwdev, reg1->addr + i); 2390 u8 v2 = rtw_read8(rtwdev, reg2->addr + i); 2391 2392 rtw_write8(rtwdev, reg1->addr + i, v2); 2393 rtw_write8(rtwdev, reg2->addr + i, v1); 2394 } 2395 } 2396 2397 static 2398 void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, 2399 const struct rtw_hw_reg *reg2) 2400 { 2401 u32 v1, v2; 2402 2403 v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask); 2404 v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask); 2405 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1); 2406 rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2); 2407 } 2408 2409 struct rtw_iter_port_switch_data { 2410 struct rtw_dev *rtwdev; 2411 struct rtw_vif *rtwvif_ap; 2412 }; 2413 2414 static void rtw_port_switch_iter(void *data, struct ieee80211_vif *vif) 2415 { 2416 struct rtw_iter_port_switch_data *iter_data = data; 2417 struct rtw_dev *rtwdev = iter_data->rtwdev; 2418 struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv; 2419 struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap; 2420 const struct rtw_hw_reg *reg1, *reg2; 2421 2422 if (rtwvif_target->port != RTW_PORT_0) 2423 return; 2424 2425 rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n", 2426 rtwvif_ap->port, rtwvif_target->port); 2427 2428 /* Leave LPS so the value swapped are not in PS mode */ 2429 rtw_leave_lps(rtwdev); 2430 2431 reg1 = &rtwvif_ap->conf->net_type; 2432 reg2 = &rtwvif_target->conf->net_type; 2433 rtw_swap_reg_mask(rtwdev, reg1, reg2); 2434 2435 reg1 = &rtwvif_ap->conf->mac_addr; 2436 reg2 = &rtwvif_target->conf->mac_addr; 2437 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); 2438 2439 reg1 = &rtwvif_ap->conf->bssid; 2440 reg2 = &rtwvif_target->conf->bssid; 2441 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); 2442 2443 reg1 = &rtwvif_ap->conf->bcn_ctrl; 2444 reg2 = &rtwvif_target->conf->bcn_ctrl; 2445 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1); 2446 2447 swap(rtwvif_target->port, rtwvif_ap->port); 2448 swap(rtwvif_target->conf, rtwvif_ap->conf); 2449 2450 rtw_fw_default_port(rtwdev, rtwvif_target); 2451 } 2452 2453 void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 2454 { 2455 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 2456 struct rtw_iter_port_switch_data iter_data; 2457 2458 if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0) 2459 return; 2460 2461 iter_data.rtwdev = rtwdev; 2462 iter_data.rtwvif_ap = rtwvif; 2463 rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data); 2464 } 2465 2466 static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif) 2467 { 2468 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 2469 bool *active = data; 2470 2471 if (*active) 2472 return; 2473 2474 if (vif->type != NL80211_IFTYPE_STATION) 2475 return; 2476 2477 if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid)) 2478 *active = true; 2479 } 2480 2481 bool rtw_core_check_sta_active(struct rtw_dev *rtwdev) 2482 { 2483 bool sta_active = false; 2484 2485 rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active); 2486 2487 return rtwdev->ap_active || sta_active; 2488 } 2489 2490 void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable) 2491 { 2492 if (!rtwdev->ap_active) 2493 return; 2494 2495 if (enable) { 2496 rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); 2497 rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); 2498 } else { 2499 rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); 2500 rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); 2501 } 2502 } 2503 2504 MODULE_AUTHOR("Realtek Corporation"); 2505 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); 2506 MODULE_LICENSE("Dual BSD/GPL"); 2507