1 /*- 2 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 3 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ 18 */ 19 20 #ifndef R92C_PRIV_H 21 #define R92C_PRIV_H 22 23 #include <dev/rtwn/rtl8192c/r92c_rom_defs.h> 24 25 /* 26 * Parsed Tx power (diff) values. 27 */ 28 struct rtwn_r92c_txpwr { 29 uint8_t cck_tx_pwr[R92C_MAX_CHAINS][R92C_GROUP_2G]; 30 uint8_t ht40_1s_tx_pwr[R92C_MAX_CHAINS][R92C_GROUP_2G]; 31 int8_t ht40_2s_tx_pwr_diff[R92C_MAX_CHAINS][R92C_GROUP_2G]; 32 int8_t ht20_tx_pwr_diff[R92C_MAX_CHAINS][R92C_GROUP_2G]; 33 int8_t ofdm_tx_pwr_diff[R92C_MAX_CHAINS][R92C_GROUP_2G]; 34 int8_t ht40_max_pwr[R92C_MAX_CHAINS][R92C_GROUP_2G]; 35 int8_t ht20_max_pwr[R92C_MAX_CHAINS][R92C_GROUP_2G]; 36 }; 37 38 /* 39 * Baseband initialization values (shared parts). 40 */ 41 #define R92C_COND_RTL8188CE 0x01 42 #define R92C_COND_RTL8188CU 0x02 43 #define R92C_COND_RTL8188RU 0x04 44 #define R92C_COND_RTL8192CE 0x08 45 #define R92C_COND_RTL8192CU 0x10 46 47 /* Shortcut. */ 48 #define R92C_COND_RTL8192C (R92C_COND_RTL8192CE | R92C_COND_RTL8192CU) 49 50 static const uint16_t rtl8192c_bb_regs3[] = { 51 0xd04 52 }, rtl8192c_bb_regs4[] = { 53 0xd08, 0xd0c, 0xd10, 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 54 0xd3c, 0xd40, 0xd44, 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c, 55 0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 0xe04, 56 0xe08, 0xe10, 0xe14, 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38, 57 0xe3c, 0xe40, 0xe44, 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c 58 }, rtl8192c_bb_regs5[] = { 59 0xe60, 0xe68, 0xe6c, 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 60 0xe88, 0xe8c, 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, 0xeec, 0xf14, 61 0xf4c, 0xf00 62 }; 63 64 static const uint32_t rtl8192c_bb_vals3_88cu_88ru[] = { 65 0x00020401 66 }, rtl8192c_bb_vals3_92ce_92cu[] = { 67 0x00020403 68 }, rtl8192c_bb_vals4[] = { 69 0x0000907f, 0x20010201, 0xa0633333, 0x3333bc43, 0x7a8f5b6b, 70 0xcc979975, 0x00000000, 0x80608000, 0x00000000, 0x00027293, 71 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x6437140a, 72 0x00000000, 0x00000000, 0x30032064, 0x4653de68, 0x04518a3c, 73 0x00002101, 0x2a201c16, 0x1812362e, 0x322c2220, 0x000e3c24, 74 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 0x2a2a2a2a, 0x2a2a2a2a, 75 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 0x1000dc1f, 0x10008c1f, 76 0x02140102, 0x681604c2, 0x01007c00, 0x01004800, 0xfb000000, 77 0x000028d1, 0x1000dc1f, 0x10008c1f, 0x02140102, 0x28160d05 78 },rtl8192c_bb_vals5_92ce_92cu[] = { 79 0x00000010, 0x001b25a4, 0x63db25a4, 0x63db25a4, 0x0c1b25a4, 80 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 0x63db25a4, 0x0c1b25a4, 81 0x63db25a4, 0x63db25a4, 0x63db25a4, 0x63db25a4, 0x001b25a4, 82 0x001b25a4, 0x6fdb25a4, 0x00000003, 0x00000000, 0x00000300 83 }; 84 85 /* 86 * RTL8192CU and RTL8192CE-VAU. 87 */ 88 89 static const uint32_t rtl8192ce_agc_vals[] = { 90 0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001, 91 0x7b050001, 0x7a060001, 0x79070001, 0x78080001, 0x77090001, 92 0x760a0001, 0x750b0001, 0x740c0001, 0x730d0001, 0x720e0001, 93 0x710f0001, 0x70100001, 0x6f110001, 0x6e120001, 0x6d130001, 94 0x6c140001, 0x6b150001, 0x6a160001, 0x69170001, 0x68180001, 95 0x67190001, 0x661a0001, 0x651b0001, 0x641c0001, 0x631d0001, 96 0x621e0001, 0x611f0001, 0x60200001, 0x49210001, 0x48220001, 97 0x47230001, 0x46240001, 0x45250001, 0x44260001, 0x43270001, 98 0x42280001, 0x41290001, 0x402a0001, 0x262b0001, 0x252c0001, 99 0x242d0001, 0x232e0001, 0x222f0001, 0x21300001, 0x20310001, 100 0x06320001, 0x05330001, 0x04340001, 0x03350001, 0x02360001, 101 0x01370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001, 102 0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001, 0x7b400001, 103 0x7b410001, 0x7b420001, 0x7b430001, 0x7b440001, 0x7b450001, 104 0x7a460001, 0x79470001, 0x78480001, 0x77490001, 0x764a0001, 105 0x754b0001, 0x744c0001, 0x734d0001, 0x724e0001, 0x714f0001, 106 0x70500001, 0x6f510001, 0x6e520001, 0x6d530001, 0x6c540001, 107 0x6b550001, 0x6a560001, 0x69570001, 0x68580001, 0x67590001, 108 0x665a0001, 0x655b0001, 0x645c0001, 0x635d0001, 0x625e0001, 109 0x615f0001, 0x60600001, 0x49610001, 0x48620001, 0x47630001, 110 0x46640001, 0x45650001, 0x44660001, 0x43670001, 0x42680001, 111 0x41690001, 0x406a0001, 0x266b0001, 0x256c0001, 0x246d0001, 112 0x236e0001, 0x226f0001, 0x21700001, 0x20710001, 0x06720001, 113 0x05730001, 0x04740001, 0x03750001, 0x02760001, 0x01770001, 114 0x00780001, 0x00790001, 0x007a0001, 0x007b0001, 0x007c0001, 115 0x007d0001, 0x007e0001, 0x007f0001, 0x3800001e, 0x3801001e, 116 0x3802001e, 0x3803001e, 0x3804001e, 0x3805001e, 0x3806001e, 117 0x3807001e, 0x3808001e, 0x3c09001e, 0x3e0a001e, 0x400b001e, 118 0x440c001e, 0x480d001e, 0x4c0e001e, 0x500f001e, 0x5210001e, 119 0x5611001e, 0x5a12001e, 0x5e13001e, 0x6014001e, 0x6015001e, 120 0x6016001e, 0x6217001e, 0x6218001e, 0x6219001e, 0x621a001e, 121 0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e 122 }; 123 124 static const struct rtwn_agc_prog rtl8192ce_agc[] = { 125 { 126 nitems(rtl8192ce_agc_vals), 127 rtl8192ce_agc_vals, 128 { 0 }, 129 NULL 130 } 131 }; 132 133 /* 134 * RF initialization values. 135 */ 136 static const uint8_t rtl8192c_rf0_regs0[] = { 137 0x00, 0x01, 0x02, 0x03, 0x04, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 138 0x0f, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21 139 }, rtl8192c_rf0_regs1[] = { 140 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28 141 }, rtl8192c_rf0_regs2[] = { 142 0x29, 0x2a, 0x2b, 0x2a, 0x2b, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 143 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 144 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 145 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 146 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 147 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x10, 0x11, 0x10, 0x11, 148 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11 149 }, rtl8192c_rf0_regs3[] = { 150 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 151 0x13, 0x13, 0x13, 0x13 152 }, rtl8192c_rf0_regs4[] = { 153 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15 154 }, rtl8192c_rf0_regs5[] = { 155 0x16, 0x16, 0x16, 0x16, 0x00, 0x18, 0xfe, 0xfe, 0x1f, 0xfe, 0xfe, 156 0x1e, 0x1f, 0x00 157 }; 158 159 static const uint32_t rtl8192c_rf0_vals0_88ce_88cu_92ce[] = { 160 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 161 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x00000, 0x10255, 162 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000 163 }, rtl8192c_rf0_vals0_88ru[] = { 164 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb0, 165 0x54867, 0x8992e, 0x0e529, 0x39ce7, 0x00451, 0x00000, 0x00255, 166 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000 167 }, rtl8192c_rf0_vals1_88ru[] = { 168 0x0083c, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x977c0 169 }, rtl8192c_rf0_vals1_88ce[] = { 170 0x00000, 0x01558, 0x00060, 0x00483, 0x4f200, 0xec7d9, 0x577c0 171 }, rtl8192c_rf0_vals1_88cu_92ce[] = { 172 0x00000, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x577c0 173 }, rtl8192c_rf0_vals2[] = { 174 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 175 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 176 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 177 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 178 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 179 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 180 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 181 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 182 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 183 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 184 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100 185 }, rtl8192c_rf0_vals3_88ru[] = { 186 0xd8000, 0x90000, 0x51000, 0x12000, 0x28fb4, 0x24fa8, 0x207a4, 187 0x1c798, 0x183a4, 0x14398, 0x101a4, 0x0c198, 0x080a4, 0x04098, 188 0x00014 189 }, rtl8192c_rf0_vals3_92ce[] = { 190 0x32000, 0x71000, 0xb0000, 0xfc000, 0x287af, 0x244b7, 0x204ab, 191 0x1c49f, 0x18493, 0x14297, 0x10295, 0x0c298, 0x0819c, 0x040a8, 192 0x0001c 193 }, rtl8192c_rf0_vals3_88cu_88ce[] = { 194 0x32000, 0x71000, 0xb0000, 0xfc000, 0x287b3, 0x244b7, 0x204ab, 195 0x1c49f, 0x18493, 0x1429b, 0x10299, 0x0c29c, 0x081a0, 0x040ac, 196 0x00020 197 }, rtl8192c_rf0_vals4_92ce_88ce[] = { 198 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f424, 0x8f424, 199 0xcf424 200 }, rtl8192c_rf0_vals4_88cu_88ru[] = { 201 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f405, 0x4f405, 0x8f405, 202 0xcf405 203 }, rtl8192c_rf0_vals5[] = { 204 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 0x0c350, 205 0x0c350, 0x80003, 0x0c350, 0x0c350, 0x44457, 0x80000, 0x30159 206 }; 207 208 static const struct rtwn_rf_prog rtl8192c_rf[] = { 209 /* RF chain 0 */ 210 /* RTL8188RU. */ 211 { 212 nitems(rtl8192c_rf0_regs0), 213 rtl8192c_rf0_regs0, 214 rtl8192c_rf0_vals0_88ru, 215 { R92C_COND_RTL8188RU }, 216 /* Others. */ 217 &(const struct rtwn_rf_prog){ 218 nitems(rtl8192c_rf0_regs0), 219 rtl8192c_rf0_regs0, 220 rtl8192c_rf0_vals0_88ce_88cu_92ce, 221 { 0 }, 222 NULL 223 } 224 }, 225 /* RTL8188RU. */ 226 { 227 nitems(rtl8192c_rf0_regs1), 228 rtl8192c_rf0_regs1, 229 rtl8192c_rf0_vals1_88ru, 230 { R92C_COND_RTL8188RU }, 231 /* RTL8188CE. */ 232 &(const struct rtwn_rf_prog){ 233 nitems(rtl8192c_rf0_regs1), 234 rtl8192c_rf0_regs1, 235 rtl8192c_rf0_vals1_88ce, 236 { R92C_COND_RTL8188CE }, 237 /* Others. */ 238 &(const struct rtwn_rf_prog){ 239 nitems(rtl8192c_rf0_regs1), 240 rtl8192c_rf0_regs1, 241 rtl8192c_rf0_vals1_88cu_92ce, 242 { 0 }, 243 NULL 244 } 245 } 246 }, 247 { 248 nitems(rtl8192c_rf0_regs2), 249 rtl8192c_rf0_regs2, 250 rtl8192c_rf0_vals2, 251 { 0 }, 252 NULL 253 }, 254 /* RTL8188RU. */ 255 { 256 nitems(rtl8192c_rf0_regs3), 257 rtl8192c_rf0_regs3, 258 rtl8192c_rf0_vals3_88ru, 259 { R92C_COND_RTL8188RU }, 260 /* RTL8192C. */ 261 &(const struct rtwn_rf_prog){ 262 nitems(rtl8192c_rf0_regs3), 263 rtl8192c_rf0_regs3, 264 rtl8192c_rf0_vals3_92ce, 265 { R92C_COND_RTL8192C }, 266 /* Others. */ 267 &(struct rtwn_rf_prog){ 268 nitems(rtl8192c_rf0_regs3), 269 rtl8192c_rf0_regs3, 270 rtl8192c_rf0_vals3_88cu_88ce, 271 { 0 }, 272 NULL 273 } 274 } 275 }, 276 /* RTL8188CE / RTL8192C. */ 277 { 278 nitems(rtl8192c_rf0_regs4), 279 rtl8192c_rf0_regs4, 280 rtl8192c_rf0_vals4_92ce_88ce, 281 { R92C_COND_RTL8188CE | R92C_COND_RTL8192C }, 282 /* Others. */ 283 &(const struct rtwn_rf_prog){ 284 nitems(rtl8192c_rf0_regs4), 285 rtl8192c_rf0_regs4, 286 rtl8192c_rf0_vals4_88cu_88ru, 287 { 0 }, 288 NULL 289 } 290 }, 291 { 292 nitems(rtl8192c_rf0_regs5), 293 rtl8192c_rf0_regs5, 294 rtl8192c_rf0_vals5, 295 { 0 }, 296 NULL 297 }, 298 { 0, NULL, NULL, { 0 }, NULL }, 299 /* RF chain 1 (RTL8192C). */ 300 { 301 12, /* 0x00 - 0x0f */ 302 rtl8192c_rf0_regs0, 303 rtl8192c_rf0_vals0_88ce_88cu_92ce, 304 { 0 }, 305 NULL 306 }, 307 { 308 nitems(rtl8192c_rf0_regs3), /* 0x12 - 0x13 */ 309 rtl8192c_rf0_regs3, 310 rtl8192c_rf0_vals3_92ce, 311 { 0 }, 312 NULL 313 }, 314 { 315 nitems(rtl8192c_rf0_regs4), /* 0x14 - 0x15 */ 316 rtl8192c_rf0_regs4, 317 rtl8192c_rf0_vals4_92ce_88ce, 318 { 0 }, 319 NULL 320 }, 321 { 322 4, /* 0x16 */ 323 rtl8192c_rf0_regs5, 324 rtl8192c_rf0_vals5, 325 { 0 }, 326 NULL 327 }, 328 { 0, NULL, NULL, { 0 }, NULL } 329 }; 330 331 struct rtwn_r92c_txagc { 332 uint8_t pwr[R92C_GROUP_2G][28]; /* RTWN_RIDX_HT_MCS(15) + 1 */ 333 }; 334 335 /* 336 * Per RF chain/group/rate Tx gain values. 337 */ 338 static const struct rtwn_r92c_txagc rtl8192cu_txagc[] = { 339 { { /* Chain 0. */ 340 { /* Group 0. */ 341 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 342 0x0c, 0x0c, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, /* OFDM6~54. */ 343 0x0e, 0x0d, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, /* MCS0~7. */ 344 0x0e, 0x0d, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02 /* MCS8~15. */ 345 }, 346 { /* Group 1. */ 347 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 348 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 349 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 350 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 351 }, 352 { /* Group 2. */ 353 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 354 0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x02, 0x00, /* OFDM6~54. */ 355 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 356 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 357 } 358 } }, 359 { { /* Chain 1. */ 360 { /* Group 0. */ 361 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 362 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 363 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 364 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 365 }, 366 { /* Group 1. */ 367 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 368 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 369 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 370 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 371 }, 372 { /* Group 2. */ 373 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 374 0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x02, 0x00, /* OFDM6~54. */ 375 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 376 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 377 } 378 } } 379 }; 380 381 static const struct rtwn_r92c_txagc rtl8188ru_txagc[] = { 382 { { /* Chain 0. */ 383 { /* Group 0. */ 384 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 385 0x08, 0x08, 0x08, 0x06, 0x06, 0x04, 0x04, 0x00, /* OFDM6~54. */ 386 0x08, 0x06, 0x06, 0x04, 0x04, 0x02, 0x02, 0x00, /* MCS0~7. */ 387 0x08, 0x06, 0x06, 0x04, 0x04, 0x02, 0x02, 0x00 /* MCS8~15. */ 388 }, 389 { /* Group 1. */ 390 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 391 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 392 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 393 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 394 }, 395 { /* Group 2. */ 396 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 397 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 398 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 399 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 400 } 401 } } 402 }; 403 404 #endif /* R92C_PRIV_H */ 405