xref: /linux/sound/soc/codecs/rt715-sdw.c (revision 33e02dc69afbd8f1b85a51d74d72f139ba4ca623)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * rt715-sdw.c -- rt715 ALSA SoC audio driver
4  *
5  * Copyright(c) 2019 Realtek Semiconductor Corp.
6  *
7  * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
8  *
9  */
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/soundwire/sdw.h>
14 #include <linux/soundwire/sdw_type.h>
15 #include <linux/soundwire/sdw_registers.h>
16 #include <linux/module.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/of.h>
19 #include <linux/regmap.h>
20 #include <sound/soc.h>
21 #include "rt715.h"
22 #include "rt715-sdw.h"
23 
rt715_readable_register(struct device * dev,unsigned int reg)24 static bool rt715_readable_register(struct device *dev, unsigned int reg)
25 {
26 	switch (reg) {
27 	case 0x00e0 ... 0x00e5:
28 	case 0x00ee ... 0x00ef:
29 	case 0x00f0 ... 0x00f5:
30 	case 0x00fe ... 0x00ff:
31 	case 0x02e0:
32 	case 0x02f0:
33 	case 0x04e0:
34 	case 0x04f0:
35 	case 0x06e0:
36 	case 0x06f0:
37 	case 0x2000 ... 0x2016:
38 	case 0x201a ... 0x2027:
39 	case 0x2029 ... 0x202a:
40 	case 0x202d ... 0x2034:
41 	case 0x2200 ... 0x2204:
42 	case 0x2206 ... 0x2212:
43 	case 0x2220 ... 0x2223:
44 	case 0x2230 ... 0x2239:
45 	case 0x22f0 ... 0x22f3:
46 	case 0x3122:
47 	case 0x3123:
48 	case 0x3124:
49 	case 0x3125:
50 	case 0x3607:
51 	case 0x3608:
52 	case 0x3609:
53 	case 0x3610:
54 	case 0x3611:
55 	case 0x3627:
56 	case 0x3712:
57 	case 0x3713:
58 	case 0x3718:
59 	case 0x3719:
60 	case 0x371a:
61 	case 0x371b:
62 	case 0x371d:
63 	case 0x3729:
64 	case 0x385e:
65 	case 0x3859:
66 	case 0x4c12:
67 	case 0x4c13:
68 	case 0x4c1d:
69 	case 0x4c29:
70 	case 0x4d12:
71 	case 0x4d13:
72 	case 0x4d1d:
73 	case 0x4d29:
74 	case 0x4e12:
75 	case 0x4e13:
76 	case 0x4e1d:
77 	case 0x4e29:
78 	case 0x4f12:
79 	case 0x4f13:
80 	case 0x4f1d:
81 	case 0x4f29:
82 	case 0x7207:
83 	case 0x7208:
84 	case 0x7209:
85 	case 0x7227:
86 	case 0x7307:
87 	case 0x7308:
88 	case 0x7309:
89 	case 0x7312:
90 	case 0x7313:
91 	case 0x7318:
92 	case 0x7319:
93 	case 0x731a:
94 	case 0x731b:
95 	case 0x731d:
96 	case 0x7327:
97 	case 0x7329:
98 	case 0x8287:
99 	case 0x8288:
100 	case 0x8289:
101 	case 0x82a7:
102 	case 0x8387:
103 	case 0x8388:
104 	case 0x8389:
105 	case 0x8392:
106 	case 0x8393:
107 	case 0x8398:
108 	case 0x8399:
109 	case 0x839a:
110 	case 0x839b:
111 	case 0x839d:
112 	case 0x83a7:
113 	case 0x83a9:
114 	case 0x752001:
115 	case 0x752039:
116 		return true;
117 	default:
118 		return false;
119 	}
120 }
121 
rt715_volatile_register(struct device * dev,unsigned int reg)122 static bool rt715_volatile_register(struct device *dev, unsigned int reg)
123 {
124 	switch (reg) {
125 	case 0x00e5:
126 	case 0x00f0:
127 	case 0x00f3:
128 	case 0x00f5:
129 	case 0x2009:
130 	case 0x2016:
131 	case 0x201b:
132 	case 0x201c:
133 	case 0x201d:
134 	case 0x201f:
135 	case 0x2023:
136 	case 0x2230:
137 	case 0x200b ... 0x200e: /* i2c read */
138 	case 0x2012 ... 0x2015: /* HD-A read */
139 	case 0x202d ... 0x202f: /* BRA */
140 	case 0x2201 ... 0x2212: /* i2c debug */
141 	case 0x2220 ... 0x2223: /* decoded HD-A */
142 		return true;
143 	default:
144 		return false;
145 	}
146 }
147 
rt715_sdw_read(void * context,unsigned int reg,unsigned int * val)148 static int rt715_sdw_read(void *context, unsigned int reg, unsigned int *val)
149 {
150 	struct device *dev = context;
151 	struct rt715_priv *rt715 = dev_get_drvdata(dev);
152 	unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
153 	unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
154 	unsigned int is_hda_reg = 1, is_index_reg = 0;
155 	int ret;
156 
157 	if (reg > 0xffff)
158 		is_index_reg = 1;
159 
160 	mask = reg & 0xf000;
161 
162 	if (is_index_reg) { /* index registers */
163 		val2 = reg & 0xff;
164 		reg = reg >> 8;
165 		nid = reg & 0xff;
166 		ret = regmap_write(rt715->sdw_regmap, reg, 0);
167 		if (ret < 0)
168 			return ret;
169 		reg2 = reg + 0x1000;
170 		reg2 |= 0x80;
171 		ret = regmap_write(rt715->sdw_regmap, reg2, val2);
172 		if (ret < 0)
173 			return ret;
174 
175 		reg3 = RT715_PRIV_DATA_R_H | nid;
176 		ret = regmap_write(rt715->sdw_regmap, reg3,
177 			((*val >> 8) & 0xff));
178 		if (ret < 0)
179 			return ret;
180 		reg4 = reg3 + 0x1000;
181 		reg4 |= 0x80;
182 		ret = regmap_write(rt715->sdw_regmap, reg4, (*val & 0xff));
183 		if (ret < 0)
184 			return ret;
185 	} else if (mask   == 0x3000) {
186 		reg += 0x8000;
187 		ret = regmap_write(rt715->sdw_regmap, reg, *val);
188 		if (ret < 0)
189 			return ret;
190 	} else if (mask == 0x7000) {
191 		reg += 0x2000;
192 		reg |= 0x800;
193 		ret = regmap_write(rt715->sdw_regmap, reg,
194 			((*val >> 8) & 0xff));
195 		if (ret < 0)
196 			return ret;
197 		reg2 = reg + 0x1000;
198 		reg2 |= 0x80;
199 		ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
200 		if (ret < 0)
201 			return ret;
202 	} else if ((reg & 0xff00) == 0x8300) { /* for R channel */
203 		reg2 = reg - 0x1000;
204 		reg2 &= ~0x80;
205 		ret = regmap_write(rt715->sdw_regmap, reg2,
206 			((*val >> 8) & 0xff));
207 		if (ret < 0)
208 			return ret;
209 		ret = regmap_write(rt715->sdw_regmap, reg, (*val & 0xff));
210 		if (ret < 0)
211 			return ret;
212 	} else if (mask == 0x9000) {
213 		ret = regmap_write(rt715->sdw_regmap, reg,
214 			((*val >> 8) & 0xff));
215 		if (ret < 0)
216 			return ret;
217 		reg2 = reg + 0x1000;
218 		reg2 |= 0x80;
219 		ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
220 		if (ret < 0)
221 			return ret;
222 	} else if (mask == 0xb000) {
223 		ret = regmap_write(rt715->sdw_regmap, reg, *val);
224 		if (ret < 0)
225 			return ret;
226 	} else {
227 		ret = regmap_read(rt715->sdw_regmap, reg, val);
228 		if (ret < 0)
229 			return ret;
230 		is_hda_reg = 0;
231 	}
232 
233 	if (is_hda_reg || is_index_reg) {
234 		sdw_data_3 = 0;
235 		sdw_data_2 = 0;
236 		sdw_data_1 = 0;
237 		sdw_data_0 = 0;
238 		ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_3,
239 			&sdw_data_3);
240 		if (ret < 0)
241 			return ret;
242 		ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_2,
243 			&sdw_data_2);
244 		if (ret < 0)
245 			return ret;
246 		ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_1,
247 			&sdw_data_1);
248 		if (ret < 0)
249 			return ret;
250 		ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_0,
251 			&sdw_data_0);
252 		if (ret < 0)
253 			return ret;
254 		*val = ((sdw_data_3 & 0xff) << 24) |
255 			((sdw_data_2 & 0xff) << 16) |
256 			((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
257 	}
258 
259 	if (is_hda_reg == 0)
260 		dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
261 	else if (is_index_reg)
262 		dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n", __func__,
263 			reg, reg2, reg3, reg4, *val);
264 	else
265 		dev_dbg(dev, "[%s] %04x %04x => %08x\n",
266 		__func__, reg, reg2, *val);
267 
268 	return 0;
269 }
270 
rt715_sdw_write(void * context,unsigned int reg,unsigned int val)271 static int rt715_sdw_write(void *context, unsigned int reg, unsigned int val)
272 {
273 	struct device *dev = context;
274 	struct rt715_priv *rt715 = dev_get_drvdata(dev);
275 	unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
276 	unsigned int is_index_reg = 0;
277 	int ret;
278 
279 	if (reg > 0xffff)
280 		is_index_reg = 1;
281 
282 	mask = reg & 0xf000;
283 
284 	if (is_index_reg) { /* index registers */
285 		val2 = reg & 0xff;
286 		reg = reg >> 8;
287 		nid = reg & 0xff;
288 		ret = regmap_write(rt715->sdw_regmap, reg, 0);
289 		if (ret < 0)
290 			return ret;
291 		reg2 = reg + 0x1000;
292 		reg2 |= 0x80;
293 		ret = regmap_write(rt715->sdw_regmap, reg2, val2);
294 		if (ret < 0)
295 			return ret;
296 
297 		reg3 = RT715_PRIV_DATA_W_H | nid;
298 		ret = regmap_write(rt715->sdw_regmap, reg3,
299 			((val >> 8) & 0xff));
300 		if (ret < 0)
301 			return ret;
302 		reg4 = reg3 + 0x1000;
303 		reg4 |= 0x80;
304 		ret = regmap_write(rt715->sdw_regmap, reg4, (val & 0xff));
305 		if (ret < 0)
306 			return ret;
307 		is_index_reg = 1;
308 	} else if (reg < 0x4fff) {
309 		ret = regmap_write(rt715->sdw_regmap, reg, val);
310 		if (ret < 0)
311 			return ret;
312 	} else if (reg == RT715_FUNC_RESET) {
313 		ret = regmap_write(rt715->sdw_regmap, reg, val);
314 		if (ret < 0)
315 			return ret;
316 	} else if (mask == 0x7000) {
317 		ret = regmap_write(rt715->sdw_regmap, reg,
318 			((val >> 8) & 0xff));
319 		if (ret < 0)
320 			return ret;
321 		reg2 = reg + 0x1000;
322 		reg2 |= 0x80;
323 		ret = regmap_write(rt715->sdw_regmap, reg2, (val & 0xff));
324 		if (ret < 0)
325 			return ret;
326 	} else if ((reg & 0xff00) == 0x8300) {  /* for R channel */
327 		reg2 = reg - 0x1000;
328 		reg2 &= ~0x80;
329 		ret = regmap_write(rt715->sdw_regmap, reg2,
330 			((val >> 8) & 0xff));
331 		if (ret < 0)
332 			return ret;
333 		ret = regmap_write(rt715->sdw_regmap, reg, (val & 0xff));
334 		if (ret < 0)
335 			return ret;
336 	}
337 
338 	if (reg2 == 0)
339 		dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
340 	else if (is_index_reg)
341 		dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
342 			__func__, reg, reg2, reg3, reg4, val2, val);
343 	else
344 		dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
345 		__func__, reg, reg2, val);
346 
347 	return 0;
348 }
349 
350 static const struct regmap_config rt715_regmap = {
351 	.reg_bits = 24,
352 	.val_bits = 32,
353 	.readable_reg = rt715_readable_register, /* Readable registers */
354 	.volatile_reg = rt715_volatile_register, /* volatile register */
355 	.max_register = 0x752039, /* Maximum number of register */
356 	.reg_defaults = rt715_reg_defaults, /* Defaults */
357 	.num_reg_defaults = ARRAY_SIZE(rt715_reg_defaults),
358 	.cache_type = REGCACHE_MAPLE,
359 	.use_single_read = true,
360 	.use_single_write = true,
361 	.reg_read = rt715_sdw_read,
362 	.reg_write = rt715_sdw_write,
363 };
364 
365 static const struct regmap_config rt715_sdw_regmap = {
366 	.name = "sdw",
367 	.reg_bits = 32, /* Total register space for SDW */
368 	.val_bits = 8, /* Total number of bits in register */
369 	.max_register = 0xff01, /* Maximum number of register */
370 	.cache_type = REGCACHE_NONE,
371 	.use_single_read = true,
372 	.use_single_write = true,
373 };
374 
hda_to_sdw(unsigned int nid,unsigned int verb,unsigned int payload,unsigned int * sdw_addr_h,unsigned int * sdw_data_h,unsigned int * sdw_addr_l,unsigned int * sdw_data_l)375 int hda_to_sdw(unsigned int nid, unsigned int verb, unsigned int payload,
376 	       unsigned int *sdw_addr_h, unsigned int *sdw_data_h,
377 	       unsigned int *sdw_addr_l, unsigned int *sdw_data_l)
378 {
379 	unsigned int offset_h, offset_l, e_verb;
380 
381 	if (((verb & 0xff) != 0) || verb == 0xf00) { /* 12 bits command */
382 		if (verb == 0x7ff) /* special case */
383 			offset_h = 0;
384 		else
385 			offset_h = 0x3000;
386 
387 		if (verb & 0x800) /* get command */
388 			e_verb = (verb - 0xf00) | 0x80;
389 		else /* set command */
390 			e_verb = (verb - 0x700);
391 
392 		*sdw_data_h = payload; /* 7 bits payload */
393 		*sdw_addr_l = *sdw_data_l = 0;
394 	} else { /* 4 bits command */
395 		if ((verb & 0x800) == 0x800) { /* read */
396 			offset_h = 0x9000;
397 			offset_l = 0xa000;
398 		} else { /* write */
399 			offset_h = 0x7000;
400 			offset_l = 0x8000;
401 		}
402 		e_verb = verb >> 8;
403 		*sdw_data_h = (payload >> 8); /* 16 bits payload [15:8] */
404 		*sdw_addr_l = (e_verb << 8) | nid | 0x80; /* 0x80: valid bit */
405 		*sdw_addr_l += offset_l;
406 		*sdw_data_l = payload & 0xff;
407 	}
408 
409 	*sdw_addr_h = (e_verb << 8) | nid;
410 	*sdw_addr_h += offset_h;
411 
412 	return 0;
413 }
414 EXPORT_SYMBOL(hda_to_sdw);
415 
rt715_update_status(struct sdw_slave * slave,enum sdw_slave_status status)416 static int rt715_update_status(struct sdw_slave *slave,
417 				enum sdw_slave_status status)
418 {
419 	struct rt715_priv *rt715 = dev_get_drvdata(&slave->dev);
420 
421 	/*
422 	 * Perform initialization only if slave status is present and
423 	 * hw_init flag is false
424 	 */
425 	if (rt715->hw_init || status != SDW_SLAVE_ATTACHED)
426 		return 0;
427 
428 	/* perform I/O transfers required for Slave initialization */
429 	return rt715_io_init(&slave->dev, slave);
430 }
431 
rt715_read_prop(struct sdw_slave * slave)432 static int rt715_read_prop(struct sdw_slave *slave)
433 {
434 	struct sdw_slave_prop *prop = &slave->prop;
435 	int nval, i;
436 	u32 bit;
437 	unsigned long addr;
438 	struct sdw_dpn_prop *dpn;
439 
440 	prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
441 		SDW_SCP_INT1_PARITY;
442 	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
443 
444 	prop->paging_support = false;
445 
446 	/* first we need to allocate memory for set bits in port lists */
447 	prop->source_ports = 0x50;/* BITMAP: 01010000 */
448 	prop->sink_ports = 0x0;	/* BITMAP:  00000000 */
449 
450 	nval = hweight32(prop->source_ports);
451 	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
452 					sizeof(*prop->src_dpn_prop),
453 					GFP_KERNEL);
454 	if (!prop->src_dpn_prop)
455 		return -ENOMEM;
456 
457 	dpn = prop->src_dpn_prop;
458 	i = 0;
459 	addr = prop->source_ports;
460 	for_each_set_bit(bit, &addr, 32) {
461 		dpn[i].num = bit;
462 		dpn[i].simple_ch_prep_sm = true;
463 		dpn[i].ch_prep_timeout = 10;
464 		i++;
465 	}
466 
467 	/* set the timeout values */
468 	prop->clk_stop_timeout = 20;
469 
470 	/* wake-up event */
471 	prop->wake_capable = 1;
472 
473 	return 0;
474 }
475 
rt715_bus_config(struct sdw_slave * slave,struct sdw_bus_params * params)476 static int rt715_bus_config(struct sdw_slave *slave,
477 				struct sdw_bus_params *params)
478 {
479 	struct rt715_priv *rt715 = dev_get_drvdata(&slave->dev);
480 	int ret;
481 
482 	memcpy(&rt715->params, params, sizeof(*params));
483 
484 	ret = rt715_clock_config(&slave->dev);
485 	if (ret < 0)
486 		dev_err(&slave->dev, "%s: Invalid clk config", __func__);
487 
488 	return 0;
489 }
490 
491 static const struct sdw_slave_ops rt715_slave_ops = {
492 	.read_prop = rt715_read_prop,
493 	.update_status = rt715_update_status,
494 	.bus_config = rt715_bus_config,
495 };
496 
rt715_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)497 static int rt715_sdw_probe(struct sdw_slave *slave,
498 			   const struct sdw_device_id *id)
499 {
500 	struct regmap *sdw_regmap, *regmap;
501 
502 	/* Regmap Initialization */
503 	sdw_regmap = devm_regmap_init_sdw(slave, &rt715_sdw_regmap);
504 	if (IS_ERR(sdw_regmap))
505 		return PTR_ERR(sdw_regmap);
506 
507 	regmap = devm_regmap_init(&slave->dev, NULL, &slave->dev,
508 		&rt715_regmap);
509 	if (IS_ERR(regmap))
510 		return PTR_ERR(regmap);
511 
512 	return rt715_init(&slave->dev, sdw_regmap, regmap, slave);
513 }
514 
rt715_sdw_remove(struct sdw_slave * slave)515 static int rt715_sdw_remove(struct sdw_slave *slave)
516 {
517 	pm_runtime_disable(&slave->dev);
518 
519 	return 0;
520 }
521 
522 static const struct sdw_device_id rt715_id[] = {
523 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x714, 0x2, 0, 0),
524 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x715, 0x2, 0, 0),
525 	{},
526 };
527 MODULE_DEVICE_TABLE(sdw, rt715_id);
528 
rt715_dev_suspend(struct device * dev)529 static int __maybe_unused rt715_dev_suspend(struct device *dev)
530 {
531 	struct rt715_priv *rt715 = dev_get_drvdata(dev);
532 
533 	if (!rt715->hw_init)
534 		return 0;
535 
536 	regcache_cache_only(rt715->regmap, true);
537 
538 	return 0;
539 }
540 
541 #define RT715_PROBE_TIMEOUT 5000
542 
rt715_dev_resume(struct device * dev)543 static int __maybe_unused rt715_dev_resume(struct device *dev)
544 {
545 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
546 	struct rt715_priv *rt715 = dev_get_drvdata(dev);
547 	unsigned long time;
548 
549 	if (!rt715->first_hw_init)
550 		return 0;
551 
552 	if (!slave->unattach_request)
553 		goto regmap_sync;
554 
555 	time = wait_for_completion_timeout(&slave->initialization_complete,
556 					   msecs_to_jiffies(RT715_PROBE_TIMEOUT));
557 	if (!time) {
558 		dev_err(&slave->dev, "%s: Initialization not complete, timed out\n", __func__);
559 		sdw_show_ping_status(slave->bus, true);
560 
561 		return -ETIMEDOUT;
562 	}
563 
564 regmap_sync:
565 	slave->unattach_request = 0;
566 	regcache_cache_only(rt715->regmap, false);
567 	regcache_sync_region(rt715->regmap, 0x3000, 0x8fff);
568 	regcache_sync_region(rt715->regmap, 0x752039, 0x752039);
569 
570 	return 0;
571 }
572 
573 static const struct dev_pm_ops rt715_pm = {
574 	SET_SYSTEM_SLEEP_PM_OPS(rt715_dev_suspend, rt715_dev_resume)
575 	SET_RUNTIME_PM_OPS(rt715_dev_suspend, rt715_dev_resume, NULL)
576 };
577 
578 static struct sdw_driver rt715_sdw_driver = {
579 	.driver = {
580 		   .name = "rt715",
581 		   .pm = &rt715_pm,
582 		   },
583 	.probe = rt715_sdw_probe,
584 	.remove = rt715_sdw_remove,
585 	.ops = &rt715_slave_ops,
586 	.id_table = rt715_id,
587 };
588 module_sdw_driver(rt715_sdw_driver);
589 
590 MODULE_DESCRIPTION("ASoC RT715 driver SDW");
591 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
592 MODULE_LICENSE("GPL v2");
593