1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * soc-apci-intel-arl-match.c - tables and support for ARL ACPI enumeration. 4 * 5 * Copyright (c) 2023 Intel Corporation. 6 */ 7 8 #include <sound/soc-acpi.h> 9 #include <sound/soc-acpi-intel-match.h> 10 #include <sound/soc-acpi-intel-ssp-common.h> 11 #include "sof-function-topology-lib.h" 12 13 static const struct snd_soc_acpi_endpoint single_endpoint = { 14 .num = 0, 15 .aggregated = 0, 16 .group_position = 0, 17 .group_id = 0, 18 }; 19 20 static const struct snd_soc_acpi_endpoint spk_l_endpoint = { 21 .num = 0, 22 .aggregated = 1, 23 .group_position = 0, 24 .group_id = 1, 25 }; 26 27 static const struct snd_soc_acpi_endpoint spk_r_endpoint = { 28 .num = 0, 29 .aggregated = 1, 30 .group_position = 1, 31 .group_id = 1, 32 }; 33 34 static const struct snd_soc_acpi_endpoint spk_2_endpoint = { 35 .num = 0, 36 .aggregated = 1, 37 .group_position = 2, 38 .group_id = 1, 39 }; 40 41 static const struct snd_soc_acpi_endpoint spk_3_endpoint = { 42 .num = 0, 43 .aggregated = 1, 44 .group_position = 3, 45 .group_id = 1, 46 }; 47 48 /* 49 * RT722 is a multi-function codec, three endpoints are created for 50 * its headset, amp and dmic functions. 51 */ 52 static const struct snd_soc_acpi_endpoint rt722_endpoints[] = { 53 { 54 .num = 0, 55 .aggregated = 0, 56 .group_position = 0, 57 .group_id = 0, 58 }, 59 { 60 .num = 1, 61 .aggregated = 0, 62 .group_position = 0, 63 .group_id = 0, 64 }, 65 { 66 .num = 2, 67 .aggregated = 0, 68 .group_position = 0, 69 .group_id = 0, 70 }, 71 }; 72 73 static const struct snd_soc_acpi_adr_device cs35l56_2_lr_adr[] = { 74 { 75 .adr = 0x00023001FA355601ull, 76 .num_endpoints = 1, 77 .endpoints = &spk_l_endpoint, 78 .name_prefix = "AMP1" 79 }, 80 { 81 .adr = 0x00023101FA355601ull, 82 .num_endpoints = 1, 83 .endpoints = &spk_r_endpoint, 84 .name_prefix = "AMP2" 85 } 86 }; 87 88 static const struct snd_soc_acpi_adr_device cs35l56_3_lr_adr[] = { 89 { 90 .adr = 0x00033001FA355601ull, 91 .num_endpoints = 1, 92 .endpoints = &spk_l_endpoint, 93 .name_prefix = "AMP1" 94 }, 95 { 96 .adr = 0x00033401FA355601ull, 97 .num_endpoints = 1, 98 .endpoints = &spk_r_endpoint, 99 .name_prefix = "AMP2" 100 } 101 }; 102 103 static const struct snd_soc_acpi_adr_device cs35l56_2_r_adr[] = { 104 { 105 .adr = 0x00023201FA355601ull, 106 .num_endpoints = 1, 107 .endpoints = &spk_r_endpoint, 108 .name_prefix = "AMP3" 109 }, 110 { 111 .adr = 0x00023301FA355601ull, 112 .num_endpoints = 1, 113 .endpoints = &spk_3_endpoint, 114 .name_prefix = "AMP4" 115 } 116 }; 117 118 static const struct snd_soc_acpi_adr_device cs35l56_3_l_adr[] = { 119 { 120 .adr = 0x00033001fa355601ull, 121 .num_endpoints = 1, 122 .endpoints = &spk_l_endpoint, 123 .name_prefix = "AMP1" 124 }, 125 { 126 .adr = 0x00033101fa355601ull, 127 .num_endpoints = 1, 128 .endpoints = &spk_2_endpoint, 129 .name_prefix = "AMP2" 130 } 131 }; 132 133 static const struct snd_soc_acpi_adr_device cs35l56_2_r1_adr[] = { 134 { 135 .adr = 0x00023101FA355601ull, 136 .num_endpoints = 1, 137 .endpoints = &spk_r_endpoint, 138 .name_prefix = "AMP2" 139 }, 140 }; 141 142 static const struct snd_soc_acpi_adr_device cs35l56_3_l3_adr[] = { 143 { 144 .adr = 0x00033301fa355601ull, 145 .num_endpoints = 1, 146 .endpoints = &spk_l_endpoint, 147 .name_prefix = "AMP1" 148 }, 149 }; 150 151 static const struct snd_soc_acpi_adr_device cs35l56_2_r3_adr[] = { 152 { 153 .adr = 0x00023301fa355601ull, 154 .num_endpoints = 1, 155 .endpoints = &spk_r_endpoint, 156 .name_prefix = "AMP2" 157 }, 158 }; 159 160 static const struct snd_soc_acpi_adr_device cs35l56_3_l1_adr[] = { 161 { 162 .adr = 0x00033101fa355601ull, 163 .num_endpoints = 1, 164 .endpoints = &spk_l_endpoint, 165 .name_prefix = "AMP1" 166 }, 167 }; 168 169 static const struct snd_soc_acpi_endpoint cs42l43_endpoints[] = { 170 { /* Jack Playback Endpoint */ 171 .num = 0, 172 .aggregated = 0, 173 .group_position = 0, 174 .group_id = 0, 175 }, 176 { /* DMIC Capture Endpoint */ 177 .num = 1, 178 .aggregated = 0, 179 .group_position = 0, 180 .group_id = 0, 181 }, 182 { /* Jack Capture Endpoint */ 183 .num = 2, 184 .aggregated = 0, 185 .group_position = 0, 186 .group_id = 0, 187 }, 188 { /* Speaker Playback Endpoint */ 189 .num = 3, 190 .aggregated = 0, 191 .group_position = 0, 192 .group_id = 0, 193 }, 194 }; 195 196 static const struct snd_soc_acpi_adr_device cs42l43_0_adr[] = { 197 { 198 .adr = 0x00003001FA424301ull, 199 .num_endpoints = ARRAY_SIZE(cs42l43_endpoints), 200 .endpoints = cs42l43_endpoints, 201 .name_prefix = "cs42l43" 202 } 203 }; 204 205 static const struct snd_soc_acpi_adr_device cs42l43_2_adr[] = { 206 { 207 .adr = 0x00023001FA424301ull, 208 .num_endpoints = ARRAY_SIZE(cs42l43_endpoints), 209 .endpoints = cs42l43_endpoints, 210 .name_prefix = "cs42l43" 211 } 212 }; 213 214 static const struct snd_soc_acpi_adr_device rt711_0_adr[] = { 215 { 216 .adr = 0x000020025D071100ull, 217 .num_endpoints = 1, 218 .endpoints = &single_endpoint, 219 .name_prefix = "rt711" 220 } 221 }; 222 223 static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = { 224 { 225 .adr = 0x000030025D071101ull, 226 .num_endpoints = 1, 227 .endpoints = &single_endpoint, 228 .name_prefix = "rt711" 229 } 230 }; 231 232 static const struct snd_soc_acpi_adr_device rt722_0_single_adr[] = { 233 { 234 .adr = 0x000030025D072201ull, 235 .num_endpoints = ARRAY_SIZE(rt722_endpoints), 236 .endpoints = rt722_endpoints, 237 .name_prefix = "rt722" 238 } 239 }; 240 241 static const struct snd_soc_acpi_adr_device rt1320_2_single_adr[] = { 242 { 243 .adr = 0x000230025D132001ull, 244 .num_endpoints = 1, 245 .endpoints = &single_endpoint, 246 .name_prefix = "rt1320-1" 247 } 248 }; 249 250 static const struct snd_soc_acpi_link_adr arl_cs42l43_l0[] = { 251 { 252 .mask = BIT(0), 253 .num_adr = ARRAY_SIZE(cs42l43_0_adr), 254 .adr_d = cs42l43_0_adr, 255 }, 256 {} 257 }; 258 259 static const struct snd_soc_acpi_link_adr arl_cs42l43_l2[] = { 260 { 261 .mask = BIT(2), 262 .num_adr = ARRAY_SIZE(cs42l43_2_adr), 263 .adr_d = cs42l43_2_adr, 264 }, 265 {} 266 }; 267 268 static const struct snd_soc_acpi_link_adr arl_cs42l43_l2_cs35l56_l3[] = { 269 { 270 .mask = BIT(2), 271 .num_adr = ARRAY_SIZE(cs42l43_2_adr), 272 .adr_d = cs42l43_2_adr, 273 }, 274 { 275 .mask = BIT(3), 276 .num_adr = ARRAY_SIZE(cs35l56_3_lr_adr), 277 .adr_d = cs35l56_3_lr_adr, 278 }, 279 {} 280 }; 281 282 static const struct snd_soc_acpi_link_adr arl_cs42l43_l0_cs35l56_l2[] = { 283 { 284 .mask = BIT(0), 285 .num_adr = ARRAY_SIZE(cs42l43_0_adr), 286 .adr_d = cs42l43_0_adr, 287 }, 288 { 289 .mask = BIT(2), 290 .num_adr = ARRAY_SIZE(cs35l56_2_lr_adr), 291 .adr_d = cs35l56_2_lr_adr, 292 }, 293 {} 294 }; 295 296 static const struct snd_soc_acpi_link_adr arl_cs42l43_l0_cs35l56_l23[] = { 297 { 298 .mask = BIT(0), 299 .num_adr = ARRAY_SIZE(cs42l43_0_adr), 300 .adr_d = cs42l43_0_adr, 301 }, 302 { 303 .mask = BIT(2), 304 .num_adr = ARRAY_SIZE(cs35l56_2_r_adr), 305 .adr_d = cs35l56_2_r_adr, 306 }, 307 { 308 .mask = BIT(3), 309 .num_adr = ARRAY_SIZE(cs35l56_3_l_adr), 310 .adr_d = cs35l56_3_l_adr, 311 }, 312 {} 313 }; 314 315 static const struct snd_soc_acpi_link_adr arl_cs42l43_l0_cs35l56_2_l23[] = { 316 { 317 .mask = BIT(0), 318 .num_adr = ARRAY_SIZE(cs42l43_0_adr), 319 .adr_d = cs42l43_0_adr, 320 }, 321 { 322 .mask = BIT(2), 323 .num_adr = ARRAY_SIZE(cs35l56_2_r1_adr), 324 .adr_d = cs35l56_2_r1_adr, 325 }, 326 { 327 .mask = BIT(3), 328 .num_adr = ARRAY_SIZE(cs35l56_3_l3_adr), 329 .adr_d = cs35l56_3_l3_adr, 330 }, 331 {} 332 }; 333 334 static const struct snd_soc_acpi_link_adr arl_cs42l43_l0_cs35l56_3_l23[] = { 335 { 336 .mask = BIT(0), 337 .num_adr = ARRAY_SIZE(cs42l43_0_adr), 338 .adr_d = cs42l43_0_adr, 339 }, 340 { 341 .mask = BIT(2), 342 .num_adr = ARRAY_SIZE(cs35l56_2_r3_adr), 343 .adr_d = cs35l56_2_r3_adr, 344 }, 345 { 346 .mask = BIT(3), 347 .num_adr = ARRAY_SIZE(cs35l56_3_l1_adr), 348 .adr_d = cs35l56_3_l1_adr, 349 }, 350 {} 351 }; 352 353 static const struct snd_soc_acpi_link_adr arl_rvp[] = { 354 { 355 .mask = BIT(0), 356 .num_adr = ARRAY_SIZE(rt711_0_adr), 357 .adr_d = rt711_0_adr, 358 }, 359 {} 360 }; 361 362 static const struct snd_soc_acpi_link_adr arl_sdca_rvp[] = { 363 { 364 .mask = BIT(0), 365 .num_adr = ARRAY_SIZE(rt711_sdca_0_adr), 366 .adr_d = rt711_sdca_0_adr, 367 }, 368 {} 369 }; 370 371 static const struct snd_soc_acpi_link_adr arl_rt722_l0_rt1320_l2[] = { 372 { 373 .mask = BIT(0), 374 .num_adr = ARRAY_SIZE(rt722_0_single_adr), 375 .adr_d = rt722_0_single_adr, 376 }, 377 { 378 .mask = BIT(2), 379 .num_adr = ARRAY_SIZE(rt1320_2_single_adr), 380 .adr_d = rt1320_2_single_adr, 381 }, 382 {} 383 }; 384 385 static const struct snd_soc_acpi_codecs arl_essx_83x6 = { 386 .num_codecs = 3, 387 .codecs = { "ESSX8316", "ESSX8326", "ESSX8336"}, 388 }; 389 390 static const struct snd_soc_acpi_codecs arl_rt5682_hp = { 391 .num_codecs = 2, 392 .codecs = {RT5682_ACPI_HID, RT5682S_ACPI_HID}, 393 }; 394 395 static const struct snd_soc_acpi_codecs arl_lt6911_hdmi = { 396 .num_codecs = 1, 397 .codecs = {"INTC10B0"} 398 }; 399 400 struct snd_soc_acpi_mach snd_soc_acpi_intel_arl_machines[] = { 401 { 402 .comp_ids = &arl_essx_83x6, 403 .drv_name = "arl_es83x6_c1_h02", 404 .machine_quirk = snd_soc_acpi_codec_list, 405 .quirk_data = &arl_lt6911_hdmi, 406 .sof_tplg_filename = "sof-arl-es83x6-ssp1-hdmi-ssp02.tplg", 407 }, 408 { 409 .comp_ids = &arl_essx_83x6, 410 .drv_name = "sof-essx8336", 411 .sof_tplg_filename = "sof-arl-es8336", /* the tplg suffix is added at run time */ 412 .tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER | 413 SND_SOC_ACPI_TPLG_INTEL_SSP_MSB | 414 SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER, 415 }, 416 { 417 .comp_ids = &arl_rt5682_hp, 418 .drv_name = "arl_rt5682_c1_h02", 419 .machine_quirk = snd_soc_acpi_codec_list, 420 .quirk_data = &arl_lt6911_hdmi, 421 .sof_tplg_filename = "sof-arl-rt5682-ssp1-hdmi-ssp02.tplg", 422 }, 423 /* place amp-only boards in the end of table */ 424 { 425 .id = "INTC10B0", 426 .drv_name = "arl_lt6911_hdmi_ssp", 427 .sof_tplg_filename = "sof-arl-hdmi-ssp02.tplg", 428 }, 429 {}, 430 }; 431 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_arl_machines); 432 433 /* this table is used when there is no I2S codec present */ 434 struct snd_soc_acpi_mach snd_soc_acpi_intel_arl_sdw_machines[] = { 435 { 436 .link_mask = BIT(0) | BIT(2) | BIT(3), 437 .links = arl_cs42l43_l0_cs35l56_l23, 438 .drv_name = "sof_sdw", 439 .sof_tplg_filename = "sof-arl-cs42l43-l0-cs35l56-l23.tplg", 440 .get_function_tplg_files = sof_sdw_get_tplg_files, 441 }, 442 { 443 .link_mask = BIT(0) | BIT(2) | BIT(3), 444 .links = arl_cs42l43_l0_cs35l56_2_l23, 445 .drv_name = "sof_sdw", 446 .sof_tplg_filename = "sof-arl-cs42l43-l0-cs35l56-l23.tplg", 447 .get_function_tplg_files = sof_sdw_get_tplg_files, 448 }, 449 { 450 .link_mask = BIT(0) | BIT(2) | BIT(3), 451 .links = arl_cs42l43_l0_cs35l56_3_l23, 452 .drv_name = "sof_sdw", 453 .sof_tplg_filename = "sof-arl-cs42l43-l0-cs35l56-l23.tplg", 454 .get_function_tplg_files = sof_sdw_get_tplg_files, 455 }, 456 { 457 .link_mask = BIT(0) | BIT(2), 458 .links = arl_cs42l43_l0_cs35l56_l2, 459 .drv_name = "sof_sdw", 460 .sof_tplg_filename = "sof-arl-cs42l43-l0-cs35l56-l2.tplg", 461 .get_function_tplg_files = sof_sdw_get_tplg_files, 462 }, 463 { 464 .link_mask = BIT(0), 465 .links = arl_cs42l43_l0, 466 .drv_name = "sof_sdw", 467 .sof_tplg_filename = "sof-arl-cs42l43-l0.tplg", 468 .get_function_tplg_files = sof_sdw_get_tplg_files, 469 }, 470 { 471 .link_mask = BIT(2), 472 .links = arl_cs42l43_l2, 473 .drv_name = "sof_sdw", 474 .sof_tplg_filename = "sof-arl-cs42l43-l2.tplg", 475 .get_function_tplg_files = sof_sdw_get_tplg_files, 476 }, 477 { 478 .link_mask = BIT(2) | BIT(3), 479 .links = arl_cs42l43_l2_cs35l56_l3, 480 .drv_name = "sof_sdw", 481 .sof_tplg_filename = "sof-arl-cs42l43-l2-cs35l56-l3.tplg", 482 .get_function_tplg_files = sof_sdw_get_tplg_files, 483 }, 484 { 485 .link_mask = 0x1, /* link0 required */ 486 .links = arl_rvp, 487 .drv_name = "sof_sdw", 488 .sof_tplg_filename = "sof-arl-rt711.tplg", 489 }, 490 { 491 .link_mask = 0x1, /* link0 required */ 492 .links = arl_sdca_rvp, 493 .drv_name = "sof_sdw", 494 .sof_tplg_filename = "sof-arl-rt711-l0.tplg", 495 }, 496 { 497 .link_mask = BIT(0) | BIT(2), 498 .links = arl_rt722_l0_rt1320_l2, 499 .drv_name = "sof_sdw", 500 .sof_tplg_filename = "sof-arl-rt722-l0_rt1320-l2.tplg", 501 .get_function_tplg_files = sof_sdw_get_tplg_files, 502 }, 503 {}, 504 }; 505 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_arl_sdw_machines); 506