1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1997, 1998, 1999
5 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
6 * Copyright (c) 2006 Bernd Walter. All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Bill Paul.
19 * 4. Neither the name of the author nor the names of any co-contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
33 * THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36 #include <sys/cdefs.h>
37 /*
38 * driver for RealTek 8305 pseudo PHYs
39 */
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/module.h>
45 #include <sys/socket.h>
46 #include <sys/bus.h>
47 #include <sys/taskqueue.h> /* XXXGL: if_rlreg.h contamination */
48
49 #include <net/if.h>
50 #include <net/if_arp.h>
51 #include <net/if_media.h>
52
53 #include <dev/mii/mii.h>
54 #include <dev/mii/miivar.h>
55 #include "miidevs.h"
56
57 #include <machine/bus.h>
58 #include <dev/rl/if_rlreg.h>
59
60 #include "miibus_if.h"
61
62 //#define RL_DEBUG
63 #define RL_VLAN
64
65 static int rlswitch_probe(device_t);
66 static int rlswitch_attach(device_t);
67
68 static device_method_t rlswitch_methods[] = {
69 /* device interface */
70 DEVMETHOD(device_probe, rlswitch_probe),
71 DEVMETHOD(device_attach, rlswitch_attach),
72 DEVMETHOD(device_detach, mii_phy_detach),
73 DEVMETHOD(device_shutdown, bus_generic_shutdown),
74 DEVMETHOD_END
75 };
76
77 static driver_t rlswitch_driver = {
78 "rlswitch",
79 rlswitch_methods,
80 sizeof(struct mii_softc)
81 };
82
83 DRIVER_MODULE(rlswitch, miibus, rlswitch_driver, 0, 0);
84
85 static int rlswitch_service(struct mii_softc *, struct mii_data *, int);
86 static void rlswitch_status(struct mii_softc *);
87
88 #ifdef RL_DEBUG
89 static void rlswitch_phydump(device_t dev);
90 #endif
91
92 static const struct mii_phydesc rlswitches[] = {
93 MII_PHY_DESC(REALTEK, RTL8305SC),
94 MII_PHY_END
95 };
96
97 static const struct mii_phy_funcs rlswitch_funcs = {
98 rlswitch_service,
99 rlswitch_status,
100 mii_phy_reset
101 };
102
103 static int
rlswitch_probe(device_t dev)104 rlswitch_probe(device_t dev)
105 {
106 int rv;
107
108 rv = mii_phy_dev_probe(dev, rlswitches, BUS_PROBE_DEFAULT);
109 if (rv <= 0)
110 return (rv);
111
112 return (ENXIO);
113 }
114
115 static int
rlswitch_attach(device_t dev)116 rlswitch_attach(device_t dev)
117 {
118 struct mii_softc *sc;
119
120 sc = device_get_softc(dev);
121
122 /*
123 * We handle all pseudo PHYs in a single instance.
124 */
125 mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
126 &rlswitch_funcs, 0);
127
128 sc->mii_capabilities = BMSR_100TXFDX & sc->mii_capmask;
129 device_printf(dev, " ");
130 mii_phy_add_media(sc);
131 printf("\n");
132 #ifdef RL_DEBUG
133 rlswitch_phydump(dev);
134 #endif
135
136 #ifdef RL_VLAN
137 int val;
138
139 /* Global Control 0 */
140 val = 0;
141 val |= 0 << 10; /* enable 802.1q VLAN Tag support */
142 val |= 0 << 9; /* enable VLAN ingress filtering */
143 val |= 1 << 8; /* disable VLAN tag admit control */
144 val |= 1 << 6; /* internal use */
145 val |= 1 << 5; /* internal use */
146 val |= 1 << 4; /* internal use */
147 val |= 1 << 3; /* internal use */
148 val |= 1 << 1; /* reserved */
149 MIIBUS_WRITEREG(sc->mii_dev, 0, 16, val);
150
151 /* Global Control 2 */
152 val = 0;
153 val |= 1 << 15; /* reserved */
154 val |= 0 << 14; /* enable 1552 Bytes support */
155 val |= 1 << 13; /* enable broadcast input drop */
156 val |= 1 << 12; /* forward reserved control frames */
157 val |= 1 << 11; /* disable forwarding unicast frames to other VLAN's */
158 val |= 1 << 10; /* disable forwarding ARP broadcasts to other VLAN's */
159 val |= 1 << 9; /* enable 48 pass 1 */
160 val |= 0 << 8; /* enable VLAN */
161 val |= 1 << 7; /* reserved */
162 val |= 1 << 6; /* enable defer */
163 val |= 1 << 5; /* 43ms LED blink time */
164 val |= 3 << 3; /* 16:1 queue weight */
165 val |= 1 << 2; /* disable broadcast storm control */
166 val |= 1 << 1; /* enable power-on LED blinking */
167 val |= 1 << 0; /* reserved */
168 MIIBUS_WRITEREG(sc->mii_dev, 0, 18, val);
169
170 /* Port 0 Control Register 0 */
171 val = 0;
172 val |= 1 << 15; /* reserved */
173 val |= 1 << 11; /* drop received packets with wrong VLAN tag */
174 val |= 1 << 10; /* disable 802.1p priority classification */
175 val |= 1 << 9; /* disable diffserv priority classification */
176 val |= 1 << 6; /* internal use */
177 val |= 3 << 4; /* internal use */
178 val |= 1 << 3; /* internal use */
179 val |= 1 << 2; /* internal use */
180 val |= 1 << 0; /* remove VLAN tags on output */
181 MIIBUS_WRITEREG(sc->mii_dev, 0, 22, val);
182
183 /* Port 1 Control Register 0 */
184 val = 0;
185 val |= 1 << 15; /* reserved */
186 val |= 1 << 11; /* drop received packets with wrong VLAN tag */
187 val |= 1 << 10; /* disable 802.1p priority classification */
188 val |= 1 << 9; /* disable diffserv priority classification */
189 val |= 1 << 6; /* internal use */
190 val |= 3 << 4; /* internal use */
191 val |= 1 << 3; /* internal use */
192 val |= 1 << 2; /* internal use */
193 val |= 1 << 0; /* remove VLAN tags on output */
194 MIIBUS_WRITEREG(sc->mii_dev, 1, 22, val);
195
196 /* Port 2 Control Register 0 */
197 val = 0;
198 val |= 1 << 15; /* reserved */
199 val |= 1 << 11; /* drop received packets with wrong VLAN tag */
200 val |= 1 << 10; /* disable 802.1p priority classification */
201 val |= 1 << 9; /* disable diffserv priority classification */
202 val |= 1 << 6; /* internal use */
203 val |= 3 << 4; /* internal use */
204 val |= 1 << 3; /* internal use */
205 val |= 1 << 2; /* internal use */
206 val |= 1 << 0; /* remove VLAN tags on output */
207 MIIBUS_WRITEREG(sc->mii_dev, 2, 22, val);
208
209 /* Port 3 Control Register 0 */
210 val = 0;
211 val |= 1 << 15; /* reserved */
212 val |= 1 << 11; /* drop received packets with wrong VLAN tag */
213 val |= 1 << 10; /* disable 802.1p priority classification */
214 val |= 1 << 9; /* disable diffserv priority classification */
215 val |= 1 << 6; /* internal use */
216 val |= 3 << 4; /* internal use */
217 val |= 1 << 3; /* internal use */
218 val |= 1 << 2; /* internal use */
219 val |= 1 << 0; /* remove VLAN tags on output */
220 MIIBUS_WRITEREG(sc->mii_dev, 3, 22, val);
221
222 /* Port 4 (system port) Control Register 0 */
223 val = 0;
224 val |= 1 << 15; /* reserved */
225 val |= 0 << 11; /* don't drop received packets with wrong VLAN tag */
226 val |= 1 << 10; /* disable 802.1p priority classification */
227 val |= 1 << 9; /* disable diffserv priority classification */
228 val |= 1 << 6; /* internal use */
229 val |= 3 << 4; /* internal use */
230 val |= 1 << 3; /* internal use */
231 val |= 1 << 2; /* internal use */
232 val |= 2 << 0; /* add VLAN tags for untagged packets on output */
233 MIIBUS_WRITEREG(sc->mii_dev, 4, 22, val);
234
235 /* Port 0 Control Register 1 and VLAN A */
236 val = 0;
237 val |= 0x0 << 12; /* Port 0 VLAN Index */
238 val |= 1 << 11; /* internal use */
239 val |= 1 << 10; /* internal use */
240 val |= 1 << 9; /* internal use */
241 val |= 1 << 7; /* internal use */
242 val |= 1 << 6; /* internal use */
243 val |= 0x11 << 0; /* VLAN A membership */
244 MIIBUS_WRITEREG(sc->mii_dev, 0, 24, val);
245
246 /* Port 0 Control Register 2 and VLAN A */
247 val = 0;
248 val |= 1 << 15; /* internal use */
249 val |= 1 << 14; /* internal use */
250 val |= 1 << 13; /* internal use */
251 val |= 1 << 12; /* internal use */
252 val |= 0x100 << 0; /* VLAN A ID */
253 MIIBUS_WRITEREG(sc->mii_dev, 0, 25, val);
254
255 /* Port 1 Control Register 1 and VLAN B */
256 val = 0;
257 val |= 0x1 << 12; /* Port 1 VLAN Index */
258 val |= 1 << 11; /* internal use */
259 val |= 1 << 10; /* internal use */
260 val |= 1 << 9; /* internal use */
261 val |= 1 << 7; /* internal use */
262 val |= 1 << 6; /* internal use */
263 val |= 0x12 << 0; /* VLAN B membership */
264 MIIBUS_WRITEREG(sc->mii_dev, 1, 24, val);
265
266 /* Port 1 Control Register 2 and VLAN B */
267 val = 0;
268 val |= 1 << 15; /* internal use */
269 val |= 1 << 14; /* internal use */
270 val |= 1 << 13; /* internal use */
271 val |= 1 << 12; /* internal use */
272 val |= 0x101 << 0; /* VLAN B ID */
273 MIIBUS_WRITEREG(sc->mii_dev, 1, 25, val);
274
275 /* Port 2 Control Register 1 and VLAN C */
276 val = 0;
277 val |= 0x2 << 12; /* Port 2 VLAN Index */
278 val |= 1 << 11; /* internal use */
279 val |= 1 << 10; /* internal use */
280 val |= 1 << 9; /* internal use */
281 val |= 1 << 7; /* internal use */
282 val |= 1 << 6; /* internal use */
283 val |= 0x14 << 0; /* VLAN C membership */
284 MIIBUS_WRITEREG(sc->mii_dev, 2, 24, val);
285
286 /* Port 2 Control Register 2 and VLAN C */
287 val = 0;
288 val |= 1 << 15; /* internal use */
289 val |= 1 << 14; /* internal use */
290 val |= 1 << 13; /* internal use */
291 val |= 1 << 12; /* internal use */
292 val |= 0x102 << 0; /* VLAN C ID */
293 MIIBUS_WRITEREG(sc->mii_dev, 2, 25, val);
294
295 /* Port 3 Control Register 1 and VLAN D */
296 val = 0;
297 val |= 0x3 << 12; /* Port 3 VLAN Index */
298 val |= 1 << 11; /* internal use */
299 val |= 1 << 10; /* internal use */
300 val |= 1 << 9; /* internal use */
301 val |= 1 << 7; /* internal use */
302 val |= 1 << 6; /* internal use */
303 val |= 0x18 << 0; /* VLAN D membership */
304 MIIBUS_WRITEREG(sc->mii_dev, 3, 24, val);
305
306 /* Port 3 Control Register 2 and VLAN D */
307 val = 0;
308 val |= 1 << 15; /* internal use */
309 val |= 1 << 14; /* internal use */
310 val |= 1 << 13; /* internal use */
311 val |= 1 << 12; /* internal use */
312 val |= 0x103 << 0; /* VLAN D ID */
313 MIIBUS_WRITEREG(sc->mii_dev, 3, 25, val);
314
315 /* Port 4 Control Register 1 and VLAN E */
316 val = 0;
317 val |= 0x0 << 12; /* Port 4 VLAN Index */
318 val |= 1 << 11; /* internal use */
319 val |= 1 << 10; /* internal use */
320 val |= 1 << 9; /* internal use */
321 val |= 1 << 7; /* internal use */
322 val |= 1 << 6; /* internal use */
323 val |= 0 << 0; /* VLAN E membership */
324 MIIBUS_WRITEREG(sc->mii_dev, 4, 24, val);
325
326 /* Port 4 Control Register 2 and VLAN E */
327 val = 0;
328 val |= 1 << 15; /* internal use */
329 val |= 1 << 14; /* internal use */
330 val |= 1 << 13; /* internal use */
331 val |= 1 << 12; /* internal use */
332 val |= 0x104 << 0; /* VLAN E ID */
333 MIIBUS_WRITEREG(sc->mii_dev, 4, 25, val);
334 #endif
335
336 #ifdef RL_DEBUG
337 rlswitch_phydump(dev);
338 #endif
339 MIIBUS_MEDIAINIT(sc->mii_dev);
340 return (0);
341 }
342
343 static int
rlswitch_service(struct mii_softc * sc,struct mii_data * mii,int cmd)344 rlswitch_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
345 {
346
347 switch (cmd) {
348 case MII_POLLSTAT:
349 break;
350
351 case MII_MEDIACHG:
352 break;
353
354 case MII_TICK:
355 break;
356 }
357
358 /* Update the media status. */
359 PHY_STATUS(sc);
360
361 /* Callback if something changed. */
362 // mii_phy_update(sc, cmd);
363 return (0);
364 }
365
366 static void
rlswitch_status(struct mii_softc * phy)367 rlswitch_status(struct mii_softc *phy)
368 {
369 struct mii_data *mii = phy->mii_pdata;
370
371 mii->mii_media_status = IFM_AVALID;
372 mii->mii_media_active = IFM_ETHER;
373 mii->mii_media_status |= IFM_ACTIVE;
374 mii->mii_media_active |=
375 IFM_100_TX | IFM_FDX | mii_phy_flowstatus(phy);
376 }
377
378 #ifdef RL_DEBUG
379 static void
rlswitch_phydump(device_t dev)380 rlswitch_phydump(device_t dev) {
381 int phy, reg, val;
382 struct mii_softc *sc;
383
384 sc = device_get_softc(dev);
385 device_printf(dev, "rlswitchphydump\n");
386 for (phy = 0; phy <= 5; phy++) {
387 printf("PHY%i:", phy);
388 for (reg = 0; reg <= 31; reg++) {
389 val = MIIBUS_READREG(sc->mii_dev, phy, reg);
390 printf(" 0x%x", val);
391 }
392 printf("\n");
393 }
394 }
395 #endif
396