1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 7 */ 8 9 #ifndef _CORE_H_ 10 #define _CORE_H_ 11 12 #include <linux/completion.h> 13 #include <linux/if_ether.h> 14 #include <linux/types.h> 15 #include <linux/pci.h> 16 #include <linux/uuid.h> 17 #include <linux/time.h> 18 #include <linux/leds.h> 19 20 #include "htt.h" 21 #include "htc.h" 22 #include "hw.h" 23 #include "targaddrs.h" 24 #include "wmi.h" 25 #include "../ath.h" 26 #include "../regd.h" 27 #include "../dfs_pattern_detector.h" 28 #include "spectral.h" 29 #include "thermal.h" 30 #include "wow.h" 31 #include "swap.h" 32 33 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 34 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 35 #define WO(_f) ((_f##_OFFSET) >> 2) 36 37 #define ATH10K_SCAN_ID 0 38 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ 39 #define WMI_READY_TIMEOUT (5 * HZ) 40 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 41 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 42 #define ATH10K_NUM_CHANS 41 43 #define ATH10K_MAX_5G_CHAN 173 44 45 /* Antenna noise floor */ 46 #define ATH10K_DEFAULT_NOISE_FLOOR -95 47 48 #define ATH10K_INVALID_RSSI 128 49 50 #define ATH10K_MAX_NUM_MGMT_PENDING 128 51 52 /* number of failed packets (20 packets with 16 sw reties each) */ 53 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 54 55 /* 56 * Use insanely high numbers to make sure that the firmware implementation 57 * won't start, we have the same functionality already in hostapd. Unit 58 * is seconds. 59 */ 60 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 61 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 62 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 63 64 /* SMBIOS type containing Board Data File Name Extension */ 65 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 66 67 /* SMBIOS type structure length (excluding strings-set) */ 68 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 69 70 /* Offset pointing to Board Data File Name Extension */ 71 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 72 73 /* Board Data File Name Extension string length. 74 * String format: BDF_<Customer ID>_<Extension>\0 75 */ 76 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 77 78 /* The magic used by QCA spec */ 79 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" 80 81 /* Default Airtime weight multiplier (Tuned for multiclient performance) */ 82 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER 4 83 84 #define ATH10K_MAX_RETRY_COUNT 30 85 86 #define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \ 87 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER) 88 #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\ 89 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER) 90 #define ATH10K_RECOVERY_TIMEOUT_HZ (5 * HZ) 91 #define ATH10K_RECOVERY_MAX_FAIL_COUNT 4 92 93 struct ath10k; 94 95 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 96 { 97 switch (bus) { 98 case ATH10K_BUS_PCI: 99 return "pci"; 100 case ATH10K_BUS_AHB: 101 return "ahb"; 102 case ATH10K_BUS_SDIO: 103 return "sdio"; 104 case ATH10K_BUS_USB: 105 return "usb"; 106 case ATH10K_BUS_SNOC: 107 return "snoc"; 108 } 109 110 return "unknown"; 111 } 112 113 enum ath10k_skb_flags { 114 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 115 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 116 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 117 ATH10K_SKB_F_MGMT = BIT(3), 118 ATH10K_SKB_F_QOS = BIT(4), 119 ATH10K_SKB_F_RAW_TX = BIT(5), 120 ATH10K_SKB_F_NOACK_TID = BIT(6), 121 }; 122 123 struct ath10k_skb_cb { 124 dma_addr_t paddr; 125 u8 flags; 126 u8 eid; 127 u16 msdu_id; 128 u16 airtime_est; 129 struct ieee80211_vif *vif; 130 struct ieee80211_txq *txq; 131 u32 ucast_cipher; 132 } __packed; 133 134 struct ath10k_skb_rxcb { 135 dma_addr_t paddr; 136 struct hlist_node hlist; 137 u8 eid; 138 }; 139 140 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 141 { 142 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 143 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 144 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 145 } 146 147 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 148 { 149 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 150 return (struct ath10k_skb_rxcb *)skb->cb; 151 } 152 153 #define ATH10K_RXCB_SKB(rxcb) \ 154 container_of((void *)rxcb, struct sk_buff, cb) 155 156 static inline u32 host_interest_item_address(u32 item_offset) 157 { 158 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 159 } 160 161 enum ath10k_phy_mode { 162 ATH10K_PHY_MODE_LEGACY = 0, 163 ATH10K_PHY_MODE_HT = 1, 164 ATH10K_PHY_MODE_VHT = 2, 165 }; 166 167 /* Data rate 100KBPS based on IE Index */ 168 struct ath10k_index_ht_data_rate_type { 169 u8 beacon_rate_index; 170 u16 supported_rate[4]; 171 }; 172 173 /* Data rate 100KBPS based on IE Index */ 174 struct ath10k_index_vht_data_rate_type { 175 u8 beacon_rate_index; 176 u16 supported_VHT80_rate[2]; 177 u16 supported_VHT40_rate[2]; 178 u16 supported_VHT20_rate[2]; 179 }; 180 181 struct ath10k_bmi { 182 bool done_sent; 183 }; 184 185 struct ath10k_mem_chunk { 186 void *vaddr; 187 dma_addr_t paddr; 188 u32 len; 189 u32 req_id; 190 }; 191 192 struct ath10k_wmi { 193 enum ath10k_htc_ep_id eid; 194 struct completion service_ready; 195 struct completion unified_ready; 196 struct completion barrier; 197 struct completion radar_confirm; 198 wait_queue_head_t tx_credits_wq; 199 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 200 struct wmi_cmd_map *cmd; 201 struct wmi_vdev_param_map *vdev_param; 202 struct wmi_pdev_param_map *pdev_param; 203 struct wmi_peer_param_map *peer_param; 204 const struct wmi_ops *ops; 205 const struct wmi_peer_flags_map *peer_flags; 206 207 u32 mgmt_max_num_pending_tx; 208 209 /* Protected by data_lock */ 210 struct idr mgmt_pending_tx; 211 212 u32 num_mem_chunks; 213 u32 rx_decap_mode; 214 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 215 }; 216 217 struct ath10k_fw_stats_peer { 218 struct list_head list; 219 220 u8 peer_macaddr[ETH_ALEN]; 221 u32 peer_rssi; 222 u32 peer_tx_rate; 223 u32 peer_rx_rate; /* 10x only */ 224 u64 rx_duration; 225 }; 226 227 struct ath10k_fw_extd_stats_peer { 228 struct list_head list; 229 230 u8 peer_macaddr[ETH_ALEN]; 231 u64 rx_duration; 232 }; 233 234 struct ath10k_fw_stats_vdev { 235 struct list_head list; 236 237 u32 vdev_id; 238 u32 beacon_snr; 239 u32 data_snr; 240 u32 num_tx_frames[4]; 241 u32 num_rx_frames; 242 u32 num_tx_frames_retries[4]; 243 u32 num_tx_frames_failures[4]; 244 u32 num_rts_fail; 245 u32 num_rts_success; 246 u32 num_rx_err; 247 u32 num_rx_discard; 248 u32 num_tx_not_acked; 249 u32 tx_rate_history[10]; 250 u32 beacon_rssi_history[10]; 251 }; 252 253 struct ath10k_fw_stats_vdev_extd { 254 struct list_head list; 255 256 u32 vdev_id; 257 u32 ppdu_aggr_cnt; 258 u32 ppdu_noack; 259 u32 mpdu_queued; 260 u32 ppdu_nonaggr_cnt; 261 u32 mpdu_sw_requeued; 262 u32 mpdu_suc_retry; 263 u32 mpdu_suc_multitry; 264 u32 mpdu_fail_retry; 265 u32 tx_ftm_suc; 266 u32 tx_ftm_suc_retry; 267 u32 tx_ftm_fail; 268 u32 rx_ftmr_cnt; 269 u32 rx_ftmr_dup_cnt; 270 u32 rx_iftmr_cnt; 271 u32 rx_iftmr_dup_cnt; 272 }; 273 274 struct ath10k_fw_stats_pdev { 275 struct list_head list; 276 277 /* PDEV stats */ 278 s32 ch_noise_floor; 279 u32 tx_frame_count; /* Cycles spent transmitting frames */ 280 u32 rx_frame_count; /* Cycles spent receiving frames */ 281 u32 rx_clear_count; /* Total channel busy time, evidently */ 282 u32 cycle_count; /* Total on-channel time */ 283 u32 phy_err_count; 284 u32 chan_tx_power; 285 u32 ack_rx_bad; 286 u32 rts_bad; 287 u32 rts_good; 288 u32 fcs_bad; 289 u32 no_beacons; 290 u32 mib_int_count; 291 292 /* PDEV TX stats */ 293 s32 comp_queued; 294 s32 comp_delivered; 295 s32 msdu_enqued; 296 s32 mpdu_enqued; 297 s32 wmm_drop; 298 s32 local_enqued; 299 s32 local_freed; 300 s32 hw_queued; 301 s32 hw_reaped; 302 s32 underrun; 303 u32 hw_paused; 304 s32 tx_abort; 305 s32 mpdus_requeued; 306 u32 tx_ko; 307 u32 data_rc; 308 u32 self_triggers; 309 u32 sw_retry_failure; 310 u32 illgl_rate_phy_err; 311 u32 pdev_cont_xretry; 312 u32 pdev_tx_timeout; 313 u32 pdev_resets; 314 u32 phy_underrun; 315 u32 txop_ovf; 316 u32 seq_posted; 317 u32 seq_failed_queueing; 318 u32 seq_completed; 319 u32 seq_restarted; 320 u32 mu_seq_posted; 321 u32 mpdus_sw_flush; 322 u32 mpdus_hw_filter; 323 u32 mpdus_truncated; 324 u32 mpdus_ack_failed; 325 u32 mpdus_expired; 326 327 /* PDEV RX stats */ 328 s32 mid_ppdu_route_change; 329 s32 status_rcvd; 330 s32 r0_frags; 331 s32 r1_frags; 332 s32 r2_frags; 333 s32 r3_frags; 334 s32 htt_msdus; 335 s32 htt_mpdus; 336 s32 loc_msdus; 337 s32 loc_mpdus; 338 s32 oversize_amsdu; 339 s32 phy_errs; 340 s32 phy_err_drop; 341 s32 mpdu_errs; 342 s32 rx_ovfl_errs; 343 }; 344 345 struct ath10k_fw_stats { 346 bool extended; 347 struct list_head pdevs; 348 struct list_head vdevs; 349 struct list_head peers; 350 struct list_head peers_extd; 351 }; 352 353 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 354 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 355 356 struct ath10k_tpc_table { 357 u32 pream_idx[WMI_TPC_RATE_MAX]; 358 u8 rate_code[WMI_TPC_RATE_MAX]; 359 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 360 }; 361 362 struct ath10k_tpc_stats { 363 u32 reg_domain; 364 u32 chan_freq; 365 u32 phy_mode; 366 u32 twice_antenna_reduction; 367 u32 twice_max_rd_power; 368 s32 twice_antenna_gain; 369 u32 power_limit; 370 u32 num_tx_chain; 371 u32 ctl; 372 u32 rate_max; 373 u8 flag[WMI_TPC_FLAG]; 374 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 375 }; 376 377 struct ath10k_tpc_table_final { 378 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; 379 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 380 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 381 }; 382 383 struct ath10k_tpc_stats_final { 384 u32 reg_domain; 385 u32 chan_freq; 386 u32 phy_mode; 387 u32 twice_antenna_reduction; 388 u32 twice_max_rd_power; 389 s32 twice_antenna_gain; 390 u32 power_limit; 391 u32 num_tx_chain; 392 u32 ctl; 393 u32 rate_max; 394 u8 flag[WMI_TPC_FLAG]; 395 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; 396 }; 397 398 struct ath10k_dfs_stats { 399 u32 phy_errors; 400 u32 pulses_total; 401 u32 pulses_detected; 402 u32 pulses_discarded; 403 u32 radar_detected; 404 }; 405 406 enum ath10k_radar_confirmation_state { 407 ATH10K_RADAR_CONFIRMATION_IDLE = 0, 408 ATH10K_RADAR_CONFIRMATION_INPROGRESS, 409 ATH10K_RADAR_CONFIRMATION_STOPPED, 410 }; 411 412 struct ath10k_radar_found_info { 413 u32 pri_min; 414 u32 pri_max; 415 u32 width_min; 416 u32 width_max; 417 u32 sidx_min; 418 u32 sidx_max; 419 }; 420 421 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 422 423 struct ath10k_peer { 424 struct list_head list; 425 struct ieee80211_vif *vif; 426 struct ieee80211_sta *sta; 427 428 bool removed; 429 int vdev_id; 430 u8 addr[ETH_ALEN]; 431 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 432 433 /* protected by ar->data_lock */ 434 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 435 union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; 436 bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS]; 437 union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; 438 u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS]; 439 struct { 440 enum htt_security_types sec_type; 441 int pn_len; 442 } rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX]; 443 }; 444 445 struct ath10k_txq { 446 struct list_head list; 447 unsigned long num_fw_queued; 448 unsigned long num_push_allowed; 449 }; 450 451 enum ath10k_pkt_rx_err { 452 ATH10K_PKT_RX_ERR_FCS, 453 ATH10K_PKT_RX_ERR_TKIP, 454 ATH10K_PKT_RX_ERR_CRYPT, 455 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, 456 ATH10K_PKT_RX_ERR_MAX, 457 }; 458 459 enum ath10k_ampdu_subfrm_num { 460 ATH10K_AMPDU_SUBFRM_NUM_10, 461 ATH10K_AMPDU_SUBFRM_NUM_20, 462 ATH10K_AMPDU_SUBFRM_NUM_30, 463 ATH10K_AMPDU_SUBFRM_NUM_40, 464 ATH10K_AMPDU_SUBFRM_NUM_50, 465 ATH10K_AMPDU_SUBFRM_NUM_60, 466 ATH10K_AMPDU_SUBFRM_NUM_MORE, 467 ATH10K_AMPDU_SUBFRM_NUM_MAX, 468 }; 469 470 enum ath10k_amsdu_subfrm_num { 471 ATH10K_AMSDU_SUBFRM_NUM_1, 472 ATH10K_AMSDU_SUBFRM_NUM_2, 473 ATH10K_AMSDU_SUBFRM_NUM_3, 474 ATH10K_AMSDU_SUBFRM_NUM_4, 475 ATH10K_AMSDU_SUBFRM_NUM_MORE, 476 ATH10K_AMSDU_SUBFRM_NUM_MAX, 477 }; 478 479 struct ath10k_sta_tid_stats { 480 unsigned long rx_pkt_from_fw; 481 unsigned long rx_pkt_unchained; 482 unsigned long rx_pkt_drop_chained; 483 unsigned long rx_pkt_drop_filter; 484 unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; 485 unsigned long rx_pkt_queued_for_mac; 486 unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; 487 unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; 488 }; 489 490 enum ath10k_counter_type { 491 ATH10K_COUNTER_TYPE_BYTES, 492 ATH10K_COUNTER_TYPE_PKTS, 493 ATH10K_COUNTER_TYPE_MAX, 494 }; 495 496 enum ath10k_stats_type { 497 ATH10K_STATS_TYPE_SUCC, 498 ATH10K_STATS_TYPE_FAIL, 499 ATH10K_STATS_TYPE_RETRY, 500 ATH10K_STATS_TYPE_AMPDU, 501 ATH10K_STATS_TYPE_MAX, 502 }; 503 504 struct ath10k_htt_data_stats { 505 u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM]; 506 u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM]; 507 u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM]; 508 u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM]; 509 u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM]; 510 u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM]; 511 u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM]; 512 }; 513 514 struct ath10k_htt_tx_stats { 515 struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX]; 516 u64 tx_duration; 517 u64 ba_fails; 518 u64 ack_fails; 519 }; 520 521 #define ATH10K_TID_MAX 8 522 523 struct ath10k_sta { 524 struct ath10k_vif *arvif; 525 526 /* the following are protected by ar->data_lock */ 527 u32 changed; /* IEEE80211_RC_* */ 528 u32 bw; 529 u32 nss; 530 u32 smps; 531 u16 peer_id; 532 struct rate_info txrate; 533 struct ieee80211_tx_info tx_info; 534 u32 tx_retries; 535 u32 tx_failed; 536 u32 last_tx_bitrate; 537 538 u32 rx_rate_code; 539 u32 rx_bitrate_kbps; 540 u32 tx_rate_code; 541 u32 tx_bitrate_kbps; 542 struct work_struct update_wk; 543 u64 rx_duration; 544 struct ath10k_htt_tx_stats *tx_stats; 545 u32 ucast_cipher; 546 547 #ifdef CONFIG_MAC80211_DEBUGFS 548 /* protected by conf_mutex */ 549 bool aggr_mode; 550 551 /* Protected with ar->data_lock */ 552 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; 553 #endif 554 /* Protected with ar->data_lock */ 555 u32 peer_ps_state; 556 struct work_struct tid_config_wk; 557 int noack[ATH10K_TID_MAX]; 558 int retry_long[ATH10K_TID_MAX]; 559 int ampdu[ATH10K_TID_MAX]; 560 u8 rate_ctrl[ATH10K_TID_MAX]; 561 u32 rate_code[ATH10K_TID_MAX]; 562 int rtscts[ATH10K_TID_MAX]; 563 }; 564 565 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 566 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 567 568 enum ath10k_beacon_state { 569 ATH10K_BEACON_SCHEDULED = 0, 570 ATH10K_BEACON_SENDING, 571 ATH10K_BEACON_SENT, 572 }; 573 574 struct ath10k_vif { 575 struct list_head list; 576 577 u32 vdev_id; 578 u16 peer_id; 579 enum wmi_vdev_type vdev_type; 580 enum wmi_vdev_subtype vdev_subtype; 581 u32 beacon_interval; 582 u32 dtim_period; 583 struct sk_buff *beacon; 584 /* protected by data_lock */ 585 enum ath10k_beacon_state beacon_state; 586 void *beacon_buf; 587 dma_addr_t beacon_paddr; 588 unsigned long tx_paused; /* arbitrary values defined by target */ 589 590 struct ath10k *ar; 591 struct ieee80211_vif *vif; 592 593 bool is_started; 594 bool is_up; 595 bool spectral_enabled; 596 bool ps; 597 u32 aid; 598 u8 bssid[ETH_ALEN]; 599 600 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 601 s8 def_wep_key_idx; 602 603 u16 tx_seq_no; 604 605 union { 606 struct { 607 u32 uapsd; 608 } sta; 609 struct { 610 /* 512 stations */ 611 u8 tim_bitmap[64]; 612 u8 tim_len; 613 u32 ssid_len; 614 u8 ssid[IEEE80211_MAX_SSID_LEN] __nonstring; 615 bool hidden_ssid; 616 /* P2P_IE with NoA attribute for P2P_GO case */ 617 u32 noa_len; 618 u8 *noa_data; 619 } ap; 620 } u; 621 622 bool use_cts_prot; 623 bool nohwcrypt; 624 int num_legacy_stations; 625 int txpower; 626 bool ftm_responder; 627 struct wmi_wmm_params_all_arg wmm_params; 628 struct work_struct ap_csa_work; 629 struct delayed_work connection_loss_work; 630 struct cfg80211_bitrate_mask bitrate_mask; 631 632 /* For setting VHT peer fixed rate, protected by conf_mutex */ 633 int vht_num_rates; 634 u8 vht_pfr; 635 u32 tid_conf_changed[ATH10K_TID_MAX]; 636 int noack[ATH10K_TID_MAX]; 637 int retry_long[ATH10K_TID_MAX]; 638 int ampdu[ATH10K_TID_MAX]; 639 u8 rate_ctrl[ATH10K_TID_MAX]; 640 u32 rate_code[ATH10K_TID_MAX]; 641 int rtscts[ATH10K_TID_MAX]; 642 u32 tids_rst; 643 }; 644 645 struct ath10k_vif_iter { 646 u32 vdev_id; 647 struct ath10k_vif *arvif; 648 }; 649 650 /* Copy Engine register dump, protected by ce-lock */ 651 struct ath10k_ce_crash_data { 652 __le32 base_addr; 653 __le32 src_wr_idx; 654 __le32 src_r_idx; 655 __le32 dst_wr_idx; 656 __le32 dst_r_idx; 657 }; 658 659 struct ath10k_ce_crash_hdr { 660 __le32 ce_count; 661 __le32 reserved[3]; /* for future use */ 662 struct ath10k_ce_crash_data entries[]; 663 }; 664 665 #define MAX_MEM_DUMP_TYPE 5 666 667 /* used for crash-dump storage, protected by data-lock */ 668 struct ath10k_fw_crash_data { 669 guid_t guid; 670 struct timespec64 timestamp; 671 __le32 registers[REG_DUMP_COUNT_QCA988X]; 672 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; 673 674 u8 *ramdump_buf; 675 size_t ramdump_buf_len; 676 }; 677 678 struct ath10k_debug { 679 struct dentry *debugfs_phy; 680 681 struct ath10k_fw_stats fw_stats; 682 struct completion fw_stats_complete; 683 bool fw_stats_done; 684 685 unsigned long htt_stats_mask; 686 unsigned long reset_htt_stats; 687 struct delayed_work htt_stats_dwork; 688 struct ath10k_dfs_stats dfs_stats; 689 struct ath_dfs_pool_stats dfs_pool_stats; 690 691 /* used for tpc-dump storage, protected by data-lock */ 692 struct ath10k_tpc_stats *tpc_stats; 693 struct ath10k_tpc_stats_final *tpc_stats_final; 694 695 struct completion tpc_complete; 696 697 /* protected by conf_mutex */ 698 u64 fw_dbglog_mask; 699 u32 fw_dbglog_level; 700 u32 reg_addr; 701 u32 nf_cal_period; 702 void *cal_data; 703 u32 enable_extd_tx_stats; 704 u8 fw_dbglog_mode; 705 }; 706 707 enum ath10k_state { 708 ATH10K_STATE_OFF = 0, 709 ATH10K_STATE_ON, 710 711 /* When doing firmware recovery the device is first powered down. 712 * mac80211 is supposed to call in to start() hook later on. It is 713 * however possible that driver unloading and firmware crash overlap. 714 * mac80211 can wait on conf_mutex in stop() while the device is 715 * stopped in ath10k_core_restart() work holding conf_mutex. The state 716 * RESTARTED means that the device is up and mac80211 has started hw 717 * reconfiguration. Once mac80211 is done with the reconfiguration we 718 * set the state to STATE_ON in reconfig_complete(). 719 */ 720 ATH10K_STATE_RESTARTING, 721 ATH10K_STATE_RESTARTED, 722 723 /* The device has crashed while restarting hw. This state is like ON 724 * but commands are blocked in HTC and -ECOMM response is given. This 725 * prevents completion timeouts and makes the driver more responsive to 726 * userspace commands. This is also prevents recursive recovery. 727 */ 728 ATH10K_STATE_WEDGED, 729 730 /* factory tests */ 731 ATH10K_STATE_UTF, 732 }; 733 734 enum ath10k_firmware_mode { 735 /* the default mode, standard 802.11 functionality */ 736 ATH10K_FIRMWARE_MODE_NORMAL, 737 738 /* factory tests etc */ 739 ATH10K_FIRMWARE_MODE_UTF, 740 }; 741 742 enum ath10k_fw_features { 743 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 744 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 745 746 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 747 ATH10K_FW_FEATURE_WMI_10X = 1, 748 749 /* firmware support tx frame management over WMI, otherwise it's HTT */ 750 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 751 752 /* Firmware does not support P2P */ 753 ATH10K_FW_FEATURE_NO_P2P = 3, 754 755 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 756 * bit is required to be set as well. Deprecated, don't use in new 757 * code. 758 */ 759 ATH10K_FW_FEATURE_WMI_10_2 = 4, 760 761 /* Some firmware revisions lack proper multi-interface client powersave 762 * implementation. Enabling PS could result in connection drops, 763 * traffic stalls, etc. 764 */ 765 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 766 767 /* Some firmware revisions have an incomplete WoWLAN implementation 768 * despite WMI service bit being advertised. This feature flag is used 769 * to distinguish whether WoWLAN is really supported or not. 770 */ 771 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 772 773 /* Don't trust error code from otp.bin */ 774 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 775 776 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 777 * it 8 bytes long in Native Wifi Rx decap. 778 */ 779 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 780 781 /* Firmware supports bypassing PLL setting on init. */ 782 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 783 784 /* Raw mode support. If supported, FW supports receiving and transmitting 785 * frames in raw mode. 786 */ 787 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 788 789 /* Firmware Supports Adaptive CCA*/ 790 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 791 792 /* Firmware supports management frame protection */ 793 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 794 795 /* Firmware supports pull-push model where host shares it's software 796 * queue state with firmware and firmware generates fetch requests 797 * telling host which queues to dequeue tx from. 798 * 799 * Primary function of this is improved MU-MIMO performance with 800 * multiple clients. 801 */ 802 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 803 804 /* Firmware supports BT-Coex without reloading firmware via pdev param. 805 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 806 * extended resource config should be enabled always. This firmware IE 807 * is used to configure WMI_COEX_GPIO_SUPPORT. 808 */ 809 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 810 811 /* Unused flag and proven to be not working, enable this if you want 812 * to experiment sending NULL func data frames in HTT TX 813 */ 814 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, 815 816 /* Firmware allow other BSS mesh broadcast/multicast frames without 817 * creating monitor interface. Appropriate rxfilters are programmed for 818 * mesh vdev by firmware itself. This feature flags will be used for 819 * not creating monitor vdev while configuring mesh node. 820 */ 821 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, 822 823 /* Firmware does not support power save in station mode. */ 824 ATH10K_FW_FEATURE_NO_PS = 17, 825 826 /* Firmware allows management tx by reference instead of by value. */ 827 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, 828 829 /* Firmware load is done externally, not by bmi */ 830 ATH10K_FW_FEATURE_NON_BMI = 19, 831 832 /* Firmware sends only one chan_info event per channel */ 833 ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20, 834 835 /* Firmware allows setting peer fixed rate */ 836 ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21, 837 838 /* Firmware support IRAM recovery */ 839 ATH10K_FW_FEATURE_IRAM_RECOVERY = 22, 840 841 /* keep last */ 842 ATH10K_FW_FEATURE_COUNT, 843 }; 844 845 enum ath10k_dev_flags { 846 /* Indicates that ath10k device is during CAC phase of DFS */ 847 ATH10K_CAC_RUNNING, 848 ATH10K_FLAG_CORE_REGISTERED, 849 850 /* Device has crashed and needs to restart. This indicates any pending 851 * waiters should immediately cancel instead of waiting for a time out. 852 */ 853 ATH10K_FLAG_CRASH_FLUSH, 854 855 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 856 * Raw mode supports both hardware and software crypto. Native WiFi only 857 * supports hardware crypto. 858 */ 859 ATH10K_FLAG_RAW_MODE, 860 861 /* Disable HW crypto engine */ 862 ATH10K_FLAG_HW_CRYPTO_DISABLED, 863 864 /* Bluetooth coexistence enabled */ 865 ATH10K_FLAG_BTCOEX, 866 867 /* Per Station statistics service */ 868 ATH10K_FLAG_PEER_STATS, 869 870 /* protected by conf_mutex */ 871 ATH10K_FLAG_NAPI_ENABLED, 872 }; 873 874 enum ath10k_cal_mode { 875 ATH10K_CAL_MODE_FILE, 876 ATH10K_CAL_MODE_OTP, 877 ATH10K_CAL_MODE_DT, 878 ATH10K_CAL_MODE_NVMEM, 879 ATH10K_PRE_CAL_MODE_FILE, 880 ATH10K_PRE_CAL_MODE_DT, 881 ATH10K_PRE_CAL_MODE_NVMEM, 882 ATH10K_CAL_MODE_EEPROM, 883 }; 884 885 enum ath10k_crypt_mode { 886 /* Only use hardware crypto engine */ 887 ATH10K_CRYPT_MODE_HW, 888 /* Only use software crypto engine */ 889 ATH10K_CRYPT_MODE_SW, 890 }; 891 892 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 893 { 894 switch (mode) { 895 case ATH10K_CAL_MODE_FILE: 896 return "file"; 897 case ATH10K_CAL_MODE_OTP: 898 return "otp"; 899 case ATH10K_CAL_MODE_DT: 900 return "dt"; 901 case ATH10K_CAL_MODE_NVMEM: 902 return "nvmem"; 903 case ATH10K_PRE_CAL_MODE_FILE: 904 return "pre-cal-file"; 905 case ATH10K_PRE_CAL_MODE_DT: 906 return "pre-cal-dt"; 907 case ATH10K_PRE_CAL_MODE_NVMEM: 908 return "pre-cal-nvmem"; 909 case ATH10K_CAL_MODE_EEPROM: 910 return "eeprom"; 911 } 912 913 return "unknown"; 914 } 915 916 enum ath10k_scan_state { 917 ATH10K_SCAN_IDLE, 918 ATH10K_SCAN_STARTING, 919 ATH10K_SCAN_RUNNING, 920 ATH10K_SCAN_ABORTING, 921 }; 922 923 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 924 { 925 switch (state) { 926 case ATH10K_SCAN_IDLE: 927 return "idle"; 928 case ATH10K_SCAN_STARTING: 929 return "starting"; 930 case ATH10K_SCAN_RUNNING: 931 return "running"; 932 case ATH10K_SCAN_ABORTING: 933 return "aborting"; 934 } 935 936 return "unknown"; 937 } 938 939 enum ath10k_tx_pause_reason { 940 ATH10K_TX_PAUSE_Q_FULL, 941 ATH10K_TX_PAUSE_MAX, 942 }; 943 944 struct ath10k_fw_file { 945 const struct firmware *firmware; 946 947 char fw_version[ETHTOOL_FWVERS_LEN]; 948 949 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 950 951 enum ath10k_fw_wmi_op_version wmi_op_version; 952 enum ath10k_fw_htt_op_version htt_op_version; 953 954 const void *firmware_data; 955 size_t firmware_len; 956 957 const void *otp_data; 958 size_t otp_len; 959 960 const void *codeswap_data; 961 size_t codeswap_len; 962 963 /* The original idea of struct ath10k_fw_file was that it only 964 * contains struct firmware and pointers to various parts (actual 965 * firmware binary, otp, metadata etc) of the file. This seg_info 966 * is actually created separate but as this is used similarly as 967 * the other firmware components it's more convenient to have it 968 * here. 969 */ 970 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 971 }; 972 973 struct ath10k_fw_components { 974 const struct firmware *board; 975 const void *board_data; 976 size_t board_len; 977 const struct firmware *ext_board; 978 const void *ext_board_data; 979 size_t ext_board_len; 980 981 struct ath10k_fw_file fw_file; 982 }; 983 984 struct ath10k_per_peer_tx_stats { 985 u32 succ_bytes; 986 u32 retry_bytes; 987 u32 failed_bytes; 988 u8 ratecode; 989 u8 flags; 990 u16 peer_id; 991 u16 succ_pkts; 992 u16 retry_pkts; 993 u16 failed_pkts; 994 u16 duration; 995 u32 reserved1; 996 u32 reserved2; 997 }; 998 999 enum ath10k_dev_type { 1000 ATH10K_DEV_TYPE_LL, 1001 ATH10K_DEV_TYPE_HL, 1002 }; 1003 1004 struct ath10k_bus_params { 1005 u32 chip_id; 1006 enum ath10k_dev_type dev_type; 1007 bool link_can_suspend; 1008 bool hl_msdu_ids; 1009 }; 1010 1011 struct ath10k { 1012 struct ath_common ath_common; 1013 struct ieee80211_hw *hw; 1014 struct ieee80211_ops *ops; 1015 struct device *dev; 1016 struct msa_region { 1017 dma_addr_t paddr; 1018 u32 mem_size; 1019 void *vaddr; 1020 } msa; 1021 u8 mac_addr[ETH_ALEN]; 1022 1023 enum ath10k_hw_rev hw_rev; 1024 u16 dev_id; 1025 u32 chip_id; 1026 u32 target_version; 1027 u8 fw_version_major; 1028 u32 fw_version_minor; 1029 u16 fw_version_release; 1030 u16 fw_version_build; 1031 u32 fw_stats_req_mask; 1032 u32 phy_capability; 1033 u32 hw_min_tx_power; 1034 u32 hw_max_tx_power; 1035 u32 hw_eeprom_rd; 1036 u32 ht_cap_info; 1037 u32 vht_cap_info; 1038 u32 vht_supp_mcs; 1039 u32 num_rf_chains; 1040 u32 max_spatial_stream; 1041 /* protected by conf_mutex */ 1042 u32 low_2ghz_chan; 1043 u32 high_2ghz_chan; 1044 u32 low_5ghz_chan; 1045 u32 high_5ghz_chan; 1046 bool ani_enabled; 1047 u32 sys_cap_info; 1048 1049 /* protected by data_lock */ 1050 bool hw_rfkill_on; 1051 1052 /* protected by conf_mutex */ 1053 u8 ps_state_enable; 1054 1055 bool nlo_enabled; 1056 bool p2p; 1057 1058 struct { 1059 enum ath10k_bus bus; 1060 const struct ath10k_hif_ops *ops; 1061 } hif; 1062 1063 struct completion target_suspend; 1064 struct completion driver_recovery; 1065 1066 const struct ath10k_hw_regs *regs; 1067 const struct ath10k_hw_ce_regs *hw_ce_regs; 1068 const struct ath10k_hw_values *hw_values; 1069 struct ath10k_bmi bmi; 1070 struct ath10k_wmi wmi; 1071 struct ath10k_htc htc; 1072 struct ath10k_htt htt; 1073 1074 struct ath10k_hw_params hw_params; 1075 1076 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 1077 struct ath10k_fw_components normal_mode_fw; 1078 1079 /* READ-ONLY images of the running firmware, which can be either 1080 * normal or UTF. Do not modify, release etc! 1081 */ 1082 const struct ath10k_fw_components *running_fw; 1083 1084 const char *board_name; 1085 1086 const struct firmware *pre_cal_file; 1087 const struct firmware *cal_file; 1088 1089 struct { 1090 u32 vendor; 1091 u32 device; 1092 u32 subsystem_vendor; 1093 u32 subsystem_device; 1094 1095 bool bmi_ids_valid; 1096 bool qmi_ids_valid; 1097 u32 qmi_board_id; 1098 u32 qmi_chip_id; 1099 u8 bmi_board_id; 1100 u8 bmi_eboard_id; 1101 u8 bmi_chip_id; 1102 bool ext_bid_supported; 1103 1104 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; 1105 } id; 1106 1107 int fw_api; 1108 int bd_api; 1109 enum ath10k_cal_mode cal_mode; 1110 1111 struct { 1112 struct completion started; 1113 struct completion completed; 1114 struct completion on_channel; 1115 struct delayed_work timeout; 1116 enum ath10k_scan_state state; 1117 bool is_roc; 1118 int vdev_id; 1119 int roc_freq; 1120 bool roc_notify; 1121 } scan; 1122 1123 struct { 1124 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 1125 } mac; 1126 1127 /* should never be NULL; needed for regular htt rx */ 1128 struct ieee80211_channel *rx_channel; 1129 1130 /* valid during scan; needed for mgmt rx during scan */ 1131 struct ieee80211_channel *scan_channel; 1132 1133 /* current operating channel definition */ 1134 struct cfg80211_chan_def chandef; 1135 1136 /* currently configured operating channel in firmware */ 1137 struct ieee80211_channel *tgt_oper_chan; 1138 1139 unsigned long long free_vdev_map; 1140 struct ath10k_vif *monitor_arvif; 1141 bool monitor; 1142 int monitor_vdev_id; 1143 bool monitor_started; 1144 unsigned int filter_flags; 1145 unsigned long dev_flags; 1146 bool dfs_block_radar_events; 1147 1148 /* protected by conf_mutex */ 1149 bool radar_enabled; 1150 int num_started_vdevs; 1151 1152 /* Protected by conf-mutex */ 1153 u8 cfg_tx_chainmask; 1154 u8 cfg_rx_chainmask; 1155 1156 struct completion install_key_done; 1157 1158 int last_wmi_vdev_start_status; 1159 struct completion vdev_setup_done; 1160 struct completion vdev_delete_done; 1161 struct completion peer_stats_info_complete; 1162 1163 struct workqueue_struct *workqueue; 1164 /* Auxiliary workqueue */ 1165 struct workqueue_struct *workqueue_aux; 1166 struct workqueue_struct *workqueue_tx_complete; 1167 /* prevents concurrent FW reconfiguration */ 1168 struct mutex conf_mutex; 1169 1170 /* protects coredump data */ 1171 struct mutex dump_mutex; 1172 1173 /* protects shared structure data */ 1174 spinlock_t data_lock; 1175 1176 /* serialize wake_tx_queue calls per ac */ 1177 spinlock_t queue_lock[IEEE80211_NUM_ACS]; 1178 1179 struct list_head arvifs; 1180 struct list_head peers; 1181 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 1182 wait_queue_head_t peer_mapping_wq; 1183 1184 /* protected by conf_mutex */ 1185 int num_peers; 1186 int num_stations; 1187 1188 int max_num_peers; 1189 int max_num_stations; 1190 int max_num_vdevs; 1191 int max_num_tdls_vdevs; 1192 int num_active_peers; 1193 int num_tids; 1194 1195 struct work_struct svc_rdy_work; 1196 struct sk_buff *svc_rdy_skb; 1197 1198 struct work_struct offchan_tx_work; 1199 struct sk_buff_head offchan_tx_queue; 1200 struct completion offchan_tx_completed; 1201 struct sk_buff *offchan_tx_skb; 1202 1203 struct work_struct wmi_mgmt_tx_work; 1204 struct sk_buff_head wmi_mgmt_tx_queue; 1205 1206 enum ath10k_state state; 1207 1208 struct work_struct register_work; 1209 struct work_struct restart_work; 1210 struct work_struct recovery_check_work; 1211 struct work_struct bundle_tx_work; 1212 struct work_struct tx_complete_work; 1213 1214 atomic_t pending_recovery; 1215 unsigned int recovery_count; 1216 /* continuous recovery fail count */ 1217 atomic_t fail_cont_count; 1218 1219 /* cycle count is reported twice for each visited channel during scan. 1220 * access protected by data_lock 1221 */ 1222 u32 survey_last_rx_clear_count; 1223 u32 survey_last_cycle_count; 1224 struct survey_info survey[ATH10K_NUM_CHANS]; 1225 1226 /* Channel info events are expected to come in pairs without and with 1227 * COMPLETE flag set respectively for each channel visit during scan. 1228 * 1229 * However there are deviations from this rule. This flag is used to 1230 * avoid reporting garbage data. 1231 */ 1232 bool ch_info_can_report_survey; 1233 struct completion bss_survey_done; 1234 1235 struct dfs_pattern_detector *dfs_detector; 1236 1237 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 1238 1239 #ifdef CONFIG_ATH10K_DEBUGFS 1240 struct ath10k_debug debug; 1241 struct { 1242 /* relay(fs) channel for spectral scan */ 1243 struct rchan *rfs_chan_spec_scan; 1244 1245 /* spectral_mode and spec_config are protected by conf_mutex */ 1246 enum ath10k_spectral_mode mode; 1247 struct ath10k_spec_scan config; 1248 } spectral; 1249 #endif 1250 1251 u32 pktlog_filter; 1252 1253 #ifdef CONFIG_DEV_COREDUMP 1254 struct { 1255 struct ath10k_fw_crash_data *fw_crash_data; 1256 } coredump; 1257 #endif 1258 1259 struct { 1260 /* protected by conf_mutex */ 1261 struct ath10k_fw_components utf_mode_fw; 1262 u8 ftm_msgref; 1263 1264 /* protected by data_lock */ 1265 bool utf_monitor; 1266 u32 data_pos; 1267 u32 expected_seq; 1268 u8 *eventdata; 1269 } testmode; 1270 1271 struct { 1272 struct gpio_led wifi_led; 1273 struct led_classdev cdev; 1274 char label[48]; 1275 u32 gpio_state_pin; 1276 } leds; 1277 1278 struct { 1279 /* protected by data_lock */ 1280 u32 rx_crc_err_drop; 1281 u32 fw_crash_counter; 1282 u32 fw_warm_reset_counter; 1283 u32 fw_cold_reset_counter; 1284 } stats; 1285 1286 struct ath10k_thermal thermal; 1287 struct ath10k_wow wow; 1288 struct ath10k_per_peer_tx_stats peer_tx_stats; 1289 1290 /* NAPI */ 1291 struct net_device *napi_dev; 1292 struct napi_struct napi; 1293 1294 struct work_struct set_coverage_class_work; 1295 /* protected by conf_mutex */ 1296 struct { 1297 /* writing also protected by data_lock */ 1298 s16 coverage_class; 1299 1300 u32 reg_phyclk; 1301 u32 reg_slottime_conf; 1302 u32 reg_slottime_orig; 1303 u32 reg_ack_cts_timeout_conf; 1304 u32 reg_ack_cts_timeout_orig; 1305 } fw_coverage; 1306 1307 u32 ampdu_reference; 1308 1309 const u8 *wmi_key_cipher; 1310 void *ce_priv; 1311 1312 u32 sta_tid_stats_mask; 1313 1314 /* protected by data_lock */ 1315 enum ath10k_radar_confirmation_state radar_conf_state; 1316 struct ath10k_radar_found_info last_radar_info; 1317 struct work_struct radar_confirmation_work; 1318 struct ath10k_bus_params bus_param; 1319 struct completion peer_delete_done; 1320 1321 bool coex_support; 1322 int coex_gpio_pin; 1323 1324 s32 tx_power_2g_limit; 1325 s32 tx_power_5g_limit; 1326 1327 /* must be last */ 1328 u8 drv_priv[] __aligned(sizeof(void *)); 1329 }; 1330 1331 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 1332 { 1333 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 1334 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 1335 return true; 1336 1337 return false; 1338 } 1339 1340 extern unsigned int ath10k_frame_mode; 1341 extern unsigned long ath10k_coredump_mask; 1342 1343 void ath10k_core_napi_sync_disable(struct ath10k *ar); 1344 void ath10k_core_napi_enable(struct ath10k *ar); 1345 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1346 enum ath10k_bus bus, 1347 enum ath10k_hw_rev hw_rev, 1348 const struct ath10k_hif_ops *hif_ops); 1349 void ath10k_core_destroy(struct ath10k *ar); 1350 void ath10k_core_get_fw_features_str(struct ath10k *ar, 1351 char *buf, 1352 size_t max_len); 1353 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1354 struct ath10k_fw_file *fw_file); 1355 1356 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1357 const struct ath10k_fw_components *fw_components); 1358 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 1359 void ath10k_core_stop(struct ath10k *ar); 1360 void ath10k_core_start_recovery(struct ath10k *ar); 1361 int ath10k_core_register(struct ath10k *ar, 1362 const struct ath10k_bus_params *bus_params); 1363 void ath10k_core_unregister(struct ath10k *ar); 1364 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type); 1365 int ath10k_core_check_dt(struct ath10k *ar); 1366 void ath10k_core_free_board_files(struct ath10k *ar); 1367 1368 #endif /* _CORE_H_ */ 1369