xref: /freebsd/sys/powerpc/ps3/platform_ps3.c (revision fdafd315ad0d0f28a11b9fb4476a9ab059c62b92)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2010 Nathan Whitehorn
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/kernel.h>
32 #include <sys/bus.h>
33 #include <sys/pcpu.h>
34 #include <sys/proc.h>
35 #include <sys/reboot.h>
36 #include <sys/smp.h>
37 
38 #include <vm/vm.h>
39 #include <vm/pmap.h>
40 
41 #include <machine/bus.h>
42 #include <machine/cpu.h>
43 #include <machine/hid.h>
44 #include <machine/platform.h>
45 #include <machine/platformvar.h>
46 #include <machine/smp.h>
47 #include <machine/spr.h>
48 #include <machine/vmparam.h>
49 
50 #include <dev/ofw/openfirm.h>
51 
52 #include "platform_if.h"
53 #include "ps3-hvcall.h"
54 
55 #ifdef SMP
56 extern void *ap_pcpu;
57 #endif
58 
59 static int ps3_probe(platform_t);
60 static int ps3_attach(platform_t);
61 static void ps3_mem_regions(platform_t, struct mem_region *phys, int *physsz,
62     struct mem_region *avail, int *availsz);
63 static vm_offset_t ps3_real_maxaddr(platform_t);
64 static u_long ps3_timebase_freq(platform_t, struct cpuref *cpuref);
65 #ifdef SMP
66 static int ps3_smp_first_cpu(platform_t, struct cpuref *cpuref);
67 static int ps3_smp_next_cpu(platform_t, struct cpuref *cpuref);
68 static int ps3_smp_get_bsp(platform_t, struct cpuref *cpuref);
69 static int ps3_smp_start_cpu(platform_t, struct pcpu *cpu);
70 static void ps3_smp_probe_threads(platform_t);
71 static struct cpu_group *ps3_smp_topo(platform_t);
72 #endif
73 static void ps3_reset(platform_t);
74 static void ps3_cpu_idle(sbintime_t);
75 
76 static platform_method_t ps3_methods[] = {
77 	PLATFORMMETHOD(platform_probe, 		ps3_probe),
78 	PLATFORMMETHOD(platform_attach,		ps3_attach),
79 	PLATFORMMETHOD(platform_mem_regions,	ps3_mem_regions),
80 	PLATFORMMETHOD(platform_real_maxaddr,	ps3_real_maxaddr),
81 	PLATFORMMETHOD(platform_timebase_freq,	ps3_timebase_freq),
82 
83 #ifdef SMP
84 	PLATFORMMETHOD(platform_smp_first_cpu,	ps3_smp_first_cpu),
85 	PLATFORMMETHOD(platform_smp_next_cpu,	ps3_smp_next_cpu),
86 	PLATFORMMETHOD(platform_smp_get_bsp,	ps3_smp_get_bsp),
87 	PLATFORMMETHOD(platform_smp_start_cpu,	ps3_smp_start_cpu),
88 	PLATFORMMETHOD(platform_smp_probe_threads,	ps3_smp_probe_threads),
89 	PLATFORMMETHOD(platform_smp_topo,	ps3_smp_topo),
90 #endif
91 
92 	PLATFORMMETHOD(platform_reset,		ps3_reset),
93 
94 	PLATFORMMETHOD_END
95 };
96 
97 static platform_def_t ps3_platform = {
98 	"ps3",
99 	ps3_methods,
100 	0
101 };
102 
103 PLATFORM_DEF(ps3_platform);
104 
105 static int ps3_boot_pir = 0;
106 
107 static int
ps3_probe(platform_t plat)108 ps3_probe(platform_t plat)
109 {
110 	phandle_t root;
111 	char compatible[64];
112 
113 	root = OF_finddevice("/");
114 	if (OF_getprop(root, "compatible", compatible, sizeof(compatible)) <= 0)
115                 return (BUS_PROBE_NOWILDCARD);
116 
117 	if (strncmp(compatible, "sony,ps3", sizeof(compatible)) != 0)
118 		return (BUS_PROBE_NOWILDCARD);
119 
120 	return (BUS_PROBE_SPECIFIC);
121 }
122 
123 static int
ps3_attach(platform_t plat)124 ps3_attach(platform_t plat)
125 {
126 
127 	pmap_mmu_install("mmu_ps3", BUS_PROBE_SPECIFIC);
128 	cpu_idle_hook = ps3_cpu_idle;
129 
130 	/* Record our PIR at boot for later */
131 	ps3_boot_pir = mfspr(SPR_PIR);
132 
133 	return (0);
134 }
135 
136 void
ps3_mem_regions(platform_t plat,struct mem_region * phys,int * physsz,struct mem_region * avail_regions,int * availsz)137 ps3_mem_regions(platform_t plat, struct mem_region *phys, int *physsz,
138     struct mem_region *avail_regions, int *availsz)
139 {
140 	uint64_t lpar_id, junk;
141 	int i;
142 
143 	/* Prefer device tree information if available */
144 	if (OF_finddevice("/") != -1) {
145 		ofw_mem_regions(phys, physsz, avail_regions, availsz);
146 	} else {
147 		/* Real mode memory region is first segment */
148 		phys[0].mr_start = 0;
149 		phys[0].mr_size = ps3_real_maxaddr(plat);
150 		*physsz = *availsz = 1;
151 		avail_regions[0] = phys[0];
152 	}
153 
154 	/* Now get extended memory region */
155 	lv1_get_logical_partition_id(&lpar_id);
156 	lv1_get_repository_node_value(lpar_id,
157 	    lv1_repository_string("bi") >> 32,
158 	    lv1_repository_string("rgntotal"), 0, 0,
159 	    &phys[*physsz].mr_size, &junk);
160 	for (i = 0; i < *physsz; i++)
161 		phys[*physsz].mr_size -= phys[i].mr_size;
162 
163 	/* Convert to maximum amount we can allocate in 16 MB pages */
164 	phys[*physsz].mr_size -= phys[*physsz].mr_size % (16*1024*1024);
165 
166 	/* Allocate extended memory region */
167 	lv1_allocate_memory(phys[*physsz].mr_size, 24 /* 16 MB pages */,
168 	    0, 0x04 /* any address */, &phys[*physsz].mr_start, &junk);
169 	avail_regions[*availsz] = phys[*physsz];
170 	(*physsz)++;
171 	(*availsz)++;
172 }
173 
174 static u_long
ps3_timebase_freq(platform_t plat,struct cpuref * cpuref)175 ps3_timebase_freq(platform_t plat, struct cpuref *cpuref)
176 {
177 	uint64_t ticks, node_id, junk;
178 
179 	lv1_get_repository_node_value(PS3_LPAR_ID_PME,
180 	    lv1_repository_string("be") >> 32, 0, 0, 0, &node_id, &junk);
181 	lv1_get_repository_node_value(PS3_LPAR_ID_PME,
182 	    lv1_repository_string("be") >> 32, node_id,
183 	    lv1_repository_string("clock"), 0, &ticks, &junk);
184 
185 	return (ticks);
186 }
187 
188 #ifdef SMP
189 static int
ps3_smp_first_cpu(platform_t plat,struct cpuref * cpuref)190 ps3_smp_first_cpu(platform_t plat, struct cpuref *cpuref)
191 {
192 
193 	cpuref->cr_cpuid = 0;
194 	cpuref->cr_hwref = ps3_boot_pir;
195 
196 	return (0);
197 }
198 
199 static int
ps3_smp_next_cpu(platform_t plat,struct cpuref * cpuref)200 ps3_smp_next_cpu(platform_t plat, struct cpuref *cpuref)
201 {
202 
203 	if (cpuref->cr_cpuid >= 1)
204 		return (ENOENT);
205 
206 	cpuref->cr_cpuid++;
207 	cpuref->cr_hwref = !ps3_boot_pir;
208 
209 	return (0);
210 }
211 
212 static int
ps3_smp_get_bsp(platform_t plat,struct cpuref * cpuref)213 ps3_smp_get_bsp(platform_t plat, struct cpuref *cpuref)
214 {
215 
216 	cpuref->cr_cpuid = 0;
217 	cpuref->cr_hwref = ps3_boot_pir;
218 
219 	return (0);
220 }
221 
222 static int
ps3_smp_start_cpu(platform_t plat,struct pcpu * pc)223 ps3_smp_start_cpu(platform_t plat, struct pcpu *pc)
224 {
225 	/* kernel is spinning on 0x40 == -1 right now */
226 	volatile uint32_t *secondary_spin_sem =
227 	    (uint32_t *)PHYS_TO_DMAP((uintptr_t)0x40);
228 	int remote_pir = pc->pc_hwref;
229 	int timeout;
230 
231 	ap_pcpu = pc;
232 
233 	/* Try both PIR values, looping a few times: the HV likes moving us */
234 	timeout = 10000;
235 	while (!pc->pc_awake && timeout--) {
236 		*secondary_spin_sem = remote_pir;
237 		powerpc_sync();
238 		DELAY(100);
239 		remote_pir = !remote_pir;
240 	}
241 
242 	return ((pc->pc_awake) ? 0 : EBUSY);
243 }
244 
245 static void
ps3_smp_probe_threads(platform_t plat)246 ps3_smp_probe_threads(platform_t plat)
247 {
248 	mp_ncores = 1;
249 	smp_threads_per_core = 2;
250 }
251 
252 static struct cpu_group *
ps3_smp_topo(platform_t plat)253 ps3_smp_topo(platform_t plat)
254 {
255 	return (smp_topo_1level(CG_SHARE_L1, 2, CG_FLAG_SMT));
256 }
257 #endif
258 
259 static void
ps3_reset(platform_t plat)260 ps3_reset(platform_t plat)
261 {
262 	lv1_panic(1);
263 }
264 
265 static vm_offset_t
ps3_real_maxaddr(platform_t plat)266 ps3_real_maxaddr(platform_t plat)
267 {
268 	uint64_t lpar_id, junk, ppe_id;
269 	static uint64_t rm_maxaddr = 0;
270 
271 	if (rm_maxaddr == 0) {
272 		/* Get real mode memory region */
273 		lv1_get_logical_partition_id(&lpar_id);
274 		lv1_get_logical_ppe_id(&ppe_id);
275 
276 		lv1_get_repository_node_value(lpar_id,
277 		    lv1_repository_string("bi") >> 32,
278 		    lv1_repository_string("pu"),
279 		    ppe_id, lv1_repository_string("rm_size"),
280 		    &rm_maxaddr, &junk);
281 	}
282 
283 	return (rm_maxaddr);
284 }
285 
286 static void
ps3_cpu_idle(sbintime_t sbt)287 ps3_cpu_idle(sbintime_t sbt)
288 {
289 	lv1_pause(0);
290 }
291