xref: /linux/drivers/gpu/drm/amd/display/dmub/dmub_srv.h (revision 2c1ed907520c50326b8f604907a8478b27881a2e)
1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef _DMUB_SRV_H_
27 #define _DMUB_SRV_H_
28 
29 /**
30  * DOC: DMUB interface and operation
31  *
32  * DMUB is the interface to the display DMCUB microcontroller on DCN hardware.
33  * It delegates hardware initialization and command submission to the
34  * microcontroller. DMUB is the shortname for DMCUB.
35  *
36  * This interface is not thread-safe. Ensure that all access to the interface
37  * is properly synchronized by the caller.
38  *
39  * Initialization and usage of the DMUB service should be done in the
40  * steps given below:
41  *
42  * 1. dmub_srv_create()
43  * 2. dmub_srv_has_hw_support()
44  * 3. dmub_srv_calc_region_info()
45  * 4. dmub_srv_hw_init()
46  *
47  * The call to dmub_srv_create() is required to use the server.
48  *
49  * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()
50  * are helpers to query cache window size and allocate framebuffer(s)
51  * for the cache windows.
52  *
53  * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare
54  * for command submission. Commands can be queued via dmub_srv_cmd_queue()
55  * and executed via dmub_srv_cmd_execute().
56  *
57  * If the queue is full the dmub_srv_wait_for_idle() call can be used to
58  * wait until the queue has been cleared.
59  *
60  * Destroying the DMUB service can be done by calling dmub_srv_destroy().
61  * This does not clear DMUB hardware state, only software state.
62  *
63  * The interface is intended to be standalone and should not depend on any
64  * other component within DAL.
65  */
66 
67 #include "inc/dmub_cmd.h"
68 #include "dc/dc_types.h"
69 
70 #define DMUB_PC_SNAPSHOT_COUNT 10
71 
72 /* Default tracebuffer size if meta is absent. */
73 #define DMUB_TRACE_BUFFER_SIZE (64 * 1024)
74 
75 /* Forward declarations */
76 struct dmub_srv;
77 struct dmub_srv_common_regs;
78 struct dmub_srv_dcn31_regs;
79 
80 struct dmcub_trace_buf_entry;
81 
82 /* enum dmub_window_memory_type - memory location type specification for windows */
83 enum dmub_window_memory_type {
84 	DMUB_WINDOW_MEMORY_TYPE_FB = 0,
85 	DMUB_WINDOW_MEMORY_TYPE_GART
86 };
87 
88 /* enum dmub_status - return code for dmcub functions */
89 enum dmub_status {
90 	DMUB_STATUS_OK = 0,
91 	DMUB_STATUS_NO_CTX,
92 	DMUB_STATUS_QUEUE_FULL,
93 	DMUB_STATUS_TIMEOUT,
94 	DMUB_STATUS_INVALID,
95 	DMUB_STATUS_HW_FAILURE,
96 	DMUB_STATUS_POWER_STATE_D3
97 };
98 
99 /* enum dmub_asic - dmub asic identifier */
100 enum dmub_asic {
101 	DMUB_ASIC_NONE = 0,
102 	DMUB_ASIC_DCN20,
103 	DMUB_ASIC_DCN21,
104 	DMUB_ASIC_DCN30,
105 	DMUB_ASIC_DCN301,
106 	DMUB_ASIC_DCN302,
107 	DMUB_ASIC_DCN303,
108 	DMUB_ASIC_DCN31,
109 	DMUB_ASIC_DCN31B,
110 	DMUB_ASIC_DCN314,
111 	DMUB_ASIC_DCN315,
112 	DMUB_ASIC_DCN316,
113 	DMUB_ASIC_DCN32,
114 	DMUB_ASIC_DCN321,
115 	DMUB_ASIC_DCN35,
116 	DMUB_ASIC_DCN351,
117 	DMUB_ASIC_DCN401,
118 	DMUB_ASIC_MAX,
119 };
120 
121 /* enum dmub_window_id - dmub window identifier */
122 enum dmub_window_id {
123 	DMUB_WINDOW_0_INST_CONST = 0,
124 	DMUB_WINDOW_1_STACK,
125 	DMUB_WINDOW_2_BSS_DATA,
126 	DMUB_WINDOW_3_VBIOS,
127 	DMUB_WINDOW_4_MAILBOX,
128 	DMUB_WINDOW_5_TRACEBUFF,
129 	DMUB_WINDOW_6_FW_STATE,
130 	DMUB_WINDOW_7_SCRATCH_MEM,
131 	DMUB_WINDOW_SHARED_STATE,
132 	DMUB_WINDOW_TOTAL,
133 };
134 
135 /* enum dmub_notification_type - dmub outbox notification identifier */
136 enum dmub_notification_type {
137 	DMUB_NOTIFICATION_NO_DATA = 0,
138 	DMUB_NOTIFICATION_AUX_REPLY,
139 	DMUB_NOTIFICATION_HPD,
140 	DMUB_NOTIFICATION_HPD_IRQ,
141 	DMUB_NOTIFICATION_SET_CONFIG_REPLY,
142 	DMUB_NOTIFICATION_DPIA_NOTIFICATION,
143 	DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,
144 	DMUB_NOTIFICATION_MAX
145 };
146 
147 /**
148  * DPIA NOTIFICATION Response Type
149  */
150 enum dpia_notify_bw_alloc_status {
151 
152 	DPIA_BW_REQ_FAILED = 0,
153 	DPIA_BW_REQ_SUCCESS,
154 	DPIA_EST_BW_CHANGED,
155 	DPIA_BW_ALLOC_CAPS_CHANGED
156 };
157 
158 /* enum dmub_memory_access_type - memory access method */
159 enum dmub_memory_access_type {
160 	DMUB_MEMORY_ACCESS_DEFAULT,
161 	DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,
162 	DMUB_MEMORY_ACCESS_DMA
163 };
164 
165 /* enum dmub_power_state type - to track DC power state in dmub_srv */
166 enum dmub_srv_power_state_type {
167 	DMUB_POWER_STATE_UNDEFINED = 0,
168 	DMUB_POWER_STATE_D0 = 1,
169 	DMUB_POWER_STATE_D3 = 8
170 };
171 
172 /**
173  * struct dmub_region - dmub hw memory region
174  * @base: base address for region, must be 256 byte aligned
175  * @top: top address for region
176  */
177 struct dmub_region {
178 	uint32_t base;
179 	uint32_t top;
180 };
181 
182 /**
183  * struct dmub_window - dmub hw cache window
184  * @off: offset to the fb memory in gpu address space
185  * @r: region in uc address space for cache window
186  */
187 struct dmub_window {
188 	union dmub_addr offset;
189 	struct dmub_region region;
190 };
191 
192 /**
193  * struct dmub_fb - defines a dmub framebuffer memory region
194  * @cpu_addr: cpu virtual address for the region, NULL if invalid
195  * @gpu_addr: gpu virtual address for the region, NULL if invalid
196  * @size: size of the region in bytes, zero if invalid
197  */
198 struct dmub_fb {
199 	void *cpu_addr;
200 	uint64_t gpu_addr;
201 	uint32_t size;
202 };
203 
204 /**
205  * struct dmub_srv_region_params - params used for calculating dmub regions
206  * @inst_const_size: size of the fw inst const section
207  * @bss_data_size: size of the fw bss data section
208  * @vbios_size: size of the vbios data
209  * @fw_bss_data: raw firmware bss data section
210  */
211 struct dmub_srv_region_params {
212 	uint32_t inst_const_size;
213 	uint32_t bss_data_size;
214 	uint32_t vbios_size;
215 	const uint8_t *fw_inst_const;
216 	const uint8_t *fw_bss_data;
217 	const enum dmub_window_memory_type *window_memory_type;
218 };
219 
220 /**
221  * struct dmub_srv_region_info - output region info from the dmub service
222  * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes
223  * @num_regions: number of regions used by the dmub service
224  * @regions: region info
225  *
226  * The regions are aligned such that they can be all placed within the
227  * same framebuffer but they can also be placed into different framebuffers.
228  *
229  * The size of each region can be calculated by the caller:
230  * size = reg.top - reg.base
231  *
232  * Care must be taken when performing custom allocations to ensure that each
233  * region base address is 256 byte aligned.
234  */
235 struct dmub_srv_region_info {
236 	uint32_t fb_size;
237 	uint32_t gart_size;
238 	uint8_t num_regions;
239 	struct dmub_region regions[DMUB_WINDOW_TOTAL];
240 };
241 
242 /**
243  * struct dmub_srv_memory_params - parameters used for driver fb setup
244  * @region_info: region info calculated by dmub service
245  * @cpu_fb_addr: base cpu address for the framebuffer
246  * @cpu_inbox_addr: base cpu address for the gart
247  * @gpu_fb_addr: base gpu virtual address for the framebuffer
248  * @gpu_inbox_addr: base gpu virtual address for the gart
249  */
250 struct dmub_srv_memory_params {
251 	const struct dmub_srv_region_info *region_info;
252 	void *cpu_fb_addr;
253 	void *cpu_gart_addr;
254 	uint64_t gpu_fb_addr;
255 	uint64_t gpu_gart_addr;
256 	const enum dmub_window_memory_type *window_memory_type;
257 };
258 
259 /**
260  * struct dmub_srv_fb_info - output fb info from the dmub service
261  * @num_fbs: number of required dmub framebuffers
262  * @fbs: fb data for each region
263  *
264  * Output from the dmub service helper that can be used by the
265  * driver to prepare dmub_fb that can be passed into the dmub
266  * hw init service.
267  *
268  * Assumes that all regions are within the same framebuffer
269  * and have been setup according to the region_info generated
270  * by the dmub service.
271  */
272 struct dmub_srv_fb_info {
273 	uint8_t num_fb;
274 	struct dmub_fb fb[DMUB_WINDOW_TOTAL];
275 };
276 
277 /*
278  * struct dmub_srv_hw_params - params for dmub hardware initialization
279  * @fb: framebuffer info for each region
280  * @fb_base: base of the framebuffer aperture
281  * @fb_offset: offset of the framebuffer aperture
282  * @psp_version: psp version to pass for DMCU init
283  * @load_inst_const: true if DMUB should load inst const fw
284  */
285 struct dmub_srv_hw_params {
286 	struct dmub_fb *fb[DMUB_WINDOW_TOTAL];
287 	uint64_t fb_base;
288 	uint64_t fb_offset;
289 	uint32_t psp_version;
290 	bool load_inst_const;
291 	bool skip_panel_power_sequence;
292 	bool disable_z10;
293 	bool power_optimization;
294 	bool dpia_supported;
295 	bool disable_dpia;
296 	bool usb4_cm_version;
297 	bool fw_in_system_memory;
298 	bool dpia_hpd_int_enable_supported;
299 	bool disable_clock_gate;
300 	bool disallow_dispclk_dppclk_ds;
301 	bool ips_sequential_ono;
302 	enum dmub_memory_access_type mem_access_type;
303 	enum dmub_ips_disable_type disable_ips;
304 	bool disallow_phy_access;
305 	bool disable_sldo_opt;
306 	bool enable_non_transparent_setconfig;
307 	bool lower_hbr3_phy_ssc;
308 };
309 
310 /**
311  * struct dmub_srv_debug - Debug info for dmub_srv
312  * @timeout_occured: Indicates a timeout occured on any message from driver to dmub
313  * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored
314  */
315 struct dmub_srv_debug {
316 	bool timeout_occured;
317 	union dmub_rb_cmd timeout_cmd;
318 	unsigned long long timestamp;
319 };
320 
321 /**
322  * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for
323  * debugging purposes, including logging, crash analysis, etc.
324  */
325 struct dmub_diagnostic_data {
326 	uint32_t dmcub_version;
327 	uint32_t scratch[17];
328 	uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];
329 	uint32_t undefined_address_fault_addr;
330 	uint32_t inst_fetch_fault_addr;
331 	uint32_t data_write_fault_addr;
332 	uint32_t inbox1_rptr;
333 	uint32_t inbox1_wptr;
334 	uint32_t inbox1_size;
335 	uint32_t inbox0_rptr;
336 	uint32_t inbox0_wptr;
337 	uint32_t inbox0_size;
338 	uint32_t outbox1_rptr;
339 	uint32_t outbox1_wptr;
340 	uint32_t outbox1_size;
341 	uint32_t gpint_datain0;
342 	struct dmub_srv_debug timeout_info;
343 	uint8_t is_dmcub_enabled : 1;
344 	uint8_t is_dmcub_soft_reset : 1;
345 	uint8_t is_dmcub_secure_reset : 1;
346 	uint8_t is_traceport_en : 1;
347 	uint8_t is_cw0_enabled : 1;
348 	uint8_t is_cw6_enabled : 1;
349 };
350 
351 /**
352  * struct dmub_srv_base_funcs - Driver specific base callbacks
353  */
354 struct dmub_srv_base_funcs {
355 	/**
356 	 * @reg_read:
357 	 *
358 	 * Hook for reading a register.
359 	 *
360 	 * Return: The 32-bit register value from the given address.
361 	 */
362 	uint32_t (*reg_read)(void *ctx, uint32_t address);
363 
364 	/**
365 	 * @reg_write:
366 	 *
367 	 * Hook for writing a value to the register specified by address.
368 	 */
369 	void (*reg_write)(void *ctx, uint32_t address, uint32_t value);
370 };
371 
372 /**
373  * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub
374  */
375 struct dmub_srv_hw_funcs {
376 	/* private: internal use only */
377 
378 	void (*init)(struct dmub_srv *dmub);
379 
380 	void (*reset)(struct dmub_srv *dmub);
381 
382 	void (*reset_release)(struct dmub_srv *dmub);
383 
384 	void (*backdoor_load)(struct dmub_srv *dmub,
385 			      const struct dmub_window *cw0,
386 			      const struct dmub_window *cw1);
387 
388 	void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
389 			      const struct dmub_window *cw0,
390 			      const struct dmub_window *cw1);
391 	void (*setup_windows)(struct dmub_srv *dmub,
392 			      const struct dmub_window *cw2,
393 			      const struct dmub_window *cw3,
394 			      const struct dmub_window *cw4,
395 			      const struct dmub_window *cw5,
396 			      const struct dmub_window *cw6,
397 			      const struct dmub_window *region6);
398 
399 	void (*setup_mailbox)(struct dmub_srv *dmub,
400 			      const struct dmub_region *inbox1);
401 
402 	uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);
403 
404 	uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
405 
406 	void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
407 
408 	void (*setup_out_mailbox)(struct dmub_srv *dmub,
409 			      const struct dmub_region *outbox1);
410 
411 	uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);
412 
413 	void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
414 
415 	void (*setup_outbox0)(struct dmub_srv *dmub,
416 			      const struct dmub_region *outbox0);
417 
418 	uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);
419 
420 	void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
421 
422 	uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);
423 
424 	void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
425 
426 	bool (*is_supported)(struct dmub_srv *dmub);
427 
428 	bool (*is_psrsu_supported)(struct dmub_srv *dmub);
429 
430 	bool (*is_hw_init)(struct dmub_srv *dmub);
431 	bool (*is_hw_powered_up)(struct dmub_srv *dmub);
432 
433 	void (*enable_dmub_boot_options)(struct dmub_srv *dmub,
434 				const struct dmub_srv_hw_params *params);
435 
436 	void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
437 
438 	union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
439 
440 	union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);
441 
442 	void (*set_gpint)(struct dmub_srv *dmub,
443 			  union dmub_gpint_data_register reg);
444 
445 	bool (*is_gpint_acked)(struct dmub_srv *dmub,
446 			       union dmub_gpint_data_register reg);
447 
448 	uint32_t (*get_gpint_response)(struct dmub_srv *dmub);
449 
450 	uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);
451 
452 	void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);
453 	void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);
454 	uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);
455 	void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
456 	uint32_t (*get_current_time)(struct dmub_srv *dmub);
457 
458 	void (*get_diagnostic_data)(struct dmub_srv *dmub, struct dmub_diagnostic_data *dmub_oca);
459 
460 	bool (*should_detect)(struct dmub_srv *dmub);
461 	void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);
462 
463 	void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
464 	void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,
465 			union dmub_rb_cmd *cmd);
466 	uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);
467 	void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,
468 			union dmub_rb_cmd *cmd);
469 	void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);
470 	uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);
471 	void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);
472 	void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);
473 	void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);
474 	uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);
475 	void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);
476 	void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);
477 };
478 
479 /**
480  * struct dmub_srv_create_params - params for dmub service creation
481  * @base_funcs: driver supplied base routines
482  * @hw_funcs: optional overrides for hw funcs
483  * @user_ctx: context data for callback funcs
484  * @asic: driver supplied asic
485  * @fw_version: the current firmware version, if any
486  * @is_virtual: false for hw support only
487  */
488 struct dmub_srv_create_params {
489 	struct dmub_srv_base_funcs funcs;
490 	struct dmub_srv_hw_funcs *hw_funcs;
491 	void *user_ctx;
492 	enum dmub_asic asic;
493 	uint32_t fw_version;
494 	bool is_virtual;
495 };
496 
497 /**
498  * struct dmub_srv - software state for dmcub
499  * @asic: dmub asic identifier
500  * @user_ctx: user provided context for the dmub_srv
501  * @fw_version: the current firmware version, if any
502  * @is_virtual: false if hardware support only
503  * @shared_state: dmub shared state between firmware and driver
504  * @fw_state: dmub firmware state pointer
505  */
506 struct dmub_srv {
507 	enum dmub_asic asic;
508 	void *user_ctx;
509 	uint32_t fw_version;
510 	bool is_virtual;
511 	struct dmub_fb scratch_mem_fb;
512 	volatile struct dmub_shared_state_feature_block *shared_state;
513 	volatile const struct dmub_fw_state *fw_state;
514 
515 	/* private: internal use only */
516 	const struct dmub_srv_common_regs *regs;
517 	const struct dmub_srv_dcn31_regs *regs_dcn31;
518 	struct dmub_srv_dcn32_regs *regs_dcn32;
519 	struct dmub_srv_dcn35_regs *regs_dcn35;
520 	const struct dmub_srv_dcn401_regs *regs_dcn401;
521 
522 	struct dmub_srv_base_funcs funcs;
523 	struct dmub_srv_hw_funcs hw_funcs;
524 	struct dmub_rb inbox1_rb;
525 	uint32_t inbox1_last_wptr;
526 	/**
527 	 * outbox1_rb is accessed without locks (dal & dc)
528 	 * and to be used only in dmub_srv_stat_get_notification()
529 	 */
530 	struct dmub_rb outbox1_rb;
531 
532 	struct dmub_rb outbox0_rb;
533 
534 	bool sw_init;
535 	bool hw_init;
536 
537 	uint64_t fb_base;
538 	uint64_t fb_offset;
539 	uint32_t psp_version;
540 
541 	/* Feature capabilities reported by fw */
542 	struct dmub_fw_meta_info meta_info;
543 	struct dmub_feature_caps feature_caps;
544 	struct dmub_visual_confirm_color visual_confirm_color;
545 
546 	enum dmub_srv_power_state_type power_state;
547 	struct dmub_srv_debug debug;
548 };
549 
550 /**
551  * struct dmub_notification - dmub notification data
552  * @type: dmub notification type
553  * @link_index: link index to identify aux connection
554  * @result: USB4 status returned from dmub
555  * @pending_notification: Indicates there are other pending notifications
556  * @aux_reply: aux reply
557  * @hpd_status: hpd status
558  * @bw_alloc_reply: BW Allocation reply from CM/DPIA
559  */
560 struct dmub_notification {
561 	enum dmub_notification_type type;
562 	uint8_t link_index;
563 	uint8_t result;
564 	bool pending_notification;
565 	union {
566 		struct aux_reply_data aux_reply;
567 		enum dp_hpd_status hpd_status;
568 		enum set_config_status sc_status;
569 		/**
570 		 * DPIA notification command.
571 		 */
572 		struct dmub_rb_cmd_dpia_notification dpia_notification;
573 		struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;
574 	};
575 };
576 
577 /* enum dmub_ips_mode - IPS mode identifier */
578 enum dmub_ips_mode {
579 	DMUB_IPS_MODE_IPS1_MAX		= 0,
580 	DMUB_IPS_MODE_IPS2,
581 	DMUB_IPS_MODE_IPS1_RCG,
582 	DMUB_IPS_MODE_IPS1_ONO2_ON
583 };
584 
585 /**
586  * DMUB firmware version helper macro - useful for checking if the version
587  * of a firmware to know if feature or functionality is supported or present.
588  */
589 #define DMUB_FW_VERSION(major, minor, revision) \
590 	((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))
591 
592 /**
593  * dmub_srv_create() - creates the DMUB service.
594  * @dmub: the dmub service
595  * @params: creation parameters for the service
596  *
597  * Return:
598  *   DMUB_STATUS_OK - success
599  *   DMUB_STATUS_INVALID - unspecified error
600  */
601 enum dmub_status dmub_srv_create(struct dmub_srv *dmub,
602 				 const struct dmub_srv_create_params *params);
603 
604 /**
605  * dmub_srv_destroy() - destroys the DMUB service.
606  * @dmub: the dmub service
607  */
608 void dmub_srv_destroy(struct dmub_srv *dmub);
609 
610 /**
611  * dmub_srv_calc_region_info() - retreives region info from the dmub service
612  * @dmub: the dmub service
613  * @params: parameters used to calculate region locations
614  * @info_out: the output region info from dmub
615  *
616  * Calculates the base and top address for all relevant dmub regions
617  * using the parameters given (if any).
618  *
619  * Return:
620  *   DMUB_STATUS_OK - success
621  *   DMUB_STATUS_INVALID - unspecified error
622  */
623 enum dmub_status
624 dmub_srv_calc_region_info(struct dmub_srv *dmub,
625 			  const struct dmub_srv_region_params *params,
626 			  struct dmub_srv_region_info *out);
627 
628 /**
629  * dmub_srv_calc_region_info() - retreives fb info from the dmub service
630  * @dmub: the dmub service
631  * @params: parameters used to calculate fb locations
632  * @info_out: the output fb info from dmub
633  *
634  * Calculates the base and top address for all relevant dmub regions
635  * using the parameters given (if any).
636  *
637  * Return:
638  *   DMUB_STATUS_OK - success
639  *   DMUB_STATUS_INVALID - unspecified error
640  */
641 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
642 				       const struct dmub_srv_memory_params *params,
643 				       struct dmub_srv_fb_info *out);
644 
645 /**
646  * dmub_srv_has_hw_support() - returns hw support state for dmcub
647  * @dmub: the dmub service
648  * @is_supported: hw support state
649  *
650  * Queries the hardware for DMCUB support and returns the result.
651  *
652  * Can be called before dmub_srv_hw_init().
653  *
654  * Return:
655  *   DMUB_STATUS_OK - success
656  *   DMUB_STATUS_INVALID - unspecified error
657  */
658 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,
659 					 bool *is_supported);
660 
661 /**
662  * dmub_srv_is_hw_init() - returns hardware init state
663  *
664  * Return:
665  *   DMUB_STATUS_OK - success
666  *   DMUB_STATUS_INVALID - unspecified error
667  */
668 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);
669 
670 /**
671  * dmub_srv_hw_init() - initializes the underlying DMUB hardware
672  * @dmub: the dmub service
673  * @params: params for hardware initialization
674  *
675  * Resets the DMUB hardware and performs backdoor loading of the
676  * required cache regions based on the input framebuffer regions.
677  *
678  * Return:
679  *   DMUB_STATUS_OK - success
680  *   DMUB_STATUS_NO_CTX - dmcub context not initialized
681  *   DMUB_STATUS_INVALID - unspecified error
682  */
683 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,
684 				  const struct dmub_srv_hw_params *params);
685 
686 /**
687  * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized
688  * @dmub: the dmub service
689  *
690  * Before destroying the DMUB service or releasing the backing framebuffer
691  * memory we'll need to put the DMCUB into reset first.
692  *
693  * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.
694  *
695  * Return:
696  *   DMUB_STATUS_OK - success
697  *   DMUB_STATUS_INVALID - unspecified error
698  */
699 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);
700 
701 /**
702  * dmub_srv_sync_inbox1() - sync sw state with hw state
703  * @dmub: the dmub service
704  *
705  * Sync sw state with hw state when resume from S0i3
706  *
707  * Return:
708  *   DMUB_STATUS_OK - success
709  *   DMUB_STATUS_INVALID - unspecified error
710  */
711 enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub);
712 
713 /**
714  * dmub_srv_cmd_queue() - queues a command to the DMUB
715  * @dmub: the dmub service
716  * @cmd: the command to queue
717  *
718  * Queues a command to the DMUB service but does not begin execution
719  * immediately.
720  *
721  * Return:
722  *   DMUB_STATUS_OK - success
723  *   DMUB_STATUS_QUEUE_FULL - no remaining room in queue
724  *   DMUB_STATUS_INVALID - unspecified error
725  */
726 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,
727 				    const union dmub_rb_cmd *cmd);
728 
729 /**
730  * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub
731  * @dmub: the dmub service
732  *
733  * Begins execution of queued commands on the dmub.
734  *
735  * Return:
736  *   DMUB_STATUS_OK - success
737  *   DMUB_STATUS_INVALID - unspecified error
738  */
739 enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub);
740 
741 /**
742  * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed
743  * @dmub: the dmub service
744  * @timeout_us: the maximum number of microseconds to wait
745  *
746  * Waits until firmware hardware is powered up. The maximum
747  * wait time is given in microseconds to prevent spinning forever.
748  *
749  * Return:
750  *   DMUB_STATUS_OK - success
751  *   DMUB_STATUS_TIMEOUT - timed out
752  *   DMUB_STATUS_INVALID - unspecified error
753  */
754 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,
755 					     uint32_t timeout_us);
756 
757 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);
758 
759 /**
760  * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete
761  * @dmub: the dmub service
762  * @timeout_us: the maximum number of microseconds to wait
763  *
764  * Waits until firmware has been autoloaded by the DMCUB. The maximum
765  * wait time is given in microseconds to prevent spinning forever.
766  *
767  * On ASICs without firmware autoload support this function will return
768  * immediately.
769  *
770  * Return:
771  *   DMUB_STATUS_OK - success
772  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
773  *   DMUB_STATUS_INVALID - unspecified error
774  */
775 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,
776 					     uint32_t timeout_us);
777 
778 /**
779  * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete
780  * @dmub: the dmub service
781  * @timeout_us: the maximum number of microseconds to wait
782  *
783  * Waits until the PHY has been initialized by the DMUB. The maximum
784  * wait time is given in microseconds to prevent spinning forever.
785  *
786  * On ASICs without PHY init support this function will return
787  * immediately.
788  *
789  * Return:
790  *   DMUB_STATUS_OK - success
791  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
792  *   DMUB_STATUS_INVALID - unspecified error
793  */
794 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,
795 					    uint32_t timeout_us);
796 
797 /**
798  * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle
799  * @dmub: the dmub service
800  * @timeout_us: the maximum number of microseconds to wait
801  *
802  * Waits until the DMUB buffer is empty and all commands have
803  * finished processing. The maximum wait time is given in
804  * microseconds to prevent spinning forever.
805  *
806  * Return:
807  *   DMUB_STATUS_OK - success
808  *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
809  *   DMUB_STATUS_INVALID - unspecified error
810  */
811 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,
812 					uint32_t timeout_us);
813 
814 /**
815  * dmub_srv_send_gpint_command() - Sends a GPINT based command.
816  * @dmub: the dmub service
817  * @command_code: the command code to send
818  * @param: the command parameter to send
819  * @timeout_us: the maximum number of microseconds to wait
820  *
821  * Sends a command via the general purpose interrupt (GPINT).
822  * Waits for the number of microseconds specified by timeout_us
823  * for the command ACK before returning.
824  *
825  * Can be called after software initialization.
826  *
827  * Return:
828  *   DMUB_STATUS_OK - success
829  *   DMUB_STATUS_TIMEOUT - wait for ACK timed out
830  *   DMUB_STATUS_INVALID - unspecified error
831  */
832 enum dmub_status
833 dmub_srv_send_gpint_command(struct dmub_srv *dmub,
834 			    enum dmub_gpint_command command_code,
835 			    uint16_t param, uint32_t timeout_us);
836 
837 /**
838  * dmub_srv_get_gpint_response() - Queries the GPINT response.
839  * @dmub: the dmub service
840  * @response: the response for the last GPINT
841  *
842  * Returns the response code for the last GPINT interrupt.
843  *
844  * Can be called after software initialization.
845  *
846  * Return:
847  *   DMUB_STATUS_OK - success
848  *   DMUB_STATUS_INVALID - unspecified error
849  */
850 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,
851 					     uint32_t *response);
852 
853 /**
854  * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.
855  * @dmub: the dmub service
856  * @dataout: the data for the GPINT DATAOUT
857  *
858  * Returns the response code for the last GPINT DATAOUT interrupt.
859  *
860  * Can be called after software initialization.
861  *
862  * Return:
863  *   DMUB_STATUS_OK - success
864  *   DMUB_STATUS_INVALID - unspecified error
865  */
866 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,
867 					     uint32_t *dataout);
868 
869 /**
870  * dmub_flush_buffer_mem() - Read back entire frame buffer region.
871  * This ensures that the write from x86 has been flushed and will not
872  * hang the DMCUB.
873  * @fb: frame buffer to flush
874  *
875  * Can be called after software initialization.
876  */
877 void dmub_flush_buffer_mem(const struct dmub_fb *fb);
878 
879 /**
880  * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
881  *
882  * @dmub: the dmub service
883  * @status: out pointer for firmware status
884  *
885  * Return:
886  *   DMUB_STATUS_OK - success
887  *   DMUB_STATUS_INVALID - unspecified error, unsupported
888  */
889 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
890 					     union dmub_fw_boot_status *status);
891 
892 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,
893 					     union dmub_fw_boot_options *option);
894 
895 enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,
896 					      union dmub_rb_cmd *cmd);
897 
898 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
899 					     bool skip);
900 
901 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);
902 
903 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data);
904 
905 bool dmub_srv_should_detect(struct dmub_srv *dmub);
906 
907 /**
908  * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0
909  * @dmub: the dmub service
910  * @data: the data to be sent in the INBOX0 command
911  *
912  * Send command by writing directly to INBOX0 WPTR
913  *
914  * Return:
915  *   DMUB_STATUS_OK - success
916  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
917  */
918 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
919 
920 /**
921  * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command
922  * @dmub: the dmub service
923  * @timeout_us: the maximum number of microseconds to wait
924  *
925  * Wait for DMUB to ACK the INBOX0 message
926  *
927  * Return:
928  *   DMUB_STATUS_OK - success
929  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
930  *   DMUB_STATUS_TIMEOUT - wait for ack timed out
931  */
932 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);
933 
934 /**
935  * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0
936  * @dmub: the dmub service
937  *
938  * Clear ACK register for INBOX0
939  *
940  * Return:
941  *   DMUB_STATUS_OK - success
942  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
943  */
944 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);
945 
946 /**
947  * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip
948  * @dmub: The dmub service
949  * @addr: The surface address to be programmed on the current flip
950  * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for
951  *
952  * Function to save the surface flip addr into scratch registers. This is to fix a race condition
953  * between FW and driver reading / writing to the surface address at the same time. This is
954  * required because there is no EARLIEST_IN_USE_META.
955  *
956  * Return:
957  *   void
958  */
959 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
960 
961 /**
962  * dmub_srv_send_reg_inbox0_cmd() - send a dmub command and wait for the command
963  * being processed by DMUB.
964  * @dmub: The dmub service
965  * @cmd: The dmub command being sent. If with_replay is true, the function will
966  * update cmd with replied data.
967  * @with_reply: true if DMUB reply needs to be copied back to cmd. false if the
968  * cmd doesn't need to be replied.
969  * @timeout_us: timeout in microseconds.
970  *
971  * Return:
972  * DMUB_STATUS_OK - success
973  * DMUB_STATUS_TIMEOUT - DMUB fails to process the command within the timeout
974  * interval.
975  */
976 enum dmub_status dmub_srv_send_reg_inbox0_cmd(
977 		struct dmub_srv *dmub,
978 		union dmub_rb_cmd *cmd,
979 		bool with_reply, uint32_t timeout_us);
980 
981 /**
982  * dmub_srv_set_power_state() - Track DC power state in dmub_srv
983  * @dmub: The dmub service
984  * @power_state: DC power state setting
985  *
986  * Store DC power state in dmub_srv.  If dmub_srv is in D3, then don't send messages to DMUB
987  *
988  * Return:
989  *   void
990  */
991 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);
992 
993 #endif /* _DMUB_SRV_H_ */
994