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Searched defs:regs (Results 1 – 25 of 118) sorted by relevance

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/titanic_50/usr/src/uts/sparc/v7/sys/
H A Dprivregs.h55 struct regs { struct
60 long r_g1; /* user global regs */ argument
61 long r_g2;
62 long r_g3;
63 long r_g4;
64 long r_g5;
65 long r_g6;
66 long r_g7;
67 long r_o0;
68 long r_o1;
[all …]
/titanic_50/usr/src/uts/intel/amd64/sys/
H A Dprivregs.h53 struct regs { struct
58 greg_t r_savfp; /* a copy of %rbp */
59 greg_t r_savpc; /* a copy of %rip */
61 greg_t r_rdi; /* 1st arg to function */
62 greg_t r_rsi; /* 2nd arg to function */
63 greg_t r_rdx; /* 3rd arg to function, 2nd return register */
64 greg_t r_rcx; /* 4th arg to function */
66 greg_t r_r8; /* 5th arg to function */
67 greg_t r_r9; /* 6th arg to function */
68 greg_t r_rax; /* 1st return register, # SSE registers */
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/titanic_50/usr/src/uts/intel/ia32/sys/
H A Dprivregs.h53 struct regs { struct
58 greg_t r_savfp; /* a copy of %ebp */
59 greg_t r_savpc; /* a copy of %eip */
61 greg_t r_gs;
62 greg_t r_fs;
63 greg_t r_es;
64 greg_t r_ds;
65 greg_t r_edi;
89 #define GREG_NUM 8 /* Number of regs between %edi and %eax */ argument
/titanic_50/usr/src/uts/sparc/v9/sys/
H A Dprivregs.h47 struct regs { struct
49 long long r_g1; /* user global regs */ argument
50 long long r_g2;
51 long long r_g3;
52 long long r_g4;
53 long long r_g5;
54 long long r_g6;
55 long long r_g7;
79 #define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs)) argument
/titanic_50/usr/src/uts/common/io/rtw/
H A Drtwphyio.c52 rtw_bbp_read(struct rtw_regs *regs, uint_t addr) in rtw_bbp_read()
62 rtw_bbp_write(struct rtw_regs *regs, uint_t addr, uint_t val) in rtw_bbp_write()
104 rtw_rf_hostbangbits(struct rtw_regs *regs, uint32_t bits, int lo_to_hi, in rtw_rf_hostbangbits()
159 rtw_rf_macbangbits(struct rtw_regs *regs, uint32_t reg) in rtw_rf_macbangbits()
236 rtw_rf_hostwrite(struct rtw_regs *regs, enum rtw_rfchipid rfchipid, in rtw_rf_hostwrite()
298 rtw_rf_macwrite(struct rtw_regs *regs, enum rtw_rfchipid rfchipid, in rtw_rf_macwrite()
H A Drtw.c252 rtw_print_regs(struct rtw_regs *regs, const char *dvname, const char *where) in rtw_print_regs()
377 rtw_config0123_enable(struct rtw_regs *regs, int enable) in rtw_config0123_enable()
396 rtw_anaparm_enable(struct rtw_regs *regs, int enable) in rtw_anaparm_enable()
417 struct rtw_regs *regs = &rsc->sc_regs; in rtw_txdac_enable() local
429 rtw_set_access1(struct rtw_regs *regs, enum rtw_access naccess) in rtw_set_access1()
479 rtw_set_access(struct rtw_regs *regs, enum rtw_access access) in rtw_set_access()
493 struct rtw_regs *regs = &rsc->sc_regs; in rtw_continuous_tx_enable() local
511 rtw_chip_reset1(struct rtw_regs *regs, const char *dvname) in rtw_chip_reset1()
536 rtw_chip_reset(struct rtw_regs *regs, const char *dvname) in rtw_chip_reset()
543 rtw_disable_interrupts(struct rtw_regs *regs) in rtw_disable_interrupts()
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H A Drtwphy.c78 rtw_bbp_preinit(struct rtw_regs *regs, uint_t antatten0, int dflantb, in rtw_bbp_preinit()
90 rtw_bbp_init(struct rtw_regs *regs, struct rtw_bbpset *bb, int antdiv, in rtw_bbp_init()
442 rtw_sa2400_create(struct rtw_regs *regs, rtw_rf_write_t rf_write, int digphy) in rtw_sa2400_create()
590 rtw_max2820_create(struct rtw_regs *regs, rtw_rf_write_t rf_write, int is_a) in rtw_max2820_create()
639 rtw_phy_init(struct rtw_regs *regs, struct rtw_rf *rf, uint8_t opaque_txpower, in rtw_phy_init()
H A Drtwreg.h1219 #define RTW_READ8(regs, ofs) \ argument
1223 #define RTW_READ16(regs, ofs) \ argument
1227 #define RTW_READ(regs, ofs) \ argument
1231 #define RTW_WRITE8(regs, ofs, val) \ argument
1235 #define RTW_WRITE16(regs, ofs, val) \ argument
1239 #define RTW_WRITE(regs, ofs, val) \ argument
1243 #define RTW_ISSET(regs, reg, mask) \ argument
1246 #define RTW_CLR(regs, reg, mask) \ argument
1279 #define RTW_BARRIER(regs, reg0, reg1, flags) argument
1291 #define RTW_SYNC(regs, reg0, reg1) \ argument
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/titanic_50/usr/src/uts/sun/io/audio/drv/audiocs/
H A Daudio_4231_eb2dma.c252 cs4231_eb2regs_t *regs = eng->ce_eb2regs; in eb2_start_engine() local
323 cs4231_eb2regs_t *regs = eng->ce_eb2regs; in eb2_stop_engine() local
391 cs4231_eb2regs_t *regs = eng->ce_eb2regs; in eb2_reload() local
428 cs4231_eb2regs_t *regs = eng->ce_eb2regs; in eb2_addr() local
/titanic_50/usr/src/lib/libproc/common/
H A DPservice.c123 ps_lgetregs(struct ps_prochandle *P, lwpid_t lwpid, prgregset_t regs) in ps_lgetregs()
135 ps_lsetregs(struct ps_prochandle *P, lwpid_t lwpid, const prgregset_t regs) in ps_lsetregs()
147 ps_lgetfpregs(struct ps_prochandle *P, lwpid_t lwpid, prfpregset_t *regs) in ps_lgetfpregs()
159 ps_lsetfpregs(struct ps_prochandle *P, lwpid_t lwpid, const prfpregset_t *regs) in ps_lsetfpregs()
242 prgregset_t regs; in ps_lgetLDT() local
/titanic_50/usr/src/uts/common/io/scsi/adapters/smrt/
H A Dsmrt_device.c26 smrt_locate_bar(pci_regspec_t *regs, unsigned nregs, in smrt_locate_bar()
45 smrt_locate_cfgtbl(smrt_t *smrt, pci_regspec_t *regs, unsigned nregs, in smrt_locate_cfgtbl()
115 pci_regspec_t *regs; in smrt_map_device() local
/titanic_50/usr/src/cmd/luxadm/
H A Dfcalupdate.c143 volatile socal_reg_t *regs; in fcal_update() local
442 volatile socal_reg_t *regs) in feprom_program()
494 volatile socal_reg_t *regs) in write_feprom()
535 feprom_erase(volatile uchar_t *dest_address, volatile socal_reg_t *regs) in feprom_erase()
682 int offset, int size, volatile socal_reg_t *regs) in feprom_read()
716 load_file(char *file, caddr_t prom, volatile socal_reg_t *regs) in load_file()
/titanic_50/usr/src/uts/i86pc/os/
H A Dcpuid.c402 #define CPI_NUM_CORES(regs) BITX((regs)->cp_eax, 31, 26) argument
403 #define CPI_NTHR_SHR_CACHE(regs) BITX((regs)->cp_eax, 25, 14) argument
404 #define CPI_FULL_ASSOC_CACHE(regs) BITX((regs)->cp_eax, 9, 9) argument
405 #define CPI_SELF_INIT_CACHE(regs) BITX((regs)->cp_eax, 8, 8) argument
406 #define CPI_CACHE_LVL(regs) BITX((regs)->cp_eax, 7, 5) argument
407 #define CPI_CACHE_TYPE(regs) BITX((regs)->cp_eax, 4, 0) argument
408 #define CPI_CPU_LEVEL_TYPE(regs) BITX((regs)->cp_ecx, 15, 8) argument
410 #define CPI_CACHE_WAYS(regs) BITX((regs)->cp_ebx, 31, 22) argument
411 #define CPI_CACHE_PARTS(regs) BITX((regs)->cp_ebx, 21, 12) argument
412 #define CPI_CACHE_COH_LN_SZ(regs) BITX((regs)->cp_ebx, 11, 0) argument
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H A Dpci_bios.c70 struct bop_regs regs; in pci_bios_get_irq_routing() local
H A Dpci_cfgspace.c252 struct bop_regs regs; in pci_check_bios() local
/titanic_50/usr/src/cmd/mdb/intel/mdb/
H A Dkvm_amd64dep.c161 kt_regs_to_kregs(struct regs *regs, mdb_tgt_gregset_t *gregs) in kt_regs_to_kregs()
198 struct regs regs; in kt_amd64_init() local
H A Dkvm_ia32dep.c161 kt_regs_to_kregs(struct regs *regs, mdb_tgt_gregset_t *gregs) in kt_regs_to_kregs()
192 struct regs regs; in kt_ia32_init() local
H A Dkvm_isadep.c133 mdb_tgt_gregset_t regs; in kt_cpustack() local
178 mdb_tgt_gregset_t regs; in kt_cpuregs() local
/titanic_50/usr/src/uts/i86pc/io/pciex/
H A Dnpe_misc.c154 uint32_t regs; in npe_nvidia_error_workaround() local
174 uint32_t regs; in npe_intel_error_workaround() local
/titanic_50/usr/src/uts/sun4/io/px/
H A Dpx_fm.c586 px_err_check_pcie(dev_info_t *dip, ddi_fm_error_t *derr, px_err_pcie_t *regs, in px_err_check_pcie()
649 px_pcie_log(dev_info_t *dip, px_err_pcie_t *regs) in px_pcie_log()
666 px_pcie_ptlp(dev_info_t *dip, ddi_fm_error_t *derr, px_err_pcie_t *regs) in px_pcie_ptlp()
/titanic_50/usr/src/cmd/mdb/i86pc/modules/unix/
H A Dunix.c423 struct regs *regs = &rec->ttr_regs; in ttrace_dumpregs() local
445 struct regs *regs = &rec->ttr_regs; in ttrace_dumpregs() local
462 struct regs *regs = &rec->ttr_regs; in ttrace_walk() local
/titanic_50/usr/src/uts/intel/io/pciex/
H A Dpcie_nvidia.c222 pci_regspec_t regs[2] = {{0}}; in add_nvidia_isa_bridge_props() local
/titanic_50/usr/src/cmd/sunpc/other/
H A Ddos2unix.c328 union REGS regs; in main() local
H A Dunix2dos.c334 union REGS regs; in main() local
/titanic_50/usr/src/uts/sun4u/excalibur/sys/
H A Dxcalppm_var.h68 struct xcppmreg regs; /* register accessed by ppm */ member

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