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Searched defs:reg_offset (Results 1 – 25 of 189) sorted by relevance

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/linux/drivers/gpio/
H A Dgpio-madera.c28 unsigned int reg_offset = 2 * offset; in madera_gpio_get_direction() local
47 unsigned int reg_offset = 2 * offset; in madera_gpio_direction_in() local
58 unsigned int reg_offset = 2 * offset; in madera_gpio_get() local
75 unsigned int reg_offset = 2 * offset; in madera_gpio_direction_out() local
95 unsigned int reg_offset = 2 * offset; in madera_gpio_set() local
H A Dgpio-rtd.c73 u8 deb_index, u8 *reg_offset, u8 *shift) in rtd_gpio_get_deb_setval()
81 u8 deb_index, u8 *reg_offset, u8 *shift) in rtd1295_misc_gpio_get_deb_setval()
89 u8 deb_index, u8 *reg_offset, u8 *shift) in rtd1295_iso_gpio_get_deb_setval()
220 u8 deb_val, deb_index, reg_offset, shift; in rtd_gpio_set_debounce() local
318 int reg_offset; in rtd_gpio_get_direction() local
333 int reg_offset; in rtd_gpio_set_direction() local
382 int reg_offset, i, j; in rtd_gpio_irq_handle() local
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v4_4.c167 uint32_t reg_offset, in sdma_v4_4_get_ras_error_count()
202 uint32_t reg_offset = 0; in sdma_v4_4_query_ras_error_count_by_instance() local
239 uint32_t reg_offset; in sdma_v4_4_reset_ras_error_count() local
H A Dmmsch_v1_0.h61 uint32_t reg_offset : 28; member
66 uint32_t reg_offset : 20; member
99 uint32_t reg_offset, in mmsch_v1_0_insert_direct_wt()
109 uint32_t reg_offset, in mmsch_v1_0_insert_direct_rd_mod_wt()
121 uint32_t reg_offset, in mmsch_v1_0_insert_direct_poll()
H A Dsoc15.h57 uint32_t reg_offset; member
64 uint32_t reg_offset; member
74 uint32_t reg_offset; member
83 uint32_t reg_offset; member
H A Djpeg_v1_0.c42 …_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t v… in jpeg_v1_0_decode_ring_patch_wreg()
61 uint32_t reg, reg_offset, val, mask, i; in jpeg_v1_0_decode_ring_set_patch_ring() local
358 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_reg_wait() local
402 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_wreg() local
H A Dsoc24.c139 u32 reg_offset) in soc24_read_indexed_register()
157 u32 sh_num, u32 reg_offset) in soc24_get_register_value()
170 u32 sh_num, u32 reg_offset, u32 *value) in soc24_read_register()
H A Djpeg_v4_0_3.c520 unsigned int reg_offset = (j?(0x40 * j - 0xc80):0); in jpeg_v4_0_3_start() local
829 uint32_t reg_offset; in jpeg_v4_0_3_dec_ring_emit_reg_wait() local
876 uint32_t reg_offset; in jpeg_v4_0_3_dec_ring_emit_wreg() local
918 unsigned int reg_offset = (j?(0x40 * j - 0xc80):0); in jpeg_v4_0_3_is_idle() local
940 unsigned int reg_offset = (j?(0x40 * j - 0xc80):0); in jpeg_v4_0_3_wait_for_idle() local
H A Djpeg_v5_0_1.c342 int reg_offset = (j ? jpeg_v5_0_1_core_reg_offset(j) : 0); in jpeg_v5_0_1_start() local
482 int reg_offset = (j ? jpeg_v5_0_1_core_reg_offset(j) : 0); in jpeg_v5_0_1_is_idle() local
502 int reg_offset = (j ? jpeg_v5_0_1_core_reg_offset(j) : 0); in jpeg_v5_0_1_wait_for_idle() local
H A Dsoc21.c279 u32 sh_num, u32 reg_offset) in soc21_read_indexed_register()
297 u32 sh_num, u32 reg_offset) in soc21_get_register_value()
309 u32 sh_num, u32 reg_offset, u32 *value) in soc21_read_register()
H A Dnv.c358 u32 sh_num, u32 reg_offset) in nv_read_indexed_register()
376 u32 sh_num, u32 reg_offset) in nv_get_register_value()
388 u32 sh_num, u32 reg_offset, u32 *value) in nv_read_register()
H A Dmmsch_v2_0.h245 uint32_t reg_offset : 28; member
250 uint32_t reg_offset : 20; member
283 uint32_t reg_offset, in mmsch_v2_0_insert_direct_wt()
293 uint32_t reg_offset, in mmsch_v2_0_insert_direct_rd_mod_wt()
305 uint32_t reg_offset, in mmsch_v2_0_insert_direct_poll()
H A Dmmsch_v3_0.h56 uint32_t reg_offset : 28; member
61 uint32_t reg_offset : 20; member
/linux/drivers/comedi/drivers/
H A Dcomedi_8254.c131 unsigned int reg_offset = (reg * I8254_IO8) << i8254->regshift; in i8254_io8_cb() local
145 unsigned int reg_offset = (reg * I8254_IO16) << i8254->regshift; in i8254_io16_cb() local
159 unsigned int reg_offset = (reg * I8254_IO32) << i8254->regshift; in i8254_io32_cb() local
175 unsigned int reg_offset = (reg * I8254_IO8) << i8254->regshift; in i8254_mmio8_cb() local
189 unsigned int reg_offset = (reg * I8254_IO16) << i8254->regshift; in i8254_mmio16_cb() local
203 unsigned int reg_offset = (reg * I8254_IO32) << i8254->regshift; in i8254_mmio32_cb() local
/linux/drivers/net/wireless/ath/ath9k/
H A Dhtc_drv_init.c234 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) in ath9k_regread()
302 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite_single()
323 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite_buffer()
346 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite()
384 u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw_buffer()
467 u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw_single()
489 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw()
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-socfpga.c50 u32 reg_offset; member
107 u32 reg_offset, reg_shift; in socfpga_dwmac_parse_data() local
276 u32 reg_offset = dwmac->reg_offset; in socfpga_gen5_set_phy_mode() local
334 u32 reg_offset = dwmac->reg_offset; in socfpga_gen10_set_phy_mode() local
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dcommon_baco.h38 uint32_t reg_offset; member
50 uint32_t reg_offset; member
/linux/drivers/gpu/drm/radeon/
H A Dcik_sdma.c251 u32 rb_cntl, reg_offset; in cik_sdma_gfx_stop() local
305 uint32_t reg_offset, value; in cik_sdma_ctx_switch_enable() local
332 u32 me_cntl, reg_offset; in cik_sdma_enable() local
369 u32 reg_offset, wb_offset; in cik_sdma_gfx_resume() local
/linux/drivers/reset/
H A Dreset-simple.c117 u32 reg_offset; member
166 u32 reg_offset = 0; in reset_simple_probe() local
/linux/arch/powerpc/include/asm/
H A Dtsi108.h103 static inline u32 tsi108_read_reg(u32 reg_offset) in tsi108_read_reg()
108 static inline void tsi108_write_reg(u32 reg_offset, u32 val) in tsi108_write_reg()
/linux/drivers/fpga/
H A Dsocfpga.c134 static u32 socfpga_fpga_readl(struct socfpga_fpga_priv *priv, u32 reg_offset) in socfpga_fpga_readl()
139 static void socfpga_fpga_writel(struct socfpga_fpga_priv *priv, u32 reg_offset, in socfpga_fpga_writel()
146 u32 reg_offset) in socfpga_fpga_raw_readl()
152 u32 reg_offset, u32 value) in socfpga_fpga_raw_writel()
/linux/drivers/pinctrl/realtek/
H A Dpinctrl-rtd.h29 unsigned int reg_offset; member
41 unsigned int reg_offset; member
58 unsigned int reg_offset; member
/linux/drivers/media/platform/nxp/imx-jpeg/
H A Dmxc-jpeg-hw.c12 #define print_wrapper_reg(dev, base_address, reg_offset)\ argument
15 #define internal_print_wrapper_reg(dev, base_address, reg_name, reg_offset) {\ argument
/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx1-core.c89 u32 value, u32 reg_offset) in imx1_write_2bit()
116 u32 value, u32 reg_offset) in imx1_write_bit()
136 u32 reg_offset) in imx1_read_2bit()
149 u32 reg_offset) in imx1_read_bit()
/linux/drivers/clocksource/
H A Dtimer-atmel-pit.c59 static inline unsigned int pit_read(void __iomem *base, unsigned int reg_offset) in pit_read()
64 static inline void pit_write(void __iomem *base, unsigned int reg_offset, unsigned long value) in pit_write()

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