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/illumos-gate/usr/src/common/vga/
H A Dvgasubr.c52 #define PUTB(reg, off, v) ddi_put8(reg->handle, reg->addr + (off), v) argument
53 #define GETB(reg, off) ddi_get8(reg->handle, reg->addr + (off)) argument
60 #define PUTB(reg, off, v) outb(reg + (off), v) argument
61 #define GETB(reg, off) inb(reg + (off)) argument
92 vga_get_hardware_settings(vgaregmap_t reg, int *width, int *height) in vga_get_hardware_settings()
100 vga_get_reg(vgaregmap_t reg, int indexreg) in vga_get_reg()
106 vga_set_reg(vgaregmap_t reg, int indexreg, int v) in vga_set_reg()
112 vga_get_crtc(vgaregmap_t reg, int i) in vga_get_crtc()
118 vga_set_crtc(vgaregmap_t reg, int i, int v) in vga_set_crtc()
124 vga_get_seq(vgaregmap_t reg, int i) in vga_get_seq()
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/illumos-gate/usr/src/uts/intel/io/intel_nhm/
H A Dintel_nhm.h62 #define MC_SCRUB_CONTROL_WR(cpu, reg) nhm_pci_putl(SOCKET_BUS(cpu), 3, 2, \ argument
65 #define MC_SSR_CONTROL_WR(cpu, reg) nhm_pci_putl(SOCKET_BUS(cpu), 3, 2, 0x48, \ argument
102 #define MC_CONTROL_CHANNEL_ACTIVE(reg, channel) \ argument
104 #define MC_CONTROL_ECCEN(reg) (((reg) >> 1) & 1) argument
105 #define MC_CONTROL_CLOSED_PAGE(reg) ((reg) & 1) argument
106 #define MC_CONTROL_DIVBY3(reg) ((reg >> 6) &1) argument
113 #define CHANNEL_DISABLED(reg, channel) ((reg) & (1 << (channel))) argument
126 #define RANKOFFSET(reg) (((reg) >> 10) & 7) argument
127 #define DIMMPRESENT(reg) (((reg) & (1 << 9)) != 0) argument
128 #define NUMBANK(reg) (((reg) & (3 << 7)) == 0 ? 4 : (((reg) >> 7) & 3) * 8) argument
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H A Dnhm_pci_cfg.c49 pci_regspec_t reg; in nhm_pci_cfg_setup() local
110 nhm_pci_getb(int bus, int dev, int func, int reg, int *interpose) in nhm_pci_getb()
119 nhm_pci_getw(int bus, int dev, int func, int reg, int *interpose) in nhm_pci_getw()
128 nhm_pci_getl(int bus, int dev, int func, int reg, int *interpose) in nhm_pci_getl()
137 nhm_pci_putb(int bus, int dev, int func, int reg, uint8_t val) in nhm_pci_putb()
146 nhm_pci_putw(int bus, int dev, int func, int reg, uint16_t val) in nhm_pci_putw()
155 nhm_pci_putl(int bus, int dev, int func, int reg, uint32_t val) in nhm_pci_putl()
/illumos-gate/usr/src/uts/common/io/scsi/adapters/lmrc/
H A Dlmrc_reg.h66 #define LMRC_FW_RESET_REQUIRED(reg) (bitx32((reg), 0, 0) != 0) argument
67 #define LMRC_FW_RESET_ADAPTER(reg) (bitx32((reg), 1, 1) != 0) argument
68 #define LMRC_FW_MAX_CMD(reg) bitx32((reg), 15, 0) argument
69 #define LMRC_FW_MSIX_ENABLED(reg) (bitx32((reg), 26, 26) != 0) argument
70 #define LMRC_FW_STATE(reg) bitx32((reg), 31, 28) argument
73 #define LMRC_MAX_CHAIN_SIZE(reg) bitx32((reg), 9, 5) argument
74 #define LMRC_MAX_REPLY_QUEUES_EXT(reg) bitx32((reg), 21, 14) argument
75 #define LMRC_EXT_CHAIN_SIZE_SUPPORT(reg) (bitx32((reg), 22, 22) != 0) argument
76 #define LMRC_RDPQ_MODE_SUPPORT(reg) (bitx32((reg), 23, 23) != 0) argument
77 #define LMRC_SYNC_CACHE_SUPPORT(reg) (bitx32((reg), 24, 24) != 0) argument
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/illumos-gate/usr/src/uts/common/io/i40e/
H A Di40e_intr.c214 uint32_t reg; in i40e_intr_adminq_enable() local
227 uint32_t reg; in i40e_intr_adminq_disable() local
243 uint32_t reg; in i40e_intr_io_enable() local
256 uint32_t reg; in i40e_intr_io_disable() local
279 uint32_t reg; in i40e_intr_io_enable_all() local
307 uint32_t reg; in i40e_intr_io_disable_all() local
334 uint32_t reg; in i40e_intr_io_clear_cause() local
341 uint32_t reg; in i40e_intr_io_clear_cause() local
358 uint32_t reg; in i40e_intr_chip_fini() local
388 uint32_t reg; in i40e_set_lnklstn() local
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/illumos-gate/usr/src/common/bitext/
H A Dbitext.c27 bitx8(uint8_t reg, uint_t high, uint_t low) in bitx8()
40 bitx16(uint16_t reg, uint_t high, uint_t low) in bitx16()
54 bitx32(uint32_t reg, uint_t high, uint_t low) in bitx32()
68 bitx64(uint64_t reg, uint_t high, uint_t low) in bitx64()
81 bitset8(uint8_t reg, uint_t high, uint_t low, uint8_t val) in bitset8()
99 bitset16(uint16_t reg, uint_t high, uint_t low, uint16_t val) in bitset16()
117 bitset32(uint32_t reg, uint_t high, uint_t low, uint32_t val) in bitset32()
135 bitset64(uint64_t reg, uint_t high, uint_t low, uint64_t val) in bitset64()
/illumos-gate/usr/src/uts/intel/ml/
H A Dretpoline.S35 #define RETPOLINE_MKTHUNK(reg) \ argument
52 #define RETPOLINE_MKGENERIC(reg) \ argument
69 #define RETPOLINE_MKJUMP(reg) \ argument
228 #define RETPOLINE_MKTHUNK(reg) \ argument
/illumos-gate/usr/src/uts/i86pc/os/
H A Dpci_mech1.c50 pci_mech1_getb(int bus, int device, int function, int reg) in pci_mech1_getb()
70 pci_mech1_getw(int bus, int device, int function, int reg) in pci_mech1_getw()
91 pci_mech1_getl(int bus, int device, int function, int reg) in pci_mech1_getl()
112 pci_mech1_putb(int bus, int device, int function, int reg, uint8_t val) in pci_mech1_putb()
130 pci_mech1_putw(int bus, int device, int function, int reg, uint16_t val) in pci_mech1_putw()
148 pci_mech1_putl(int bus, int device, int function, int reg, uint32_t val) in pci_mech1_putl()
H A Dpci_neptune.c138 pci_neptune_getb(int bus, int device, int function, int reg) in pci_neptune_getb()
151 pci_neptune_getw(int bus, int device, int function, int reg) in pci_neptune_getw()
164 pci_neptune_getl(int bus, int device, int function, int reg) in pci_neptune_getl()
177 pci_neptune_putb(int bus, int device, int function, int reg, uint8_t val) in pci_neptune_putb()
187 pci_neptune_putw(int bus, int device, int function, int reg, uint16_t val) in pci_neptune_putw()
197 pci_neptune_putl(int bus, int device, int function, int reg, uint32_t val) in pci_neptune_putl()
H A Dpci_mech1_amd.c95 pci_mech1_amd_getb(int bus, int device, int function, int reg) in pci_mech1_amd_getb()
116 pci_mech1_amd_getw(int bus, int device, int function, int reg) in pci_mech1_amd_getw()
137 pci_mech1_amd_getl(int bus, int device, int function, int reg) in pci_mech1_amd_getl()
158 pci_mech1_amd_putb(int bus, int device, int function, int reg, uint8_t val) in pci_mech1_amd_putb()
172 pci_mech1_amd_putw(int bus, int device, int function, int reg, uint16_t val) in pci_mech1_amd_putw()
186 pci_mech1_amd_putl(int bus, int device, int function, int reg, uint32_t val) in pci_mech1_amd_putl()
H A Dpci_mech2.c76 pci_mech2_getb(int bus, int device, int function, int reg) in pci_mech2_getb()
92 pci_mech2_getw(int bus, int device, int function, int reg) in pci_mech2_getw()
108 pci_mech2_getl(int bus, int device, int function, int reg) in pci_mech2_getl()
124 pci_mech2_putb(int bus, int device, int function, int reg, uint8_t val) in pci_mech2_putb()
137 pci_mech2_putw(int bus, int device, int function, int reg, uint16_t val) in pci_mech2_putw()
150 pci_mech2_putl(int bus, int device, int function, int reg, uint32_t val) in pci_mech2_putl()
H A Dpci_orion.c179 pci_orion_getb(int bus, int device, int function, int reg) in pci_orion_getb()
192 pci_orion_getw(int bus, int device, int function, int reg) in pci_orion_getw()
205 pci_orion_getl(int bus, int device, int function, int reg) in pci_orion_getl()
218 pci_orion_putb(int bus, int device, int function, int reg, uint8_t val) in pci_orion_putb()
228 pci_orion_putw(int bus, int device, int function, int reg, uint16_t val) in pci_orion_putw()
238 pci_orion_putl(int bus, int device, int function, int reg, uint32_t val) in pci_orion_putl()
/illumos-gate/usr/src/uts/sun4/brand/common/
H A Dbrand_solaris.S43 #define GLOBALS_SWAP(reg) \ argument
51 #define GLOBALS_RESTORE(reg) \ argument
56 #define GLOBALS_SWAP(reg) \ argument
64 #define GLOBALS_RESTORE(reg) \ argument
/illumos-gate/usr/src/uts/common/io/atge/
H A Datge_mii.c64 atge_mii_read(void *arg, uint8_t phy, uint8_t reg) in atge_mii_read()
107 atge_mii_write(void *arg, uint8_t phy, uint8_t reg, uint16_t val) in atge_mii_write()
187 uint16_t reg, pn; in atge_l1_mii_reset() local
272 uint16_t reg; in atge_l1c_mii_reset() local
350 atge_l1c_mii_read(void *arg, uint8_t phy, uint8_t reg) in atge_l1c_mii_read()
362 atge_l1c_mii_write(void *arg, uint8_t phy, uint8_t reg, uint16_t val) in atge_l1c_mii_write()
/illumos-gate/usr/src/uts/intel/io/intel_nb5000/
H A Dnb_pci_cfg.c49 pci_regspec_t reg; in nb_pci_cfg_setup() local
149 nb_pci_getb(int bus, int dev, int func, int reg, int *interpose) in nb_pci_getb()
158 nb_pci_getw(int bus, int dev, int func, int reg, int *interpose) in nb_pci_getw()
167 nb_pci_getl(int bus, int dev, int func, int reg, int *interpose) in nb_pci_getl()
176 nb_pci_putb(int bus, int dev, int func, int reg, uint8_t val) in nb_pci_putb()
185 nb_pci_putw(int bus, int dev, int func, int reg, uint16_t val) in nb_pci_putw()
194 nb_pci_putl(int bus, int dev, int func, int reg, uint32_t val) in nb_pci_putl()
/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000g_osdep.c46 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) in e1000_write_pci_cfg()
52 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) in e1000_read_pci_cfg()
69 uint16_t reg; /* register contents */ in phy_spd_state() local
109 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) in e1000_read_pcie_cap_reg()
123 e1000_write_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) in e1000_write_pcie_cap_reg()
H A De1000_osdep.h123 #define E1000_WRITE_REG(hw, reg, value) \ argument
136 #define E1000_READ_REG(hw, reg) (\ argument
144 #define E1000_WRITE_REG_ARRAY(hw, reg, offset, value) \ argument
158 #define E1000_READ_REG_ARRAY(hw, reg, offset) (\ argument
169 #define E1000_WRITE_REG_ARRAY_DWORD(a, reg, offset, value) \ argument
171 #define E1000_READ_REG_ARRAY_DWORD(a, reg, offset) \ argument
175 #define E1000_READ_FLASH_REG(hw, reg) \ argument
179 #define E1000_READ_FLASH_REG16(hw, reg) \ argument
183 #define E1000_WRITE_FLASH_REG(hw, reg, value) \ argument
187 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \ argument
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/illumos-gate/usr/src/uts/common/io/igb/
H A De1000_osdep.h113 #define E1000_WRITE_REG(hw, reg, value) \ argument
117 #define E1000_READ_REG(hw, reg) \ argument
121 #define E1000_WRITE_REG_ARRAY(hw, reg, offset, value) \ argument
126 #define E1000_READ_REG_ARRAY(hw, reg, offset) \ argument
130 #define E1000_WRITE_REG_ARRAY_DWORD(a, reg, offset, value) \ argument
132 #define E1000_READ_REG_ARRAY_DWORD(a, reg, offset) \ argument
136 #define E1000_READ_FLASH_REG(hw, reg) \ argument
140 #define E1000_READ_FLASH_REG16(hw, reg) \ argument
144 #define E1000_WRITE_FLASH_REG(hw, reg, value) \ argument
148 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \ argument
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/illumos-gate/usr/src/uts/common/io/mii/
H A Dmii_marvell.c151 uint16_t reg; in mvphy_reset_88e3016() local
184 uint16_t reg; in mvphy_loop_88e3016() local
210 uint16_t reg; in mvphy_reset_88e3082() local
227 uint16_t reg; in mvphy_reset_88e1149() local
289 uint16_t reg; in mvphy_reset_88e1116() local
324 uint16_t reg; in mvphy_reset_88e1118() local
340 uint16_t reg; in mvphy_reset_88e1111() local
362 uint16_t reg, page; in mvphy_reset_88e1112() local
397 uint16_t reg; in mvphy_reset_88e1011() local
420 uint16_t reg; in mvphy_reset() local
/illumos-gate/usr/src/uts/common/io/1394/adapters/
H A Dhci1394_ohci.c858 uint_t reg; in hci1394_ohci_bus_reset() local
903 uint_t reg; in hci1394_ohci_bus_reset_nroot() local
1002 uint_t reg; in hci1394_ohci_phy_set() local
1039 uint_t reg; in hci1394_ohci_phy_clr() local
1279 uint32_t reg; in hci1394_ohci_phy_info() local
1370 uint32_t reg; in hci1394_ohci_current_busgen() local
1431 uint32_t reg; in hci1394_ohci_postwr_addr() local
1460 uint32_t reg; in hci1394_ohci_guid() local
1842 uint32_t reg; in hci1394_ohci_nodeid_get() local
1861 uint32_t reg; in hci1394_ohci_nodeid_set() local
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/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_dcb_82599.c126 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599() local
187 u32 reg, max_credits; in ixgbe_dcb_config_tx_desc_arbiter_82599() local
237 u32 reg; in ixgbe_dcb_config_tx_data_arbiter_82599() local
297 u32 i, j, fcrtl, reg; in ixgbe_dcb_config_pfc_82599() local
385 u32 reg = 0; in ixgbe_dcb_config_tc_stats_82599() local
511 u32 reg; in ixgbe_dcb_config_82599() local
H A Dixgbe_dcb_82598.c124 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82598() local
183 u32 reg, max_credits; in ixgbe_dcb_config_tx_desc_arbiter_82598() local
230 u32 reg; in ixgbe_dcb_config_tx_data_arbiter_82598() local
273 u32 fcrtl, reg; in ixgbe_dcb_config_pfc_82598() local
325 u32 reg = 0; in ixgbe_dcb_config_tc_stats_82598() local
/illumos-gate/usr/src/uts/intel/brand/common/
H A Dbrand_asm.h153 #define GET_V(sp, pcnt, var, reg) \ argument
156 #define SET_V(sp, pcnt, var, reg) \ argument
159 #define GET_PROCP(sp, pcnt, reg) \ argument
163 #define GET_P_BRAND_DATA(sp, pcnt, reg) \ argument
194 #define CHECK_FOR_NATIVE(reg) \ argument
/illumos-gate/usr/src/uts/common/io/nxge/npi/
H A Dnpi_txc.h65 #define TXC_FZC_REG_READ64(handle, reg, cn, val_p) \ argument
69 #define TXC_FZC_REG_WRITE64(handle, reg, cn, data) \ argument
73 #define TXC_FZC_CNTL_REG_READ64(handle, reg, port, val_p) \ argument
77 #define TXC_FZC_CNTL_REG_WRITE64(handle, reg, port, data) \ argument
/illumos-gate/usr/src/tools/smatch/src/
H A Dexample.c156 struct hardreg *reg; member
381 static void flush_reg(struct bb_state *state, struct hardreg *reg) in flush_reg()
401 …uct storage_hash *find_pseudo_storage(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) in find_pseudo_storage()
440 static void mark_reg_dead(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) in mark_reg_dead()
455 static void add_pseudo_reg(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) in add_pseudo_reg()
477 struct hardreg *reg = hardregs; in empty_reg() local
490 struct hardreg *reg; in target_reg() local
523 struct hardreg *reg; in find_in_reg() local
542 struct hardreg *reg = find_in_reg(state, pseudo); in flush_pseudo() local
548 static void flush_cc_cache_to_reg(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) in flush_cc_cache_to_reg()
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