xref: /linux/arch/x86/realmode/init.c (revision 00c010e130e58301db2ea0cec1eadc931e1cb8cf)
1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/io.h>
3 #include <linux/slab.h>
4 #include <linux/memblock.h>
5 #include <linux/cc_platform.h>
6 #include <linux/pgtable.h>
7 
8 #include <asm/set_memory.h>
9 #include <asm/realmode.h>
10 #include <asm/tlbflush.h>
11 #include <asm/crash.h>
12 #include <asm/msr.h>
13 #include <asm/sev.h>
14 
15 struct real_mode_header *real_mode_header;
16 u32 *trampoline_cr4_features;
17 
18 /* Hold the pgd entry used on booting additional CPUs */
19 pgd_t trampoline_pgd_entry;
20 
load_trampoline_pgtable(void)21 void load_trampoline_pgtable(void)
22 {
23 #ifdef CONFIG_X86_32
24 	load_cr3(initial_page_table);
25 #else
26 	/*
27 	 * This function is called before exiting to real-mode and that will
28 	 * fail with CR4.PCIDE still set.
29 	 */
30 	if (boot_cpu_has(X86_FEATURE_PCID))
31 		cr4_clear_bits(X86_CR4_PCIDE);
32 
33 	write_cr3(real_mode_header->trampoline_pgd);
34 #endif
35 
36 	/*
37 	 * The CR3 write above will not flush global TLB entries.
38 	 * Stale, global entries from previous page tables may still be
39 	 * present.  Flush those stale entries.
40 	 *
41 	 * This ensures that memory accessed while running with
42 	 * trampoline_pgd is *actually* mapped into trampoline_pgd.
43 	 */
44 	__flush_tlb_all();
45 }
46 
reserve_real_mode(void)47 void __init reserve_real_mode(void)
48 {
49 	phys_addr_t mem;
50 	size_t size = real_mode_size_needed();
51 
52 	if (!size)
53 		return;
54 
55 	WARN_ON(slab_is_available());
56 
57 	/* Has to be under 1M so we can execute real-mode AP code. */
58 	mem = memblock_phys_alloc_range(size, PAGE_SIZE, 0, 1<<20);
59 	if (!mem)
60 		pr_info("No sub-1M memory is available for the trampoline\n");
61 	else
62 		set_real_mode_mem(mem);
63 
64 	/*
65 	 * Unconditionally reserve the entire first 1M, see comment in
66 	 * setup_arch().
67 	 */
68 	memblock_reserve(0, SZ_1M);
69 
70 	memblock_clear_kho_scratch(0, SZ_1M);
71 }
72 
sme_sev_setup_real_mode(struct trampoline_header * th)73 static void __init sme_sev_setup_real_mode(struct trampoline_header *th)
74 {
75 #ifdef CONFIG_AMD_MEM_ENCRYPT
76 	if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT))
77 		th->flags |= TH_FLAGS_SME_ACTIVE;
78 
79 	if (cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) {
80 		/*
81 		 * Skip the call to verify_cpu() in secondary_startup_64 as it
82 		 * will cause #VC exceptions when the AP can't handle them yet.
83 		 */
84 		th->start = (u64) secondary_startup_64_no_verify;
85 
86 		if (sev_es_setup_ap_jump_table(real_mode_header))
87 			panic("Failed to get/update SEV-ES AP Jump Table");
88 	}
89 #endif
90 }
91 
setup_real_mode(void)92 static void __init setup_real_mode(void)
93 {
94 	u16 real_mode_seg;
95 	const u32 *rel;
96 	u32 count;
97 	unsigned char *base;
98 	unsigned long phys_base;
99 	struct trampoline_header *trampoline_header;
100 	size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
101 #ifdef CONFIG_X86_64
102 	u64 *trampoline_pgd;
103 	u64 efer;
104 	int i;
105 #endif
106 
107 	base = (unsigned char *)real_mode_header;
108 
109 	/*
110 	 * If SME is active, the trampoline area will need to be in
111 	 * decrypted memory in order to bring up other processors
112 	 * successfully. This is not needed for SEV.
113 	 */
114 	if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT))
115 		set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT);
116 
117 	memcpy(base, real_mode_blob, size);
118 
119 	phys_base = __pa(base);
120 	real_mode_seg = phys_base >> 4;
121 
122 	rel = (u32 *) real_mode_relocs;
123 
124 	/* 16-bit segment relocations. */
125 	count = *rel++;
126 	while (count--) {
127 		u16 *seg = (u16 *) (base + *rel++);
128 		*seg = real_mode_seg;
129 	}
130 
131 	/* 32-bit linear relocations. */
132 	count = *rel++;
133 	while (count--) {
134 		u32 *ptr = (u32 *) (base + *rel++);
135 		*ptr += phys_base;
136 	}
137 
138 	/* Must be performed *after* relocation. */
139 	trampoline_header = (struct trampoline_header *)
140 		__va(real_mode_header->trampoline_header);
141 
142 #ifdef CONFIG_X86_32
143 	trampoline_header->start = __pa_symbol(startup_32_smp);
144 	trampoline_header->gdt_limit = __BOOT_DS + 7;
145 	trampoline_header->gdt_base = __pa_symbol(boot_gdt);
146 #else
147 	/*
148 	 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
149 	 * so we need to mask it out.
150 	 */
151 	rdmsrq(MSR_EFER, efer);
152 	trampoline_header->efer = efer & ~EFER_LMA;
153 
154 	trampoline_header->start = (u64) secondary_startup_64;
155 	trampoline_cr4_features = &trampoline_header->cr4;
156 	*trampoline_cr4_features = mmu_cr4_features;
157 
158 	trampoline_header->flags = 0;
159 
160 	trampoline_lock = &trampoline_header->lock;
161 	*trampoline_lock = 0;
162 
163 	trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
164 
165 	/* Map the real mode stub as virtual == physical */
166 	trampoline_pgd[0] = trampoline_pgd_entry.pgd;
167 
168 	/*
169 	 * Include the entirety of the kernel mapping into the trampoline
170 	 * PGD.  This way, all mappings present in the normal kernel page
171 	 * tables are usable while running on trampoline_pgd.
172 	 */
173 	for (i = pgd_index(__PAGE_OFFSET); i < PTRS_PER_PGD; i++)
174 		trampoline_pgd[i] = init_top_pgt[i].pgd;
175 #endif
176 
177 	sme_sev_setup_real_mode(trampoline_header);
178 }
179 
180 /*
181  * reserve_real_mode() gets called very early, to guarantee the
182  * availability of low memory. This is before the proper kernel page
183  * tables are set up, so we cannot set page permissions in that
184  * function. Also trampoline code will be executed by APs so we
185  * need to mark it executable at do_pre_smp_initcalls() at least,
186  * thus run it as a early_initcall().
187  */
set_real_mode_permissions(void)188 static void __init set_real_mode_permissions(void)
189 {
190 	unsigned char *base = (unsigned char *) real_mode_header;
191 	size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
192 
193 	size_t ro_size =
194 		PAGE_ALIGN(real_mode_header->ro_end) -
195 		__pa(base);
196 
197 	size_t text_size =
198 		PAGE_ALIGN(real_mode_header->ro_end) -
199 		real_mode_header->text_start;
200 
201 	unsigned long text_start =
202 		(unsigned long) __va(real_mode_header->text_start);
203 
204 	set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
205 	set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
206 	set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
207 }
208 
init_real_mode(void)209 void __init init_real_mode(void)
210 {
211 	if (!real_mode_header)
212 		panic("Real mode trampoline was not allocated");
213 
214 	setup_real_mode();
215 	set_real_mode_permissions();
216 }
217 
do_init_real_mode(void)218 static int __init do_init_real_mode(void)
219 {
220 	x86_platform.realmode_init();
221 	return 0;
222 }
223 early_initcall(do_init_real_mode);
224