1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
4 * Copyright 2016 Microsemi Corporation
5 * Copyright 2014-2015 PMC-Sierra, Inc.
6 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
15 * NON INFRINGEMENT. See the GNU General Public License for more details.
16 *
17 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
18 *
19 */
20
21 #include <linux/module.h>
22 #include <linux/interrupt.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
35 #include <linux/io.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <linux/unaligned.h>
55 #include <asm/div64.h>
56 #include "hpsa_cmd.h"
57 #include "hpsa.h"
58
59 /*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
63 #define HPSA_DRIVER_VERSION "3.4.20-200"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65 #define HPSA "hpsa"
66
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
73
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
76 /* How long to wait before giving up on a command */
77 #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
78
79 /* Embedded module documentation macros - see modules.h */
80 MODULE_AUTHOR("Hewlett-Packard Company");
81 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
82 HPSA_DRIVER_VERSION);
83 MODULE_VERSION(HPSA_DRIVER_VERSION);
84 MODULE_LICENSE("GPL");
85 MODULE_ALIAS("cciss");
86
87 static int hpsa_simple_mode;
88 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
89 MODULE_PARM_DESC(hpsa_simple_mode,
90 "Use 'simple mode' rather than 'performant mode'");
91
92 /* define the PCI info for the cards we can control */
93 static const struct pci_device_id hpsa_pci_device_id[] = {
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
151 {0,}
152 };
153
154 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
155
156 /* board_id = Subsystem Device ID & Vendor ID
157 * product = Marketing Name for the board
158 * access = Address of the struct of function pointers
159 */
160 static struct board_type products[] = {
161 {0x40700E11, "Smart Array 5300", &SA5A_access},
162 {0x40800E11, "Smart Array 5i", &SA5B_access},
163 {0x40820E11, "Smart Array 532", &SA5B_access},
164 {0x40830E11, "Smart Array 5312", &SA5B_access},
165 {0x409A0E11, "Smart Array 641", &SA5A_access},
166 {0x409B0E11, "Smart Array 642", &SA5A_access},
167 {0x409C0E11, "Smart Array 6400", &SA5A_access},
168 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
169 {0x40910E11, "Smart Array 6i", &SA5A_access},
170 {0x3225103C, "Smart Array P600", &SA5A_access},
171 {0x3223103C, "Smart Array P800", &SA5A_access},
172 {0x3234103C, "Smart Array P400", &SA5A_access},
173 {0x3235103C, "Smart Array P400i", &SA5A_access},
174 {0x3211103C, "Smart Array E200i", &SA5A_access},
175 {0x3212103C, "Smart Array E200", &SA5A_access},
176 {0x3213103C, "Smart Array E200i", &SA5A_access},
177 {0x3214103C, "Smart Array E200i", &SA5A_access},
178 {0x3215103C, "Smart Array E200i", &SA5A_access},
179 {0x3237103C, "Smart Array E500", &SA5A_access},
180 {0x323D103C, "Smart Array P700m", &SA5A_access},
181 {0x3241103C, "Smart Array P212", &SA5_access},
182 {0x3243103C, "Smart Array P410", &SA5_access},
183 {0x3245103C, "Smart Array P410i", &SA5_access},
184 {0x3247103C, "Smart Array P411", &SA5_access},
185 {0x3249103C, "Smart Array P812", &SA5_access},
186 {0x324A103C, "Smart Array P712m", &SA5_access},
187 {0x324B103C, "Smart Array P711m", &SA5_access},
188 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
189 {0x3350103C, "Smart Array P222", &SA5_access},
190 {0x3351103C, "Smart Array P420", &SA5_access},
191 {0x3352103C, "Smart Array P421", &SA5_access},
192 {0x3353103C, "Smart Array P822", &SA5_access},
193 {0x3354103C, "Smart Array P420i", &SA5_access},
194 {0x3355103C, "Smart Array P220i", &SA5_access},
195 {0x3356103C, "Smart Array P721m", &SA5_access},
196 {0x1920103C, "Smart Array P430i", &SA5_access},
197 {0x1921103C, "Smart Array P830i", &SA5_access},
198 {0x1922103C, "Smart Array P430", &SA5_access},
199 {0x1923103C, "Smart Array P431", &SA5_access},
200 {0x1924103C, "Smart Array P830", &SA5_access},
201 {0x1925103C, "Smart Array P831", &SA5_access},
202 {0x1926103C, "Smart Array P731m", &SA5_access},
203 {0x1928103C, "Smart Array P230i", &SA5_access},
204 {0x1929103C, "Smart Array P530", &SA5_access},
205 {0x21BD103C, "Smart Array P244br", &SA5_access},
206 {0x21BE103C, "Smart Array P741m", &SA5_access},
207 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
208 {0x21C0103C, "Smart Array P440ar", &SA5_access},
209 {0x21C1103C, "Smart Array P840ar", &SA5_access},
210 {0x21C2103C, "Smart Array P440", &SA5_access},
211 {0x21C3103C, "Smart Array P441", &SA5_access},
212 {0x21C4103C, "Smart Array", &SA5_access},
213 {0x21C5103C, "Smart Array P841", &SA5_access},
214 {0x21C6103C, "Smart HBA H244br", &SA5_access},
215 {0x21C7103C, "Smart HBA H240", &SA5_access},
216 {0x21C8103C, "Smart HBA H241", &SA5_access},
217 {0x21C9103C, "Smart Array", &SA5_access},
218 {0x21CA103C, "Smart Array P246br", &SA5_access},
219 {0x21CB103C, "Smart Array P840", &SA5_access},
220 {0x21CC103C, "Smart Array", &SA5_access},
221 {0x21CD103C, "Smart Array", &SA5_access},
222 {0x21CE103C, "Smart HBA", &SA5_access},
223 {0x05809005, "SmartHBA-SA", &SA5_access},
224 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
225 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
226 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
227 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
228 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
229 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
230 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
231 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
232 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
233 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
234 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
235 };
236
237 static struct scsi_transport_template *hpsa_sas_transport_template;
238 static int hpsa_add_sas_host(struct ctlr_info *h);
239 static void hpsa_delete_sas_host(struct ctlr_info *h);
240 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
241 struct hpsa_scsi_dev_t *device);
242 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
243 static struct hpsa_scsi_dev_t
244 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
245 struct sas_rphy *rphy);
246
247 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
248 static const struct scsi_cmnd hpsa_cmd_busy;
249 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
250 static const struct scsi_cmnd hpsa_cmd_idle;
251 static int number_of_controllers;
252
253 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
254 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
255 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
256 void __user *arg);
257 static int hpsa_passthru_ioctl(struct ctlr_info *h,
258 IOCTL_Command_struct *iocommand);
259 static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
260 BIG_IOCTL_Command_struct *ioc);
261
262 #ifdef CONFIG_COMPAT
263 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
264 void __user *arg);
265 #endif
266
267 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
268 static struct CommandList *cmd_alloc(struct ctlr_info *h);
269 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
270 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
271 struct scsi_cmnd *scmd);
272 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
273 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
274 int cmd_type);
275 static void hpsa_free_cmd_pool(struct ctlr_info *h);
276 #define VPD_PAGE (1 << 8)
277 #define HPSA_SIMPLE_ERROR_BITS 0x03
278
279 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
280 static void hpsa_scan_start(struct Scsi_Host *);
281 static int hpsa_scan_finished(struct Scsi_Host *sh,
282 unsigned long elapsed_time);
283 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
284
285 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
286 static int hpsa_sdev_init(struct scsi_device *sdev);
287 static int hpsa_sdev_configure(struct scsi_device *sdev,
288 struct queue_limits *lim);
289 static void hpsa_sdev_destroy(struct scsi_device *sdev);
290
291 static void hpsa_update_scsi_devices(struct ctlr_info *h);
292 static int check_for_unit_attention(struct ctlr_info *h,
293 struct CommandList *c);
294 static void check_ioctl_unit_attention(struct ctlr_info *h,
295 struct CommandList *c);
296 /* performant mode helper functions */
297 static void calc_bucket_map(int *bucket, int num_buckets,
298 int nsgs, int min_blocks, u32 *bucket_map);
299 static void hpsa_free_performant_mode(struct ctlr_info *h);
300 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
301 static inline u32 next_command(struct ctlr_info *h, u8 q);
302 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
303 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
304 u64 *cfg_offset);
305 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
306 unsigned long *memory_bar);
307 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
308 bool *legacy_board);
309 static int wait_for_device_to_become_ready(struct ctlr_info *h,
310 unsigned char lunaddr[],
311 int reply_queue);
312 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
313 int wait_for_ready);
314 static inline void finish_cmd(struct CommandList *c);
315 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
316 #define BOARD_NOT_READY 0
317 #define BOARD_READY 1
318 static void hpsa_drain_accel_commands(struct ctlr_info *h);
319 static void hpsa_flush_cache(struct ctlr_info *h);
320 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
321 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
322 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
323 static void hpsa_command_resubmit_worker(struct work_struct *work);
324 static u32 lockup_detected(struct ctlr_info *h);
325 static int detect_controller_lockup(struct ctlr_info *h);
326 static void hpsa_disable_rld_caching(struct ctlr_info *h);
327 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
328 struct ReportExtendedLUNdata *buf, int bufsize);
329 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
330 unsigned char scsi3addr[], u8 page);
331 static int hpsa_luns_changed(struct ctlr_info *h);
332 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
333 struct hpsa_scsi_dev_t *dev,
334 unsigned char *scsi3addr);
335
sdev_to_hba(struct scsi_device * sdev)336 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
337 {
338 unsigned long *priv = shost_priv(sdev->host);
339 return (struct ctlr_info *) *priv;
340 }
341
shost_to_hba(struct Scsi_Host * sh)342 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
343 {
344 unsigned long *priv = shost_priv(sh);
345 return (struct ctlr_info *) *priv;
346 }
347
hpsa_is_cmd_idle(struct CommandList * c)348 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
349 {
350 return c->scsi_cmd == SCSI_CMD_IDLE;
351 }
352
353 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
decode_sense_data(const u8 * sense_data,int sense_data_len,u8 * sense_key,u8 * asc,u8 * ascq)354 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
355 u8 *sense_key, u8 *asc, u8 *ascq)
356 {
357 struct scsi_sense_hdr sshdr;
358 bool rc;
359
360 *sense_key = -1;
361 *asc = -1;
362 *ascq = -1;
363
364 if (sense_data_len < 1)
365 return;
366
367 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
368 if (rc) {
369 *sense_key = sshdr.sense_key;
370 *asc = sshdr.asc;
371 *ascq = sshdr.ascq;
372 }
373 }
374
check_for_unit_attention(struct ctlr_info * h,struct CommandList * c)375 static int check_for_unit_attention(struct ctlr_info *h,
376 struct CommandList *c)
377 {
378 u8 sense_key, asc, ascq;
379 int sense_len;
380
381 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
382 sense_len = sizeof(c->err_info->SenseInfo);
383 else
384 sense_len = c->err_info->SenseLen;
385
386 decode_sense_data(c->err_info->SenseInfo, sense_len,
387 &sense_key, &asc, &ascq);
388 if (sense_key != UNIT_ATTENTION || asc == 0xff)
389 return 0;
390
391 switch (asc) {
392 case STATE_CHANGED:
393 dev_warn(&h->pdev->dev,
394 "%s: a state change detected, command retried\n",
395 h->devname);
396 break;
397 case LUN_FAILED:
398 dev_warn(&h->pdev->dev,
399 "%s: LUN failure detected\n", h->devname);
400 break;
401 case REPORT_LUNS_CHANGED:
402 dev_warn(&h->pdev->dev,
403 "%s: report LUN data changed\n", h->devname);
404 /*
405 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
406 * target (array) devices.
407 */
408 break;
409 case POWER_OR_RESET:
410 dev_warn(&h->pdev->dev,
411 "%s: a power on or device reset detected\n",
412 h->devname);
413 break;
414 case UNIT_ATTENTION_CLEARED:
415 dev_warn(&h->pdev->dev,
416 "%s: unit attention cleared by another initiator\n",
417 h->devname);
418 break;
419 default:
420 dev_warn(&h->pdev->dev,
421 "%s: unknown unit attention detected\n",
422 h->devname);
423 break;
424 }
425 return 1;
426 }
427
check_for_busy(struct ctlr_info * h,struct CommandList * c)428 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
429 {
430 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
431 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
432 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
433 return 0;
434 dev_warn(&h->pdev->dev, HPSA "device busy");
435 return 1;
436 }
437
438 static u32 lockup_detected(struct ctlr_info *h);
host_show_lockup_detected(struct device * dev,struct device_attribute * attr,char * buf)439 static ssize_t host_show_lockup_detected(struct device *dev,
440 struct device_attribute *attr, char *buf)
441 {
442 int ld;
443 struct ctlr_info *h;
444 struct Scsi_Host *shost = class_to_shost(dev);
445
446 h = shost_to_hba(shost);
447 ld = lockup_detected(h);
448
449 return sprintf(buf, "ld=%d\n", ld);
450 }
451
host_store_hp_ssd_smart_path_status(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)452 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
453 struct device_attribute *attr,
454 const char *buf, size_t count)
455 {
456 int status;
457 struct ctlr_info *h;
458 struct Scsi_Host *shost = class_to_shost(dev);
459
460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461 return -EACCES;
462 if (kstrtoint(buf, 10, &status))
463 return -EINVAL;
464 h = shost_to_hba(shost);
465 h->acciopath_status = !!status;
466 dev_warn(&h->pdev->dev,
467 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
468 h->acciopath_status ? "enabled" : "disabled");
469 return count;
470 }
471
host_store_raid_offload_debug(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)472 static ssize_t host_store_raid_offload_debug(struct device *dev,
473 struct device_attribute *attr,
474 const char *buf, size_t count)
475 {
476 int debug_level;
477 struct ctlr_info *h;
478 struct Scsi_Host *shost = class_to_shost(dev);
479
480 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
481 return -EACCES;
482 if (kstrtoint(buf, 10, &debug_level))
483 return -EINVAL;
484 if (debug_level < 0)
485 debug_level = 0;
486 h = shost_to_hba(shost);
487 h->raid_offload_debug = debug_level;
488 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
489 h->raid_offload_debug);
490 return count;
491 }
492
host_store_rescan(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)493 static ssize_t host_store_rescan(struct device *dev,
494 struct device_attribute *attr,
495 const char *buf, size_t count)
496 {
497 struct ctlr_info *h;
498 struct Scsi_Host *shost = class_to_shost(dev);
499 h = shost_to_hba(shost);
500 hpsa_scan_start(h->scsi_host);
501 return count;
502 }
503
hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t * device)504 static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device)
505 {
506 device->offload_enabled = 0;
507 device->offload_to_be_enabled = 0;
508 }
509
host_show_firmware_revision(struct device * dev,struct device_attribute * attr,char * buf)510 static ssize_t host_show_firmware_revision(struct device *dev,
511 struct device_attribute *attr, char *buf)
512 {
513 struct ctlr_info *h;
514 struct Scsi_Host *shost = class_to_shost(dev);
515 unsigned char *fwrev;
516
517 h = shost_to_hba(shost);
518 if (!h->hba_inquiry_data)
519 return 0;
520 fwrev = &h->hba_inquiry_data[32];
521 return snprintf(buf, 20, "%c%c%c%c\n",
522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
523 }
524
host_show_commands_outstanding(struct device * dev,struct device_attribute * attr,char * buf)525 static ssize_t host_show_commands_outstanding(struct device *dev,
526 struct device_attribute *attr, char *buf)
527 {
528 struct Scsi_Host *shost = class_to_shost(dev);
529 struct ctlr_info *h = shost_to_hba(shost);
530
531 return snprintf(buf, 20, "%d\n",
532 atomic_read(&h->commands_outstanding));
533 }
534
host_show_transport_mode(struct device * dev,struct device_attribute * attr,char * buf)535 static ssize_t host_show_transport_mode(struct device *dev,
536 struct device_attribute *attr, char *buf)
537 {
538 struct ctlr_info *h;
539 struct Scsi_Host *shost = class_to_shost(dev);
540
541 h = shost_to_hba(shost);
542 return snprintf(buf, 20, "%s\n",
543 h->transMethod & CFGTBL_Trans_Performant ?
544 "performant" : "simple");
545 }
546
host_show_hp_ssd_smart_path_status(struct device * dev,struct device_attribute * attr,char * buf)547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
548 struct device_attribute *attr, char *buf)
549 {
550 struct ctlr_info *h;
551 struct Scsi_Host *shost = class_to_shost(dev);
552
553 h = shost_to_hba(shost);
554 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
555 (h->acciopath_status == 1) ? "enabled" : "disabled");
556 }
557
558 /* List of controllers which cannot be hard reset on kexec with reset_devices */
559 static u32 unresettable_controller[] = {
560 0x324a103C, /* Smart Array P712m */
561 0x324b103C, /* Smart Array P711m */
562 0x3223103C, /* Smart Array P800 */
563 0x3234103C, /* Smart Array P400 */
564 0x3235103C, /* Smart Array P400i */
565 0x3211103C, /* Smart Array E200i */
566 0x3212103C, /* Smart Array E200 */
567 0x3213103C, /* Smart Array E200i */
568 0x3214103C, /* Smart Array E200i */
569 0x3215103C, /* Smart Array E200i */
570 0x3237103C, /* Smart Array E500 */
571 0x323D103C, /* Smart Array P700m */
572 0x40800E11, /* Smart Array 5i */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575 0x40700E11, /* Smart Array 5300 */
576 0x40820E11, /* Smart Array 532 */
577 0x40830E11, /* Smart Array 5312 */
578 0x409A0E11, /* Smart Array 641 */
579 0x409B0E11, /* Smart Array 642 */
580 0x40910E11, /* Smart Array 6i */
581 };
582
583 /* List of controllers which cannot even be soft reset */
584 static u32 soft_unresettable_controller[] = {
585 0x40800E11, /* Smart Array 5i */
586 0x40700E11, /* Smart Array 5300 */
587 0x40820E11, /* Smart Array 532 */
588 0x40830E11, /* Smart Array 5312 */
589 0x409A0E11, /* Smart Array 641 */
590 0x409B0E11, /* Smart Array 642 */
591 0x40910E11, /* Smart Array 6i */
592 /* Exclude 640x boards. These are two pci devices in one slot
593 * which share a battery backed cache module. One controls the
594 * cache, the other accesses the cache through the one that controls
595 * it. If we reset the one controlling the cache, the other will
596 * likely not be happy. Just forbid resetting this conjoined mess.
597 * The 640x isn't really supported by hpsa anyway.
598 */
599 0x409C0E11, /* Smart Array 6400 */
600 0x409D0E11, /* Smart Array 6400 EM */
601 };
602
board_id_in_array(u32 a[],int nelems,u32 board_id)603 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
604 {
605 int i;
606
607 for (i = 0; i < nelems; i++)
608 if (a[i] == board_id)
609 return 1;
610 return 0;
611 }
612
ctlr_is_hard_resettable(u32 board_id)613 static int ctlr_is_hard_resettable(u32 board_id)
614 {
615 return !board_id_in_array(unresettable_controller,
616 ARRAY_SIZE(unresettable_controller), board_id);
617 }
618
ctlr_is_soft_resettable(u32 board_id)619 static int ctlr_is_soft_resettable(u32 board_id)
620 {
621 return !board_id_in_array(soft_unresettable_controller,
622 ARRAY_SIZE(soft_unresettable_controller), board_id);
623 }
624
ctlr_is_resettable(u32 board_id)625 static int ctlr_is_resettable(u32 board_id)
626 {
627 return ctlr_is_hard_resettable(board_id) ||
628 ctlr_is_soft_resettable(board_id);
629 }
630
host_show_resettable(struct device * dev,struct device_attribute * attr,char * buf)631 static ssize_t host_show_resettable(struct device *dev,
632 struct device_attribute *attr, char *buf)
633 {
634 struct ctlr_info *h;
635 struct Scsi_Host *shost = class_to_shost(dev);
636
637 h = shost_to_hba(shost);
638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
639 }
640
is_logical_dev_addr_mode(unsigned char scsi3addr[])641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
642 {
643 return (scsi3addr[3] & 0xC0) == 0x40;
644 }
645
646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
647 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
648 };
649 #define HPSA_RAID_0 0
650 #define HPSA_RAID_4 1
651 #define HPSA_RAID_1 2 /* also used for RAID 10 */
652 #define HPSA_RAID_5 3 /* also used for RAID 50 */
653 #define HPSA_RAID_51 4
654 #define HPSA_RAID_6 5 /* also used for RAID 60 */
655 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
658
is_logical_device(struct hpsa_scsi_dev_t * device)659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
660 {
661 return !device->physical_device;
662 }
663
raid_level_show(struct device * dev,struct device_attribute * attr,char * buf)664 static ssize_t raid_level_show(struct device *dev,
665 struct device_attribute *attr, char *buf)
666 {
667 ssize_t l = 0;
668 unsigned char rlevel;
669 struct ctlr_info *h;
670 struct scsi_device *sdev;
671 struct hpsa_scsi_dev_t *hdev;
672 unsigned long flags;
673
674 sdev = to_scsi_device(dev);
675 h = sdev_to_hba(sdev);
676 spin_lock_irqsave(&h->lock, flags);
677 hdev = sdev->hostdata;
678 if (!hdev) {
679 spin_unlock_irqrestore(&h->lock, flags);
680 return -ENODEV;
681 }
682
683 /* Is this even a logical drive? */
684 if (!is_logical_device(hdev)) {
685 spin_unlock_irqrestore(&h->lock, flags);
686 l = snprintf(buf, PAGE_SIZE, "N/A\n");
687 return l;
688 }
689
690 rlevel = hdev->raid_level;
691 spin_unlock_irqrestore(&h->lock, flags);
692 if (rlevel > RAID_UNKNOWN)
693 rlevel = RAID_UNKNOWN;
694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
695 return l;
696 }
697
lunid_show(struct device * dev,struct device_attribute * attr,char * buf)698 static ssize_t lunid_show(struct device *dev,
699 struct device_attribute *attr, char *buf)
700 {
701 struct ctlr_info *h;
702 struct scsi_device *sdev;
703 struct hpsa_scsi_dev_t *hdev;
704 unsigned long flags;
705 unsigned char lunid[8];
706
707 sdev = to_scsi_device(dev);
708 h = sdev_to_hba(sdev);
709 spin_lock_irqsave(&h->lock, flags);
710 hdev = sdev->hostdata;
711 if (!hdev) {
712 spin_unlock_irqrestore(&h->lock, flags);
713 return -ENODEV;
714 }
715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
716 spin_unlock_irqrestore(&h->lock, flags);
717 return snprintf(buf, 20, "0x%8phN\n", lunid);
718 }
719
unique_id_show(struct device * dev,struct device_attribute * attr,char * buf)720 static ssize_t unique_id_show(struct device *dev,
721 struct device_attribute *attr, char *buf)
722 {
723 struct ctlr_info *h;
724 struct scsi_device *sdev;
725 struct hpsa_scsi_dev_t *hdev;
726 unsigned long flags;
727 unsigned char sn[16];
728
729 sdev = to_scsi_device(dev);
730 h = sdev_to_hba(sdev);
731 spin_lock_irqsave(&h->lock, flags);
732 hdev = sdev->hostdata;
733 if (!hdev) {
734 spin_unlock_irqrestore(&h->lock, flags);
735 return -ENODEV;
736 }
737 memcpy(sn, hdev->device_id, sizeof(sn));
738 spin_unlock_irqrestore(&h->lock, flags);
739 return snprintf(buf, 16 * 2 + 2,
740 "%02X%02X%02X%02X%02X%02X%02X%02X"
741 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
742 sn[0], sn[1], sn[2], sn[3],
743 sn[4], sn[5], sn[6], sn[7],
744 sn[8], sn[9], sn[10], sn[11],
745 sn[12], sn[13], sn[14], sn[15]);
746 }
747
sas_address_show(struct device * dev,struct device_attribute * attr,char * buf)748 static ssize_t sas_address_show(struct device *dev,
749 struct device_attribute *attr, char *buf)
750 {
751 struct ctlr_info *h;
752 struct scsi_device *sdev;
753 struct hpsa_scsi_dev_t *hdev;
754 unsigned long flags;
755 u64 sas_address;
756
757 sdev = to_scsi_device(dev);
758 h = sdev_to_hba(sdev);
759 spin_lock_irqsave(&h->lock, flags);
760 hdev = sdev->hostdata;
761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
762 spin_unlock_irqrestore(&h->lock, flags);
763 return -ENODEV;
764 }
765 sas_address = hdev->sas_address;
766 spin_unlock_irqrestore(&h->lock, flags);
767
768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
769 }
770
host_show_hp_ssd_smart_path_enabled(struct device * dev,struct device_attribute * attr,char * buf)771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
772 struct device_attribute *attr, char *buf)
773 {
774 struct ctlr_info *h;
775 struct scsi_device *sdev;
776 struct hpsa_scsi_dev_t *hdev;
777 unsigned long flags;
778 int offload_enabled;
779
780 sdev = to_scsi_device(dev);
781 h = sdev_to_hba(sdev);
782 spin_lock_irqsave(&h->lock, flags);
783 hdev = sdev->hostdata;
784 if (!hdev) {
785 spin_unlock_irqrestore(&h->lock, flags);
786 return -ENODEV;
787 }
788 offload_enabled = hdev->offload_enabled;
789 spin_unlock_irqrestore(&h->lock, flags);
790
791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
792 return snprintf(buf, 20, "%d\n", offload_enabled);
793 else
794 return snprintf(buf, 40, "%s\n",
795 "Not applicable for a controller");
796 }
797
798 #define MAX_PATHS 8
path_info_show(struct device * dev,struct device_attribute * attr,char * buf)799 static ssize_t path_info_show(struct device *dev,
800 struct device_attribute *attr, char *buf)
801 {
802 struct ctlr_info *h;
803 struct scsi_device *sdev;
804 struct hpsa_scsi_dev_t *hdev;
805 unsigned long flags;
806 int i;
807 int output_len = 0;
808 u8 box;
809 u8 bay;
810 u8 path_map_index = 0;
811 char *active;
812 unsigned char phys_connector[2];
813
814 sdev = to_scsi_device(dev);
815 h = sdev_to_hba(sdev);
816 spin_lock_irqsave(&h->devlock, flags);
817 hdev = sdev->hostdata;
818 if (!hdev) {
819 spin_unlock_irqrestore(&h->devlock, flags);
820 return -ENODEV;
821 }
822
823 bay = hdev->bay;
824 for (i = 0; i < MAX_PATHS; i++) {
825 path_map_index = 1<<i;
826 if (i == hdev->active_path_index)
827 active = "Active";
828 else if (hdev->path_map & path_map_index)
829 active = "Inactive";
830 else
831 continue;
832
833 output_len += scnprintf(buf + output_len,
834 PAGE_SIZE - output_len,
835 "[%d:%d:%d:%d] %20.20s ",
836 h->scsi_host->host_no,
837 hdev->bus, hdev->target, hdev->lun,
838 scsi_device_type(hdev->devtype));
839
840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
841 output_len += scnprintf(buf + output_len,
842 PAGE_SIZE - output_len,
843 "%s\n", active);
844 continue;
845 }
846
847 box = hdev->box[i];
848 memcpy(&phys_connector, &hdev->phys_connector[i],
849 sizeof(phys_connector));
850 if (phys_connector[0] < '0')
851 phys_connector[0] = '0';
852 if (phys_connector[1] < '0')
853 phys_connector[1] = '0';
854 output_len += scnprintf(buf + output_len,
855 PAGE_SIZE - output_len,
856 "PORT: %.2s ",
857 phys_connector);
858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
859 hdev->expose_device) {
860 if (box == 0 || box == 0xFF) {
861 output_len += scnprintf(buf + output_len,
862 PAGE_SIZE - output_len,
863 "BAY: %hhu %s\n",
864 bay, active);
865 } else {
866 output_len += scnprintf(buf + output_len,
867 PAGE_SIZE - output_len,
868 "BOX: %hhu BAY: %hhu %s\n",
869 box, bay, active);
870 }
871 } else if (box != 0 && box != 0xFF) {
872 output_len += scnprintf(buf + output_len,
873 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
874 box, active);
875 } else
876 output_len += scnprintf(buf + output_len,
877 PAGE_SIZE - output_len, "%s\n", active);
878 }
879
880 spin_unlock_irqrestore(&h->devlock, flags);
881 return output_len;
882 }
883
host_show_ctlr_num(struct device * dev,struct device_attribute * attr,char * buf)884 static ssize_t host_show_ctlr_num(struct device *dev,
885 struct device_attribute *attr, char *buf)
886 {
887 struct ctlr_info *h;
888 struct Scsi_Host *shost = class_to_shost(dev);
889
890 h = shost_to_hba(shost);
891 return snprintf(buf, 20, "%d\n", h->ctlr);
892 }
893
host_show_legacy_board(struct device * dev,struct device_attribute * attr,char * buf)894 static ssize_t host_show_legacy_board(struct device *dev,
895 struct device_attribute *attr, char *buf)
896 {
897 struct ctlr_info *h;
898 struct Scsi_Host *shost = class_to_shost(dev);
899
900 h = shost_to_hba(shost);
901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
902 }
903
904 static DEVICE_ATTR_RO(raid_level);
905 static DEVICE_ATTR_RO(lunid);
906 static DEVICE_ATTR_RO(unique_id);
907 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
908 static DEVICE_ATTR_RO(sas_address);
909 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
910 host_show_hp_ssd_smart_path_enabled, NULL);
911 static DEVICE_ATTR_RO(path_info);
912 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
913 host_show_hp_ssd_smart_path_status,
914 host_store_hp_ssd_smart_path_status);
915 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
916 host_store_raid_offload_debug);
917 static DEVICE_ATTR(firmware_revision, S_IRUGO,
918 host_show_firmware_revision, NULL);
919 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
920 host_show_commands_outstanding, NULL);
921 static DEVICE_ATTR(transport_mode, S_IRUGO,
922 host_show_transport_mode, NULL);
923 static DEVICE_ATTR(resettable, S_IRUGO,
924 host_show_resettable, NULL);
925 static DEVICE_ATTR(lockup_detected, S_IRUGO,
926 host_show_lockup_detected, NULL);
927 static DEVICE_ATTR(ctlr_num, S_IRUGO,
928 host_show_ctlr_num, NULL);
929 static DEVICE_ATTR(legacy_board, S_IRUGO,
930 host_show_legacy_board, NULL);
931
932 static struct attribute *hpsa_sdev_attrs[] = {
933 &dev_attr_raid_level.attr,
934 &dev_attr_lunid.attr,
935 &dev_attr_unique_id.attr,
936 &dev_attr_hp_ssd_smart_path_enabled.attr,
937 &dev_attr_path_info.attr,
938 &dev_attr_sas_address.attr,
939 NULL,
940 };
941
942 ATTRIBUTE_GROUPS(hpsa_sdev);
943
944 static struct attribute *hpsa_shost_attrs[] = {
945 &dev_attr_rescan.attr,
946 &dev_attr_firmware_revision.attr,
947 &dev_attr_commands_outstanding.attr,
948 &dev_attr_transport_mode.attr,
949 &dev_attr_resettable.attr,
950 &dev_attr_hp_ssd_smart_path_status.attr,
951 &dev_attr_raid_offload_debug.attr,
952 &dev_attr_lockup_detected.attr,
953 &dev_attr_ctlr_num.attr,
954 &dev_attr_legacy_board.attr,
955 NULL,
956 };
957
958 ATTRIBUTE_GROUPS(hpsa_shost);
959
960 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
961 HPSA_MAX_CONCURRENT_PASSTHRUS)
962
963 static const struct scsi_host_template hpsa_driver_template = {
964 .module = THIS_MODULE,
965 .name = HPSA,
966 .proc_name = HPSA,
967 .queuecommand = hpsa_scsi_queue_command,
968 .scan_start = hpsa_scan_start,
969 .scan_finished = hpsa_scan_finished,
970 .change_queue_depth = hpsa_change_queue_depth,
971 .this_id = -1,
972 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
973 .ioctl = hpsa_ioctl,
974 .sdev_init = hpsa_sdev_init,
975 .sdev_configure = hpsa_sdev_configure,
976 .sdev_destroy = hpsa_sdev_destroy,
977 #ifdef CONFIG_COMPAT
978 .compat_ioctl = hpsa_compat_ioctl,
979 #endif
980 .sdev_groups = hpsa_sdev_groups,
981 .shost_groups = hpsa_shost_groups,
982 .max_sectors = 2048,
983 .no_write_same = 1,
984 };
985
next_command(struct ctlr_info * h,u8 q)986 static inline u32 next_command(struct ctlr_info *h, u8 q)
987 {
988 u32 a;
989 struct reply_queue_buffer *rq = &h->reply_queue[q];
990
991 if (h->transMethod & CFGTBL_Trans_io_accel1)
992 return h->access.command_completed(h, q);
993
994 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
995 return h->access.command_completed(h, q);
996
997 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
998 a = rq->head[rq->current_entry];
999 rq->current_entry++;
1000 atomic_dec(&h->commands_outstanding);
1001 } else {
1002 a = FIFO_EMPTY;
1003 }
1004 /* Check for wraparound */
1005 if (rq->current_entry == h->max_commands) {
1006 rq->current_entry = 0;
1007 rq->wraparound ^= 1;
1008 }
1009 return a;
1010 }
1011
1012 /*
1013 * There are some special bits in the bus address of the
1014 * command that we have to set for the controller to know
1015 * how to process the command:
1016 *
1017 * Normal performant mode:
1018 * bit 0: 1 means performant mode, 0 means simple mode.
1019 * bits 1-3 = block fetch table entry
1020 * bits 4-6 = command type (== 0)
1021 *
1022 * ioaccel1 mode:
1023 * bit 0 = "performant mode" bit.
1024 * bits 1-3 = block fetch table entry
1025 * bits 4-6 = command type (== 110)
1026 * (command type is needed because ioaccel1 mode
1027 * commands are submitted through the same register as normal
1028 * mode commands, so this is how the controller knows whether
1029 * the command is normal mode or ioaccel1 mode.)
1030 *
1031 * ioaccel2 mode:
1032 * bit 0 = "performant mode" bit.
1033 * bits 1-4 = block fetch table entry (note extra bit)
1034 * bits 4-6 = not needed, because ioaccel2 mode has
1035 * a separate special register for submitting commands.
1036 */
1037
1038 /*
1039 * set_performant_mode: Modify the tag for cciss performant
1040 * set bit 0 for pull model, bits 3-1 for block fetch
1041 * register number
1042 */
1043 #define DEFAULT_REPLY_QUEUE (-1)
set_performant_mode(struct ctlr_info * h,struct CommandList * c,int reply_queue)1044 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1045 int reply_queue)
1046 {
1047 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1048 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1049 if (unlikely(!h->msix_vectors))
1050 return;
1051 c->Header.ReplyQueue = reply_queue;
1052 }
1053 }
1054
set_ioaccel1_performant_mode(struct ctlr_info * h,struct CommandList * c,int reply_queue)1055 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1056 struct CommandList *c,
1057 int reply_queue)
1058 {
1059 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1060
1061 /*
1062 * Tell the controller to post the reply to the queue for this
1063 * processor. This seems to give the best I/O throughput.
1064 */
1065 cp->ReplyQueue = reply_queue;
1066 /*
1067 * Set the bits in the address sent down to include:
1068 * - performant mode bit (bit 0)
1069 * - pull count (bits 1-3)
1070 * - command type (bits 4-6)
1071 */
1072 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1073 IOACCEL1_BUSADDR_CMDTYPE;
1074 }
1075
set_ioaccel2_tmf_performant_mode(struct ctlr_info * h,struct CommandList * c,int reply_queue)1076 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1077 struct CommandList *c,
1078 int reply_queue)
1079 {
1080 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1081 &h->ioaccel2_cmd_pool[c->cmdindex];
1082
1083 /* Tell the controller to post the reply to the queue for this
1084 * processor. This seems to give the best I/O throughput.
1085 */
1086 cp->reply_queue = reply_queue;
1087 /* Set the bits in the address sent down to include:
1088 * - performant mode bit not used in ioaccel mode 2
1089 * - pull count (bits 0-3)
1090 * - command type isn't needed for ioaccel2
1091 */
1092 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1093 }
1094
set_ioaccel2_performant_mode(struct ctlr_info * h,struct CommandList * c,int reply_queue)1095 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1096 struct CommandList *c,
1097 int reply_queue)
1098 {
1099 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1100
1101 /*
1102 * Tell the controller to post the reply to the queue for this
1103 * processor. This seems to give the best I/O throughput.
1104 */
1105 cp->reply_queue = reply_queue;
1106 /*
1107 * Set the bits in the address sent down to include:
1108 * - performant mode bit not used in ioaccel mode 2
1109 * - pull count (bits 0-3)
1110 * - command type isn't needed for ioaccel2
1111 */
1112 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1113 }
1114
is_firmware_flash_cmd(u8 * cdb)1115 static int is_firmware_flash_cmd(u8 *cdb)
1116 {
1117 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1118 }
1119
1120 /*
1121 * During firmware flash, the heartbeat register may not update as frequently
1122 * as it should. So we dial down lockup detection during firmware flash. and
1123 * dial it back up when firmware flash completes.
1124 */
1125 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1126 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1127 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
dial_down_lockup_detection_during_fw_flash(struct ctlr_info * h,struct CommandList * c)1128 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1129 struct CommandList *c)
1130 {
1131 if (!is_firmware_flash_cmd(c->Request.CDB))
1132 return;
1133 atomic_inc(&h->firmware_flash_in_progress);
1134 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1135 }
1136
dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info * h,struct CommandList * c)1137 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1138 struct CommandList *c)
1139 {
1140 if (is_firmware_flash_cmd(c->Request.CDB) &&
1141 atomic_dec_and_test(&h->firmware_flash_in_progress))
1142 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1143 }
1144
__enqueue_cmd_and_start_io(struct ctlr_info * h,struct CommandList * c,int reply_queue)1145 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1146 struct CommandList *c, int reply_queue)
1147 {
1148 dial_down_lockup_detection_during_fw_flash(h, c);
1149 atomic_inc(&h->commands_outstanding);
1150 /*
1151 * Check to see if the command is being retried.
1152 */
1153 if (c->device && !c->retry_pending)
1154 atomic_inc(&c->device->commands_outstanding);
1155
1156 reply_queue = h->reply_map[raw_smp_processor_id()];
1157 switch (c->cmd_type) {
1158 case CMD_IOACCEL1:
1159 set_ioaccel1_performant_mode(h, c, reply_queue);
1160 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1161 break;
1162 case CMD_IOACCEL2:
1163 set_ioaccel2_performant_mode(h, c, reply_queue);
1164 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1165 break;
1166 case IOACCEL2_TMF:
1167 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1168 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1169 break;
1170 default:
1171 set_performant_mode(h, c, reply_queue);
1172 h->access.submit_command(h, c);
1173 }
1174 }
1175
enqueue_cmd_and_start_io(struct ctlr_info * h,struct CommandList * c)1176 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1177 {
1178 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1179 }
1180
is_hba_lunid(unsigned char scsi3addr[])1181 static inline int is_hba_lunid(unsigned char scsi3addr[])
1182 {
1183 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1184 }
1185
is_scsi_rev_5(struct ctlr_info * h)1186 static inline int is_scsi_rev_5(struct ctlr_info *h)
1187 {
1188 if (!h->hba_inquiry_data)
1189 return 0;
1190 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1191 return 1;
1192 return 0;
1193 }
1194
hpsa_find_target_lun(struct ctlr_info * h,unsigned char scsi3addr[],int bus,int * target,int * lun)1195 static int hpsa_find_target_lun(struct ctlr_info *h,
1196 unsigned char scsi3addr[], int bus, int *target, int *lun)
1197 {
1198 /* finds an unused bus, target, lun for a new physical device
1199 * assumes h->devlock is held
1200 */
1201 int i, found = 0;
1202 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1203
1204 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1205
1206 for (i = 0; i < h->ndevices; i++) {
1207 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1208 __set_bit(h->dev[i]->target, lun_taken);
1209 }
1210
1211 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1212 if (i < HPSA_MAX_DEVICES) {
1213 /* *bus = 1; */
1214 *target = i;
1215 *lun = 0;
1216 found = 1;
1217 }
1218 return !found;
1219 }
1220
hpsa_show_dev_msg(const char * level,struct ctlr_info * h,struct hpsa_scsi_dev_t * dev,char * description)1221 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1222 struct hpsa_scsi_dev_t *dev, char *description)
1223 {
1224 #define LABEL_SIZE 25
1225 char label[LABEL_SIZE];
1226
1227 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1228 return;
1229
1230 switch (dev->devtype) {
1231 case TYPE_RAID:
1232 snprintf(label, LABEL_SIZE, "controller");
1233 break;
1234 case TYPE_ENCLOSURE:
1235 snprintf(label, LABEL_SIZE, "enclosure");
1236 break;
1237 case TYPE_DISK:
1238 case TYPE_ZBC:
1239 if (dev->external)
1240 snprintf(label, LABEL_SIZE, "external");
1241 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1242 snprintf(label, LABEL_SIZE, "%s",
1243 raid_label[PHYSICAL_DRIVE]);
1244 else
1245 snprintf(label, LABEL_SIZE, "RAID-%s",
1246 dev->raid_level > RAID_UNKNOWN ? "?" :
1247 raid_label[dev->raid_level]);
1248 break;
1249 case TYPE_ROM:
1250 snprintf(label, LABEL_SIZE, "rom");
1251 break;
1252 case TYPE_TAPE:
1253 snprintf(label, LABEL_SIZE, "tape");
1254 break;
1255 case TYPE_MEDIUM_CHANGER:
1256 snprintf(label, LABEL_SIZE, "changer");
1257 break;
1258 default:
1259 snprintf(label, LABEL_SIZE, "UNKNOWN");
1260 break;
1261 }
1262
1263 dev_printk(level, &h->pdev->dev,
1264 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1265 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1266 description,
1267 scsi_device_type(dev->devtype),
1268 dev->vendor,
1269 dev->model,
1270 label,
1271 dev->offload_config ? '+' : '-',
1272 dev->offload_to_be_enabled ? '+' : '-',
1273 dev->expose_device);
1274 }
1275
1276 /* Add an entry into h->dev[] array. */
hpsa_scsi_add_entry(struct ctlr_info * h,struct hpsa_scsi_dev_t * device,struct hpsa_scsi_dev_t * added[],int * nadded)1277 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1278 struct hpsa_scsi_dev_t *device,
1279 struct hpsa_scsi_dev_t *added[], int *nadded)
1280 {
1281 /* assumes h->devlock is held */
1282 int n = h->ndevices;
1283 int i;
1284 unsigned char addr1[8], addr2[8];
1285 struct hpsa_scsi_dev_t *sd;
1286
1287 if (n >= HPSA_MAX_DEVICES) {
1288 dev_err(&h->pdev->dev, "too many devices, some will be "
1289 "inaccessible.\n");
1290 return -1;
1291 }
1292
1293 /* physical devices do not have lun or target assigned until now. */
1294 if (device->lun != -1)
1295 /* Logical device, lun is already assigned. */
1296 goto lun_assigned;
1297
1298 /* If this device a non-zero lun of a multi-lun device
1299 * byte 4 of the 8-byte LUN addr will contain the logical
1300 * unit no, zero otherwise.
1301 */
1302 if (device->scsi3addr[4] == 0) {
1303 /* This is not a non-zero lun of a multi-lun device */
1304 if (hpsa_find_target_lun(h, device->scsi3addr,
1305 device->bus, &device->target, &device->lun) != 0)
1306 return -1;
1307 goto lun_assigned;
1308 }
1309
1310 /* This is a non-zero lun of a multi-lun device.
1311 * Search through our list and find the device which
1312 * has the same 8 byte LUN address, excepting byte 4 and 5.
1313 * Assign the same bus and target for this new LUN.
1314 * Use the logical unit number from the firmware.
1315 */
1316 memcpy(addr1, device->scsi3addr, 8);
1317 addr1[4] = 0;
1318 addr1[5] = 0;
1319 for (i = 0; i < n; i++) {
1320 sd = h->dev[i];
1321 memcpy(addr2, sd->scsi3addr, 8);
1322 addr2[4] = 0;
1323 addr2[5] = 0;
1324 /* differ only in byte 4 and 5? */
1325 if (memcmp(addr1, addr2, 8) == 0) {
1326 device->bus = sd->bus;
1327 device->target = sd->target;
1328 device->lun = device->scsi3addr[4];
1329 break;
1330 }
1331 }
1332 if (device->lun == -1) {
1333 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1334 " suspect firmware bug or unsupported hardware "
1335 "configuration.\n");
1336 return -1;
1337 }
1338
1339 lun_assigned:
1340
1341 h->dev[n] = device;
1342 h->ndevices++;
1343 added[*nadded] = device;
1344 (*nadded)++;
1345 hpsa_show_dev_msg(KERN_INFO, h, device,
1346 device->expose_device ? "added" : "masked");
1347 return 0;
1348 }
1349
1350 /*
1351 * Called during a scan operation.
1352 *
1353 * Update an entry in h->dev[] array.
1354 */
hpsa_scsi_update_entry(struct ctlr_info * h,int entry,struct hpsa_scsi_dev_t * new_entry)1355 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1356 int entry, struct hpsa_scsi_dev_t *new_entry)
1357 {
1358 /* assumes h->devlock is held */
1359 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1360
1361 /* Raid level changed. */
1362 h->dev[entry]->raid_level = new_entry->raid_level;
1363
1364 /*
1365 * ioacccel_handle may have changed for a dual domain disk
1366 */
1367 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1368
1369 /* Raid offload parameters changed. Careful about the ordering. */
1370 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1371 /*
1372 * if drive is newly offload_enabled, we want to copy the
1373 * raid map data first. If previously offload_enabled and
1374 * offload_config were set, raid map data had better be
1375 * the same as it was before. If raid map data has changed
1376 * then it had better be the case that
1377 * h->dev[entry]->offload_enabled is currently 0.
1378 */
1379 h->dev[entry]->raid_map = new_entry->raid_map;
1380 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1381 }
1382 if (new_entry->offload_to_be_enabled) {
1383 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1384 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1385 }
1386 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1387 h->dev[entry]->offload_config = new_entry->offload_config;
1388 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1389 h->dev[entry]->queue_depth = new_entry->queue_depth;
1390
1391 /*
1392 * We can turn off ioaccel offload now, but need to delay turning
1393 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1394 * can't do that until all the devices are updated.
1395 */
1396 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1397
1398 /*
1399 * turn ioaccel off immediately if told to do so.
1400 */
1401 if (!new_entry->offload_to_be_enabled)
1402 h->dev[entry]->offload_enabled = 0;
1403
1404 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1405 }
1406
1407 /* Replace an entry from h->dev[] array. */
hpsa_scsi_replace_entry(struct ctlr_info * h,int entry,struct hpsa_scsi_dev_t * new_entry,struct hpsa_scsi_dev_t * added[],int * nadded,struct hpsa_scsi_dev_t * removed[],int * nremoved)1408 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1409 int entry, struct hpsa_scsi_dev_t *new_entry,
1410 struct hpsa_scsi_dev_t *added[], int *nadded,
1411 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1412 {
1413 /* assumes h->devlock is held */
1414 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1415 removed[*nremoved] = h->dev[entry];
1416 (*nremoved)++;
1417
1418 /*
1419 * New physical devices won't have target/lun assigned yet
1420 * so we need to preserve the values in the slot we are replacing.
1421 */
1422 if (new_entry->target == -1) {
1423 new_entry->target = h->dev[entry]->target;
1424 new_entry->lun = h->dev[entry]->lun;
1425 }
1426
1427 h->dev[entry] = new_entry;
1428 added[*nadded] = new_entry;
1429 (*nadded)++;
1430
1431 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1432 }
1433
1434 /* Remove an entry from h->dev[] array. */
hpsa_scsi_remove_entry(struct ctlr_info * h,int entry,struct hpsa_scsi_dev_t * removed[],int * nremoved)1435 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1436 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1437 {
1438 /* assumes h->devlock is held */
1439 int i;
1440 struct hpsa_scsi_dev_t *sd;
1441
1442 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1443
1444 sd = h->dev[entry];
1445 removed[*nremoved] = h->dev[entry];
1446 (*nremoved)++;
1447
1448 for (i = entry; i < h->ndevices-1; i++)
1449 h->dev[i] = h->dev[i+1];
1450 h->ndevices--;
1451 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1452 }
1453
1454 #define SCSI3ADDR_EQ(a, b) ( \
1455 (a)[7] == (b)[7] && \
1456 (a)[6] == (b)[6] && \
1457 (a)[5] == (b)[5] && \
1458 (a)[4] == (b)[4] && \
1459 (a)[3] == (b)[3] && \
1460 (a)[2] == (b)[2] && \
1461 (a)[1] == (b)[1] && \
1462 (a)[0] == (b)[0])
1463
fixup_botched_add(struct ctlr_info * h,struct hpsa_scsi_dev_t * added)1464 static void fixup_botched_add(struct ctlr_info *h,
1465 struct hpsa_scsi_dev_t *added)
1466 {
1467 /* called when scsi_add_device fails in order to re-adjust
1468 * h->dev[] to match the mid layer's view.
1469 */
1470 unsigned long flags;
1471 int i, j;
1472
1473 spin_lock_irqsave(&h->lock, flags);
1474 for (i = 0; i < h->ndevices; i++) {
1475 if (h->dev[i] == added) {
1476 for (j = i; j < h->ndevices-1; j++)
1477 h->dev[j] = h->dev[j+1];
1478 h->ndevices--;
1479 break;
1480 }
1481 }
1482 spin_unlock_irqrestore(&h->lock, flags);
1483 kfree(added);
1484 }
1485
device_is_the_same(struct hpsa_scsi_dev_t * dev1,struct hpsa_scsi_dev_t * dev2)1486 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1487 struct hpsa_scsi_dev_t *dev2)
1488 {
1489 /* we compare everything except lun and target as these
1490 * are not yet assigned. Compare parts likely
1491 * to differ first
1492 */
1493 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1494 sizeof(dev1->scsi3addr)) != 0)
1495 return 0;
1496 if (memcmp(dev1->device_id, dev2->device_id,
1497 sizeof(dev1->device_id)) != 0)
1498 return 0;
1499 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1500 return 0;
1501 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1502 return 0;
1503 if (dev1->devtype != dev2->devtype)
1504 return 0;
1505 if (dev1->bus != dev2->bus)
1506 return 0;
1507 return 1;
1508 }
1509
device_updated(struct hpsa_scsi_dev_t * dev1,struct hpsa_scsi_dev_t * dev2)1510 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1511 struct hpsa_scsi_dev_t *dev2)
1512 {
1513 /* Device attributes that can change, but don't mean
1514 * that the device is a different device, nor that the OS
1515 * needs to be told anything about the change.
1516 */
1517 if (dev1->raid_level != dev2->raid_level)
1518 return 1;
1519 if (dev1->offload_config != dev2->offload_config)
1520 return 1;
1521 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1522 return 1;
1523 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1524 if (dev1->queue_depth != dev2->queue_depth)
1525 return 1;
1526 /*
1527 * This can happen for dual domain devices. An active
1528 * path change causes the ioaccel handle to change
1529 *
1530 * for example note the handle differences between p0 and p1
1531 * Device WWN ,WWN hash,Handle
1532 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1533 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004
1534 */
1535 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1536 return 1;
1537 return 0;
1538 }
1539
1540 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1541 * and return needle location in *index. If scsi3addr matches, but not
1542 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1543 * location in *index.
1544 * In the case of a minor device attribute change, such as RAID level, just
1545 * return DEVICE_UPDATED, along with the updated device's location in index.
1546 * If needle not found, return DEVICE_NOT_FOUND.
1547 */
hpsa_scsi_find_entry(struct hpsa_scsi_dev_t * needle,struct hpsa_scsi_dev_t * haystack[],int haystack_size,int * index)1548 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1549 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1550 int *index)
1551 {
1552 int i;
1553 #define DEVICE_NOT_FOUND 0
1554 #define DEVICE_CHANGED 1
1555 #define DEVICE_SAME 2
1556 #define DEVICE_UPDATED 3
1557 if (needle == NULL)
1558 return DEVICE_NOT_FOUND;
1559
1560 for (i = 0; i < haystack_size; i++) {
1561 if (haystack[i] == NULL) /* previously removed. */
1562 continue;
1563 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1564 *index = i;
1565 if (device_is_the_same(needle, haystack[i])) {
1566 if (device_updated(needle, haystack[i]))
1567 return DEVICE_UPDATED;
1568 return DEVICE_SAME;
1569 } else {
1570 /* Keep offline devices offline */
1571 if (needle->volume_offline)
1572 return DEVICE_NOT_FOUND;
1573 return DEVICE_CHANGED;
1574 }
1575 }
1576 }
1577 *index = -1;
1578 return DEVICE_NOT_FOUND;
1579 }
1580
hpsa_monitor_offline_device(struct ctlr_info * h,unsigned char scsi3addr[])1581 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1582 unsigned char scsi3addr[])
1583 {
1584 struct offline_device_entry *device;
1585 unsigned long flags;
1586
1587 /* Check to see if device is already on the list */
1588 spin_lock_irqsave(&h->offline_device_lock, flags);
1589 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1590 if (memcmp(device->scsi3addr, scsi3addr,
1591 sizeof(device->scsi3addr)) == 0) {
1592 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1593 return;
1594 }
1595 }
1596 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1597
1598 /* Device is not on the list, add it. */
1599 device = kmalloc(sizeof(*device), GFP_KERNEL);
1600 if (!device)
1601 return;
1602
1603 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1604 spin_lock_irqsave(&h->offline_device_lock, flags);
1605 list_add_tail(&device->offline_list, &h->offline_device_list);
1606 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1607 }
1608
1609 /* Print a message explaining various offline volume states */
hpsa_show_volume_status(struct ctlr_info * h,struct hpsa_scsi_dev_t * sd)1610 static void hpsa_show_volume_status(struct ctlr_info *h,
1611 struct hpsa_scsi_dev_t *sd)
1612 {
1613 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1614 dev_info(&h->pdev->dev,
1615 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1616 h->scsi_host->host_no,
1617 sd->bus, sd->target, sd->lun);
1618 switch (sd->volume_offline) {
1619 case HPSA_LV_OK:
1620 break;
1621 case HPSA_LV_UNDERGOING_ERASE:
1622 dev_info(&h->pdev->dev,
1623 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1624 h->scsi_host->host_no,
1625 sd->bus, sd->target, sd->lun);
1626 break;
1627 case HPSA_LV_NOT_AVAILABLE:
1628 dev_info(&h->pdev->dev,
1629 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1630 h->scsi_host->host_no,
1631 sd->bus, sd->target, sd->lun);
1632 break;
1633 case HPSA_LV_UNDERGOING_RPI:
1634 dev_info(&h->pdev->dev,
1635 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1636 h->scsi_host->host_no,
1637 sd->bus, sd->target, sd->lun);
1638 break;
1639 case HPSA_LV_PENDING_RPI:
1640 dev_info(&h->pdev->dev,
1641 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1642 h->scsi_host->host_no,
1643 sd->bus, sd->target, sd->lun);
1644 break;
1645 case HPSA_LV_ENCRYPTED_NO_KEY:
1646 dev_info(&h->pdev->dev,
1647 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1648 h->scsi_host->host_no,
1649 sd->bus, sd->target, sd->lun);
1650 break;
1651 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1652 dev_info(&h->pdev->dev,
1653 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1654 h->scsi_host->host_no,
1655 sd->bus, sd->target, sd->lun);
1656 break;
1657 case HPSA_LV_UNDERGOING_ENCRYPTION:
1658 dev_info(&h->pdev->dev,
1659 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1660 h->scsi_host->host_no,
1661 sd->bus, sd->target, sd->lun);
1662 break;
1663 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1664 dev_info(&h->pdev->dev,
1665 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1666 h->scsi_host->host_no,
1667 sd->bus, sd->target, sd->lun);
1668 break;
1669 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1670 dev_info(&h->pdev->dev,
1671 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1672 h->scsi_host->host_no,
1673 sd->bus, sd->target, sd->lun);
1674 break;
1675 case HPSA_LV_PENDING_ENCRYPTION:
1676 dev_info(&h->pdev->dev,
1677 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1678 h->scsi_host->host_no,
1679 sd->bus, sd->target, sd->lun);
1680 break;
1681 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1682 dev_info(&h->pdev->dev,
1683 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1684 h->scsi_host->host_no,
1685 sd->bus, sd->target, sd->lun);
1686 break;
1687 }
1688 }
1689
1690 /*
1691 * Figure the list of physical drive pointers for a logical drive with
1692 * raid offload configured.
1693 */
hpsa_figure_phys_disk_ptrs(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev[],int ndevices,struct hpsa_scsi_dev_t * logical_drive)1694 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1695 struct hpsa_scsi_dev_t *dev[], int ndevices,
1696 struct hpsa_scsi_dev_t *logical_drive)
1697 {
1698 struct raid_map_data *map = &logical_drive->raid_map;
1699 struct raid_map_disk_data *dd = &map->data[0];
1700 int i, j;
1701 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1702 le16_to_cpu(map->metadata_disks_per_row);
1703 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1704 le16_to_cpu(map->layout_map_count) *
1705 total_disks_per_row;
1706 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1707 total_disks_per_row;
1708 int qdepth;
1709
1710 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1711 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1712
1713 logical_drive->nphysical_disks = nraid_map_entries;
1714
1715 qdepth = 0;
1716 for (i = 0; i < nraid_map_entries; i++) {
1717 logical_drive->phys_disk[i] = NULL;
1718 if (!logical_drive->offload_config)
1719 continue;
1720 for (j = 0; j < ndevices; j++) {
1721 if (dev[j] == NULL)
1722 continue;
1723 if (dev[j]->devtype != TYPE_DISK &&
1724 dev[j]->devtype != TYPE_ZBC)
1725 continue;
1726 if (is_logical_device(dev[j]))
1727 continue;
1728 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1729 continue;
1730
1731 logical_drive->phys_disk[i] = dev[j];
1732 if (i < nphys_disk)
1733 qdepth = min(h->nr_cmds, qdepth +
1734 logical_drive->phys_disk[i]->queue_depth);
1735 break;
1736 }
1737
1738 /*
1739 * This can happen if a physical drive is removed and
1740 * the logical drive is degraded. In that case, the RAID
1741 * map data will refer to a physical disk which isn't actually
1742 * present. And in that case offload_enabled should already
1743 * be 0, but we'll turn it off here just in case
1744 */
1745 if (!logical_drive->phys_disk[i]) {
1746 dev_warn(&h->pdev->dev,
1747 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1748 __func__,
1749 h->scsi_host->host_no, logical_drive->bus,
1750 logical_drive->target, logical_drive->lun);
1751 hpsa_turn_off_ioaccel_for_device(logical_drive);
1752 logical_drive->queue_depth = 8;
1753 }
1754 }
1755 if (nraid_map_entries)
1756 /*
1757 * This is correct for reads, too high for full stripe writes,
1758 * way too high for partial stripe writes
1759 */
1760 logical_drive->queue_depth = qdepth;
1761 else {
1762 if (logical_drive->external)
1763 logical_drive->queue_depth = EXTERNAL_QD;
1764 else
1765 logical_drive->queue_depth = h->nr_cmds;
1766 }
1767 }
1768
hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev[],int ndevices)1769 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1770 struct hpsa_scsi_dev_t *dev[], int ndevices)
1771 {
1772 int i;
1773
1774 for (i = 0; i < ndevices; i++) {
1775 if (dev[i] == NULL)
1776 continue;
1777 if (dev[i]->devtype != TYPE_DISK &&
1778 dev[i]->devtype != TYPE_ZBC)
1779 continue;
1780 if (!is_logical_device(dev[i]))
1781 continue;
1782
1783 /*
1784 * If offload is currently enabled, the RAID map and
1785 * phys_disk[] assignment *better* not be changing
1786 * because we would be changing ioaccel phsy_disk[] pointers
1787 * on a ioaccel volume processing I/O requests.
1788 *
1789 * If an ioaccel volume status changed, initially because it was
1790 * re-configured and thus underwent a transformation, or
1791 * a drive failed, we would have received a state change
1792 * request and ioaccel should have been turned off. When the
1793 * transformation completes, we get another state change
1794 * request to turn ioaccel back on. In this case, we need
1795 * to update the ioaccel information.
1796 *
1797 * Thus: If it is not currently enabled, but will be after
1798 * the scan completes, make sure the ioaccel pointers
1799 * are up to date.
1800 */
1801
1802 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1803 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1804 }
1805 }
1806
hpsa_add_device(struct ctlr_info * h,struct hpsa_scsi_dev_t * device)1807 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1808 {
1809 int rc = 0;
1810
1811 if (!h->scsi_host)
1812 return 1;
1813
1814 if (is_logical_device(device)) /* RAID */
1815 rc = scsi_add_device(h->scsi_host, device->bus,
1816 device->target, device->lun);
1817 else /* HBA */
1818 rc = hpsa_add_sas_device(h->sas_host, device);
1819
1820 return rc;
1821 }
1822
hpsa_find_outstanding_commands_for_dev(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev)1823 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1824 struct hpsa_scsi_dev_t *dev)
1825 {
1826 int i;
1827 int count = 0;
1828
1829 for (i = 0; i < h->nr_cmds; i++) {
1830 struct CommandList *c = h->cmd_pool + i;
1831 int refcount = atomic_inc_return(&c->refcount);
1832
1833 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1834 dev->scsi3addr)) {
1835 unsigned long flags;
1836
1837 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1838 if (!hpsa_is_cmd_idle(c))
1839 ++count;
1840 spin_unlock_irqrestore(&h->lock, flags);
1841 }
1842
1843 cmd_free(h, c);
1844 }
1845
1846 return count;
1847 }
1848
1849 #define NUM_WAIT 20
hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info * h,struct hpsa_scsi_dev_t * device)1850 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1851 struct hpsa_scsi_dev_t *device)
1852 {
1853 int cmds = 0;
1854 int waits = 0;
1855 int num_wait = NUM_WAIT;
1856
1857 if (device->external)
1858 num_wait = HPSA_EH_PTRAID_TIMEOUT;
1859
1860 while (1) {
1861 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1862 if (cmds == 0)
1863 break;
1864 if (++waits > num_wait)
1865 break;
1866 msleep(1000);
1867 }
1868
1869 if (waits > num_wait) {
1870 dev_warn(&h->pdev->dev,
1871 "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1872 __func__,
1873 h->scsi_host->host_no,
1874 device->bus, device->target, device->lun, cmds);
1875 }
1876 }
1877
hpsa_remove_device(struct ctlr_info * h,struct hpsa_scsi_dev_t * device)1878 static void hpsa_remove_device(struct ctlr_info *h,
1879 struct hpsa_scsi_dev_t *device)
1880 {
1881 struct scsi_device *sdev = NULL;
1882
1883 if (!h->scsi_host)
1884 return;
1885
1886 /*
1887 * Allow for commands to drain
1888 */
1889 device->removed = 1;
1890 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1891
1892 if (is_logical_device(device)) { /* RAID */
1893 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1894 device->target, device->lun);
1895 if (sdev) {
1896 scsi_remove_device(sdev);
1897 scsi_device_put(sdev);
1898 } else {
1899 /*
1900 * We don't expect to get here. Future commands
1901 * to this device will get a selection timeout as
1902 * if the device were gone.
1903 */
1904 hpsa_show_dev_msg(KERN_WARNING, h, device,
1905 "didn't find device for removal.");
1906 }
1907 } else { /* HBA */
1908
1909 hpsa_remove_sas_device(device);
1910 }
1911 }
1912
adjust_hpsa_scsi_table(struct ctlr_info * h,struct hpsa_scsi_dev_t * sd[],int nsds)1913 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1914 struct hpsa_scsi_dev_t *sd[], int nsds)
1915 {
1916 /* sd contains scsi3 addresses and devtypes, and inquiry
1917 * data. This function takes what's in sd to be the current
1918 * reality and updates h->dev[] to reflect that reality.
1919 */
1920 int i, entry, device_change, changes = 0;
1921 struct hpsa_scsi_dev_t *csd;
1922 unsigned long flags;
1923 struct hpsa_scsi_dev_t **added, **removed;
1924 int nadded, nremoved;
1925
1926 /*
1927 * A reset can cause a device status to change
1928 * re-schedule the scan to see what happened.
1929 */
1930 spin_lock_irqsave(&h->reset_lock, flags);
1931 if (h->reset_in_progress) {
1932 h->drv_req_rescan = 1;
1933 spin_unlock_irqrestore(&h->reset_lock, flags);
1934 return;
1935 }
1936 spin_unlock_irqrestore(&h->reset_lock, flags);
1937
1938 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
1939 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1940
1941 if (!added || !removed) {
1942 dev_warn(&h->pdev->dev, "out of memory in "
1943 "adjust_hpsa_scsi_table\n");
1944 goto free_and_out;
1945 }
1946
1947 spin_lock_irqsave(&h->devlock, flags);
1948
1949 /* find any devices in h->dev[] that are not in
1950 * sd[] and remove them from h->dev[], and for any
1951 * devices which have changed, remove the old device
1952 * info and add the new device info.
1953 * If minor device attributes change, just update
1954 * the existing device structure.
1955 */
1956 i = 0;
1957 nremoved = 0;
1958 nadded = 0;
1959 while (i < h->ndevices) {
1960 csd = h->dev[i];
1961 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1962 if (device_change == DEVICE_NOT_FOUND) {
1963 changes++;
1964 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1965 continue; /* remove ^^^, hence i not incremented */
1966 } else if (device_change == DEVICE_CHANGED) {
1967 changes++;
1968 hpsa_scsi_replace_entry(h, i, sd[entry],
1969 added, &nadded, removed, &nremoved);
1970 /* Set it to NULL to prevent it from being freed
1971 * at the bottom of hpsa_update_scsi_devices()
1972 */
1973 sd[entry] = NULL;
1974 } else if (device_change == DEVICE_UPDATED) {
1975 hpsa_scsi_update_entry(h, i, sd[entry]);
1976 }
1977 i++;
1978 }
1979
1980 /* Now, make sure every device listed in sd[] is also
1981 * listed in h->dev[], adding them if they aren't found
1982 */
1983
1984 for (i = 0; i < nsds; i++) {
1985 if (!sd[i]) /* if already added above. */
1986 continue;
1987
1988 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1989 * as the SCSI mid-layer does not handle such devices well.
1990 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1991 * at 160Hz, and prevents the system from coming up.
1992 */
1993 if (sd[i]->volume_offline) {
1994 hpsa_show_volume_status(h, sd[i]);
1995 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1996 continue;
1997 }
1998
1999 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
2000 h->ndevices, &entry);
2001 if (device_change == DEVICE_NOT_FOUND) {
2002 changes++;
2003 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
2004 break;
2005 sd[i] = NULL; /* prevent from being freed later. */
2006 } else if (device_change == DEVICE_CHANGED) {
2007 /* should never happen... */
2008 changes++;
2009 dev_warn(&h->pdev->dev,
2010 "device unexpectedly changed.\n");
2011 /* but if it does happen, we just ignore that device */
2012 }
2013 }
2014 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2015
2016 /*
2017 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2018 * any logical drives that need it enabled.
2019 *
2020 * The raid map should be current by now.
2021 *
2022 * We are updating the device list used for I/O requests.
2023 */
2024 for (i = 0; i < h->ndevices; i++) {
2025 if (h->dev[i] == NULL)
2026 continue;
2027 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2028 }
2029
2030 spin_unlock_irqrestore(&h->devlock, flags);
2031
2032 /* Monitor devices which are in one of several NOT READY states to be
2033 * brought online later. This must be done without holding h->devlock,
2034 * so don't touch h->dev[]
2035 */
2036 for (i = 0; i < nsds; i++) {
2037 if (!sd[i]) /* if already added above. */
2038 continue;
2039 if (sd[i]->volume_offline)
2040 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2041 }
2042
2043 /* Don't notify scsi mid layer of any changes the first time through
2044 * (or if there are no changes) scsi_scan_host will do it later the
2045 * first time through.
2046 */
2047 if (!changes)
2048 goto free_and_out;
2049
2050 /* Notify scsi mid layer of any removed devices */
2051 for (i = 0; i < nremoved; i++) {
2052 if (removed[i] == NULL)
2053 continue;
2054 if (removed[i]->expose_device)
2055 hpsa_remove_device(h, removed[i]);
2056 kfree(removed[i]);
2057 removed[i] = NULL;
2058 }
2059
2060 /* Notify scsi mid layer of any added devices */
2061 for (i = 0; i < nadded; i++) {
2062 int rc = 0;
2063
2064 if (added[i] == NULL)
2065 continue;
2066 if (!(added[i]->expose_device))
2067 continue;
2068 rc = hpsa_add_device(h, added[i]);
2069 if (!rc)
2070 continue;
2071 dev_warn(&h->pdev->dev,
2072 "addition failed %d, device not added.", rc);
2073 /* now we have to remove it from h->dev,
2074 * since it didn't get added to scsi mid layer
2075 */
2076 fixup_botched_add(h, added[i]);
2077 h->drv_req_rescan = 1;
2078 }
2079
2080 free_and_out:
2081 kfree(added);
2082 kfree(removed);
2083 }
2084
2085 /*
2086 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2087 * Assume's h->devlock is held.
2088 */
lookup_hpsa_scsi_dev(struct ctlr_info * h,int bus,int target,int lun)2089 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2090 int bus, int target, int lun)
2091 {
2092 int i;
2093 struct hpsa_scsi_dev_t *sd;
2094
2095 for (i = 0; i < h->ndevices; i++) {
2096 sd = h->dev[i];
2097 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2098 return sd;
2099 }
2100 return NULL;
2101 }
2102
hpsa_sdev_init(struct scsi_device * sdev)2103 static int hpsa_sdev_init(struct scsi_device *sdev)
2104 {
2105 struct hpsa_scsi_dev_t *sd = NULL;
2106 unsigned long flags;
2107 struct ctlr_info *h;
2108
2109 h = sdev_to_hba(sdev);
2110 spin_lock_irqsave(&h->devlock, flags);
2111 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2112 struct scsi_target *starget;
2113 struct sas_rphy *rphy;
2114
2115 starget = scsi_target(sdev);
2116 rphy = target_to_rphy(starget);
2117 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2118 if (sd) {
2119 sd->target = sdev_id(sdev);
2120 sd->lun = sdev->lun;
2121 }
2122 }
2123 if (!sd)
2124 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2125 sdev_id(sdev), sdev->lun);
2126
2127 if (sd && sd->expose_device) {
2128 atomic_set(&sd->ioaccel_cmds_out, 0);
2129 sdev->hostdata = sd;
2130 } else
2131 sdev->hostdata = NULL;
2132 spin_unlock_irqrestore(&h->devlock, flags);
2133 return 0;
2134 }
2135
2136 /* configure scsi device based on internal per-device structure */
2137 #define CTLR_TIMEOUT (120 * HZ)
hpsa_sdev_configure(struct scsi_device * sdev,struct queue_limits * lim)2138 static int hpsa_sdev_configure(struct scsi_device *sdev,
2139 struct queue_limits *lim)
2140 {
2141 struct hpsa_scsi_dev_t *sd;
2142 int queue_depth;
2143
2144 sd = sdev->hostdata;
2145 sdev->no_uld_attach = !sd || !sd->expose_device;
2146
2147 if (sd) {
2148 sd->was_removed = 0;
2149 queue_depth = sd->queue_depth != 0 ?
2150 sd->queue_depth : sdev->host->can_queue;
2151 if (sd->external) {
2152 queue_depth = EXTERNAL_QD;
2153 sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2154 blk_queue_rq_timeout(sdev->request_queue,
2155 HPSA_EH_PTRAID_TIMEOUT);
2156 }
2157 if (is_hba_lunid(sd->scsi3addr)) {
2158 sdev->eh_timeout = CTLR_TIMEOUT;
2159 blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT);
2160 }
2161 } else {
2162 queue_depth = sdev->host->can_queue;
2163 }
2164
2165 scsi_change_queue_depth(sdev, queue_depth);
2166
2167 return 0;
2168 }
2169
hpsa_sdev_destroy(struct scsi_device * sdev)2170 static void hpsa_sdev_destroy(struct scsi_device *sdev)
2171 {
2172 struct hpsa_scsi_dev_t *hdev = NULL;
2173
2174 hdev = sdev->hostdata;
2175
2176 if (hdev)
2177 hdev->was_removed = 1;
2178 }
2179
hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info * h)2180 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2181 {
2182 int i;
2183
2184 if (!h->ioaccel2_cmd_sg_list)
2185 return;
2186 for (i = 0; i < h->nr_cmds; i++) {
2187 kfree(h->ioaccel2_cmd_sg_list[i]);
2188 h->ioaccel2_cmd_sg_list[i] = NULL;
2189 }
2190 kfree(h->ioaccel2_cmd_sg_list);
2191 h->ioaccel2_cmd_sg_list = NULL;
2192 }
2193
hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info * h)2194 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2195 {
2196 int i;
2197
2198 if (h->chainsize <= 0)
2199 return 0;
2200
2201 h->ioaccel2_cmd_sg_list =
2202 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2203 GFP_KERNEL);
2204 if (!h->ioaccel2_cmd_sg_list)
2205 return -ENOMEM;
2206 for (i = 0; i < h->nr_cmds; i++) {
2207 h->ioaccel2_cmd_sg_list[i] =
2208 kmalloc_array(h->maxsgentries,
2209 sizeof(*h->ioaccel2_cmd_sg_list[i]),
2210 GFP_KERNEL);
2211 if (!h->ioaccel2_cmd_sg_list[i])
2212 goto clean;
2213 }
2214 return 0;
2215
2216 clean:
2217 hpsa_free_ioaccel2_sg_chain_blocks(h);
2218 return -ENOMEM;
2219 }
2220
hpsa_free_sg_chain_blocks(struct ctlr_info * h)2221 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2222 {
2223 int i;
2224
2225 if (!h->cmd_sg_list)
2226 return;
2227 for (i = 0; i < h->nr_cmds; i++) {
2228 kfree(h->cmd_sg_list[i]);
2229 h->cmd_sg_list[i] = NULL;
2230 }
2231 kfree(h->cmd_sg_list);
2232 h->cmd_sg_list = NULL;
2233 }
2234
hpsa_alloc_sg_chain_blocks(struct ctlr_info * h)2235 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2236 {
2237 int i;
2238
2239 if (h->chainsize <= 0)
2240 return 0;
2241
2242 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
2243 GFP_KERNEL);
2244 if (!h->cmd_sg_list)
2245 return -ENOMEM;
2246
2247 for (i = 0; i < h->nr_cmds; i++) {
2248 h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2249 sizeof(*h->cmd_sg_list[i]),
2250 GFP_KERNEL);
2251 if (!h->cmd_sg_list[i])
2252 goto clean;
2253
2254 }
2255 return 0;
2256
2257 clean:
2258 hpsa_free_sg_chain_blocks(h);
2259 return -ENOMEM;
2260 }
2261
hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info * h,struct io_accel2_cmd * cp,struct CommandList * c)2262 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2263 struct io_accel2_cmd *cp, struct CommandList *c)
2264 {
2265 struct ioaccel2_sg_element *chain_block;
2266 u64 temp64;
2267 u32 chain_size;
2268
2269 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2270 chain_size = le32_to_cpu(cp->sg[0].length);
2271 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
2272 DMA_TO_DEVICE);
2273 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2274 /* prevent subsequent unmapping */
2275 cp->sg->address = 0;
2276 return -1;
2277 }
2278 cp->sg->address = cpu_to_le64(temp64);
2279 return 0;
2280 }
2281
hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info * h,struct io_accel2_cmd * cp)2282 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2283 struct io_accel2_cmd *cp)
2284 {
2285 struct ioaccel2_sg_element *chain_sg;
2286 u64 temp64;
2287 u32 chain_size;
2288
2289 chain_sg = cp->sg;
2290 temp64 = le64_to_cpu(chain_sg->address);
2291 chain_size = le32_to_cpu(cp->sg[0].length);
2292 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2293 }
2294
hpsa_map_sg_chain_block(struct ctlr_info * h,struct CommandList * c)2295 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2296 struct CommandList *c)
2297 {
2298 struct SGDescriptor *chain_sg, *chain_block;
2299 u64 temp64;
2300 u32 chain_len;
2301
2302 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2303 chain_block = h->cmd_sg_list[c->cmdindex];
2304 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2305 chain_len = sizeof(*chain_sg) *
2306 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2307 chain_sg->Len = cpu_to_le32(chain_len);
2308 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
2309 DMA_TO_DEVICE);
2310 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2311 /* prevent subsequent unmapping */
2312 chain_sg->Addr = cpu_to_le64(0);
2313 return -1;
2314 }
2315 chain_sg->Addr = cpu_to_le64(temp64);
2316 return 0;
2317 }
2318
hpsa_unmap_sg_chain_block(struct ctlr_info * h,struct CommandList * c)2319 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2320 struct CommandList *c)
2321 {
2322 struct SGDescriptor *chain_sg;
2323
2324 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2325 return;
2326
2327 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2328 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
2329 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
2330 }
2331
2332
2333 /* Decode the various types of errors on ioaccel2 path.
2334 * Return 1 for any error that should generate a RAID path retry.
2335 * Return 0 for errors that don't require a RAID path retry.
2336 */
handle_ioaccel_mode2_error(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd,struct io_accel2_cmd * c2,struct hpsa_scsi_dev_t * dev)2337 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2338 struct CommandList *c,
2339 struct scsi_cmnd *cmd,
2340 struct io_accel2_cmd *c2,
2341 struct hpsa_scsi_dev_t *dev)
2342 {
2343 int data_len;
2344 int retry = 0;
2345 u32 ioaccel2_resid = 0;
2346
2347 switch (c2->error_data.serv_response) {
2348 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2349 switch (c2->error_data.status) {
2350 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2351 if (cmd)
2352 cmd->result = 0;
2353 break;
2354 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2355 cmd->result |= SAM_STAT_CHECK_CONDITION;
2356 if (c2->error_data.data_present !=
2357 IOACCEL2_SENSE_DATA_PRESENT) {
2358 memset(cmd->sense_buffer, 0,
2359 SCSI_SENSE_BUFFERSIZE);
2360 break;
2361 }
2362 /* copy the sense data */
2363 data_len = c2->error_data.sense_data_len;
2364 if (data_len > SCSI_SENSE_BUFFERSIZE)
2365 data_len = SCSI_SENSE_BUFFERSIZE;
2366 if (data_len > sizeof(c2->error_data.sense_data_buff))
2367 data_len =
2368 sizeof(c2->error_data.sense_data_buff);
2369 memcpy(cmd->sense_buffer,
2370 c2->error_data.sense_data_buff, data_len);
2371 retry = 1;
2372 break;
2373 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2374 retry = 1;
2375 break;
2376 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2377 retry = 1;
2378 break;
2379 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2380 retry = 1;
2381 break;
2382 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2383 retry = 1;
2384 break;
2385 default:
2386 retry = 1;
2387 break;
2388 }
2389 break;
2390 case IOACCEL2_SERV_RESPONSE_FAILURE:
2391 switch (c2->error_data.status) {
2392 case IOACCEL2_STATUS_SR_IO_ERROR:
2393 case IOACCEL2_STATUS_SR_IO_ABORTED:
2394 case IOACCEL2_STATUS_SR_OVERRUN:
2395 retry = 1;
2396 break;
2397 case IOACCEL2_STATUS_SR_UNDERRUN:
2398 cmd->result = (DID_OK << 16); /* host byte */
2399 ioaccel2_resid = get_unaligned_le32(
2400 &c2->error_data.resid_cnt[0]);
2401 scsi_set_resid(cmd, ioaccel2_resid);
2402 break;
2403 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2404 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2405 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2406 /*
2407 * Did an HBA disk disappear? We will eventually
2408 * get a state change event from the controller but
2409 * in the meantime, we need to tell the OS that the
2410 * HBA disk is no longer there and stop I/O
2411 * from going down. This allows the potential re-insert
2412 * of the disk to get the same device node.
2413 */
2414 if (dev->physical_device && dev->expose_device) {
2415 cmd->result = DID_NO_CONNECT << 16;
2416 dev->removed = 1;
2417 h->drv_req_rescan = 1;
2418 dev_warn(&h->pdev->dev,
2419 "%s: device is gone!\n", __func__);
2420 } else
2421 /*
2422 * Retry by sending down the RAID path.
2423 * We will get an event from ctlr to
2424 * trigger rescan regardless.
2425 */
2426 retry = 1;
2427 break;
2428 default:
2429 retry = 1;
2430 }
2431 break;
2432 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2433 break;
2434 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2435 break;
2436 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2437 retry = 1;
2438 break;
2439 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2440 break;
2441 default:
2442 retry = 1;
2443 break;
2444 }
2445
2446 if (dev->in_reset)
2447 retry = 0;
2448
2449 return retry; /* retry on raid path? */
2450 }
2451
hpsa_cmd_resolve_events(struct ctlr_info * h,struct CommandList * c)2452 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2453 struct CommandList *c)
2454 {
2455 struct hpsa_scsi_dev_t *dev = c->device;
2456
2457 /*
2458 * Reset c->scsi_cmd here so that the reset handler will know
2459 * this command has completed. Then, check to see if the handler is
2460 * waiting for this command, and, if so, wake it.
2461 */
2462 c->scsi_cmd = SCSI_CMD_IDLE;
2463 mb(); /* Declare command idle before checking for pending events. */
2464 if (dev) {
2465 atomic_dec(&dev->commands_outstanding);
2466 if (dev->in_reset &&
2467 atomic_read(&dev->commands_outstanding) <= 0)
2468 wake_up_all(&h->event_sync_wait_queue);
2469 }
2470 }
2471
hpsa_cmd_resolve_and_free(struct ctlr_info * h,struct CommandList * c)2472 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2473 struct CommandList *c)
2474 {
2475 hpsa_cmd_resolve_events(h, c);
2476 cmd_tagged_free(h, c);
2477 }
2478
hpsa_cmd_free_and_done(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd)2479 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2480 struct CommandList *c, struct scsi_cmnd *cmd)
2481 {
2482 hpsa_cmd_resolve_and_free(h, c);
2483 if (cmd)
2484 scsi_done(cmd);
2485 }
2486
hpsa_retry_cmd(struct ctlr_info * h,struct CommandList * c)2487 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2488 {
2489 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2490 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2491 }
2492
process_ioaccel2_completion(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd,struct hpsa_scsi_dev_t * dev)2493 static void process_ioaccel2_completion(struct ctlr_info *h,
2494 struct CommandList *c, struct scsi_cmnd *cmd,
2495 struct hpsa_scsi_dev_t *dev)
2496 {
2497 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2498
2499 /* check for good status */
2500 if (likely(c2->error_data.serv_response == 0 &&
2501 c2->error_data.status == 0)) {
2502 cmd->result = 0;
2503 return hpsa_cmd_free_and_done(h, c, cmd);
2504 }
2505
2506 /*
2507 * Any RAID offload error results in retry which will use
2508 * the normal I/O path so the controller can handle whatever is
2509 * wrong.
2510 */
2511 if (is_logical_device(dev) &&
2512 c2->error_data.serv_response ==
2513 IOACCEL2_SERV_RESPONSE_FAILURE) {
2514 if (c2->error_data.status ==
2515 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2516 hpsa_turn_off_ioaccel_for_device(dev);
2517 }
2518
2519 if (dev->in_reset) {
2520 cmd->result = DID_RESET << 16;
2521 return hpsa_cmd_free_and_done(h, c, cmd);
2522 }
2523
2524 return hpsa_retry_cmd(h, c);
2525 }
2526
2527 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2528 return hpsa_retry_cmd(h, c);
2529
2530 return hpsa_cmd_free_and_done(h, c, cmd);
2531 }
2532
2533 /* Returns 0 on success, < 0 otherwise. */
hpsa_evaluate_tmf_status(struct ctlr_info * h,struct CommandList * cp)2534 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2535 struct CommandList *cp)
2536 {
2537 u8 tmf_status = cp->err_info->ScsiStatus;
2538
2539 switch (tmf_status) {
2540 case CISS_TMF_COMPLETE:
2541 /*
2542 * CISS_TMF_COMPLETE never happens, instead,
2543 * ei->CommandStatus == 0 for this case.
2544 */
2545 case CISS_TMF_SUCCESS:
2546 return 0;
2547 case CISS_TMF_INVALID_FRAME:
2548 case CISS_TMF_NOT_SUPPORTED:
2549 case CISS_TMF_FAILED:
2550 case CISS_TMF_WRONG_LUN:
2551 case CISS_TMF_OVERLAPPED_TAG:
2552 break;
2553 default:
2554 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2555 tmf_status);
2556 break;
2557 }
2558 return -tmf_status;
2559 }
2560
complete_scsi_command(struct CommandList * cp)2561 static void complete_scsi_command(struct CommandList *cp)
2562 {
2563 struct scsi_cmnd *cmd;
2564 struct ctlr_info *h;
2565 struct ErrorInfo *ei;
2566 struct hpsa_scsi_dev_t *dev;
2567 struct io_accel2_cmd *c2;
2568
2569 u8 sense_key;
2570 u8 asc; /* additional sense code */
2571 u8 ascq; /* additional sense code qualifier */
2572 unsigned long sense_data_size;
2573
2574 ei = cp->err_info;
2575 cmd = cp->scsi_cmd;
2576 h = cp->h;
2577
2578 if (!cmd->device) {
2579 cmd->result = DID_NO_CONNECT << 16;
2580 return hpsa_cmd_free_and_done(h, cp, cmd);
2581 }
2582
2583 dev = cmd->device->hostdata;
2584 if (!dev) {
2585 cmd->result = DID_NO_CONNECT << 16;
2586 return hpsa_cmd_free_and_done(h, cp, cmd);
2587 }
2588 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2589
2590 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2591 if ((cp->cmd_type == CMD_SCSI) &&
2592 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2593 hpsa_unmap_sg_chain_block(h, cp);
2594
2595 if ((cp->cmd_type == CMD_IOACCEL2) &&
2596 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2597 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2598
2599 cmd->result = (DID_OK << 16); /* host byte */
2600
2601 /* SCSI command has already been cleaned up in SML */
2602 if (dev->was_removed) {
2603 hpsa_cmd_resolve_and_free(h, cp);
2604 return;
2605 }
2606
2607 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2608 if (dev->physical_device && dev->expose_device &&
2609 dev->removed) {
2610 cmd->result = DID_NO_CONNECT << 16;
2611 return hpsa_cmd_free_and_done(h, cp, cmd);
2612 }
2613 if (likely(cp->phys_disk != NULL))
2614 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2615 }
2616
2617 /*
2618 * We check for lockup status here as it may be set for
2619 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2620 * fail_all_oustanding_cmds()
2621 */
2622 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2623 /* DID_NO_CONNECT will prevent a retry */
2624 cmd->result = DID_NO_CONNECT << 16;
2625 return hpsa_cmd_free_and_done(h, cp, cmd);
2626 }
2627
2628 if (cp->cmd_type == CMD_IOACCEL2)
2629 return process_ioaccel2_completion(h, cp, cmd, dev);
2630
2631 scsi_set_resid(cmd, ei->ResidualCnt);
2632 if (ei->CommandStatus == 0)
2633 return hpsa_cmd_free_and_done(h, cp, cmd);
2634
2635 /* For I/O accelerator commands, copy over some fields to the normal
2636 * CISS header used below for error handling.
2637 */
2638 if (cp->cmd_type == CMD_IOACCEL1) {
2639 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2640 cp->Header.SGList = scsi_sg_count(cmd);
2641 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2642 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2643 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2644 cp->Header.tag = c->tag;
2645 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2646 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2647
2648 /* Any RAID offload error results in retry which will use
2649 * the normal I/O path so the controller can handle whatever's
2650 * wrong.
2651 */
2652 if (is_logical_device(dev)) {
2653 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2654 dev->offload_enabled = 0;
2655 return hpsa_retry_cmd(h, cp);
2656 }
2657 }
2658
2659 /* an error has occurred */
2660 switch (ei->CommandStatus) {
2661
2662 case CMD_TARGET_STATUS:
2663 cmd->result |= ei->ScsiStatus;
2664 /* copy the sense data */
2665 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2666 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2667 else
2668 sense_data_size = sizeof(ei->SenseInfo);
2669 if (ei->SenseLen < sense_data_size)
2670 sense_data_size = ei->SenseLen;
2671 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2672 if (ei->ScsiStatus)
2673 decode_sense_data(ei->SenseInfo, sense_data_size,
2674 &sense_key, &asc, &ascq);
2675 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2676 switch (sense_key) {
2677 case ABORTED_COMMAND:
2678 cmd->result |= DID_SOFT_ERROR << 16;
2679 break;
2680 case UNIT_ATTENTION:
2681 if (asc == 0x3F && ascq == 0x0E)
2682 h->drv_req_rescan = 1;
2683 break;
2684 case ILLEGAL_REQUEST:
2685 if (asc == 0x25 && ascq == 0x00) {
2686 dev->removed = 1;
2687 cmd->result = DID_NO_CONNECT << 16;
2688 }
2689 break;
2690 }
2691 break;
2692 }
2693 /* Problem was not a check condition
2694 * Pass it up to the upper layers...
2695 */
2696 if (ei->ScsiStatus) {
2697 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2698 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2699 "Returning result: 0x%x\n",
2700 cp, ei->ScsiStatus,
2701 sense_key, asc, ascq,
2702 cmd->result);
2703 } else { /* scsi status is zero??? How??? */
2704 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2705 "Returning no connection.\n", cp),
2706
2707 /* Ordinarily, this case should never happen,
2708 * but there is a bug in some released firmware
2709 * revisions that allows it to happen if, for
2710 * example, a 4100 backplane loses power and
2711 * the tape drive is in it. We assume that
2712 * it's a fatal error of some kind because we
2713 * can't show that it wasn't. We will make it
2714 * look like selection timeout since that is
2715 * the most common reason for this to occur,
2716 * and it's severe enough.
2717 */
2718
2719 cmd->result = DID_NO_CONNECT << 16;
2720 }
2721 break;
2722
2723 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2724 break;
2725 case CMD_DATA_OVERRUN:
2726 dev_warn(&h->pdev->dev,
2727 "CDB %16phN data overrun\n", cp->Request.CDB);
2728 break;
2729 case CMD_INVALID: {
2730 /* print_bytes(cp, sizeof(*cp), 1, 0);
2731 print_cmd(cp); */
2732 /* We get CMD_INVALID if you address a non-existent device
2733 * instead of a selection timeout (no response). You will
2734 * see this if you yank out a drive, then try to access it.
2735 * This is kind of a shame because it means that any other
2736 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2737 * missing target. */
2738 cmd->result = DID_NO_CONNECT << 16;
2739 }
2740 break;
2741 case CMD_PROTOCOL_ERR:
2742 cmd->result = DID_ERROR << 16;
2743 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2744 cp->Request.CDB);
2745 break;
2746 case CMD_HARDWARE_ERR:
2747 cmd->result = DID_ERROR << 16;
2748 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2749 cp->Request.CDB);
2750 break;
2751 case CMD_CONNECTION_LOST:
2752 cmd->result = DID_ERROR << 16;
2753 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2754 cp->Request.CDB);
2755 break;
2756 case CMD_ABORTED:
2757 cmd->result = DID_ABORT << 16;
2758 break;
2759 case CMD_ABORT_FAILED:
2760 cmd->result = DID_ERROR << 16;
2761 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2762 cp->Request.CDB);
2763 break;
2764 case CMD_UNSOLICITED_ABORT:
2765 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2766 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2767 cp->Request.CDB);
2768 break;
2769 case CMD_TIMEOUT:
2770 cmd->result = DID_TIME_OUT << 16;
2771 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2772 cp->Request.CDB);
2773 break;
2774 case CMD_UNABORTABLE:
2775 cmd->result = DID_ERROR << 16;
2776 dev_warn(&h->pdev->dev, "Command unabortable\n");
2777 break;
2778 case CMD_TMF_STATUS:
2779 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2780 cmd->result = DID_ERROR << 16;
2781 break;
2782 case CMD_IOACCEL_DISABLED:
2783 /* This only handles the direct pass-through case since RAID
2784 * offload is handled above. Just attempt a retry.
2785 */
2786 cmd->result = DID_SOFT_ERROR << 16;
2787 dev_warn(&h->pdev->dev,
2788 "cp %p had HP SSD Smart Path error\n", cp);
2789 break;
2790 default:
2791 cmd->result = DID_ERROR << 16;
2792 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2793 cp, ei->CommandStatus);
2794 }
2795
2796 return hpsa_cmd_free_and_done(h, cp, cmd);
2797 }
2798
hpsa_pci_unmap(struct pci_dev * pdev,struct CommandList * c,int sg_used,enum dma_data_direction data_direction)2799 static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
2800 int sg_used, enum dma_data_direction data_direction)
2801 {
2802 int i;
2803
2804 for (i = 0; i < sg_used; i++)
2805 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
2806 le32_to_cpu(c->SG[i].Len),
2807 data_direction);
2808 }
2809
hpsa_map_one(struct pci_dev * pdev,struct CommandList * cp,unsigned char * buf,size_t buflen,enum dma_data_direction data_direction)2810 static int hpsa_map_one(struct pci_dev *pdev,
2811 struct CommandList *cp,
2812 unsigned char *buf,
2813 size_t buflen,
2814 enum dma_data_direction data_direction)
2815 {
2816 u64 addr64;
2817
2818 if (buflen == 0 || data_direction == DMA_NONE) {
2819 cp->Header.SGList = 0;
2820 cp->Header.SGTotal = cpu_to_le16(0);
2821 return 0;
2822 }
2823
2824 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2825 if (dma_mapping_error(&pdev->dev, addr64)) {
2826 /* Prevent subsequent unmap of something never mapped */
2827 cp->Header.SGList = 0;
2828 cp->Header.SGTotal = cpu_to_le16(0);
2829 return -1;
2830 }
2831 cp->SG[0].Addr = cpu_to_le64(addr64);
2832 cp->SG[0].Len = cpu_to_le32(buflen);
2833 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2834 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2835 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2836 return 0;
2837 }
2838
2839 #define NO_TIMEOUT ((unsigned long) -1)
2840 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
hpsa_scsi_do_simple_cmd_core(struct ctlr_info * h,struct CommandList * c,int reply_queue,unsigned long timeout_msecs)2841 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2842 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2843 {
2844 DECLARE_COMPLETION_ONSTACK(wait);
2845
2846 c->waiting = &wait;
2847 __enqueue_cmd_and_start_io(h, c, reply_queue);
2848 if (timeout_msecs == NO_TIMEOUT) {
2849 /* TODO: get rid of this no-timeout thing */
2850 wait_for_completion_io(&wait);
2851 return IO_OK;
2852 }
2853 if (!wait_for_completion_io_timeout(&wait,
2854 msecs_to_jiffies(timeout_msecs))) {
2855 dev_warn(&h->pdev->dev, "Command timed out.\n");
2856 return -ETIMEDOUT;
2857 }
2858 return IO_OK;
2859 }
2860
hpsa_scsi_do_simple_cmd(struct ctlr_info * h,struct CommandList * c,int reply_queue,unsigned long timeout_msecs)2861 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2862 int reply_queue, unsigned long timeout_msecs)
2863 {
2864 if (unlikely(lockup_detected(h))) {
2865 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2866 return IO_OK;
2867 }
2868 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2869 }
2870
lockup_detected(struct ctlr_info * h)2871 static u32 lockup_detected(struct ctlr_info *h)
2872 {
2873 int cpu;
2874 u32 rc, *lockup_detected;
2875
2876 cpu = get_cpu();
2877 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2878 rc = *lockup_detected;
2879 put_cpu();
2880 return rc;
2881 }
2882
2883 #define MAX_DRIVER_CMD_RETRIES 25
hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info * h,struct CommandList * c,enum dma_data_direction data_direction,unsigned long timeout_msecs)2884 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2885 struct CommandList *c, enum dma_data_direction data_direction,
2886 unsigned long timeout_msecs)
2887 {
2888 int backoff_time = 10, retry_count = 0;
2889 int rc;
2890
2891 do {
2892 memset(c->err_info, 0, sizeof(*c->err_info));
2893 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2894 timeout_msecs);
2895 if (rc)
2896 break;
2897 retry_count++;
2898 if (retry_count > 3) {
2899 msleep(backoff_time);
2900 if (backoff_time < 1000)
2901 backoff_time *= 2;
2902 }
2903 } while ((check_for_unit_attention(h, c) ||
2904 check_for_busy(h, c)) &&
2905 retry_count <= MAX_DRIVER_CMD_RETRIES);
2906 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2907 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2908 rc = -EIO;
2909 return rc;
2910 }
2911
hpsa_print_cmd(struct ctlr_info * h,char * txt,struct CommandList * c)2912 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2913 struct CommandList *c)
2914 {
2915 const u8 *cdb = c->Request.CDB;
2916 const u8 *lun = c->Header.LUN.LunAddrBytes;
2917
2918 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2919 txt, lun, cdb);
2920 }
2921
hpsa_scsi_interpret_error(struct ctlr_info * h,struct CommandList * cp)2922 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2923 struct CommandList *cp)
2924 {
2925 const struct ErrorInfo *ei = cp->err_info;
2926 struct device *d = &cp->h->pdev->dev;
2927 u8 sense_key, asc, ascq;
2928 int sense_len;
2929
2930 switch (ei->CommandStatus) {
2931 case CMD_TARGET_STATUS:
2932 if (ei->SenseLen > sizeof(ei->SenseInfo))
2933 sense_len = sizeof(ei->SenseInfo);
2934 else
2935 sense_len = ei->SenseLen;
2936 decode_sense_data(ei->SenseInfo, sense_len,
2937 &sense_key, &asc, &ascq);
2938 hpsa_print_cmd(h, "SCSI status", cp);
2939 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2940 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2941 sense_key, asc, ascq);
2942 else
2943 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2944 if (ei->ScsiStatus == 0)
2945 dev_warn(d, "SCSI status is abnormally zero. "
2946 "(probably indicates selection timeout "
2947 "reported incorrectly due to a known "
2948 "firmware bug, circa July, 2001.)\n");
2949 break;
2950 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2951 break;
2952 case CMD_DATA_OVERRUN:
2953 hpsa_print_cmd(h, "overrun condition", cp);
2954 break;
2955 case CMD_INVALID: {
2956 /* controller unfortunately reports SCSI passthru's
2957 * to non-existent targets as invalid commands.
2958 */
2959 hpsa_print_cmd(h, "invalid command", cp);
2960 dev_warn(d, "probably means device no longer present\n");
2961 }
2962 break;
2963 case CMD_PROTOCOL_ERR:
2964 hpsa_print_cmd(h, "protocol error", cp);
2965 break;
2966 case CMD_HARDWARE_ERR:
2967 hpsa_print_cmd(h, "hardware error", cp);
2968 break;
2969 case CMD_CONNECTION_LOST:
2970 hpsa_print_cmd(h, "connection lost", cp);
2971 break;
2972 case CMD_ABORTED:
2973 hpsa_print_cmd(h, "aborted", cp);
2974 break;
2975 case CMD_ABORT_FAILED:
2976 hpsa_print_cmd(h, "abort failed", cp);
2977 break;
2978 case CMD_UNSOLICITED_ABORT:
2979 hpsa_print_cmd(h, "unsolicited abort", cp);
2980 break;
2981 case CMD_TIMEOUT:
2982 hpsa_print_cmd(h, "timed out", cp);
2983 break;
2984 case CMD_UNABORTABLE:
2985 hpsa_print_cmd(h, "unabortable", cp);
2986 break;
2987 case CMD_CTLR_LOCKUP:
2988 hpsa_print_cmd(h, "controller lockup detected", cp);
2989 break;
2990 default:
2991 hpsa_print_cmd(h, "unknown status", cp);
2992 dev_warn(d, "Unknown command status %x\n",
2993 ei->CommandStatus);
2994 }
2995 }
2996
hpsa_do_receive_diagnostic(struct ctlr_info * h,u8 * scsi3addr,u8 page,u8 * buf,size_t bufsize)2997 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
2998 u8 page, u8 *buf, size_t bufsize)
2999 {
3000 int rc = IO_OK;
3001 struct CommandList *c;
3002 struct ErrorInfo *ei;
3003
3004 c = cmd_alloc(h);
3005 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
3006 page, scsi3addr, TYPE_CMD)) {
3007 rc = -1;
3008 goto out;
3009 }
3010 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3011 NO_TIMEOUT);
3012 if (rc)
3013 goto out;
3014 ei = c->err_info;
3015 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3016 hpsa_scsi_interpret_error(h, c);
3017 rc = -1;
3018 }
3019 out:
3020 cmd_free(h, c);
3021 return rc;
3022 }
3023
hpsa_get_enclosure_logical_identifier(struct ctlr_info * h,u8 * scsi3addr)3024 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
3025 u8 *scsi3addr)
3026 {
3027 u8 *buf;
3028 u64 sa = 0;
3029 int rc = 0;
3030
3031 buf = kzalloc(1024, GFP_KERNEL);
3032 if (!buf)
3033 return 0;
3034
3035 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3036 buf, 1024);
3037
3038 if (rc)
3039 goto out;
3040
3041 sa = get_unaligned_be64(buf+12);
3042
3043 out:
3044 kfree(buf);
3045 return sa;
3046 }
3047
hpsa_scsi_do_inquiry(struct ctlr_info * h,unsigned char * scsi3addr,u16 page,unsigned char * buf,unsigned char bufsize)3048 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3049 u16 page, unsigned char *buf,
3050 unsigned char bufsize)
3051 {
3052 int rc = IO_OK;
3053 struct CommandList *c;
3054 struct ErrorInfo *ei;
3055
3056 c = cmd_alloc(h);
3057
3058 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3059 page, scsi3addr, TYPE_CMD)) {
3060 rc = -1;
3061 goto out;
3062 }
3063 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3064 NO_TIMEOUT);
3065 if (rc)
3066 goto out;
3067 ei = c->err_info;
3068 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3069 hpsa_scsi_interpret_error(h, c);
3070 rc = -1;
3071 }
3072 out:
3073 cmd_free(h, c);
3074 return rc;
3075 }
3076
hpsa_send_reset(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev,u8 reset_type,int reply_queue)3077 static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3078 u8 reset_type, int reply_queue)
3079 {
3080 int rc = IO_OK;
3081 struct CommandList *c;
3082 struct ErrorInfo *ei;
3083
3084 c = cmd_alloc(h);
3085 c->device = dev;
3086
3087 /* fill_cmd can't fail here, no data buffer to map. */
3088 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
3089 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3090 if (rc) {
3091 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3092 goto out;
3093 }
3094 /* no unmap needed here because no data xfer. */
3095
3096 ei = c->err_info;
3097 if (ei->CommandStatus != 0) {
3098 hpsa_scsi_interpret_error(h, c);
3099 rc = -1;
3100 }
3101 out:
3102 cmd_free(h, c);
3103 return rc;
3104 }
3105
hpsa_cmd_dev_match(struct ctlr_info * h,struct CommandList * c,struct hpsa_scsi_dev_t * dev,unsigned char * scsi3addr)3106 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3107 struct hpsa_scsi_dev_t *dev,
3108 unsigned char *scsi3addr)
3109 {
3110 int i;
3111 bool match = false;
3112 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3113 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3114
3115 if (hpsa_is_cmd_idle(c))
3116 return false;
3117
3118 switch (c->cmd_type) {
3119 case CMD_SCSI:
3120 case CMD_IOCTL_PEND:
3121 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3122 sizeof(c->Header.LUN.LunAddrBytes));
3123 break;
3124
3125 case CMD_IOACCEL1:
3126 case CMD_IOACCEL2:
3127 if (c->phys_disk == dev) {
3128 /* HBA mode match */
3129 match = true;
3130 } else {
3131 /* Possible RAID mode -- check each phys dev. */
3132 /* FIXME: Do we need to take out a lock here? If
3133 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3134 * instead. */
3135 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3136 /* FIXME: an alternate test might be
3137 *
3138 * match = dev->phys_disk[i]->ioaccel_handle
3139 * == c2->scsi_nexus; */
3140 match = dev->phys_disk[i] == c->phys_disk;
3141 }
3142 }
3143 break;
3144
3145 case IOACCEL2_TMF:
3146 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3147 match = dev->phys_disk[i]->ioaccel_handle ==
3148 le32_to_cpu(ac->it_nexus);
3149 }
3150 break;
3151
3152 case 0: /* The command is in the middle of being initialized. */
3153 match = false;
3154 break;
3155
3156 default:
3157 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3158 c->cmd_type);
3159 BUG();
3160 }
3161
3162 return match;
3163 }
3164
hpsa_do_reset(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev,u8 reset_type,int reply_queue)3165 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3166 u8 reset_type, int reply_queue)
3167 {
3168 int rc = 0;
3169
3170 /* We can really only handle one reset at a time */
3171 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3172 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3173 return -EINTR;
3174 }
3175
3176 rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3177 if (!rc) {
3178 /* incremented by sending the reset request */
3179 atomic_dec(&dev->commands_outstanding);
3180 wait_event(h->event_sync_wait_queue,
3181 atomic_read(&dev->commands_outstanding) <= 0 ||
3182 lockup_detected(h));
3183 }
3184
3185 if (unlikely(lockup_detected(h))) {
3186 dev_warn(&h->pdev->dev,
3187 "Controller lockup detected during reset wait\n");
3188 rc = -ENODEV;
3189 }
3190
3191 if (!rc)
3192 rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3193
3194 mutex_unlock(&h->reset_mutex);
3195 return rc;
3196 }
3197
hpsa_get_raid_level(struct ctlr_info * h,unsigned char * scsi3addr,unsigned char * raid_level)3198 static void hpsa_get_raid_level(struct ctlr_info *h,
3199 unsigned char *scsi3addr, unsigned char *raid_level)
3200 {
3201 int rc;
3202 unsigned char *buf;
3203
3204 *raid_level = RAID_UNKNOWN;
3205 buf = kzalloc(64, GFP_KERNEL);
3206 if (!buf)
3207 return;
3208
3209 if (!hpsa_vpd_page_supported(h, scsi3addr,
3210 HPSA_VPD_LV_DEVICE_GEOMETRY))
3211 goto exit;
3212
3213 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3214 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3215
3216 if (rc == 0)
3217 *raid_level = buf[8];
3218 if (*raid_level > RAID_UNKNOWN)
3219 *raid_level = RAID_UNKNOWN;
3220 exit:
3221 kfree(buf);
3222 return;
3223 }
3224
3225 #define HPSA_MAP_DEBUG
3226 #ifdef HPSA_MAP_DEBUG
hpsa_debug_map_buff(struct ctlr_info * h,int rc,struct raid_map_data * map_buff)3227 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3228 struct raid_map_data *map_buff)
3229 {
3230 struct raid_map_disk_data *dd = &map_buff->data[0];
3231 int map, row, col;
3232 u16 map_cnt, row_cnt, disks_per_row;
3233
3234 if (rc != 0)
3235 return;
3236
3237 /* Show details only if debugging has been activated. */
3238 if (h->raid_offload_debug < 2)
3239 return;
3240
3241 dev_info(&h->pdev->dev, "structure_size = %u\n",
3242 le32_to_cpu(map_buff->structure_size));
3243 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3244 le32_to_cpu(map_buff->volume_blk_size));
3245 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3246 le64_to_cpu(map_buff->volume_blk_cnt));
3247 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3248 map_buff->phys_blk_shift);
3249 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3250 map_buff->parity_rotation_shift);
3251 dev_info(&h->pdev->dev, "strip_size = %u\n",
3252 le16_to_cpu(map_buff->strip_size));
3253 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3254 le64_to_cpu(map_buff->disk_starting_blk));
3255 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3256 le64_to_cpu(map_buff->disk_blk_cnt));
3257 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3258 le16_to_cpu(map_buff->data_disks_per_row));
3259 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3260 le16_to_cpu(map_buff->metadata_disks_per_row));
3261 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3262 le16_to_cpu(map_buff->row_cnt));
3263 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3264 le16_to_cpu(map_buff->layout_map_count));
3265 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3266 le16_to_cpu(map_buff->flags));
3267 dev_info(&h->pdev->dev, "encryption = %s\n",
3268 le16_to_cpu(map_buff->flags) &
3269 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3270 dev_info(&h->pdev->dev, "dekindex = %u\n",
3271 le16_to_cpu(map_buff->dekindex));
3272 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3273 for (map = 0; map < map_cnt; map++) {
3274 dev_info(&h->pdev->dev, "Map%u:\n", map);
3275 row_cnt = le16_to_cpu(map_buff->row_cnt);
3276 for (row = 0; row < row_cnt; row++) {
3277 dev_info(&h->pdev->dev, " Row%u:\n", row);
3278 disks_per_row =
3279 le16_to_cpu(map_buff->data_disks_per_row);
3280 for (col = 0; col < disks_per_row; col++, dd++)
3281 dev_info(&h->pdev->dev,
3282 " D%02u: h=0x%04x xor=%u,%u\n",
3283 col, dd->ioaccel_handle,
3284 dd->xor_mult[0], dd->xor_mult[1]);
3285 disks_per_row =
3286 le16_to_cpu(map_buff->metadata_disks_per_row);
3287 for (col = 0; col < disks_per_row; col++, dd++)
3288 dev_info(&h->pdev->dev,
3289 " M%02u: h=0x%04x xor=%u,%u\n",
3290 col, dd->ioaccel_handle,
3291 dd->xor_mult[0], dd->xor_mult[1]);
3292 }
3293 }
3294 }
3295 #else
hpsa_debug_map_buff(struct ctlr_info * h,int rc,struct raid_map_data * map_buff)3296 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3297 __attribute__((unused)) int rc,
3298 __attribute__((unused)) struct raid_map_data *map_buff)
3299 {
3300 }
3301 #endif
3302
hpsa_get_raid_map(struct ctlr_info * h,unsigned char * scsi3addr,struct hpsa_scsi_dev_t * this_device)3303 static int hpsa_get_raid_map(struct ctlr_info *h,
3304 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3305 {
3306 int rc = 0;
3307 struct CommandList *c;
3308 struct ErrorInfo *ei;
3309
3310 c = cmd_alloc(h);
3311
3312 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3313 sizeof(this_device->raid_map), 0,
3314 scsi3addr, TYPE_CMD)) {
3315 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3316 cmd_free(h, c);
3317 return -1;
3318 }
3319 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3320 NO_TIMEOUT);
3321 if (rc)
3322 goto out;
3323 ei = c->err_info;
3324 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3325 hpsa_scsi_interpret_error(h, c);
3326 rc = -1;
3327 goto out;
3328 }
3329 cmd_free(h, c);
3330
3331 /* @todo in the future, dynamically allocate RAID map memory */
3332 if (le32_to_cpu(this_device->raid_map.structure_size) >
3333 sizeof(this_device->raid_map)) {
3334 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3335 rc = -1;
3336 }
3337 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3338 return rc;
3339 out:
3340 cmd_free(h, c);
3341 return rc;
3342 }
3343
hpsa_bmic_sense_subsystem_information(struct ctlr_info * h,unsigned char scsi3addr[],u16 bmic_device_index,struct bmic_sense_subsystem_info * buf,size_t bufsize)3344 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3345 unsigned char scsi3addr[], u16 bmic_device_index,
3346 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3347 {
3348 int rc = IO_OK;
3349 struct CommandList *c;
3350 struct ErrorInfo *ei;
3351
3352 c = cmd_alloc(h);
3353
3354 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3355 0, RAID_CTLR_LUNID, TYPE_CMD);
3356 if (rc)
3357 goto out;
3358
3359 c->Request.CDB[2] = bmic_device_index & 0xff;
3360 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3361
3362 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3363 NO_TIMEOUT);
3364 if (rc)
3365 goto out;
3366 ei = c->err_info;
3367 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3368 hpsa_scsi_interpret_error(h, c);
3369 rc = -1;
3370 }
3371 out:
3372 cmd_free(h, c);
3373 return rc;
3374 }
3375
hpsa_bmic_id_controller(struct ctlr_info * h,struct bmic_identify_controller * buf,size_t bufsize)3376 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3377 struct bmic_identify_controller *buf, size_t bufsize)
3378 {
3379 int rc = IO_OK;
3380 struct CommandList *c;
3381 struct ErrorInfo *ei;
3382
3383 c = cmd_alloc(h);
3384
3385 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3386 0, RAID_CTLR_LUNID, TYPE_CMD);
3387 if (rc)
3388 goto out;
3389
3390 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3391 NO_TIMEOUT);
3392 if (rc)
3393 goto out;
3394 ei = c->err_info;
3395 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3396 hpsa_scsi_interpret_error(h, c);
3397 rc = -1;
3398 }
3399 out:
3400 cmd_free(h, c);
3401 return rc;
3402 }
3403
hpsa_bmic_id_physical_device(struct ctlr_info * h,unsigned char scsi3addr[],u16 bmic_device_index,struct bmic_identify_physical_device * buf,size_t bufsize)3404 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3405 unsigned char scsi3addr[], u16 bmic_device_index,
3406 struct bmic_identify_physical_device *buf, size_t bufsize)
3407 {
3408 int rc = IO_OK;
3409 struct CommandList *c;
3410 struct ErrorInfo *ei;
3411
3412 c = cmd_alloc(h);
3413 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3414 0, RAID_CTLR_LUNID, TYPE_CMD);
3415 if (rc)
3416 goto out;
3417
3418 c->Request.CDB[2] = bmic_device_index & 0xff;
3419 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3420
3421 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3422 NO_TIMEOUT);
3423 ei = c->err_info;
3424 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3425 hpsa_scsi_interpret_error(h, c);
3426 rc = -1;
3427 }
3428 out:
3429 cmd_free(h, c);
3430
3431 return rc;
3432 }
3433
3434 /*
3435 * get enclosure information
3436 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3437 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3438 * Uses id_physical_device to determine the box_index.
3439 */
hpsa_get_enclosure_info(struct ctlr_info * h,unsigned char * scsi3addr,struct ReportExtendedLUNdata * rlep,int rle_index,struct hpsa_scsi_dev_t * encl_dev)3440 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3441 unsigned char *scsi3addr,
3442 struct ReportExtendedLUNdata *rlep, int rle_index,
3443 struct hpsa_scsi_dev_t *encl_dev)
3444 {
3445 int rc = -1;
3446 struct CommandList *c = NULL;
3447 struct ErrorInfo *ei = NULL;
3448 struct bmic_sense_storage_box_params *bssbp = NULL;
3449 struct bmic_identify_physical_device *id_phys = NULL;
3450 struct ext_report_lun_entry *rle;
3451 u16 bmic_device_index = 0;
3452
3453 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
3454 return;
3455
3456 rle = &rlep->LUN[rle_index];
3457
3458 encl_dev->eli =
3459 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3460
3461 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3462
3463 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3464 rc = IO_OK;
3465 goto out;
3466 }
3467
3468 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3469 rc = IO_OK;
3470 goto out;
3471 }
3472
3473 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3474 if (!bssbp)
3475 goto out;
3476
3477 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3478 if (!id_phys)
3479 goto out;
3480
3481 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3482 id_phys, sizeof(*id_phys));
3483 if (rc) {
3484 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3485 __func__, encl_dev->external, bmic_device_index);
3486 goto out;
3487 }
3488
3489 c = cmd_alloc(h);
3490
3491 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3492 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3493
3494 if (rc)
3495 goto out;
3496
3497 if (id_phys->phys_connector[1] == 'E')
3498 c->Request.CDB[5] = id_phys->box_index;
3499 else
3500 c->Request.CDB[5] = 0;
3501
3502 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3503 NO_TIMEOUT);
3504 if (rc)
3505 goto out;
3506
3507 ei = c->err_info;
3508 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3509 rc = -1;
3510 goto out;
3511 }
3512
3513 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3514 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3515 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3516
3517 rc = IO_OK;
3518 out:
3519 kfree(bssbp);
3520 kfree(id_phys);
3521
3522 if (c)
3523 cmd_free(h, c);
3524
3525 if (rc != IO_OK)
3526 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3527 "Error, could not get enclosure information");
3528 }
3529
hpsa_get_sas_address_from_report_physical(struct ctlr_info * h,unsigned char * scsi3addr)3530 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3531 unsigned char *scsi3addr)
3532 {
3533 struct ReportExtendedLUNdata *physdev;
3534 u32 nphysicals;
3535 u64 sa = 0;
3536 int i;
3537
3538 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3539 if (!physdev)
3540 return 0;
3541
3542 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3543 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3544 kfree(physdev);
3545 return 0;
3546 }
3547 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3548
3549 for (i = 0; i < nphysicals; i++)
3550 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3551 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3552 break;
3553 }
3554
3555 kfree(physdev);
3556
3557 return sa;
3558 }
3559
hpsa_get_sas_address(struct ctlr_info * h,unsigned char * scsi3addr,struct hpsa_scsi_dev_t * dev)3560 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3561 struct hpsa_scsi_dev_t *dev)
3562 {
3563 int rc;
3564 u64 sa = 0;
3565
3566 if (is_hba_lunid(scsi3addr)) {
3567 struct bmic_sense_subsystem_info *ssi;
3568
3569 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3570 if (!ssi)
3571 return;
3572
3573 rc = hpsa_bmic_sense_subsystem_information(h,
3574 scsi3addr, 0, ssi, sizeof(*ssi));
3575 if (rc == 0) {
3576 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3577 h->sas_address = sa;
3578 }
3579
3580 kfree(ssi);
3581 } else
3582 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3583
3584 dev->sas_address = sa;
3585 }
3586
hpsa_ext_ctrl_present(struct ctlr_info * h,struct ReportExtendedLUNdata * physdev)3587 static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3588 struct ReportExtendedLUNdata *physdev)
3589 {
3590 u32 nphysicals;
3591 int i;
3592
3593 if (h->discovery_polling)
3594 return;
3595
3596 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3597
3598 for (i = 0; i < nphysicals; i++) {
3599 if (physdev->LUN[i].device_type ==
3600 BMIC_DEVICE_TYPE_CONTROLLER
3601 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3602 dev_info(&h->pdev->dev,
3603 "External controller present, activate discovery polling and disable rld caching\n");
3604 hpsa_disable_rld_caching(h);
3605 h->discovery_polling = 1;
3606 break;
3607 }
3608 }
3609 }
3610
3611 /* Get a device id from inquiry page 0x83 */
hpsa_vpd_page_supported(struct ctlr_info * h,unsigned char scsi3addr[],u8 page)3612 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3613 unsigned char scsi3addr[], u8 page)
3614 {
3615 int rc;
3616 int i;
3617 int pages;
3618 unsigned char *buf, bufsize;
3619
3620 buf = kzalloc(256, GFP_KERNEL);
3621 if (!buf)
3622 return false;
3623
3624 /* Get the size of the page list first */
3625 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3626 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3627 buf, HPSA_VPD_HEADER_SZ);
3628 if (rc != 0)
3629 goto exit_unsupported;
3630 pages = buf[3];
3631 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3632 bufsize = pages + HPSA_VPD_HEADER_SZ;
3633 else
3634 bufsize = 255;
3635
3636 /* Get the whole VPD page list */
3637 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3638 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3639 buf, bufsize);
3640 if (rc != 0)
3641 goto exit_unsupported;
3642
3643 pages = buf[3];
3644 for (i = 1; i <= pages; i++)
3645 if (buf[3 + i] == page)
3646 goto exit_supported;
3647 exit_unsupported:
3648 kfree(buf);
3649 return false;
3650 exit_supported:
3651 kfree(buf);
3652 return true;
3653 }
3654
3655 /*
3656 * Called during a scan operation.
3657 * Sets ioaccel status on the new device list, not the existing device list
3658 *
3659 * The device list used during I/O will be updated later in
3660 * adjust_hpsa_scsi_table.
3661 */
hpsa_get_ioaccel_status(struct ctlr_info * h,unsigned char * scsi3addr,struct hpsa_scsi_dev_t * this_device)3662 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3663 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3664 {
3665 int rc;
3666 unsigned char *buf;
3667 u8 ioaccel_status;
3668
3669 this_device->offload_config = 0;
3670 this_device->offload_enabled = 0;
3671 this_device->offload_to_be_enabled = 0;
3672
3673 buf = kzalloc(64, GFP_KERNEL);
3674 if (!buf)
3675 return;
3676 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3677 goto out;
3678 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3679 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3680 if (rc != 0)
3681 goto out;
3682
3683 #define IOACCEL_STATUS_BYTE 4
3684 #define OFFLOAD_CONFIGURED_BIT 0x01
3685 #define OFFLOAD_ENABLED_BIT 0x02
3686 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3687 this_device->offload_config =
3688 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3689 if (this_device->offload_config) {
3690 bool offload_enabled =
3691 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3692 /*
3693 * Check to see if offload can be enabled.
3694 */
3695 if (offload_enabled) {
3696 rc = hpsa_get_raid_map(h, scsi3addr, this_device);
3697 if (rc) /* could not load raid_map */
3698 goto out;
3699 this_device->offload_to_be_enabled = 1;
3700 }
3701 }
3702
3703 out:
3704 kfree(buf);
3705 return;
3706 }
3707
3708 /* Get the device id from inquiry page 0x83 */
hpsa_get_device_id(struct ctlr_info * h,unsigned char * scsi3addr,unsigned char * device_id,int index,int buflen)3709 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3710 unsigned char *device_id, int index, int buflen)
3711 {
3712 int rc;
3713 unsigned char *buf;
3714
3715 /* Does controller have VPD for device id? */
3716 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3717 return 1; /* not supported */
3718
3719 buf = kzalloc(64, GFP_KERNEL);
3720 if (!buf)
3721 return -ENOMEM;
3722
3723 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3724 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3725 if (rc == 0) {
3726 if (buflen > 16)
3727 buflen = 16;
3728 memcpy(device_id, &buf[8], buflen);
3729 }
3730
3731 kfree(buf);
3732
3733 return rc; /*0 - got id, otherwise, didn't */
3734 }
3735
hpsa_scsi_do_report_luns(struct ctlr_info * h,int logical,void * buf,int bufsize,int extended_response)3736 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3737 void *buf, int bufsize,
3738 int extended_response)
3739 {
3740 int rc = IO_OK;
3741 struct CommandList *c;
3742 unsigned char scsi3addr[8];
3743 struct ErrorInfo *ei;
3744
3745 c = cmd_alloc(h);
3746
3747 /* address the controller */
3748 memset(scsi3addr, 0, sizeof(scsi3addr));
3749 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3750 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3751 rc = -EAGAIN;
3752 goto out;
3753 }
3754 if (extended_response)
3755 c->Request.CDB[1] = extended_response;
3756 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3757 NO_TIMEOUT);
3758 if (rc)
3759 goto out;
3760 ei = c->err_info;
3761 if (ei->CommandStatus != 0 &&
3762 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3763 hpsa_scsi_interpret_error(h, c);
3764 rc = -EIO;
3765 } else {
3766 struct ReportLUNdata *rld = buf;
3767
3768 if (rld->extended_response_flag != extended_response) {
3769 if (!h->legacy_board) {
3770 dev_err(&h->pdev->dev,
3771 "report luns requested format %u, got %u\n",
3772 extended_response,
3773 rld->extended_response_flag);
3774 rc = -EINVAL;
3775 } else
3776 rc = -EOPNOTSUPP;
3777 }
3778 }
3779 out:
3780 cmd_free(h, c);
3781 return rc;
3782 }
3783
hpsa_scsi_do_report_phys_luns(struct ctlr_info * h,struct ReportExtendedLUNdata * buf,int bufsize)3784 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3785 struct ReportExtendedLUNdata *buf, int bufsize)
3786 {
3787 int rc;
3788 struct ReportLUNdata *lbuf;
3789
3790 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3791 HPSA_REPORT_PHYS_EXTENDED);
3792 if (!rc || rc != -EOPNOTSUPP)
3793 return rc;
3794
3795 /* REPORT PHYS EXTENDED is not supported */
3796 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3797 if (!lbuf)
3798 return -ENOMEM;
3799
3800 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3801 if (!rc) {
3802 int i;
3803 u32 nphys;
3804
3805 /* Copy ReportLUNdata header */
3806 memcpy(buf, lbuf, 8);
3807 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3808 for (i = 0; i < nphys; i++)
3809 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3810 }
3811 kfree(lbuf);
3812 return rc;
3813 }
3814
hpsa_scsi_do_report_log_luns(struct ctlr_info * h,struct ReportLUNdata * buf,int bufsize)3815 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3816 struct ReportLUNdata *buf, int bufsize)
3817 {
3818 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3819 }
3820
hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t * device,int bus,int target,int lun)3821 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3822 int bus, int target, int lun)
3823 {
3824 device->bus = bus;
3825 device->target = target;
3826 device->lun = lun;
3827 }
3828
3829 /* Use VPD inquiry to get details of volume status */
hpsa_get_volume_status(struct ctlr_info * h,unsigned char scsi3addr[])3830 static int hpsa_get_volume_status(struct ctlr_info *h,
3831 unsigned char scsi3addr[])
3832 {
3833 int rc;
3834 int status;
3835 int size;
3836 unsigned char *buf;
3837
3838 buf = kzalloc(64, GFP_KERNEL);
3839 if (!buf)
3840 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3841
3842 /* Does controller have VPD for logical volume status? */
3843 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3844 goto exit_failed;
3845
3846 /* Get the size of the VPD return buffer */
3847 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3848 buf, HPSA_VPD_HEADER_SZ);
3849 if (rc != 0)
3850 goto exit_failed;
3851 size = buf[3];
3852
3853 /* Now get the whole VPD buffer */
3854 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3855 buf, size + HPSA_VPD_HEADER_SZ);
3856 if (rc != 0)
3857 goto exit_failed;
3858 status = buf[4]; /* status byte */
3859
3860 kfree(buf);
3861 return status;
3862 exit_failed:
3863 kfree(buf);
3864 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3865 }
3866
3867 /* Determine offline status of a volume.
3868 * Return either:
3869 * 0 (not offline)
3870 * 0xff (offline for unknown reasons)
3871 * # (integer code indicating one of several NOT READY states
3872 * describing why a volume is to be kept offline)
3873 */
hpsa_volume_offline(struct ctlr_info * h,unsigned char scsi3addr[])3874 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3875 unsigned char scsi3addr[])
3876 {
3877 struct CommandList *c;
3878 unsigned char *sense;
3879 u8 sense_key, asc, ascq;
3880 int sense_len;
3881 int rc, ldstat = 0;
3882 #define ASC_LUN_NOT_READY 0x04
3883 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3884 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3885
3886 c = cmd_alloc(h);
3887
3888 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3889 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3890 NO_TIMEOUT);
3891 if (rc) {
3892 cmd_free(h, c);
3893 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3894 }
3895 sense = c->err_info->SenseInfo;
3896 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3897 sense_len = sizeof(c->err_info->SenseInfo);
3898 else
3899 sense_len = c->err_info->SenseLen;
3900 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3901 cmd_free(h, c);
3902
3903 /* Determine the reason for not ready state */
3904 ldstat = hpsa_get_volume_status(h, scsi3addr);
3905
3906 /* Keep volume offline in certain cases: */
3907 switch (ldstat) {
3908 case HPSA_LV_FAILED:
3909 case HPSA_LV_UNDERGOING_ERASE:
3910 case HPSA_LV_NOT_AVAILABLE:
3911 case HPSA_LV_UNDERGOING_RPI:
3912 case HPSA_LV_PENDING_RPI:
3913 case HPSA_LV_ENCRYPTED_NO_KEY:
3914 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3915 case HPSA_LV_UNDERGOING_ENCRYPTION:
3916 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3917 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3918 return ldstat;
3919 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3920 /* If VPD status page isn't available,
3921 * use ASC/ASCQ to determine state
3922 */
3923 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3924 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3925 return ldstat;
3926 break;
3927 default:
3928 break;
3929 }
3930 return HPSA_LV_OK;
3931 }
3932
hpsa_update_device_info(struct ctlr_info * h,unsigned char scsi3addr[],struct hpsa_scsi_dev_t * this_device,unsigned char * is_OBDR_device)3933 static int hpsa_update_device_info(struct ctlr_info *h,
3934 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3935 unsigned char *is_OBDR_device)
3936 {
3937
3938 #define OBDR_SIG_OFFSET 43
3939 #define OBDR_TAPE_SIG "$DR-10"
3940 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3941 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3942
3943 unsigned char *inq_buff;
3944 unsigned char *obdr_sig;
3945 int rc = 0;
3946
3947 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3948 if (!inq_buff) {
3949 rc = -ENOMEM;
3950 goto bail_out;
3951 }
3952
3953 /* Do an inquiry to the device to see what it is. */
3954 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3955 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3956 dev_err(&h->pdev->dev,
3957 "%s: inquiry failed, device will be skipped.\n",
3958 __func__);
3959 rc = HPSA_INQUIRY_FAILED;
3960 goto bail_out;
3961 }
3962
3963 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3964 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3965
3966 this_device->devtype = (inq_buff[0] & 0x1f);
3967 memcpy(this_device->scsi3addr, scsi3addr, 8);
3968 memcpy(this_device->vendor, &inq_buff[8],
3969 sizeof(this_device->vendor));
3970 memcpy(this_device->model, &inq_buff[16],
3971 sizeof(this_device->model));
3972 this_device->rev = inq_buff[2];
3973 memset(this_device->device_id, 0,
3974 sizeof(this_device->device_id));
3975 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3976 sizeof(this_device->device_id)) < 0) {
3977 dev_err(&h->pdev->dev,
3978 "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
3979 h->ctlr, __func__,
3980 h->scsi_host->host_no,
3981 this_device->bus, this_device->target,
3982 this_device->lun,
3983 scsi_device_type(this_device->devtype),
3984 this_device->model);
3985 rc = HPSA_LV_FAILED;
3986 goto bail_out;
3987 }
3988
3989 if ((this_device->devtype == TYPE_DISK ||
3990 this_device->devtype == TYPE_ZBC) &&
3991 is_logical_dev_addr_mode(scsi3addr)) {
3992 unsigned char volume_offline;
3993
3994 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3995 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3996 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3997 volume_offline = hpsa_volume_offline(h, scsi3addr);
3998 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3999 h->legacy_board) {
4000 /*
4001 * Legacy boards might not support volume status
4002 */
4003 dev_info(&h->pdev->dev,
4004 "C0:T%d:L%d Volume status not available, assuming online.\n",
4005 this_device->target, this_device->lun);
4006 volume_offline = 0;
4007 }
4008 this_device->volume_offline = volume_offline;
4009 if (volume_offline == HPSA_LV_FAILED) {
4010 rc = HPSA_LV_FAILED;
4011 dev_err(&h->pdev->dev,
4012 "%s: LV failed, device will be skipped.\n",
4013 __func__);
4014 goto bail_out;
4015 }
4016 } else {
4017 this_device->raid_level = RAID_UNKNOWN;
4018 this_device->offload_config = 0;
4019 hpsa_turn_off_ioaccel_for_device(this_device);
4020 this_device->hba_ioaccel_enabled = 0;
4021 this_device->volume_offline = 0;
4022 this_device->queue_depth = h->nr_cmds;
4023 }
4024
4025 if (this_device->external)
4026 this_device->queue_depth = EXTERNAL_QD;
4027
4028 if (is_OBDR_device) {
4029 /* See if this is a One-Button-Disaster-Recovery device
4030 * by looking for "$DR-10" at offset 43 in inquiry data.
4031 */
4032 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4033 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4034 strncmp(obdr_sig, OBDR_TAPE_SIG,
4035 OBDR_SIG_LEN) == 0);
4036 }
4037 kfree(inq_buff);
4038 return 0;
4039
4040 bail_out:
4041 kfree(inq_buff);
4042 return rc;
4043 }
4044
4045 /*
4046 * Helper function to assign bus, target, lun mapping of devices.
4047 * Logical drive target and lun are assigned at this time, but
4048 * physical device lun and target assignment are deferred (assigned
4049 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4050 */
figure_bus_target_lun(struct ctlr_info * h,u8 * lunaddrbytes,struct hpsa_scsi_dev_t * device)4051 static void figure_bus_target_lun(struct ctlr_info *h,
4052 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4053 {
4054 u32 lunid = get_unaligned_le32(lunaddrbytes);
4055
4056 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4057 /* physical device, target and lun filled in later */
4058 if (is_hba_lunid(lunaddrbytes)) {
4059 int bus = HPSA_HBA_BUS;
4060
4061 if (!device->rev)
4062 bus = HPSA_LEGACY_HBA_BUS;
4063 hpsa_set_bus_target_lun(device,
4064 bus, 0, lunid & 0x3fff);
4065 } else
4066 /* defer target, lun assignment for physical devices */
4067 hpsa_set_bus_target_lun(device,
4068 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4069 return;
4070 }
4071 /* It's a logical device */
4072 if (device->external) {
4073 hpsa_set_bus_target_lun(device,
4074 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4075 lunid & 0x00ff);
4076 return;
4077 }
4078 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4079 0, lunid & 0x3fff);
4080 }
4081
figure_external_status(struct ctlr_info * h,int raid_ctlr_position,int i,int nphysicals,int nlocal_logicals)4082 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4083 int i, int nphysicals, int nlocal_logicals)
4084 {
4085 /* In report logicals, local logicals are listed first,
4086 * then any externals.
4087 */
4088 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4089
4090 if (i == raid_ctlr_position)
4091 return 0;
4092
4093 if (i < logicals_start)
4094 return 0;
4095
4096 /* i is in logicals range, but still within local logicals */
4097 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4098 return 0;
4099
4100 return 1; /* it's an external lun */
4101 }
4102
4103 /*
4104 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4105 * logdev. The number of luns in physdev and logdev are returned in
4106 * *nphysicals and *nlogicals, respectively.
4107 * Returns 0 on success, -1 otherwise.
4108 */
hpsa_gather_lun_info(struct ctlr_info * h,struct ReportExtendedLUNdata * physdev,u32 * nphysicals,struct ReportLUNdata * logdev,u32 * nlogicals)4109 static int hpsa_gather_lun_info(struct ctlr_info *h,
4110 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4111 struct ReportLUNdata *logdev, u32 *nlogicals)
4112 {
4113 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4114 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4115 return -1;
4116 }
4117 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4118 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4119 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4120 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4121 *nphysicals = HPSA_MAX_PHYS_LUN;
4122 }
4123 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4124 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4125 return -1;
4126 }
4127 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4128 /* Reject Logicals in excess of our max capability. */
4129 if (*nlogicals > HPSA_MAX_LUN) {
4130 dev_warn(&h->pdev->dev,
4131 "maximum logical LUNs (%d) exceeded. "
4132 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4133 *nlogicals - HPSA_MAX_LUN);
4134 *nlogicals = HPSA_MAX_LUN;
4135 }
4136 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4137 dev_warn(&h->pdev->dev,
4138 "maximum logical + physical LUNs (%d) exceeded. "
4139 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4140 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4141 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4142 }
4143 return 0;
4144 }
4145
figure_lunaddrbytes(struct ctlr_info * h,int raid_ctlr_position,int i,int nphysicals,int nlogicals,struct ReportExtendedLUNdata * physdev_list,struct ReportLUNdata * logdev_list)4146 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4147 int i, int nphysicals, int nlogicals,
4148 struct ReportExtendedLUNdata *physdev_list,
4149 struct ReportLUNdata *logdev_list)
4150 {
4151 /* Helper function, figure out where the LUN ID info is coming from
4152 * given index i, lists of physical and logical devices, where in
4153 * the list the raid controller is supposed to appear (first or last)
4154 */
4155
4156 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4157 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4158
4159 if (i == raid_ctlr_position)
4160 return RAID_CTLR_LUNID;
4161
4162 if (i < logicals_start)
4163 return &physdev_list->LUN[i -
4164 (raid_ctlr_position == 0)].lunid[0];
4165
4166 if (i < last_device)
4167 return &logdev_list->LUN[i - nphysicals -
4168 (raid_ctlr_position == 0)][0];
4169 BUG();
4170 return NULL;
4171 }
4172
4173 /* get physical drive ioaccel handle and queue depth */
hpsa_get_ioaccel_drive_info(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev,struct ReportExtendedLUNdata * rlep,int rle_index,struct bmic_identify_physical_device * id_phys)4174 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4175 struct hpsa_scsi_dev_t *dev,
4176 struct ReportExtendedLUNdata *rlep, int rle_index,
4177 struct bmic_identify_physical_device *id_phys)
4178 {
4179 int rc;
4180 struct ext_report_lun_entry *rle;
4181
4182 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4183 return;
4184
4185 rle = &rlep->LUN[rle_index];
4186
4187 dev->ioaccel_handle = rle->ioaccel_handle;
4188 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4189 dev->hba_ioaccel_enabled = 1;
4190 memset(id_phys, 0, sizeof(*id_phys));
4191 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4192 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4193 sizeof(*id_phys));
4194 if (!rc)
4195 /* Reserve space for FW operations */
4196 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4197 #define DRIVE_QUEUE_DEPTH 7
4198 dev->queue_depth =
4199 le16_to_cpu(id_phys->current_queue_depth_limit) -
4200 DRIVE_CMDS_RESERVED_FOR_FW;
4201 else
4202 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4203 }
4204
hpsa_get_path_info(struct hpsa_scsi_dev_t * this_device,struct ReportExtendedLUNdata * rlep,int rle_index,struct bmic_identify_physical_device * id_phys)4205 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4206 struct ReportExtendedLUNdata *rlep, int rle_index,
4207 struct bmic_identify_physical_device *id_phys)
4208 {
4209 struct ext_report_lun_entry *rle;
4210
4211 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4212 return;
4213
4214 rle = &rlep->LUN[rle_index];
4215
4216 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4217 this_device->hba_ioaccel_enabled = 1;
4218
4219 memcpy(&this_device->active_path_index,
4220 &id_phys->active_path_number,
4221 sizeof(this_device->active_path_index));
4222 memcpy(&this_device->path_map,
4223 &id_phys->redundant_path_present_map,
4224 sizeof(this_device->path_map));
4225 memcpy(&this_device->box,
4226 &id_phys->alternate_paths_phys_box_on_port,
4227 sizeof(this_device->box));
4228 memcpy(&this_device->phys_connector,
4229 &id_phys->alternate_paths_phys_connector,
4230 sizeof(this_device->phys_connector));
4231 memcpy(&this_device->bay,
4232 &id_phys->phys_bay_in_box,
4233 sizeof(this_device->bay));
4234 }
4235
4236 /* get number of local logical disks. */
hpsa_set_local_logical_count(struct ctlr_info * h,struct bmic_identify_controller * id_ctlr,u32 * nlocals)4237 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4238 struct bmic_identify_controller *id_ctlr,
4239 u32 *nlocals)
4240 {
4241 int rc;
4242
4243 if (!id_ctlr) {
4244 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4245 __func__);
4246 return -ENOMEM;
4247 }
4248 memset(id_ctlr, 0, sizeof(*id_ctlr));
4249 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4250 if (!rc)
4251 if (id_ctlr->configured_logical_drive_count < 255)
4252 *nlocals = id_ctlr->configured_logical_drive_count;
4253 else
4254 *nlocals = le16_to_cpu(
4255 id_ctlr->extended_logical_unit_count);
4256 else
4257 *nlocals = -1;
4258 return rc;
4259 }
4260
hpsa_is_disk_spare(struct ctlr_info * h,u8 * lunaddrbytes)4261 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4262 {
4263 struct bmic_identify_physical_device *id_phys;
4264 bool is_spare = false;
4265 int rc;
4266
4267 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4268 if (!id_phys)
4269 return false;
4270
4271 rc = hpsa_bmic_id_physical_device(h,
4272 lunaddrbytes,
4273 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4274 id_phys, sizeof(*id_phys));
4275 if (rc == 0)
4276 is_spare = (id_phys->more_flags >> 6) & 0x01;
4277
4278 kfree(id_phys);
4279 return is_spare;
4280 }
4281
4282 #define RPL_DEV_FLAG_NON_DISK 0x1
4283 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4284 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4285
4286 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4287
hpsa_skip_device(struct ctlr_info * h,u8 * lunaddrbytes,struct ext_report_lun_entry * rle)4288 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4289 struct ext_report_lun_entry *rle)
4290 {
4291 u8 device_flags;
4292 u8 device_type;
4293
4294 if (!MASKED_DEVICE(lunaddrbytes))
4295 return false;
4296
4297 device_flags = rle->device_flags;
4298 device_type = rle->device_type;
4299
4300 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4301 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4302 return false;
4303 return true;
4304 }
4305
4306 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4307 return false;
4308
4309 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4310 return false;
4311
4312 /*
4313 * Spares may be spun down, we do not want to
4314 * do an Inquiry to a RAID set spare drive as
4315 * that would have them spun up, that is a
4316 * performance hit because I/O to the RAID device
4317 * stops while the spin up occurs which can take
4318 * over 50 seconds.
4319 */
4320 if (hpsa_is_disk_spare(h, lunaddrbytes))
4321 return true;
4322
4323 return false;
4324 }
4325
hpsa_update_scsi_devices(struct ctlr_info * h)4326 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4327 {
4328 /* the idea here is we could get notified
4329 * that some devices have changed, so we do a report
4330 * physical luns and report logical luns cmd, and adjust
4331 * our list of devices accordingly.
4332 *
4333 * The scsi3addr's of devices won't change so long as the
4334 * adapter is not reset. That means we can rescan and
4335 * tell which devices we already know about, vs. new
4336 * devices, vs. disappearing devices.
4337 */
4338 struct ReportExtendedLUNdata *physdev_list = NULL;
4339 struct ReportLUNdata *logdev_list = NULL;
4340 struct bmic_identify_physical_device *id_phys = NULL;
4341 struct bmic_identify_controller *id_ctlr = NULL;
4342 u32 nphysicals = 0;
4343 u32 nlogicals = 0;
4344 u32 nlocal_logicals = 0;
4345 u32 ndev_allocated = 0;
4346 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4347 int ncurrent = 0;
4348 int i, ndevs_to_allocate;
4349 int raid_ctlr_position;
4350 bool physical_device;
4351
4352 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
4353 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4354 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4355 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4356 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4357 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4358
4359 if (!currentsd || !physdev_list || !logdev_list ||
4360 !tmpdevice || !id_phys || !id_ctlr) {
4361 dev_err(&h->pdev->dev, "out of memory\n");
4362 goto out;
4363 }
4364
4365 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4366
4367 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4368 logdev_list, &nlogicals)) {
4369 h->drv_req_rescan = 1;
4370 goto out;
4371 }
4372
4373 /* Set number of local logicals (non PTRAID) */
4374 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4375 dev_warn(&h->pdev->dev,
4376 "%s: Can't determine number of local logical devices.\n",
4377 __func__);
4378 }
4379
4380 /* We might see up to the maximum number of logical and physical disks
4381 * plus external target devices, and a device for the local RAID
4382 * controller.
4383 */
4384 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4385
4386 hpsa_ext_ctrl_present(h, physdev_list);
4387
4388 /* Allocate the per device structures */
4389 for (i = 0; i < ndevs_to_allocate; i++) {
4390 if (i >= HPSA_MAX_DEVICES) {
4391 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4392 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4393 ndevs_to_allocate - HPSA_MAX_DEVICES);
4394 break;
4395 }
4396
4397 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4398 if (!currentsd[i]) {
4399 h->drv_req_rescan = 1;
4400 goto out;
4401 }
4402 ndev_allocated++;
4403 }
4404
4405 if (is_scsi_rev_5(h))
4406 raid_ctlr_position = 0;
4407 else
4408 raid_ctlr_position = nphysicals + nlogicals;
4409
4410 /* adjust our table of devices */
4411 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4412 u8 *lunaddrbytes, is_OBDR = 0;
4413 int rc = 0;
4414 int phys_dev_index = i - (raid_ctlr_position == 0);
4415 bool skip_device = false;
4416
4417 memset(tmpdevice, 0, sizeof(*tmpdevice));
4418
4419 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4420
4421 /* Figure out where the LUN ID info is coming from */
4422 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4423 i, nphysicals, nlogicals, physdev_list, logdev_list);
4424
4425 /* Determine if this is a lun from an external target array */
4426 tmpdevice->external =
4427 figure_external_status(h, raid_ctlr_position, i,
4428 nphysicals, nlocal_logicals);
4429
4430 /*
4431 * Skip over some devices such as a spare.
4432 */
4433 if (phys_dev_index >= 0 && !tmpdevice->external &&
4434 physical_device) {
4435 skip_device = hpsa_skip_device(h, lunaddrbytes,
4436 &physdev_list->LUN[phys_dev_index]);
4437 if (skip_device)
4438 continue;
4439 }
4440
4441 /* Get device type, vendor, model, device id, raid_map */
4442 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4443 &is_OBDR);
4444 if (rc == -ENOMEM) {
4445 dev_warn(&h->pdev->dev,
4446 "Out of memory, rescan deferred.\n");
4447 h->drv_req_rescan = 1;
4448 goto out;
4449 }
4450 if (rc) {
4451 h->drv_req_rescan = 1;
4452 continue;
4453 }
4454
4455 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4456 this_device = currentsd[ncurrent];
4457
4458 *this_device = *tmpdevice;
4459 this_device->physical_device = physical_device;
4460
4461 /*
4462 * Expose all devices except for physical devices that
4463 * are masked.
4464 */
4465 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4466 this_device->expose_device = 0;
4467 else
4468 this_device->expose_device = 1;
4469
4470
4471 /*
4472 * Get the SAS address for physical devices that are exposed.
4473 */
4474 if (this_device->physical_device && this_device->expose_device)
4475 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4476
4477 switch (this_device->devtype) {
4478 case TYPE_ROM:
4479 /* We don't *really* support actual CD-ROM devices,
4480 * just "One Button Disaster Recovery" tape drive
4481 * which temporarily pretends to be a CD-ROM drive.
4482 * So we check that the device is really an OBDR tape
4483 * device by checking for "$DR-10" in bytes 43-48 of
4484 * the inquiry data.
4485 */
4486 if (is_OBDR)
4487 ncurrent++;
4488 break;
4489 case TYPE_DISK:
4490 case TYPE_ZBC:
4491 if (this_device->physical_device) {
4492 /* The disk is in HBA mode. */
4493 /* Never use RAID mapper in HBA mode. */
4494 this_device->offload_enabled = 0;
4495 hpsa_get_ioaccel_drive_info(h, this_device,
4496 physdev_list, phys_dev_index, id_phys);
4497 hpsa_get_path_info(this_device,
4498 physdev_list, phys_dev_index, id_phys);
4499 }
4500 ncurrent++;
4501 break;
4502 case TYPE_TAPE:
4503 case TYPE_MEDIUM_CHANGER:
4504 ncurrent++;
4505 break;
4506 case TYPE_ENCLOSURE:
4507 if (!this_device->external)
4508 hpsa_get_enclosure_info(h, lunaddrbytes,
4509 physdev_list, phys_dev_index,
4510 this_device);
4511 ncurrent++;
4512 break;
4513 case TYPE_RAID:
4514 /* Only present the Smartarray HBA as a RAID controller.
4515 * If it's a RAID controller other than the HBA itself
4516 * (an external RAID controller, MSA500 or similar)
4517 * don't present it.
4518 */
4519 if (!is_hba_lunid(lunaddrbytes))
4520 break;
4521 ncurrent++;
4522 break;
4523 default:
4524 break;
4525 }
4526 if (ncurrent >= HPSA_MAX_DEVICES)
4527 break;
4528 }
4529
4530 if (h->sas_host == NULL) {
4531 int rc = 0;
4532
4533 rc = hpsa_add_sas_host(h);
4534 if (rc) {
4535 dev_warn(&h->pdev->dev,
4536 "Could not add sas host %d\n", rc);
4537 goto out;
4538 }
4539 }
4540
4541 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4542 out:
4543 kfree(tmpdevice);
4544 for (i = 0; i < ndev_allocated; i++)
4545 kfree(currentsd[i]);
4546 kfree(currentsd);
4547 kfree(physdev_list);
4548 kfree(logdev_list);
4549 kfree(id_ctlr);
4550 kfree(id_phys);
4551 }
4552
hpsa_set_sg_descriptor(struct SGDescriptor * desc,struct scatterlist * sg)4553 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4554 struct scatterlist *sg)
4555 {
4556 u64 addr64 = (u64) sg_dma_address(sg);
4557 unsigned int len = sg_dma_len(sg);
4558
4559 desc->Addr = cpu_to_le64(addr64);
4560 desc->Len = cpu_to_le32(len);
4561 desc->Ext = 0;
4562 }
4563
4564 /*
4565 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4566 * dma mapping and fills in the scatter gather entries of the
4567 * hpsa command, cp.
4568 */
hpsa_scatter_gather(struct ctlr_info * h,struct CommandList * cp,struct scsi_cmnd * cmd)4569 static int hpsa_scatter_gather(struct ctlr_info *h,
4570 struct CommandList *cp,
4571 struct scsi_cmnd *cmd)
4572 {
4573 struct scatterlist *sg;
4574 int use_sg, i, sg_limit, chained;
4575 struct SGDescriptor *curr_sg;
4576
4577 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4578
4579 use_sg = scsi_dma_map(cmd);
4580 if (use_sg < 0)
4581 return use_sg;
4582
4583 if (!use_sg)
4584 goto sglist_finished;
4585
4586 /*
4587 * If the number of entries is greater than the max for a single list,
4588 * then we have a chained list; we will set up all but one entry in the
4589 * first list (the last entry is saved for link information);
4590 * otherwise, we don't have a chained list and we'll set up at each of
4591 * the entries in the one list.
4592 */
4593 curr_sg = cp->SG;
4594 chained = use_sg > h->max_cmd_sg_entries;
4595 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4596 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4597 hpsa_set_sg_descriptor(curr_sg, sg);
4598 curr_sg++;
4599 }
4600
4601 if (chained) {
4602 /*
4603 * Continue with the chained list. Set curr_sg to the chained
4604 * list. Modify the limit to the total count less the entries
4605 * we've already set up. Resume the scan at the list entry
4606 * where the previous loop left off.
4607 */
4608 curr_sg = h->cmd_sg_list[cp->cmdindex];
4609 sg_limit = use_sg - sg_limit;
4610 for_each_sg(sg, sg, sg_limit, i) {
4611 hpsa_set_sg_descriptor(curr_sg, sg);
4612 curr_sg++;
4613 }
4614 }
4615
4616 /* Back the pointer up to the last entry and mark it as "last". */
4617 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4618
4619 if (use_sg + chained > h->maxSG)
4620 h->maxSG = use_sg + chained;
4621
4622 if (chained) {
4623 cp->Header.SGList = h->max_cmd_sg_entries;
4624 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4625 if (hpsa_map_sg_chain_block(h, cp)) {
4626 scsi_dma_unmap(cmd);
4627 return -1;
4628 }
4629 return 0;
4630 }
4631
4632 sglist_finished:
4633
4634 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4635 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4636 return 0;
4637 }
4638
warn_zero_length_transfer(struct ctlr_info * h,u8 * cdb,int cdb_len,const char * func)4639 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4640 u8 *cdb, int cdb_len,
4641 const char *func)
4642 {
4643 dev_warn(&h->pdev->dev,
4644 "%s: Blocking zero-length request: CDB:%*phN\n",
4645 func, cdb_len, cdb);
4646 }
4647
4648 #define IO_ACCEL_INELIGIBLE 1
4649 /* zero-length transfers trigger hardware errors. */
is_zero_length_transfer(u8 * cdb)4650 static bool is_zero_length_transfer(u8 *cdb)
4651 {
4652 u32 block_cnt;
4653
4654 /* Block zero-length transfer sizes on certain commands. */
4655 switch (cdb[0]) {
4656 case READ_10:
4657 case WRITE_10:
4658 case VERIFY: /* 0x2F */
4659 case WRITE_VERIFY: /* 0x2E */
4660 block_cnt = get_unaligned_be16(&cdb[7]);
4661 break;
4662 case READ_12:
4663 case WRITE_12:
4664 case VERIFY_12: /* 0xAF */
4665 case WRITE_VERIFY_12: /* 0xAE */
4666 block_cnt = get_unaligned_be32(&cdb[6]);
4667 break;
4668 case READ_16:
4669 case WRITE_16:
4670 case VERIFY_16: /* 0x8F */
4671 block_cnt = get_unaligned_be32(&cdb[10]);
4672 break;
4673 default:
4674 return false;
4675 }
4676
4677 return block_cnt == 0;
4678 }
4679
fixup_ioaccel_cdb(u8 * cdb,int * cdb_len)4680 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4681 {
4682 int is_write = 0;
4683 u32 block;
4684 u32 block_cnt;
4685
4686 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4687 switch (cdb[0]) {
4688 case WRITE_6:
4689 case WRITE_12:
4690 is_write = 1;
4691 fallthrough;
4692 case READ_6:
4693 case READ_12:
4694 if (*cdb_len == 6) {
4695 block = (((cdb[1] & 0x1F) << 16) |
4696 (cdb[2] << 8) |
4697 cdb[3]);
4698 block_cnt = cdb[4];
4699 if (block_cnt == 0)
4700 block_cnt = 256;
4701 } else {
4702 BUG_ON(*cdb_len != 12);
4703 block = get_unaligned_be32(&cdb[2]);
4704 block_cnt = get_unaligned_be32(&cdb[6]);
4705 }
4706 if (block_cnt > 0xffff)
4707 return IO_ACCEL_INELIGIBLE;
4708
4709 cdb[0] = is_write ? WRITE_10 : READ_10;
4710 cdb[1] = 0;
4711 cdb[2] = (u8) (block >> 24);
4712 cdb[3] = (u8) (block >> 16);
4713 cdb[4] = (u8) (block >> 8);
4714 cdb[5] = (u8) (block);
4715 cdb[6] = 0;
4716 cdb[7] = (u8) (block_cnt >> 8);
4717 cdb[8] = (u8) (block_cnt);
4718 cdb[9] = 0;
4719 *cdb_len = 10;
4720 break;
4721 }
4722 return 0;
4723 }
4724
hpsa_scsi_ioaccel1_queue_command(struct ctlr_info * h,struct CommandList * c,u32 ioaccel_handle,u8 * cdb,int cdb_len,u8 * scsi3addr,struct hpsa_scsi_dev_t * phys_disk)4725 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4726 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4727 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4728 {
4729 struct scsi_cmnd *cmd = c->scsi_cmd;
4730 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4731 unsigned int len;
4732 unsigned int total_len = 0;
4733 struct scatterlist *sg;
4734 u64 addr64;
4735 int use_sg, i;
4736 struct SGDescriptor *curr_sg;
4737 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4738
4739 /* TODO: implement chaining support */
4740 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4741 atomic_dec(&phys_disk->ioaccel_cmds_out);
4742 return IO_ACCEL_INELIGIBLE;
4743 }
4744
4745 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4746
4747 if (is_zero_length_transfer(cdb)) {
4748 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4749 atomic_dec(&phys_disk->ioaccel_cmds_out);
4750 return IO_ACCEL_INELIGIBLE;
4751 }
4752
4753 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4754 atomic_dec(&phys_disk->ioaccel_cmds_out);
4755 return IO_ACCEL_INELIGIBLE;
4756 }
4757
4758 c->cmd_type = CMD_IOACCEL1;
4759
4760 /* Adjust the DMA address to point to the accelerated command buffer */
4761 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4762 (c->cmdindex * sizeof(*cp));
4763 BUG_ON(c->busaddr & 0x0000007F);
4764
4765 use_sg = scsi_dma_map(cmd);
4766 if (use_sg < 0) {
4767 atomic_dec(&phys_disk->ioaccel_cmds_out);
4768 return use_sg;
4769 }
4770
4771 if (use_sg) {
4772 curr_sg = cp->SG;
4773 scsi_for_each_sg(cmd, sg, use_sg, i) {
4774 addr64 = (u64) sg_dma_address(sg);
4775 len = sg_dma_len(sg);
4776 total_len += len;
4777 curr_sg->Addr = cpu_to_le64(addr64);
4778 curr_sg->Len = cpu_to_le32(len);
4779 curr_sg->Ext = cpu_to_le32(0);
4780 curr_sg++;
4781 }
4782 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4783
4784 switch (cmd->sc_data_direction) {
4785 case DMA_TO_DEVICE:
4786 control |= IOACCEL1_CONTROL_DATA_OUT;
4787 break;
4788 case DMA_FROM_DEVICE:
4789 control |= IOACCEL1_CONTROL_DATA_IN;
4790 break;
4791 case DMA_NONE:
4792 control |= IOACCEL1_CONTROL_NODATAXFER;
4793 break;
4794 default:
4795 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4796 cmd->sc_data_direction);
4797 BUG();
4798 break;
4799 }
4800 } else {
4801 control |= IOACCEL1_CONTROL_NODATAXFER;
4802 }
4803
4804 c->Header.SGList = use_sg;
4805 /* Fill out the command structure to submit */
4806 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4807 cp->transfer_len = cpu_to_le32(total_len);
4808 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4809 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4810 cp->control = cpu_to_le32(control);
4811 memcpy(cp->CDB, cdb, cdb_len);
4812 memcpy(cp->CISS_LUN, scsi3addr, 8);
4813 /* Tag was already set at init time. */
4814 enqueue_cmd_and_start_io(h, c);
4815 return 0;
4816 }
4817
4818 /*
4819 * Queue a command directly to a device behind the controller using the
4820 * I/O accelerator path.
4821 */
hpsa_scsi_ioaccel_direct_map(struct ctlr_info * h,struct CommandList * c)4822 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4823 struct CommandList *c)
4824 {
4825 struct scsi_cmnd *cmd = c->scsi_cmd;
4826 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4827
4828 if (!dev)
4829 return -1;
4830
4831 c->phys_disk = dev;
4832
4833 if (dev->in_reset)
4834 return -1;
4835
4836 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4837 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4838 }
4839
4840 /*
4841 * Set encryption parameters for the ioaccel2 request
4842 */
set_encrypt_ioaccel2(struct ctlr_info * h,struct CommandList * c,struct io_accel2_cmd * cp)4843 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4844 struct CommandList *c, struct io_accel2_cmd *cp)
4845 {
4846 struct scsi_cmnd *cmd = c->scsi_cmd;
4847 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4848 struct raid_map_data *map = &dev->raid_map;
4849 u64 first_block;
4850
4851 /* Are we doing encryption on this device */
4852 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4853 return;
4854 /* Set the data encryption key index. */
4855 cp->dekindex = map->dekindex;
4856
4857 /* Set the encryption enable flag, encoded into direction field. */
4858 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4859
4860 /* Set encryption tweak values based on logical block address
4861 * If block size is 512, tweak value is LBA.
4862 * For other block sizes, tweak is (LBA * block size)/ 512)
4863 */
4864 switch (cmd->cmnd[0]) {
4865 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4866 case READ_6:
4867 case WRITE_6:
4868 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4869 (cmd->cmnd[2] << 8) |
4870 cmd->cmnd[3]);
4871 break;
4872 case WRITE_10:
4873 case READ_10:
4874 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4875 case WRITE_12:
4876 case READ_12:
4877 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4878 break;
4879 case WRITE_16:
4880 case READ_16:
4881 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4882 break;
4883 default:
4884 dev_err(&h->pdev->dev,
4885 "ERROR: %s: size (0x%x) not supported for encryption\n",
4886 __func__, cmd->cmnd[0]);
4887 BUG();
4888 break;
4889 }
4890
4891 if (le32_to_cpu(map->volume_blk_size) != 512)
4892 first_block = first_block *
4893 le32_to_cpu(map->volume_blk_size)/512;
4894
4895 cp->tweak_lower = cpu_to_le32(first_block);
4896 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4897 }
4898
hpsa_scsi_ioaccel2_queue_command(struct ctlr_info * h,struct CommandList * c,u32 ioaccel_handle,u8 * cdb,int cdb_len,u8 * scsi3addr,struct hpsa_scsi_dev_t * phys_disk)4899 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4900 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4901 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4902 {
4903 struct scsi_cmnd *cmd = c->scsi_cmd;
4904 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4905 struct ioaccel2_sg_element *curr_sg;
4906 int use_sg, i;
4907 struct scatterlist *sg;
4908 u64 addr64;
4909 u32 len;
4910 u32 total_len = 0;
4911
4912 if (!cmd->device)
4913 return -1;
4914
4915 if (!cmd->device->hostdata)
4916 return -1;
4917
4918 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4919
4920 if (is_zero_length_transfer(cdb)) {
4921 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4922 atomic_dec(&phys_disk->ioaccel_cmds_out);
4923 return IO_ACCEL_INELIGIBLE;
4924 }
4925
4926 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4927 atomic_dec(&phys_disk->ioaccel_cmds_out);
4928 return IO_ACCEL_INELIGIBLE;
4929 }
4930
4931 c->cmd_type = CMD_IOACCEL2;
4932 /* Adjust the DMA address to point to the accelerated command buffer */
4933 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4934 (c->cmdindex * sizeof(*cp));
4935 BUG_ON(c->busaddr & 0x0000007F);
4936
4937 memset(cp, 0, sizeof(*cp));
4938 cp->IU_type = IOACCEL2_IU_TYPE;
4939
4940 use_sg = scsi_dma_map(cmd);
4941 if (use_sg < 0) {
4942 atomic_dec(&phys_disk->ioaccel_cmds_out);
4943 return use_sg;
4944 }
4945
4946 if (use_sg) {
4947 curr_sg = cp->sg;
4948 if (use_sg > h->ioaccel_maxsg) {
4949 addr64 = le64_to_cpu(
4950 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4951 curr_sg->address = cpu_to_le64(addr64);
4952 curr_sg->length = 0;
4953 curr_sg->reserved[0] = 0;
4954 curr_sg->reserved[1] = 0;
4955 curr_sg->reserved[2] = 0;
4956 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4957
4958 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4959 }
4960 scsi_for_each_sg(cmd, sg, use_sg, i) {
4961 addr64 = (u64) sg_dma_address(sg);
4962 len = sg_dma_len(sg);
4963 total_len += len;
4964 curr_sg->address = cpu_to_le64(addr64);
4965 curr_sg->length = cpu_to_le32(len);
4966 curr_sg->reserved[0] = 0;
4967 curr_sg->reserved[1] = 0;
4968 curr_sg->reserved[2] = 0;
4969 curr_sg->chain_indicator = 0;
4970 curr_sg++;
4971 }
4972
4973 /*
4974 * Set the last s/g element bit
4975 */
4976 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4977
4978 switch (cmd->sc_data_direction) {
4979 case DMA_TO_DEVICE:
4980 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4981 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4982 break;
4983 case DMA_FROM_DEVICE:
4984 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4985 cp->direction |= IOACCEL2_DIR_DATA_IN;
4986 break;
4987 case DMA_NONE:
4988 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4989 cp->direction |= IOACCEL2_DIR_NO_DATA;
4990 break;
4991 default:
4992 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4993 cmd->sc_data_direction);
4994 BUG();
4995 break;
4996 }
4997 } else {
4998 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4999 cp->direction |= IOACCEL2_DIR_NO_DATA;
5000 }
5001
5002 /* Set encryption parameters, if necessary */
5003 set_encrypt_ioaccel2(h, c, cp);
5004
5005 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
5006 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5007 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
5008
5009 cp->data_len = cpu_to_le32(total_len);
5010 cp->err_ptr = cpu_to_le64(c->busaddr +
5011 offsetof(struct io_accel2_cmd, error_data));
5012 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5013
5014 /* fill in sg elements */
5015 if (use_sg > h->ioaccel_maxsg) {
5016 cp->sg_count = 1;
5017 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5018 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5019 atomic_dec(&phys_disk->ioaccel_cmds_out);
5020 scsi_dma_unmap(cmd);
5021 return -1;
5022 }
5023 } else
5024 cp->sg_count = (u8) use_sg;
5025
5026 if (phys_disk->in_reset) {
5027 cmd->result = DID_RESET << 16;
5028 return -1;
5029 }
5030
5031 enqueue_cmd_and_start_io(h, c);
5032 return 0;
5033 }
5034
5035 /*
5036 * Queue a command to the correct I/O accelerator path.
5037 */
hpsa_scsi_ioaccel_queue_command(struct ctlr_info * h,struct CommandList * c,u32 ioaccel_handle,u8 * cdb,int cdb_len,u8 * scsi3addr,struct hpsa_scsi_dev_t * phys_disk)5038 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5039 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5040 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5041 {
5042 if (!c->scsi_cmd->device)
5043 return -1;
5044
5045 if (!c->scsi_cmd->device->hostdata)
5046 return -1;
5047
5048 if (phys_disk->in_reset)
5049 return -1;
5050
5051 /* Try to honor the device's queue depth */
5052 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5053 phys_disk->queue_depth) {
5054 atomic_dec(&phys_disk->ioaccel_cmds_out);
5055 return IO_ACCEL_INELIGIBLE;
5056 }
5057 if (h->transMethod & CFGTBL_Trans_io_accel1)
5058 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5059 cdb, cdb_len, scsi3addr,
5060 phys_disk);
5061 else
5062 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5063 cdb, cdb_len, scsi3addr,
5064 phys_disk);
5065 }
5066
raid_map_helper(struct raid_map_data * map,int offload_to_mirror,u32 * map_index,u32 * current_group)5067 static void raid_map_helper(struct raid_map_data *map,
5068 int offload_to_mirror, u32 *map_index, u32 *current_group)
5069 {
5070 if (offload_to_mirror == 0) {
5071 /* use physical disk in the first mirrored group. */
5072 *map_index %= le16_to_cpu(map->data_disks_per_row);
5073 return;
5074 }
5075 do {
5076 /* determine mirror group that *map_index indicates */
5077 *current_group = *map_index /
5078 le16_to_cpu(map->data_disks_per_row);
5079 if (offload_to_mirror == *current_group)
5080 continue;
5081 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5082 /* select map index from next group */
5083 *map_index += le16_to_cpu(map->data_disks_per_row);
5084 (*current_group)++;
5085 } else {
5086 /* select map index from first group */
5087 *map_index %= le16_to_cpu(map->data_disks_per_row);
5088 *current_group = 0;
5089 }
5090 } while (offload_to_mirror != *current_group);
5091 }
5092
5093 /*
5094 * Attempt to perform offload RAID mapping for a logical volume I/O.
5095 */
hpsa_scsi_ioaccel_raid_map(struct ctlr_info * h,struct CommandList * c)5096 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5097 struct CommandList *c)
5098 {
5099 struct scsi_cmnd *cmd = c->scsi_cmd;
5100 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5101 struct raid_map_data *map = &dev->raid_map;
5102 struct raid_map_disk_data *dd = &map->data[0];
5103 int is_write = 0;
5104 u32 map_index;
5105 u64 first_block, last_block;
5106 u32 block_cnt;
5107 u32 blocks_per_row;
5108 u64 first_row, last_row;
5109 u32 first_row_offset, last_row_offset;
5110 u32 first_column, last_column;
5111 u64 r0_first_row, r0_last_row;
5112 u32 r5or6_blocks_per_row;
5113 u64 r5or6_first_row, r5or6_last_row;
5114 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5115 u32 r5or6_first_column, r5or6_last_column;
5116 u32 total_disks_per_row;
5117 u32 stripesize;
5118 u32 first_group, last_group, current_group;
5119 u32 map_row;
5120 u32 disk_handle;
5121 u64 disk_block;
5122 u32 disk_block_cnt;
5123 u8 cdb[16];
5124 u8 cdb_len;
5125 u16 strip_size;
5126 #if BITS_PER_LONG == 32
5127 u64 tmpdiv;
5128 #endif
5129 int offload_to_mirror;
5130
5131 if (!dev)
5132 return -1;
5133
5134 if (dev->in_reset)
5135 return -1;
5136
5137 /* check for valid opcode, get LBA and block count */
5138 switch (cmd->cmnd[0]) {
5139 case WRITE_6:
5140 is_write = 1;
5141 fallthrough;
5142 case READ_6:
5143 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5144 (cmd->cmnd[2] << 8) |
5145 cmd->cmnd[3]);
5146 block_cnt = cmd->cmnd[4];
5147 if (block_cnt == 0)
5148 block_cnt = 256;
5149 break;
5150 case WRITE_10:
5151 is_write = 1;
5152 fallthrough;
5153 case READ_10:
5154 first_block =
5155 (((u64) cmd->cmnd[2]) << 24) |
5156 (((u64) cmd->cmnd[3]) << 16) |
5157 (((u64) cmd->cmnd[4]) << 8) |
5158 cmd->cmnd[5];
5159 block_cnt =
5160 (((u32) cmd->cmnd[7]) << 8) |
5161 cmd->cmnd[8];
5162 break;
5163 case WRITE_12:
5164 is_write = 1;
5165 fallthrough;
5166 case READ_12:
5167 first_block =
5168 (((u64) cmd->cmnd[2]) << 24) |
5169 (((u64) cmd->cmnd[3]) << 16) |
5170 (((u64) cmd->cmnd[4]) << 8) |
5171 cmd->cmnd[5];
5172 block_cnt =
5173 (((u32) cmd->cmnd[6]) << 24) |
5174 (((u32) cmd->cmnd[7]) << 16) |
5175 (((u32) cmd->cmnd[8]) << 8) |
5176 cmd->cmnd[9];
5177 break;
5178 case WRITE_16:
5179 is_write = 1;
5180 fallthrough;
5181 case READ_16:
5182 first_block =
5183 (((u64) cmd->cmnd[2]) << 56) |
5184 (((u64) cmd->cmnd[3]) << 48) |
5185 (((u64) cmd->cmnd[4]) << 40) |
5186 (((u64) cmd->cmnd[5]) << 32) |
5187 (((u64) cmd->cmnd[6]) << 24) |
5188 (((u64) cmd->cmnd[7]) << 16) |
5189 (((u64) cmd->cmnd[8]) << 8) |
5190 cmd->cmnd[9];
5191 block_cnt =
5192 (((u32) cmd->cmnd[10]) << 24) |
5193 (((u32) cmd->cmnd[11]) << 16) |
5194 (((u32) cmd->cmnd[12]) << 8) |
5195 cmd->cmnd[13];
5196 break;
5197 default:
5198 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5199 }
5200 last_block = first_block + block_cnt - 1;
5201
5202 /* check for write to non-RAID-0 */
5203 if (is_write && dev->raid_level != 0)
5204 return IO_ACCEL_INELIGIBLE;
5205
5206 /* check for invalid block or wraparound */
5207 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5208 last_block < first_block)
5209 return IO_ACCEL_INELIGIBLE;
5210
5211 /* calculate stripe information for the request */
5212 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5213 le16_to_cpu(map->strip_size);
5214 strip_size = le16_to_cpu(map->strip_size);
5215 #if BITS_PER_LONG == 32
5216 tmpdiv = first_block;
5217 (void) do_div(tmpdiv, blocks_per_row);
5218 first_row = tmpdiv;
5219 tmpdiv = last_block;
5220 (void) do_div(tmpdiv, blocks_per_row);
5221 last_row = tmpdiv;
5222 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5223 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5224 tmpdiv = first_row_offset;
5225 (void) do_div(tmpdiv, strip_size);
5226 first_column = tmpdiv;
5227 tmpdiv = last_row_offset;
5228 (void) do_div(tmpdiv, strip_size);
5229 last_column = tmpdiv;
5230 #else
5231 first_row = first_block / blocks_per_row;
5232 last_row = last_block / blocks_per_row;
5233 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5234 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5235 first_column = first_row_offset / strip_size;
5236 last_column = last_row_offset / strip_size;
5237 #endif
5238
5239 /* if this isn't a single row/column then give to the controller */
5240 if ((first_row != last_row) || (first_column != last_column))
5241 return IO_ACCEL_INELIGIBLE;
5242
5243 /* proceeding with driver mapping */
5244 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5245 le16_to_cpu(map->metadata_disks_per_row);
5246 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5247 le16_to_cpu(map->row_cnt);
5248 map_index = (map_row * total_disks_per_row) + first_column;
5249
5250 switch (dev->raid_level) {
5251 case HPSA_RAID_0:
5252 break; /* nothing special to do */
5253 case HPSA_RAID_1:
5254 /* Handles load balance across RAID 1 members.
5255 * (2-drive R1 and R10 with even # of drives.)
5256 * Appropriate for SSDs, not optimal for HDDs
5257 * Ensure we have the correct raid_map.
5258 */
5259 if (le16_to_cpu(map->layout_map_count) != 2) {
5260 hpsa_turn_off_ioaccel_for_device(dev);
5261 return IO_ACCEL_INELIGIBLE;
5262 }
5263 if (dev->offload_to_mirror)
5264 map_index += le16_to_cpu(map->data_disks_per_row);
5265 dev->offload_to_mirror = !dev->offload_to_mirror;
5266 break;
5267 case HPSA_RAID_ADM:
5268 /* Handles N-way mirrors (R1-ADM)
5269 * and R10 with # of drives divisible by 3.)
5270 * Ensure we have the correct raid_map.
5271 */
5272 if (le16_to_cpu(map->layout_map_count) != 3) {
5273 hpsa_turn_off_ioaccel_for_device(dev);
5274 return IO_ACCEL_INELIGIBLE;
5275 }
5276
5277 offload_to_mirror = dev->offload_to_mirror;
5278 raid_map_helper(map, offload_to_mirror,
5279 &map_index, ¤t_group);
5280 /* set mirror group to use next time */
5281 offload_to_mirror =
5282 (offload_to_mirror >=
5283 le16_to_cpu(map->layout_map_count) - 1)
5284 ? 0 : offload_to_mirror + 1;
5285 dev->offload_to_mirror = offload_to_mirror;
5286 /* Avoid direct use of dev->offload_to_mirror within this
5287 * function since multiple threads might simultaneously
5288 * increment it beyond the range of dev->layout_map_count -1.
5289 */
5290 break;
5291 case HPSA_RAID_5:
5292 case HPSA_RAID_6:
5293 if (le16_to_cpu(map->layout_map_count) <= 1)
5294 break;
5295
5296 /* Verify first and last block are in same RAID group */
5297 r5or6_blocks_per_row =
5298 le16_to_cpu(map->strip_size) *
5299 le16_to_cpu(map->data_disks_per_row);
5300 if (r5or6_blocks_per_row == 0) {
5301 hpsa_turn_off_ioaccel_for_device(dev);
5302 return IO_ACCEL_INELIGIBLE;
5303 }
5304 stripesize = r5or6_blocks_per_row *
5305 le16_to_cpu(map->layout_map_count);
5306 #if BITS_PER_LONG == 32
5307 tmpdiv = first_block;
5308 first_group = do_div(tmpdiv, stripesize);
5309 tmpdiv = first_group;
5310 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5311 first_group = tmpdiv;
5312 tmpdiv = last_block;
5313 last_group = do_div(tmpdiv, stripesize);
5314 tmpdiv = last_group;
5315 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5316 last_group = tmpdiv;
5317 #else
5318 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5319 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5320 #endif
5321 if (first_group != last_group)
5322 return IO_ACCEL_INELIGIBLE;
5323
5324 /* Verify request is in a single row of RAID 5/6 */
5325 #if BITS_PER_LONG == 32
5326 tmpdiv = first_block;
5327 (void) do_div(tmpdiv, stripesize);
5328 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5329 tmpdiv = last_block;
5330 (void) do_div(tmpdiv, stripesize);
5331 r5or6_last_row = r0_last_row = tmpdiv;
5332 #else
5333 first_row = r5or6_first_row = r0_first_row =
5334 first_block / stripesize;
5335 r5or6_last_row = r0_last_row = last_block / stripesize;
5336 #endif
5337 if (r5or6_first_row != r5or6_last_row)
5338 return IO_ACCEL_INELIGIBLE;
5339
5340
5341 /* Verify request is in a single column */
5342 #if BITS_PER_LONG == 32
5343 tmpdiv = first_block;
5344 first_row_offset = do_div(tmpdiv, stripesize);
5345 tmpdiv = first_row_offset;
5346 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5347 r5or6_first_row_offset = first_row_offset;
5348 tmpdiv = last_block;
5349 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5350 tmpdiv = r5or6_last_row_offset;
5351 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5352 tmpdiv = r5or6_first_row_offset;
5353 (void) do_div(tmpdiv, map->strip_size);
5354 first_column = r5or6_first_column = tmpdiv;
5355 tmpdiv = r5or6_last_row_offset;
5356 (void) do_div(tmpdiv, map->strip_size);
5357 r5or6_last_column = tmpdiv;
5358 #else
5359 first_row_offset = r5or6_first_row_offset =
5360 (u32)((first_block % stripesize) %
5361 r5or6_blocks_per_row);
5362
5363 r5or6_last_row_offset =
5364 (u32)((last_block % stripesize) %
5365 r5or6_blocks_per_row);
5366
5367 first_column = r5or6_first_column =
5368 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5369 r5or6_last_column =
5370 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5371 #endif
5372 if (r5or6_first_column != r5or6_last_column)
5373 return IO_ACCEL_INELIGIBLE;
5374
5375 /* Request is eligible */
5376 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5377 le16_to_cpu(map->row_cnt);
5378
5379 map_index = (first_group *
5380 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5381 (map_row * total_disks_per_row) + first_column;
5382 break;
5383 default:
5384 return IO_ACCEL_INELIGIBLE;
5385 }
5386
5387 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5388 return IO_ACCEL_INELIGIBLE;
5389
5390 c->phys_disk = dev->phys_disk[map_index];
5391 if (!c->phys_disk)
5392 return IO_ACCEL_INELIGIBLE;
5393
5394 disk_handle = dd[map_index].ioaccel_handle;
5395 disk_block = le64_to_cpu(map->disk_starting_blk) +
5396 first_row * le16_to_cpu(map->strip_size) +
5397 (first_row_offset - first_column *
5398 le16_to_cpu(map->strip_size));
5399 disk_block_cnt = block_cnt;
5400
5401 /* handle differing logical/physical block sizes */
5402 if (map->phys_blk_shift) {
5403 disk_block <<= map->phys_blk_shift;
5404 disk_block_cnt <<= map->phys_blk_shift;
5405 }
5406 BUG_ON(disk_block_cnt > 0xffff);
5407
5408 /* build the new CDB for the physical disk I/O */
5409 if (disk_block > 0xffffffff) {
5410 cdb[0] = is_write ? WRITE_16 : READ_16;
5411 cdb[1] = 0;
5412 cdb[2] = (u8) (disk_block >> 56);
5413 cdb[3] = (u8) (disk_block >> 48);
5414 cdb[4] = (u8) (disk_block >> 40);
5415 cdb[5] = (u8) (disk_block >> 32);
5416 cdb[6] = (u8) (disk_block >> 24);
5417 cdb[7] = (u8) (disk_block >> 16);
5418 cdb[8] = (u8) (disk_block >> 8);
5419 cdb[9] = (u8) (disk_block);
5420 cdb[10] = (u8) (disk_block_cnt >> 24);
5421 cdb[11] = (u8) (disk_block_cnt >> 16);
5422 cdb[12] = (u8) (disk_block_cnt >> 8);
5423 cdb[13] = (u8) (disk_block_cnt);
5424 cdb[14] = 0;
5425 cdb[15] = 0;
5426 cdb_len = 16;
5427 } else {
5428 cdb[0] = is_write ? WRITE_10 : READ_10;
5429 cdb[1] = 0;
5430 cdb[2] = (u8) (disk_block >> 24);
5431 cdb[3] = (u8) (disk_block >> 16);
5432 cdb[4] = (u8) (disk_block >> 8);
5433 cdb[5] = (u8) (disk_block);
5434 cdb[6] = 0;
5435 cdb[7] = (u8) (disk_block_cnt >> 8);
5436 cdb[8] = (u8) (disk_block_cnt);
5437 cdb[9] = 0;
5438 cdb_len = 10;
5439 }
5440 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5441 dev->scsi3addr,
5442 dev->phys_disk[map_index]);
5443 }
5444
5445 /*
5446 * Submit commands down the "normal" RAID stack path
5447 * All callers to hpsa_ciss_submit must check lockup_detected
5448 * beforehand, before (opt.) and after calling cmd_alloc
5449 */
hpsa_ciss_submit(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd,struct hpsa_scsi_dev_t * dev)5450 static int hpsa_ciss_submit(struct ctlr_info *h,
5451 struct CommandList *c, struct scsi_cmnd *cmd,
5452 struct hpsa_scsi_dev_t *dev)
5453 {
5454 cmd->host_scribble = (unsigned char *) c;
5455 c->cmd_type = CMD_SCSI;
5456 c->scsi_cmd = cmd;
5457 c->Header.ReplyQueue = 0; /* unused in simple mode */
5458 memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5459 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5460
5461 /* Fill in the request block... */
5462
5463 c->Request.Timeout = 0;
5464 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5465 c->Request.CDBLen = cmd->cmd_len;
5466 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5467 switch (cmd->sc_data_direction) {
5468 case DMA_TO_DEVICE:
5469 c->Request.type_attr_dir =
5470 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5471 break;
5472 case DMA_FROM_DEVICE:
5473 c->Request.type_attr_dir =
5474 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5475 break;
5476 case DMA_NONE:
5477 c->Request.type_attr_dir =
5478 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5479 break;
5480 case DMA_BIDIRECTIONAL:
5481 /* This can happen if a buggy application does a scsi passthru
5482 * and sets both inlen and outlen to non-zero. ( see
5483 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5484 */
5485
5486 c->Request.type_attr_dir =
5487 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5488 /* This is technically wrong, and hpsa controllers should
5489 * reject it with CMD_INVALID, which is the most correct
5490 * response, but non-fibre backends appear to let it
5491 * slide by, and give the same results as if this field
5492 * were set correctly. Either way is acceptable for
5493 * our purposes here.
5494 */
5495
5496 break;
5497
5498 default:
5499 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5500 cmd->sc_data_direction);
5501 BUG();
5502 break;
5503 }
5504
5505 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5506 hpsa_cmd_resolve_and_free(h, c);
5507 return SCSI_MLQUEUE_HOST_BUSY;
5508 }
5509
5510 if (dev->in_reset) {
5511 hpsa_cmd_resolve_and_free(h, c);
5512 return SCSI_MLQUEUE_HOST_BUSY;
5513 }
5514
5515 c->device = dev;
5516
5517 enqueue_cmd_and_start_io(h, c);
5518 /* the cmd'll come back via intr handler in complete_scsi_command() */
5519 return 0;
5520 }
5521
hpsa_cmd_init(struct ctlr_info * h,int index,struct CommandList * c)5522 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5523 struct CommandList *c)
5524 {
5525 dma_addr_t cmd_dma_handle, err_dma_handle;
5526
5527 /* Zero out all of commandlist except the last field, refcount */
5528 memset(c, 0, offsetof(struct CommandList, refcount));
5529 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5530 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5531 c->err_info = h->errinfo_pool + index;
5532 memset(c->err_info, 0, sizeof(*c->err_info));
5533 err_dma_handle = h->errinfo_pool_dhandle
5534 + index * sizeof(*c->err_info);
5535 c->cmdindex = index;
5536 c->busaddr = (u32) cmd_dma_handle;
5537 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5538 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5539 c->h = h;
5540 c->scsi_cmd = SCSI_CMD_IDLE;
5541 }
5542
hpsa_preinitialize_commands(struct ctlr_info * h)5543 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5544 {
5545 int i;
5546
5547 for (i = 0; i < h->nr_cmds; i++) {
5548 struct CommandList *c = h->cmd_pool + i;
5549
5550 hpsa_cmd_init(h, i, c);
5551 atomic_set(&c->refcount, 0);
5552 }
5553 }
5554
hpsa_cmd_partial_init(struct ctlr_info * h,int index,struct CommandList * c)5555 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5556 struct CommandList *c)
5557 {
5558 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5559
5560 BUG_ON(c->cmdindex != index);
5561
5562 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5563 memset(c->err_info, 0, sizeof(*c->err_info));
5564 c->busaddr = (u32) cmd_dma_handle;
5565 }
5566
hpsa_ioaccel_submit(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd,bool retry)5567 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5568 struct CommandList *c, struct scsi_cmnd *cmd,
5569 bool retry)
5570 {
5571 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5572 int rc = IO_ACCEL_INELIGIBLE;
5573
5574 if (!dev)
5575 return SCSI_MLQUEUE_HOST_BUSY;
5576
5577 if (dev->in_reset)
5578 return SCSI_MLQUEUE_HOST_BUSY;
5579
5580 if (hpsa_simple_mode)
5581 return IO_ACCEL_INELIGIBLE;
5582
5583 cmd->host_scribble = (unsigned char *) c;
5584
5585 if (dev->offload_enabled) {
5586 hpsa_cmd_init(h, c->cmdindex, c); /* Zeroes out all fields */
5587 c->cmd_type = CMD_SCSI;
5588 c->scsi_cmd = cmd;
5589 c->device = dev;
5590 if (retry) /* Resubmit but do not increment device->commands_outstanding. */
5591 c->retry_pending = true;
5592 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5593 if (rc < 0) /* scsi_dma_map failed. */
5594 rc = SCSI_MLQUEUE_HOST_BUSY;
5595 } else if (dev->hba_ioaccel_enabled) {
5596 hpsa_cmd_init(h, c->cmdindex, c); /* Zeroes out all fields */
5597 c->cmd_type = CMD_SCSI;
5598 c->scsi_cmd = cmd;
5599 c->device = dev;
5600 if (retry) /* Resubmit but do not increment device->commands_outstanding. */
5601 c->retry_pending = true;
5602 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5603 if (rc < 0) /* scsi_dma_map failed. */
5604 rc = SCSI_MLQUEUE_HOST_BUSY;
5605 }
5606 return rc;
5607 }
5608
hpsa_command_resubmit_worker(struct work_struct * work)5609 static void hpsa_command_resubmit_worker(struct work_struct *work)
5610 {
5611 struct scsi_cmnd *cmd;
5612 struct hpsa_scsi_dev_t *dev;
5613 struct CommandList *c = container_of(work, struct CommandList, work);
5614
5615 cmd = c->scsi_cmd;
5616 dev = cmd->device->hostdata;
5617 if (!dev) {
5618 cmd->result = DID_NO_CONNECT << 16;
5619 return hpsa_cmd_free_and_done(c->h, c, cmd);
5620 }
5621
5622 if (dev->in_reset) {
5623 cmd->result = DID_RESET << 16;
5624 return hpsa_cmd_free_and_done(c->h, c, cmd);
5625 }
5626
5627 if (c->cmd_type == CMD_IOACCEL2) {
5628 struct ctlr_info *h = c->h;
5629 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5630 int rc;
5631
5632 if (c2->error_data.serv_response ==
5633 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5634 /* Resubmit with the retry_pending flag set. */
5635 rc = hpsa_ioaccel_submit(h, c, cmd, true);
5636 if (rc == 0)
5637 return;
5638 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5639 /*
5640 * If we get here, it means dma mapping failed.
5641 * Try again via scsi mid layer, which will
5642 * then get SCSI_MLQUEUE_HOST_BUSY.
5643 */
5644 cmd->result = DID_IMM_RETRY << 16;
5645 return hpsa_cmd_free_and_done(h, c, cmd);
5646 }
5647 /* else, fall thru and resubmit down CISS path */
5648 }
5649 }
5650 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5651 /*
5652 * Here we have not come in though queue_command, so we
5653 * can set the retry_pending flag to true for a driver initiated
5654 * retry attempt (I.E. not a SML retry).
5655 * I.E. We are submitting a driver initiated retry.
5656 * Note: hpsa_ciss_submit does not zero out the command fields like
5657 * ioaccel submit does.
5658 */
5659 c->retry_pending = true;
5660 if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5661 /*
5662 * If we get here, it means dma mapping failed. Try
5663 * again via scsi mid layer, which will then get
5664 * SCSI_MLQUEUE_HOST_BUSY.
5665 *
5666 * hpsa_ciss_submit will have already freed c
5667 * if it encountered a dma mapping failure.
5668 */
5669 cmd->result = DID_IMM_RETRY << 16;
5670 scsi_done(cmd);
5671 }
5672 }
5673
5674 /* Running in struct Scsi_Host->host_lock less mode */
hpsa_scsi_queue_command(struct Scsi_Host * sh,struct scsi_cmnd * cmd)5675 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5676 {
5677 struct ctlr_info *h;
5678 struct hpsa_scsi_dev_t *dev;
5679 struct CommandList *c;
5680 int rc = 0;
5681
5682 /* Get the ptr to our adapter structure out of cmd->host. */
5683 h = sdev_to_hba(cmd->device);
5684
5685 BUG_ON(scsi_cmd_to_rq(cmd)->tag < 0);
5686
5687 dev = cmd->device->hostdata;
5688 if (!dev) {
5689 cmd->result = DID_NO_CONNECT << 16;
5690 scsi_done(cmd);
5691 return 0;
5692 }
5693
5694 if (dev->removed) {
5695 cmd->result = DID_NO_CONNECT << 16;
5696 scsi_done(cmd);
5697 return 0;
5698 }
5699
5700 if (unlikely(lockup_detected(h))) {
5701 cmd->result = DID_NO_CONNECT << 16;
5702 scsi_done(cmd);
5703 return 0;
5704 }
5705
5706 if (dev->in_reset)
5707 return SCSI_MLQUEUE_DEVICE_BUSY;
5708
5709 c = cmd_tagged_alloc(h, cmd);
5710 if (c == NULL)
5711 return SCSI_MLQUEUE_DEVICE_BUSY;
5712
5713 /*
5714 * This is necessary because the SML doesn't zero out this field during
5715 * error recovery.
5716 */
5717 cmd->result = 0;
5718
5719 /*
5720 * Call alternate submit routine for I/O accelerated commands.
5721 * Retries always go down the normal I/O path.
5722 * Note: If cmd->retries is non-zero, then this is a SML
5723 * initiated retry and not a driver initiated retry.
5724 * This command has been obtained from cmd_tagged_alloc
5725 * and is therefore a brand-new command.
5726 */
5727 if (likely(cmd->retries == 0 &&
5728 !blk_rq_is_passthrough(scsi_cmd_to_rq(cmd)) &&
5729 h->acciopath_status)) {
5730 /* Submit with the retry_pending flag unset. */
5731 rc = hpsa_ioaccel_submit(h, c, cmd, false);
5732 if (rc == 0)
5733 return 0;
5734 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5735 hpsa_cmd_resolve_and_free(h, c);
5736 return SCSI_MLQUEUE_HOST_BUSY;
5737 }
5738 }
5739 return hpsa_ciss_submit(h, c, cmd, dev);
5740 }
5741
hpsa_scan_complete(struct ctlr_info * h)5742 static void hpsa_scan_complete(struct ctlr_info *h)
5743 {
5744 unsigned long flags;
5745
5746 spin_lock_irqsave(&h->scan_lock, flags);
5747 h->scan_finished = 1;
5748 wake_up(&h->scan_wait_queue);
5749 spin_unlock_irqrestore(&h->scan_lock, flags);
5750 }
5751
hpsa_scan_start(struct Scsi_Host * sh)5752 static void hpsa_scan_start(struct Scsi_Host *sh)
5753 {
5754 struct ctlr_info *h = shost_to_hba(sh);
5755 unsigned long flags;
5756
5757 /*
5758 * Don't let rescans be initiated on a controller known to be locked
5759 * up. If the controller locks up *during* a rescan, that thread is
5760 * probably hosed, but at least we can prevent new rescan threads from
5761 * piling up on a locked up controller.
5762 */
5763 if (unlikely(lockup_detected(h)))
5764 return hpsa_scan_complete(h);
5765
5766 /*
5767 * If a scan is already waiting to run, no need to add another
5768 */
5769 spin_lock_irqsave(&h->scan_lock, flags);
5770 if (h->scan_waiting) {
5771 spin_unlock_irqrestore(&h->scan_lock, flags);
5772 return;
5773 }
5774
5775 spin_unlock_irqrestore(&h->scan_lock, flags);
5776
5777 /* wait until any scan already in progress is finished. */
5778 while (1) {
5779 spin_lock_irqsave(&h->scan_lock, flags);
5780 if (h->scan_finished)
5781 break;
5782 h->scan_waiting = 1;
5783 spin_unlock_irqrestore(&h->scan_lock, flags);
5784 wait_event(h->scan_wait_queue, h->scan_finished);
5785 /* Note: We don't need to worry about a race between this
5786 * thread and driver unload because the midlayer will
5787 * have incremented the reference count, so unload won't
5788 * happen if we're in here.
5789 */
5790 }
5791 h->scan_finished = 0; /* mark scan as in progress */
5792 h->scan_waiting = 0;
5793 spin_unlock_irqrestore(&h->scan_lock, flags);
5794
5795 if (unlikely(lockup_detected(h)))
5796 return hpsa_scan_complete(h);
5797
5798 /*
5799 * Do the scan after a reset completion
5800 */
5801 spin_lock_irqsave(&h->reset_lock, flags);
5802 if (h->reset_in_progress) {
5803 h->drv_req_rescan = 1;
5804 spin_unlock_irqrestore(&h->reset_lock, flags);
5805 hpsa_scan_complete(h);
5806 return;
5807 }
5808 spin_unlock_irqrestore(&h->reset_lock, flags);
5809
5810 hpsa_update_scsi_devices(h);
5811
5812 hpsa_scan_complete(h);
5813 }
5814
hpsa_change_queue_depth(struct scsi_device * sdev,int qdepth)5815 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5816 {
5817 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5818
5819 if (!logical_drive)
5820 return -ENODEV;
5821
5822 if (qdepth < 1)
5823 qdepth = 1;
5824 else if (qdepth > logical_drive->queue_depth)
5825 qdepth = logical_drive->queue_depth;
5826
5827 return scsi_change_queue_depth(sdev, qdepth);
5828 }
5829
hpsa_scan_finished(struct Scsi_Host * sh,unsigned long elapsed_time)5830 static int hpsa_scan_finished(struct Scsi_Host *sh,
5831 unsigned long elapsed_time)
5832 {
5833 struct ctlr_info *h = shost_to_hba(sh);
5834 unsigned long flags;
5835 int finished;
5836
5837 spin_lock_irqsave(&h->scan_lock, flags);
5838 finished = h->scan_finished;
5839 spin_unlock_irqrestore(&h->scan_lock, flags);
5840 return finished;
5841 }
5842
hpsa_scsi_host_alloc(struct ctlr_info * h)5843 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5844 {
5845 struct Scsi_Host *sh;
5846
5847 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(struct ctlr_info *));
5848 if (sh == NULL) {
5849 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5850 return -ENOMEM;
5851 }
5852
5853 sh->io_port = 0;
5854 sh->n_io_port = 0;
5855 sh->this_id = -1;
5856 sh->max_channel = 3;
5857 sh->max_cmd_len = MAX_COMMAND_SIZE;
5858 sh->max_lun = HPSA_MAX_LUN;
5859 sh->max_id = HPSA_MAX_LUN;
5860 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5861 sh->cmd_per_lun = sh->can_queue;
5862 sh->sg_tablesize = h->maxsgentries;
5863 sh->transportt = hpsa_sas_transport_template;
5864 sh->hostdata[0] = (unsigned long) h;
5865 sh->irq = pci_irq_vector(h->pdev, 0);
5866 sh->unique_id = sh->irq;
5867
5868 h->scsi_host = sh;
5869 return 0;
5870 }
5871
hpsa_scsi_add_host(struct ctlr_info * h)5872 static int hpsa_scsi_add_host(struct ctlr_info *h)
5873 {
5874 int rv;
5875
5876 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5877 if (rv) {
5878 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5879 return rv;
5880 }
5881 scsi_scan_host(h->scsi_host);
5882 return 0;
5883 }
5884
5885 /*
5886 * The block layer has already gone to the trouble of picking out a unique,
5887 * small-integer tag for this request. We use an offset from that value as
5888 * an index to select our command block. (The offset allows us to reserve the
5889 * low-numbered entries for our own uses.)
5890 */
hpsa_get_cmd_index(struct scsi_cmnd * scmd)5891 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5892 {
5893 int idx = scsi_cmd_to_rq(scmd)->tag;
5894
5895 if (idx < 0)
5896 return idx;
5897
5898 /* Offset to leave space for internal cmds. */
5899 return idx += HPSA_NRESERVED_CMDS;
5900 }
5901
5902 /*
5903 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5904 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5905 */
hpsa_send_test_unit_ready(struct ctlr_info * h,struct CommandList * c,unsigned char lunaddr[],int reply_queue)5906 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5907 struct CommandList *c, unsigned char lunaddr[],
5908 int reply_queue)
5909 {
5910 int rc;
5911
5912 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5913 (void) fill_cmd(c, TEST_UNIT_READY, h,
5914 NULL, 0, 0, lunaddr, TYPE_CMD);
5915 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5916 if (rc)
5917 return rc;
5918 /* no unmap needed here because no data xfer. */
5919
5920 /* Check if the unit is already ready. */
5921 if (c->err_info->CommandStatus == CMD_SUCCESS)
5922 return 0;
5923
5924 /*
5925 * The first command sent after reset will receive "unit attention" to
5926 * indicate that the LUN has been reset...this is actually what we're
5927 * looking for (but, success is good too).
5928 */
5929 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5930 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5931 (c->err_info->SenseInfo[2] == NO_SENSE ||
5932 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5933 return 0;
5934
5935 return 1;
5936 }
5937
5938 /*
5939 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5940 * returns zero when the unit is ready, and non-zero when giving up.
5941 */
hpsa_wait_for_test_unit_ready(struct ctlr_info * h,struct CommandList * c,unsigned char lunaddr[],int reply_queue)5942 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5943 struct CommandList *c,
5944 unsigned char lunaddr[], int reply_queue)
5945 {
5946 int rc;
5947 int count = 0;
5948 int waittime = 1; /* seconds */
5949
5950 /* Send test unit ready until device ready, or give up. */
5951 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5952
5953 /*
5954 * Wait for a bit. do this first, because if we send
5955 * the TUR right away, the reset will just abort it.
5956 */
5957 msleep(1000 * waittime);
5958
5959 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5960 if (!rc)
5961 break;
5962
5963 /* Increase wait time with each try, up to a point. */
5964 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5965 waittime *= 2;
5966
5967 dev_warn(&h->pdev->dev,
5968 "waiting %d secs for device to become ready.\n",
5969 waittime);
5970 }
5971
5972 return rc;
5973 }
5974
wait_for_device_to_become_ready(struct ctlr_info * h,unsigned char lunaddr[],int reply_queue)5975 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5976 unsigned char lunaddr[],
5977 int reply_queue)
5978 {
5979 int first_queue;
5980 int last_queue;
5981 int rq;
5982 int rc = 0;
5983 struct CommandList *c;
5984
5985 c = cmd_alloc(h);
5986
5987 /*
5988 * If no specific reply queue was requested, then send the TUR
5989 * repeatedly, requesting a reply on each reply queue; otherwise execute
5990 * the loop exactly once using only the specified queue.
5991 */
5992 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5993 first_queue = 0;
5994 last_queue = h->nreply_queues - 1;
5995 } else {
5996 first_queue = reply_queue;
5997 last_queue = reply_queue;
5998 }
5999
6000 for (rq = first_queue; rq <= last_queue; rq++) {
6001 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
6002 if (rc)
6003 break;
6004 }
6005
6006 if (rc)
6007 dev_warn(&h->pdev->dev, "giving up on device.\n");
6008 else
6009 dev_warn(&h->pdev->dev, "device is ready.\n");
6010
6011 cmd_free(h, c);
6012 return rc;
6013 }
6014
6015 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
6016 * complaining. Doing a host- or bus-reset can't do anything good here.
6017 */
hpsa_eh_device_reset_handler(struct scsi_cmnd * scsicmd)6018 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
6019 {
6020 int rc = SUCCESS;
6021 int i;
6022 struct ctlr_info *h;
6023 struct hpsa_scsi_dev_t *dev = NULL;
6024 u8 reset_type;
6025 char msg[48];
6026 unsigned long flags;
6027
6028 /* find the controller to which the command to be aborted was sent */
6029 h = sdev_to_hba(scsicmd->device);
6030 if (h == NULL) /* paranoia */
6031 return FAILED;
6032
6033 spin_lock_irqsave(&h->reset_lock, flags);
6034 h->reset_in_progress = 1;
6035 spin_unlock_irqrestore(&h->reset_lock, flags);
6036
6037 if (lockup_detected(h)) {
6038 rc = FAILED;
6039 goto return_reset_status;
6040 }
6041
6042 dev = scsicmd->device->hostdata;
6043 if (!dev) {
6044 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
6045 rc = FAILED;
6046 goto return_reset_status;
6047 }
6048
6049 if (dev->devtype == TYPE_ENCLOSURE) {
6050 rc = SUCCESS;
6051 goto return_reset_status;
6052 }
6053
6054 /* if controller locked up, we can guarantee command won't complete */
6055 if (lockup_detected(h)) {
6056 snprintf(msg, sizeof(msg),
6057 "cmd %d RESET FAILED, lockup detected",
6058 hpsa_get_cmd_index(scsicmd));
6059 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6060 rc = FAILED;
6061 goto return_reset_status;
6062 }
6063
6064 /* this reset request might be the result of a lockup; check */
6065 if (detect_controller_lockup(h)) {
6066 snprintf(msg, sizeof(msg),
6067 "cmd %d RESET FAILED, new lockup detected",
6068 hpsa_get_cmd_index(scsicmd));
6069 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6070 rc = FAILED;
6071 goto return_reset_status;
6072 }
6073
6074 /* Do not attempt on controller */
6075 if (is_hba_lunid(dev->scsi3addr)) {
6076 rc = SUCCESS;
6077 goto return_reset_status;
6078 }
6079
6080 if (is_logical_dev_addr_mode(dev->scsi3addr))
6081 reset_type = HPSA_DEVICE_RESET_MSG;
6082 else
6083 reset_type = HPSA_PHYS_TARGET_RESET;
6084
6085 sprintf(msg, "resetting %s",
6086 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
6087 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6088
6089 /*
6090 * wait to see if any commands will complete before sending reset
6091 */
6092 dev->in_reset = true; /* block any new cmds from OS for this device */
6093 for (i = 0; i < 10; i++) {
6094 if (atomic_read(&dev->commands_outstanding) > 0)
6095 msleep(1000);
6096 else
6097 break;
6098 }
6099
6100 /* send a reset to the SCSI LUN which the command was sent to */
6101 rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6102 if (rc == 0)
6103 rc = SUCCESS;
6104 else
6105 rc = FAILED;
6106
6107 sprintf(msg, "reset %s %s",
6108 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6109 rc == SUCCESS ? "completed successfully" : "failed");
6110 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6111
6112 return_reset_status:
6113 spin_lock_irqsave(&h->reset_lock, flags);
6114 h->reset_in_progress = 0;
6115 if (dev)
6116 dev->in_reset = false;
6117 spin_unlock_irqrestore(&h->reset_lock, flags);
6118 return rc;
6119 }
6120
6121 /*
6122 * For operations with an associated SCSI command, a command block is allocated
6123 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6124 * block request tag as an index into a table of entries. cmd_tagged_free() is
6125 * the complement, although cmd_free() may be called instead.
6126 * This function is only called for new requests from queue_command.
6127 */
cmd_tagged_alloc(struct ctlr_info * h,struct scsi_cmnd * scmd)6128 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6129 struct scsi_cmnd *scmd)
6130 {
6131 int idx = hpsa_get_cmd_index(scmd);
6132 struct CommandList *c = h->cmd_pool + idx;
6133
6134 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6135 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6136 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6137 /* The index value comes from the block layer, so if it's out of
6138 * bounds, it's probably not our bug.
6139 */
6140 BUG();
6141 }
6142
6143 if (unlikely(!hpsa_is_cmd_idle(c))) {
6144 /*
6145 * We expect that the SCSI layer will hand us a unique tag
6146 * value. Thus, there should never be a collision here between
6147 * two requests...because if the selected command isn't idle
6148 * then someone is going to be very disappointed.
6149 */
6150 if (idx != h->last_collision_tag) { /* Print once per tag */
6151 dev_warn(&h->pdev->dev,
6152 "%s: tag collision (tag=%d)\n", __func__, idx);
6153 if (scmd)
6154 scsi_print_command(scmd);
6155 h->last_collision_tag = idx;
6156 }
6157 return NULL;
6158 }
6159
6160 atomic_inc(&c->refcount);
6161 hpsa_cmd_partial_init(h, idx, c);
6162
6163 /*
6164 * This is a new command obtained from queue_command so
6165 * there have not been any driver initiated retry attempts.
6166 */
6167 c->retry_pending = false;
6168
6169 return c;
6170 }
6171
cmd_tagged_free(struct ctlr_info * h,struct CommandList * c)6172 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6173 {
6174 /*
6175 * Release our reference to the block. We don't need to do anything
6176 * else to free it, because it is accessed by index.
6177 */
6178 (void)atomic_dec(&c->refcount);
6179 }
6180
6181 /*
6182 * For operations that cannot sleep, a command block is allocated at init,
6183 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6184 * which ones are free or in use. Lock must be held when calling this.
6185 * cmd_free() is the complement.
6186 * This function never gives up and returns NULL. If it hangs,
6187 * another thread must call cmd_free() to free some tags.
6188 */
6189
cmd_alloc(struct ctlr_info * h)6190 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6191 {
6192 struct CommandList *c;
6193 int refcount, i;
6194 int offset = 0;
6195
6196 /*
6197 * There is some *extremely* small but non-zero chance that that
6198 * multiple threads could get in here, and one thread could
6199 * be scanning through the list of bits looking for a free
6200 * one, but the free ones are always behind him, and other
6201 * threads sneak in behind him and eat them before he can
6202 * get to them, so that while there is always a free one, a
6203 * very unlucky thread might be starved anyway, never able to
6204 * beat the other threads. In reality, this happens so
6205 * infrequently as to be indistinguishable from never.
6206 *
6207 * Note that we start allocating commands before the SCSI host structure
6208 * is initialized. Since the search starts at bit zero, this
6209 * all works, since we have at least one command structure available;
6210 * however, it means that the structures with the low indexes have to be
6211 * reserved for driver-initiated requests, while requests from the block
6212 * layer will use the higher indexes.
6213 */
6214
6215 for (;;) {
6216 i = find_next_zero_bit(h->cmd_pool_bits,
6217 HPSA_NRESERVED_CMDS,
6218 offset);
6219 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6220 offset = 0;
6221 continue;
6222 }
6223 c = h->cmd_pool + i;
6224 refcount = atomic_inc_return(&c->refcount);
6225 if (unlikely(refcount > 1)) {
6226 cmd_free(h, c); /* already in use */
6227 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6228 continue;
6229 }
6230 set_bit(i, h->cmd_pool_bits);
6231 break; /* it's ours now. */
6232 }
6233 hpsa_cmd_partial_init(h, i, c);
6234 c->device = NULL;
6235
6236 /*
6237 * cmd_alloc is for "internal" commands and they are never
6238 * retried.
6239 */
6240 c->retry_pending = false;
6241
6242 return c;
6243 }
6244
6245 /*
6246 * This is the complementary operation to cmd_alloc(). Note, however, in some
6247 * corner cases it may also be used to free blocks allocated by
6248 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6249 * the clear-bit is harmless.
6250 */
cmd_free(struct ctlr_info * h,struct CommandList * c)6251 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6252 {
6253 if (atomic_dec_and_test(&c->refcount)) {
6254 int i;
6255
6256 i = c - h->cmd_pool;
6257 clear_bit(i, h->cmd_pool_bits);
6258 }
6259 }
6260
6261 #ifdef CONFIG_COMPAT
6262
hpsa_ioctl32_passthru(struct scsi_device * dev,unsigned int cmd,void __user * arg)6263 static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
6264 void __user *arg)
6265 {
6266 struct ctlr_info *h = sdev_to_hba(dev);
6267 IOCTL32_Command_struct __user *arg32 = arg;
6268 IOCTL_Command_struct arg64;
6269 int err;
6270 u32 cp;
6271
6272 if (!arg)
6273 return -EINVAL;
6274
6275 memset(&arg64, 0, sizeof(arg64));
6276 if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf)))
6277 return -EFAULT;
6278 if (get_user(cp, &arg32->buf))
6279 return -EFAULT;
6280 arg64.buf = compat_ptr(cp);
6281
6282 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6283 return -EAGAIN;
6284 err = hpsa_passthru_ioctl(h, &arg64);
6285 atomic_inc(&h->passthru_cmds_avail);
6286 if (err)
6287 return err;
6288 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6289 sizeof(arg32->error_info)))
6290 return -EFAULT;
6291 return 0;
6292 }
6293
hpsa_ioctl32_big_passthru(struct scsi_device * dev,unsigned int cmd,void __user * arg)6294 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6295 unsigned int cmd, void __user *arg)
6296 {
6297 struct ctlr_info *h = sdev_to_hba(dev);
6298 BIG_IOCTL32_Command_struct __user *arg32 = arg;
6299 BIG_IOCTL_Command_struct arg64;
6300 int err;
6301 u32 cp;
6302
6303 if (!arg)
6304 return -EINVAL;
6305 memset(&arg64, 0, sizeof(arg64));
6306 if (copy_from_user(&arg64, arg32,
6307 offsetof(BIG_IOCTL32_Command_struct, buf)))
6308 return -EFAULT;
6309 if (get_user(cp, &arg32->buf))
6310 return -EFAULT;
6311 arg64.buf = compat_ptr(cp);
6312
6313 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6314 return -EAGAIN;
6315 err = hpsa_big_passthru_ioctl(h, &arg64);
6316 atomic_inc(&h->passthru_cmds_avail);
6317 if (err)
6318 return err;
6319 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6320 sizeof(arg32->error_info)))
6321 return -EFAULT;
6322 return 0;
6323 }
6324
hpsa_compat_ioctl(struct scsi_device * dev,unsigned int cmd,void __user * arg)6325 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
6326 void __user *arg)
6327 {
6328 switch (cmd) {
6329 case CCISS_GETPCIINFO:
6330 case CCISS_GETINTINFO:
6331 case CCISS_SETINTINFO:
6332 case CCISS_GETNODENAME:
6333 case CCISS_SETNODENAME:
6334 case CCISS_GETHEARTBEAT:
6335 case CCISS_GETBUSTYPES:
6336 case CCISS_GETFIRMVER:
6337 case CCISS_GETDRIVVER:
6338 case CCISS_REVALIDVOLS:
6339 case CCISS_DEREGDISK:
6340 case CCISS_REGNEWDISK:
6341 case CCISS_REGNEWD:
6342 case CCISS_RESCANDISK:
6343 case CCISS_GETLUNINFO:
6344 return hpsa_ioctl(dev, cmd, arg);
6345
6346 case CCISS_PASSTHRU32:
6347 return hpsa_ioctl32_passthru(dev, cmd, arg);
6348 case CCISS_BIG_PASSTHRU32:
6349 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6350
6351 default:
6352 return -ENOIOCTLCMD;
6353 }
6354 }
6355 #endif
6356
hpsa_getpciinfo_ioctl(struct ctlr_info * h,void __user * argp)6357 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6358 {
6359 struct hpsa_pci_info pciinfo;
6360
6361 if (!argp)
6362 return -EINVAL;
6363 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6364 pciinfo.bus = h->pdev->bus->number;
6365 pciinfo.dev_fn = h->pdev->devfn;
6366 pciinfo.board_id = h->board_id;
6367 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6368 return -EFAULT;
6369 return 0;
6370 }
6371
hpsa_getdrivver_ioctl(struct ctlr_info * h,void __user * argp)6372 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6373 {
6374 DriverVer_type DriverVer;
6375 unsigned char vmaj, vmin, vsubmin;
6376 int rc;
6377
6378 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6379 &vmaj, &vmin, &vsubmin);
6380 if (rc != 3) {
6381 dev_info(&h->pdev->dev, "driver version string '%s' "
6382 "unrecognized.", HPSA_DRIVER_VERSION);
6383 vmaj = 0;
6384 vmin = 0;
6385 vsubmin = 0;
6386 }
6387 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6388 if (!argp)
6389 return -EINVAL;
6390 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6391 return -EFAULT;
6392 return 0;
6393 }
6394
hpsa_passthru_ioctl(struct ctlr_info * h,IOCTL_Command_struct * iocommand)6395 static int hpsa_passthru_ioctl(struct ctlr_info *h,
6396 IOCTL_Command_struct *iocommand)
6397 {
6398 struct CommandList *c;
6399 char *buff = NULL;
6400 u64 temp64;
6401 int rc = 0;
6402
6403 if (!capable(CAP_SYS_RAWIO))
6404 return -EPERM;
6405 if ((iocommand->buf_size < 1) &&
6406 (iocommand->Request.Type.Direction != XFER_NONE)) {
6407 return -EINVAL;
6408 }
6409 if (iocommand->buf_size > 0) {
6410 buff = kmalloc(iocommand->buf_size, GFP_KERNEL);
6411 if (buff == NULL)
6412 return -ENOMEM;
6413 if (iocommand->Request.Type.Direction & XFER_WRITE) {
6414 /* Copy the data into the buffer we created */
6415 if (copy_from_user(buff, iocommand->buf,
6416 iocommand->buf_size)) {
6417 rc = -EFAULT;
6418 goto out_kfree;
6419 }
6420 } else {
6421 memset(buff, 0, iocommand->buf_size);
6422 }
6423 }
6424 c = cmd_alloc(h);
6425
6426 /* Fill in the command type */
6427 c->cmd_type = CMD_IOCTL_PEND;
6428 c->scsi_cmd = SCSI_CMD_BUSY;
6429 /* Fill in Command Header */
6430 c->Header.ReplyQueue = 0; /* unused in simple mode */
6431 if (iocommand->buf_size > 0) { /* buffer to fill */
6432 c->Header.SGList = 1;
6433 c->Header.SGTotal = cpu_to_le16(1);
6434 } else { /* no buffers to fill */
6435 c->Header.SGList = 0;
6436 c->Header.SGTotal = cpu_to_le16(0);
6437 }
6438 memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN));
6439
6440 /* Fill in Request block */
6441 memcpy(&c->Request, &iocommand->Request,
6442 sizeof(c->Request));
6443
6444 /* Fill in the scatter gather information */
6445 if (iocommand->buf_size > 0) {
6446 temp64 = dma_map_single(&h->pdev->dev, buff,
6447 iocommand->buf_size, DMA_BIDIRECTIONAL);
6448 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6449 c->SG[0].Addr = cpu_to_le64(0);
6450 c->SG[0].Len = cpu_to_le32(0);
6451 rc = -ENOMEM;
6452 goto out;
6453 }
6454 c->SG[0].Addr = cpu_to_le64(temp64);
6455 c->SG[0].Len = cpu_to_le32(iocommand->buf_size);
6456 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6457 }
6458 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6459 NO_TIMEOUT);
6460 if (iocommand->buf_size > 0)
6461 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6462 check_ioctl_unit_attention(h, c);
6463 if (rc) {
6464 rc = -EIO;
6465 goto out;
6466 }
6467
6468 /* Copy the error information out */
6469 memcpy(&iocommand->error_info, c->err_info,
6470 sizeof(iocommand->error_info));
6471 if ((iocommand->Request.Type.Direction & XFER_READ) &&
6472 iocommand->buf_size > 0) {
6473 /* Copy the data out of the buffer we created */
6474 if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) {
6475 rc = -EFAULT;
6476 goto out;
6477 }
6478 }
6479 out:
6480 cmd_free(h, c);
6481 out_kfree:
6482 kfree(buff);
6483 return rc;
6484 }
6485
hpsa_big_passthru_ioctl(struct ctlr_info * h,BIG_IOCTL_Command_struct * ioc)6486 static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
6487 BIG_IOCTL_Command_struct *ioc)
6488 {
6489 struct CommandList *c;
6490 unsigned char **buff = NULL;
6491 int *buff_size = NULL;
6492 u64 temp64;
6493 BYTE sg_used = 0;
6494 int status = 0;
6495 u32 left;
6496 u32 sz;
6497 BYTE __user *data_ptr;
6498
6499 if (!capable(CAP_SYS_RAWIO))
6500 return -EPERM;
6501
6502 if ((ioc->buf_size < 1) &&
6503 (ioc->Request.Type.Direction != XFER_NONE))
6504 return -EINVAL;
6505 /* Check kmalloc limits using all SGs */
6506 if (ioc->malloc_size > MAX_KMALLOC_SIZE)
6507 return -EINVAL;
6508 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD)
6509 return -EINVAL;
6510 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6511 if (!buff) {
6512 status = -ENOMEM;
6513 goto cleanup1;
6514 }
6515 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6516 if (!buff_size) {
6517 status = -ENOMEM;
6518 goto cleanup1;
6519 }
6520 left = ioc->buf_size;
6521 data_ptr = ioc->buf;
6522 while (left) {
6523 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6524 buff_size[sg_used] = sz;
6525 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6526 if (buff[sg_used] == NULL) {
6527 status = -ENOMEM;
6528 goto cleanup1;
6529 }
6530 if (ioc->Request.Type.Direction & XFER_WRITE) {
6531 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6532 status = -EFAULT;
6533 goto cleanup1;
6534 }
6535 } else
6536 memset(buff[sg_used], 0, sz);
6537 left -= sz;
6538 data_ptr += sz;
6539 sg_used++;
6540 }
6541 c = cmd_alloc(h);
6542
6543 c->cmd_type = CMD_IOCTL_PEND;
6544 c->scsi_cmd = SCSI_CMD_BUSY;
6545 c->Header.ReplyQueue = 0;
6546 c->Header.SGList = (u8) sg_used;
6547 c->Header.SGTotal = cpu_to_le16(sg_used);
6548 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6549 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6550 if (ioc->buf_size > 0) {
6551 int i;
6552 for (i = 0; i < sg_used; i++) {
6553 temp64 = dma_map_single(&h->pdev->dev, buff[i],
6554 buff_size[i], DMA_BIDIRECTIONAL);
6555 if (dma_mapping_error(&h->pdev->dev,
6556 (dma_addr_t) temp64)) {
6557 c->SG[i].Addr = cpu_to_le64(0);
6558 c->SG[i].Len = cpu_to_le32(0);
6559 hpsa_pci_unmap(h->pdev, c, i,
6560 DMA_BIDIRECTIONAL);
6561 status = -ENOMEM;
6562 goto cleanup0;
6563 }
6564 c->SG[i].Addr = cpu_to_le64(temp64);
6565 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6566 c->SG[i].Ext = cpu_to_le32(0);
6567 }
6568 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6569 }
6570 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6571 NO_TIMEOUT);
6572 if (sg_used)
6573 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6574 check_ioctl_unit_attention(h, c);
6575 if (status) {
6576 status = -EIO;
6577 goto cleanup0;
6578 }
6579
6580 /* Copy the error information out */
6581 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6582 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6583 int i;
6584
6585 /* Copy the data out of the buffer we created */
6586 BYTE __user *ptr = ioc->buf;
6587 for (i = 0; i < sg_used; i++) {
6588 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6589 status = -EFAULT;
6590 goto cleanup0;
6591 }
6592 ptr += buff_size[i];
6593 }
6594 }
6595 status = 0;
6596 cleanup0:
6597 cmd_free(h, c);
6598 cleanup1:
6599 if (buff) {
6600 int i;
6601
6602 for (i = 0; i < sg_used; i++)
6603 kfree(buff[i]);
6604 kfree(buff);
6605 }
6606 kfree(buff_size);
6607 return status;
6608 }
6609
check_ioctl_unit_attention(struct ctlr_info * h,struct CommandList * c)6610 static void check_ioctl_unit_attention(struct ctlr_info *h,
6611 struct CommandList *c)
6612 {
6613 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6614 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6615 (void) check_for_unit_attention(h, c);
6616 }
6617
6618 /*
6619 * ioctl
6620 */
hpsa_ioctl(struct scsi_device * dev,unsigned int cmd,void __user * argp)6621 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
6622 void __user *argp)
6623 {
6624 struct ctlr_info *h = sdev_to_hba(dev);
6625 int rc;
6626
6627 switch (cmd) {
6628 case CCISS_DEREGDISK:
6629 case CCISS_REGNEWDISK:
6630 case CCISS_REGNEWD:
6631 hpsa_scan_start(h->scsi_host);
6632 return 0;
6633 case CCISS_GETPCIINFO:
6634 return hpsa_getpciinfo_ioctl(h, argp);
6635 case CCISS_GETDRIVVER:
6636 return hpsa_getdrivver_ioctl(h, argp);
6637 case CCISS_PASSTHRU: {
6638 IOCTL_Command_struct iocommand;
6639
6640 if (!argp)
6641 return -EINVAL;
6642 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6643 return -EFAULT;
6644 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6645 return -EAGAIN;
6646 rc = hpsa_passthru_ioctl(h, &iocommand);
6647 atomic_inc(&h->passthru_cmds_avail);
6648 if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand)))
6649 rc = -EFAULT;
6650 return rc;
6651 }
6652 case CCISS_BIG_PASSTHRU: {
6653 BIG_IOCTL_Command_struct ioc;
6654 if (!argp)
6655 return -EINVAL;
6656 if (copy_from_user(&ioc, argp, sizeof(ioc)))
6657 return -EFAULT;
6658 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6659 return -EAGAIN;
6660 rc = hpsa_big_passthru_ioctl(h, &ioc);
6661 atomic_inc(&h->passthru_cmds_avail);
6662 if (!rc && copy_to_user(argp, &ioc, sizeof(ioc)))
6663 rc = -EFAULT;
6664 return rc;
6665 }
6666 default:
6667 return -ENOTTY;
6668 }
6669 }
6670
hpsa_send_host_reset(struct ctlr_info * h,u8 reset_type)6671 static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
6672 {
6673 struct CommandList *c;
6674
6675 c = cmd_alloc(h);
6676
6677 /* fill_cmd can't fail here, no data buffer to map */
6678 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6679 RAID_CTLR_LUNID, TYPE_MSG);
6680 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6681 c->waiting = NULL;
6682 enqueue_cmd_and_start_io(h, c);
6683 /* Don't wait for completion, the reset won't complete. Don't free
6684 * the command either. This is the last command we will send before
6685 * re-initializing everything, so it doesn't matter and won't leak.
6686 */
6687 return;
6688 }
6689
fill_cmd(struct CommandList * c,u8 cmd,struct ctlr_info * h,void * buff,size_t size,u16 page_code,unsigned char * scsi3addr,int cmd_type)6690 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6691 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6692 int cmd_type)
6693 {
6694 enum dma_data_direction dir = DMA_NONE;
6695
6696 c->cmd_type = CMD_IOCTL_PEND;
6697 c->scsi_cmd = SCSI_CMD_BUSY;
6698 c->Header.ReplyQueue = 0;
6699 if (buff != NULL && size > 0) {
6700 c->Header.SGList = 1;
6701 c->Header.SGTotal = cpu_to_le16(1);
6702 } else {
6703 c->Header.SGList = 0;
6704 c->Header.SGTotal = cpu_to_le16(0);
6705 }
6706 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6707
6708 if (cmd_type == TYPE_CMD) {
6709 switch (cmd) {
6710 case HPSA_INQUIRY:
6711 /* are we trying to read a vital product page */
6712 if (page_code & VPD_PAGE) {
6713 c->Request.CDB[1] = 0x01;
6714 c->Request.CDB[2] = (page_code & 0xff);
6715 }
6716 c->Request.CDBLen = 6;
6717 c->Request.type_attr_dir =
6718 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6719 c->Request.Timeout = 0;
6720 c->Request.CDB[0] = HPSA_INQUIRY;
6721 c->Request.CDB[4] = size & 0xFF;
6722 break;
6723 case RECEIVE_DIAGNOSTIC:
6724 c->Request.CDBLen = 6;
6725 c->Request.type_attr_dir =
6726 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6727 c->Request.Timeout = 0;
6728 c->Request.CDB[0] = cmd;
6729 c->Request.CDB[1] = 1;
6730 c->Request.CDB[2] = 1;
6731 c->Request.CDB[3] = (size >> 8) & 0xFF;
6732 c->Request.CDB[4] = size & 0xFF;
6733 break;
6734 case HPSA_REPORT_LOG:
6735 case HPSA_REPORT_PHYS:
6736 /* Talking to controller so It's a physical command
6737 mode = 00 target = 0. Nothing to write.
6738 */
6739 c->Request.CDBLen = 12;
6740 c->Request.type_attr_dir =
6741 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6742 c->Request.Timeout = 0;
6743 c->Request.CDB[0] = cmd;
6744 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6745 c->Request.CDB[7] = (size >> 16) & 0xFF;
6746 c->Request.CDB[8] = (size >> 8) & 0xFF;
6747 c->Request.CDB[9] = size & 0xFF;
6748 break;
6749 case BMIC_SENSE_DIAG_OPTIONS:
6750 c->Request.CDBLen = 16;
6751 c->Request.type_attr_dir =
6752 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6753 c->Request.Timeout = 0;
6754 /* Spec says this should be BMIC_WRITE */
6755 c->Request.CDB[0] = BMIC_READ;
6756 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6757 break;
6758 case BMIC_SET_DIAG_OPTIONS:
6759 c->Request.CDBLen = 16;
6760 c->Request.type_attr_dir =
6761 TYPE_ATTR_DIR(cmd_type,
6762 ATTR_SIMPLE, XFER_WRITE);
6763 c->Request.Timeout = 0;
6764 c->Request.CDB[0] = BMIC_WRITE;
6765 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6766 break;
6767 case HPSA_CACHE_FLUSH:
6768 c->Request.CDBLen = 12;
6769 c->Request.type_attr_dir =
6770 TYPE_ATTR_DIR(cmd_type,
6771 ATTR_SIMPLE, XFER_WRITE);
6772 c->Request.Timeout = 0;
6773 c->Request.CDB[0] = BMIC_WRITE;
6774 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6775 c->Request.CDB[7] = (size >> 8) & 0xFF;
6776 c->Request.CDB[8] = size & 0xFF;
6777 break;
6778 case TEST_UNIT_READY:
6779 c->Request.CDBLen = 6;
6780 c->Request.type_attr_dir =
6781 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6782 c->Request.Timeout = 0;
6783 break;
6784 case HPSA_GET_RAID_MAP:
6785 c->Request.CDBLen = 12;
6786 c->Request.type_attr_dir =
6787 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6788 c->Request.Timeout = 0;
6789 c->Request.CDB[0] = HPSA_CISS_READ;
6790 c->Request.CDB[1] = cmd;
6791 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6792 c->Request.CDB[7] = (size >> 16) & 0xFF;
6793 c->Request.CDB[8] = (size >> 8) & 0xFF;
6794 c->Request.CDB[9] = size & 0xFF;
6795 break;
6796 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6797 c->Request.CDBLen = 10;
6798 c->Request.type_attr_dir =
6799 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6800 c->Request.Timeout = 0;
6801 c->Request.CDB[0] = BMIC_READ;
6802 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6803 c->Request.CDB[7] = (size >> 16) & 0xFF;
6804 c->Request.CDB[8] = (size >> 8) & 0xFF;
6805 break;
6806 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6807 c->Request.CDBLen = 10;
6808 c->Request.type_attr_dir =
6809 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6810 c->Request.Timeout = 0;
6811 c->Request.CDB[0] = BMIC_READ;
6812 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6813 c->Request.CDB[7] = (size >> 16) & 0xFF;
6814 c->Request.CDB[8] = (size >> 8) & 0XFF;
6815 break;
6816 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6817 c->Request.CDBLen = 10;
6818 c->Request.type_attr_dir =
6819 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6820 c->Request.Timeout = 0;
6821 c->Request.CDB[0] = BMIC_READ;
6822 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6823 c->Request.CDB[7] = (size >> 16) & 0xFF;
6824 c->Request.CDB[8] = (size >> 8) & 0XFF;
6825 break;
6826 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6827 c->Request.CDBLen = 10;
6828 c->Request.type_attr_dir =
6829 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6830 c->Request.Timeout = 0;
6831 c->Request.CDB[0] = BMIC_READ;
6832 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6833 c->Request.CDB[7] = (size >> 16) & 0xFF;
6834 c->Request.CDB[8] = (size >> 8) & 0XFF;
6835 break;
6836 case BMIC_IDENTIFY_CONTROLLER:
6837 c->Request.CDBLen = 10;
6838 c->Request.type_attr_dir =
6839 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6840 c->Request.Timeout = 0;
6841 c->Request.CDB[0] = BMIC_READ;
6842 c->Request.CDB[1] = 0;
6843 c->Request.CDB[2] = 0;
6844 c->Request.CDB[3] = 0;
6845 c->Request.CDB[4] = 0;
6846 c->Request.CDB[5] = 0;
6847 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6848 c->Request.CDB[7] = (size >> 16) & 0xFF;
6849 c->Request.CDB[8] = (size >> 8) & 0XFF;
6850 c->Request.CDB[9] = 0;
6851 break;
6852 default:
6853 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6854 BUG();
6855 }
6856 } else if (cmd_type == TYPE_MSG) {
6857 switch (cmd) {
6858
6859 case HPSA_PHYS_TARGET_RESET:
6860 c->Request.CDBLen = 16;
6861 c->Request.type_attr_dir =
6862 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6863 c->Request.Timeout = 0; /* Don't time out */
6864 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6865 c->Request.CDB[0] = HPSA_RESET;
6866 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6867 /* Physical target reset needs no control bytes 4-7*/
6868 c->Request.CDB[4] = 0x00;
6869 c->Request.CDB[5] = 0x00;
6870 c->Request.CDB[6] = 0x00;
6871 c->Request.CDB[7] = 0x00;
6872 break;
6873 case HPSA_DEVICE_RESET_MSG:
6874 c->Request.CDBLen = 16;
6875 c->Request.type_attr_dir =
6876 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6877 c->Request.Timeout = 0; /* Don't time out */
6878 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6879 c->Request.CDB[0] = cmd;
6880 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6881 /* If bytes 4-7 are zero, it means reset the */
6882 /* LunID device */
6883 c->Request.CDB[4] = 0x00;
6884 c->Request.CDB[5] = 0x00;
6885 c->Request.CDB[6] = 0x00;
6886 c->Request.CDB[7] = 0x00;
6887 break;
6888 default:
6889 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6890 cmd);
6891 BUG();
6892 }
6893 } else {
6894 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6895 BUG();
6896 }
6897
6898 switch (GET_DIR(c->Request.type_attr_dir)) {
6899 case XFER_READ:
6900 dir = DMA_FROM_DEVICE;
6901 break;
6902 case XFER_WRITE:
6903 dir = DMA_TO_DEVICE;
6904 break;
6905 case XFER_NONE:
6906 dir = DMA_NONE;
6907 break;
6908 default:
6909 dir = DMA_BIDIRECTIONAL;
6910 }
6911 if (hpsa_map_one(h->pdev, c, buff, size, dir))
6912 return -1;
6913 return 0;
6914 }
6915
6916 /*
6917 * Map (physical) PCI mem into (virtual) kernel space
6918 */
remap_pci_mem(ulong base,ulong size)6919 static void __iomem *remap_pci_mem(ulong base, ulong size)
6920 {
6921 ulong page_base = ((ulong) base) & PAGE_MASK;
6922 ulong page_offs = ((ulong) base) - page_base;
6923 void __iomem *page_remapped = ioremap(page_base,
6924 page_offs + size);
6925
6926 return page_remapped ? (page_remapped + page_offs) : NULL;
6927 }
6928
get_next_completion(struct ctlr_info * h,u8 q)6929 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6930 {
6931 return h->access.command_completed(h, q);
6932 }
6933
interrupt_pending(struct ctlr_info * h)6934 static inline bool interrupt_pending(struct ctlr_info *h)
6935 {
6936 return h->access.intr_pending(h);
6937 }
6938
interrupt_not_for_us(struct ctlr_info * h)6939 static inline long interrupt_not_for_us(struct ctlr_info *h)
6940 {
6941 return (h->access.intr_pending(h) == 0) ||
6942 (h->interrupts_enabled == 0);
6943 }
6944
bad_tag(struct ctlr_info * h,u32 tag_index,u32 raw_tag)6945 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6946 u32 raw_tag)
6947 {
6948 if (unlikely(tag_index >= h->nr_cmds)) {
6949 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6950 return 1;
6951 }
6952 return 0;
6953 }
6954
finish_cmd(struct CommandList * c)6955 static inline void finish_cmd(struct CommandList *c)
6956 {
6957 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6958 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6959 || c->cmd_type == CMD_IOACCEL2))
6960 complete_scsi_command(c);
6961 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6962 complete(c->waiting);
6963 }
6964
6965 /* process completion of an indexed ("direct lookup") command */
process_indexed_cmd(struct ctlr_info * h,u32 raw_tag)6966 static inline void process_indexed_cmd(struct ctlr_info *h,
6967 u32 raw_tag)
6968 {
6969 u32 tag_index;
6970 struct CommandList *c;
6971
6972 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6973 if (!bad_tag(h, tag_index, raw_tag)) {
6974 c = h->cmd_pool + tag_index;
6975 finish_cmd(c);
6976 }
6977 }
6978
6979 /* Some controllers, like p400, will give us one interrupt
6980 * after a soft reset, even if we turned interrupts off.
6981 * Only need to check for this in the hpsa_xxx_discard_completions
6982 * functions.
6983 */
ignore_bogus_interrupt(struct ctlr_info * h)6984 static int ignore_bogus_interrupt(struct ctlr_info *h)
6985 {
6986 if (likely(!reset_devices))
6987 return 0;
6988
6989 if (likely(h->interrupts_enabled))
6990 return 0;
6991
6992 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6993 "(known firmware bug.) Ignoring.\n");
6994
6995 return 1;
6996 }
6997
6998 /*
6999 * Convert &h->q[x] (passed to interrupt handlers) back to h.
7000 * Relies on (h-q[x] == x) being true for x such that
7001 * 0 <= x < MAX_REPLY_QUEUES.
7002 */
queue_to_hba(u8 * queue)7003 static struct ctlr_info *queue_to_hba(u8 *queue)
7004 {
7005 return container_of((queue - *queue), struct ctlr_info, q[0]);
7006 }
7007
hpsa_intx_discard_completions(int irq,void * queue)7008 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7009 {
7010 struct ctlr_info *h = queue_to_hba(queue);
7011 u8 q = *(u8 *) queue;
7012 u32 raw_tag;
7013
7014 if (ignore_bogus_interrupt(h))
7015 return IRQ_NONE;
7016
7017 if (interrupt_not_for_us(h))
7018 return IRQ_NONE;
7019 h->last_intr_timestamp = get_jiffies_64();
7020 while (interrupt_pending(h)) {
7021 raw_tag = get_next_completion(h, q);
7022 while (raw_tag != FIFO_EMPTY)
7023 raw_tag = next_command(h, q);
7024 }
7025 return IRQ_HANDLED;
7026 }
7027
hpsa_msix_discard_completions(int irq,void * queue)7028 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7029 {
7030 struct ctlr_info *h = queue_to_hba(queue);
7031 u32 raw_tag;
7032 u8 q = *(u8 *) queue;
7033
7034 if (ignore_bogus_interrupt(h))
7035 return IRQ_NONE;
7036
7037 h->last_intr_timestamp = get_jiffies_64();
7038 raw_tag = get_next_completion(h, q);
7039 while (raw_tag != FIFO_EMPTY)
7040 raw_tag = next_command(h, q);
7041 return IRQ_HANDLED;
7042 }
7043
do_hpsa_intr_intx(int irq,void * queue)7044 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7045 {
7046 struct ctlr_info *h = queue_to_hba((u8 *) queue);
7047 u32 raw_tag;
7048 u8 q = *(u8 *) queue;
7049
7050 if (interrupt_not_for_us(h))
7051 return IRQ_NONE;
7052 h->last_intr_timestamp = get_jiffies_64();
7053 while (interrupt_pending(h)) {
7054 raw_tag = get_next_completion(h, q);
7055 while (raw_tag != FIFO_EMPTY) {
7056 process_indexed_cmd(h, raw_tag);
7057 raw_tag = next_command(h, q);
7058 }
7059 }
7060 return IRQ_HANDLED;
7061 }
7062
do_hpsa_intr_msi(int irq,void * queue)7063 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7064 {
7065 struct ctlr_info *h = queue_to_hba(queue);
7066 u32 raw_tag;
7067 u8 q = *(u8 *) queue;
7068
7069 h->last_intr_timestamp = get_jiffies_64();
7070 raw_tag = get_next_completion(h, q);
7071 while (raw_tag != FIFO_EMPTY) {
7072 process_indexed_cmd(h, raw_tag);
7073 raw_tag = next_command(h, q);
7074 }
7075 return IRQ_HANDLED;
7076 }
7077
7078 /* Send a message CDB to the firmware. Careful, this only works
7079 * in simple mode, not performant mode due to the tag lookup.
7080 * We only ever use this immediately after a controller reset.
7081 */
hpsa_message(struct pci_dev * pdev,unsigned char opcode,unsigned char type)7082 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7083 unsigned char type)
7084 {
7085 struct Command {
7086 struct CommandListHeader CommandHeader;
7087 struct RequestBlock Request;
7088 struct ErrDescriptor ErrorDescriptor;
7089 };
7090 struct Command *cmd;
7091 static const size_t cmd_sz = sizeof(*cmd) +
7092 sizeof(cmd->ErrorDescriptor);
7093 dma_addr_t paddr64;
7094 __le32 paddr32;
7095 u32 tag;
7096 void __iomem *vaddr;
7097 int i, err;
7098
7099 vaddr = pci_ioremap_bar(pdev, 0);
7100 if (vaddr == NULL)
7101 return -ENOMEM;
7102
7103 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7104 * CCISS commands, so they must be allocated from the lower 4GiB of
7105 * memory.
7106 */
7107 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7108 if (err) {
7109 iounmap(vaddr);
7110 return err;
7111 }
7112
7113 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7114 if (cmd == NULL) {
7115 iounmap(vaddr);
7116 return -ENOMEM;
7117 }
7118
7119 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7120 * although there's no guarantee, we assume that the address is at
7121 * least 4-byte aligned (most likely, it's page-aligned).
7122 */
7123 paddr32 = cpu_to_le32(paddr64);
7124
7125 cmd->CommandHeader.ReplyQueue = 0;
7126 cmd->CommandHeader.SGList = 0;
7127 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7128 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7129 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7130
7131 cmd->Request.CDBLen = 16;
7132 cmd->Request.type_attr_dir =
7133 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7134 cmd->Request.Timeout = 0; /* Don't time out */
7135 cmd->Request.CDB[0] = opcode;
7136 cmd->Request.CDB[1] = type;
7137 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7138 cmd->ErrorDescriptor.Addr =
7139 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7140 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7141
7142 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7143
7144 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7145 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7146 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7147 break;
7148 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7149 }
7150
7151 iounmap(vaddr);
7152
7153 /* we leak the DMA buffer here ... no choice since the controller could
7154 * still complete the command.
7155 */
7156 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7157 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7158 opcode, type);
7159 return -ETIMEDOUT;
7160 }
7161
7162 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7163
7164 if (tag & HPSA_ERROR_BIT) {
7165 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7166 opcode, type);
7167 return -EIO;
7168 }
7169
7170 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7171 opcode, type);
7172 return 0;
7173 }
7174
7175 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7176
hpsa_controller_hard_reset(struct pci_dev * pdev,void __iomem * vaddr,u32 use_doorbell)7177 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7178 void __iomem *vaddr, u32 use_doorbell)
7179 {
7180
7181 if (use_doorbell) {
7182 /* For everything after the P600, the PCI power state method
7183 * of resetting the controller doesn't work, so we have this
7184 * other way using the doorbell register.
7185 */
7186 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7187 writel(use_doorbell, vaddr + SA5_DOORBELL);
7188
7189 /* PMC hardware guys tell us we need a 10 second delay after
7190 * doorbell reset and before any attempt to talk to the board
7191 * at all to ensure that this actually works and doesn't fall
7192 * over in some weird corner cases.
7193 */
7194 msleep(10000);
7195 } else { /* Try to do it the PCI power state way */
7196
7197 /* Quoting from the Open CISS Specification: "The Power
7198 * Management Control/Status Register (CSR) controls the power
7199 * state of the device. The normal operating state is D0,
7200 * CSR=00h. The software off state is D3, CSR=03h. To reset
7201 * the controller, place the interface device in D3 then to D0,
7202 * this causes a secondary PCI reset which will reset the
7203 * controller." */
7204
7205 int rc = 0;
7206
7207 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7208
7209 /* enter the D3hot power management state */
7210 rc = pci_set_power_state(pdev, PCI_D3hot);
7211 if (rc)
7212 return rc;
7213
7214 msleep(500);
7215
7216 /* enter the D0 power management state */
7217 rc = pci_set_power_state(pdev, PCI_D0);
7218 if (rc)
7219 return rc;
7220
7221 /*
7222 * The P600 requires a small delay when changing states.
7223 * Otherwise we may think the board did not reset and we bail.
7224 * This for kdump only and is particular to the P600.
7225 */
7226 msleep(500);
7227 }
7228 return 0;
7229 }
7230
init_driver_version(char * driver_version,int len)7231 static void init_driver_version(char *driver_version, int len)
7232 {
7233 strscpy_pad(driver_version, HPSA " " HPSA_DRIVER_VERSION, len);
7234 }
7235
write_driver_ver_to_cfgtable(struct CfgTable __iomem * cfgtable)7236 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7237 {
7238 char *driver_version;
7239 int i, size = sizeof(cfgtable->driver_version);
7240
7241 driver_version = kmalloc(size, GFP_KERNEL);
7242 if (!driver_version)
7243 return -ENOMEM;
7244
7245 init_driver_version(driver_version, size);
7246 for (i = 0; i < size; i++)
7247 writeb(driver_version[i], &cfgtable->driver_version[i]);
7248 kfree(driver_version);
7249 return 0;
7250 }
7251
read_driver_ver_from_cfgtable(struct CfgTable __iomem * cfgtable,unsigned char * driver_ver)7252 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7253 unsigned char *driver_ver)
7254 {
7255 int i;
7256
7257 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7258 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7259 }
7260
controller_reset_failed(struct CfgTable __iomem * cfgtable)7261 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7262 {
7263
7264 char *driver_ver, *old_driver_ver;
7265 int rc, size = sizeof(cfgtable->driver_version);
7266
7267 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7268 if (!old_driver_ver)
7269 return -ENOMEM;
7270 driver_ver = old_driver_ver + size;
7271
7272 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7273 * should have been changed, otherwise we know the reset failed.
7274 */
7275 init_driver_version(old_driver_ver, size);
7276 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7277 rc = !memcmp(driver_ver, old_driver_ver, size);
7278 kfree(old_driver_ver);
7279 return rc;
7280 }
7281 /* This does a hard reset of the controller using PCI power management
7282 * states or the using the doorbell register.
7283 */
hpsa_kdump_hard_reset_controller(struct pci_dev * pdev,u32 board_id)7284 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7285 {
7286 u64 cfg_offset;
7287 u32 cfg_base_addr;
7288 u64 cfg_base_addr_index;
7289 void __iomem *vaddr;
7290 unsigned long paddr;
7291 u32 misc_fw_support;
7292 int rc;
7293 struct CfgTable __iomem *cfgtable;
7294 u32 use_doorbell;
7295 u16 command_register;
7296
7297 /* For controllers as old as the P600, this is very nearly
7298 * the same thing as
7299 *
7300 * pci_save_state(pci_dev);
7301 * pci_set_power_state(pci_dev, PCI_D3hot);
7302 * pci_set_power_state(pci_dev, PCI_D0);
7303 * pci_restore_state(pci_dev);
7304 *
7305 * For controllers newer than the P600, the pci power state
7306 * method of resetting doesn't work so we have another way
7307 * using the doorbell register.
7308 */
7309
7310 if (!ctlr_is_resettable(board_id)) {
7311 dev_warn(&pdev->dev, "Controller not resettable\n");
7312 return -ENODEV;
7313 }
7314
7315 /* if controller is soft- but not hard resettable... */
7316 if (!ctlr_is_hard_resettable(board_id))
7317 return -ENOTSUPP; /* try soft reset later. */
7318
7319 /* Save the PCI command register */
7320 pci_read_config_word(pdev, 4, &command_register);
7321 pci_save_state(pdev);
7322
7323 /* find the first memory BAR, so we can find the cfg table */
7324 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7325 if (rc)
7326 return rc;
7327 vaddr = remap_pci_mem(paddr, 0x250);
7328 if (!vaddr)
7329 return -ENOMEM;
7330
7331 /* find cfgtable in order to check if reset via doorbell is supported */
7332 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7333 &cfg_base_addr_index, &cfg_offset);
7334 if (rc)
7335 goto unmap_vaddr;
7336 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7337 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7338 if (!cfgtable) {
7339 rc = -ENOMEM;
7340 goto unmap_vaddr;
7341 }
7342 rc = write_driver_ver_to_cfgtable(cfgtable);
7343 if (rc)
7344 goto unmap_cfgtable;
7345
7346 /* If reset via doorbell register is supported, use that.
7347 * There are two such methods. Favor the newest method.
7348 */
7349 misc_fw_support = readl(&cfgtable->misc_fw_support);
7350 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7351 if (use_doorbell) {
7352 use_doorbell = DOORBELL_CTLR_RESET2;
7353 } else {
7354 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7355 if (use_doorbell) {
7356 dev_warn(&pdev->dev,
7357 "Soft reset not supported. Firmware update is required.\n");
7358 rc = -ENOTSUPP; /* try soft reset */
7359 goto unmap_cfgtable;
7360 }
7361 }
7362
7363 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7364 if (rc)
7365 goto unmap_cfgtable;
7366
7367 pci_restore_state(pdev);
7368 pci_write_config_word(pdev, 4, command_register);
7369
7370 /* Some devices (notably the HP Smart Array 5i Controller)
7371 need a little pause here */
7372 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7373
7374 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7375 if (rc) {
7376 dev_warn(&pdev->dev,
7377 "Failed waiting for board to become ready after hard reset\n");
7378 goto unmap_cfgtable;
7379 }
7380
7381 rc = controller_reset_failed(vaddr);
7382 if (rc < 0)
7383 goto unmap_cfgtable;
7384 if (rc) {
7385 dev_warn(&pdev->dev, "Unable to successfully reset "
7386 "controller. Will try soft reset.\n");
7387 rc = -ENOTSUPP;
7388 } else {
7389 dev_info(&pdev->dev, "board ready after hard reset.\n");
7390 }
7391
7392 unmap_cfgtable:
7393 iounmap(cfgtable);
7394
7395 unmap_vaddr:
7396 iounmap(vaddr);
7397 return rc;
7398 }
7399
7400 /*
7401 * We cannot read the structure directly, for portability we must use
7402 * the io functions.
7403 * This is for debug only.
7404 */
print_cfg_table(struct device * dev,struct CfgTable __iomem * tb)7405 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7406 {
7407 #ifdef HPSA_DEBUG
7408 int i;
7409 char temp_name[17];
7410
7411 dev_info(dev, "Controller Configuration information\n");
7412 dev_info(dev, "------------------------------------\n");
7413 for (i = 0; i < 4; i++)
7414 temp_name[i] = readb(&(tb->Signature[i]));
7415 temp_name[4] = '\0';
7416 dev_info(dev, " Signature = %s\n", temp_name);
7417 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7418 dev_info(dev, " Transport methods supported = 0x%x\n",
7419 readl(&(tb->TransportSupport)));
7420 dev_info(dev, " Transport methods active = 0x%x\n",
7421 readl(&(tb->TransportActive)));
7422 dev_info(dev, " Requested transport Method = 0x%x\n",
7423 readl(&(tb->HostWrite.TransportRequest)));
7424 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7425 readl(&(tb->HostWrite.CoalIntDelay)));
7426 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7427 readl(&(tb->HostWrite.CoalIntCount)));
7428 dev_info(dev, " Max outstanding commands = %d\n",
7429 readl(&(tb->CmdsOutMax)));
7430 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7431 for (i = 0; i < 16; i++)
7432 temp_name[i] = readb(&(tb->ServerName[i]));
7433 temp_name[16] = '\0';
7434 dev_info(dev, " Server Name = %s\n", temp_name);
7435 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7436 readl(&(tb->HeartBeat)));
7437 #endif /* HPSA_DEBUG */
7438 }
7439
find_PCI_BAR_index(struct pci_dev * pdev,unsigned long pci_bar_addr)7440 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7441 {
7442 int i, offset, mem_type, bar_type;
7443
7444 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7445 return 0;
7446 offset = 0;
7447 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7448 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7449 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7450 offset += 4;
7451 else {
7452 mem_type = pci_resource_flags(pdev, i) &
7453 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7454 switch (mem_type) {
7455 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7456 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7457 offset += 4; /* 32 bit */
7458 break;
7459 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7460 offset += 8;
7461 break;
7462 default: /* reserved in PCI 2.2 */
7463 dev_warn(&pdev->dev,
7464 "base address is invalid\n");
7465 return -1;
7466 }
7467 }
7468 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7469 return i + 1;
7470 }
7471 return -1;
7472 }
7473
hpsa_disable_interrupt_mode(struct ctlr_info * h)7474 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7475 {
7476 pci_free_irq_vectors(h->pdev);
7477 h->msix_vectors = 0;
7478 }
7479
hpsa_setup_reply_map(struct ctlr_info * h)7480 static void hpsa_setup_reply_map(struct ctlr_info *h)
7481 {
7482 const struct cpumask *mask;
7483 unsigned int queue, cpu;
7484
7485 for (queue = 0; queue < h->msix_vectors; queue++) {
7486 mask = pci_irq_get_affinity(h->pdev, queue);
7487 if (!mask)
7488 goto fallback;
7489
7490 for_each_cpu(cpu, mask)
7491 h->reply_map[cpu] = queue;
7492 }
7493 return;
7494
7495 fallback:
7496 for_each_possible_cpu(cpu)
7497 h->reply_map[cpu] = 0;
7498 }
7499
7500 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7501 * controllers that are capable. If not, we use legacy INTx mode.
7502 */
hpsa_interrupt_mode(struct ctlr_info * h)7503 static int hpsa_interrupt_mode(struct ctlr_info *h)
7504 {
7505 unsigned int flags = PCI_IRQ_INTX;
7506 int ret;
7507
7508 /* Some boards advertise MSI but don't really support it */
7509 switch (h->board_id) {
7510 case 0x40700E11:
7511 case 0x40800E11:
7512 case 0x40820E11:
7513 case 0x40830E11:
7514 break;
7515 default:
7516 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7517 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7518 if (ret > 0) {
7519 h->msix_vectors = ret;
7520 return 0;
7521 }
7522
7523 flags |= PCI_IRQ_MSI;
7524 break;
7525 }
7526
7527 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7528 if (ret < 0)
7529 return ret;
7530 return 0;
7531 }
7532
hpsa_lookup_board_id(struct pci_dev * pdev,u32 * board_id,bool * legacy_board)7533 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7534 bool *legacy_board)
7535 {
7536 int i;
7537 u32 subsystem_vendor_id, subsystem_device_id;
7538
7539 subsystem_vendor_id = pdev->subsystem_vendor;
7540 subsystem_device_id = pdev->subsystem_device;
7541 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7542 subsystem_vendor_id;
7543
7544 if (legacy_board)
7545 *legacy_board = false;
7546 for (i = 0; i < ARRAY_SIZE(products); i++)
7547 if (*board_id == products[i].board_id) {
7548 if (products[i].access != &SA5A_access &&
7549 products[i].access != &SA5B_access)
7550 return i;
7551 dev_warn(&pdev->dev,
7552 "legacy board ID: 0x%08x\n",
7553 *board_id);
7554 if (legacy_board)
7555 *legacy_board = true;
7556 return i;
7557 }
7558
7559 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7560 if (legacy_board)
7561 *legacy_board = true;
7562 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7563 }
7564
hpsa_pci_find_memory_BAR(struct pci_dev * pdev,unsigned long * memory_bar)7565 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7566 unsigned long *memory_bar)
7567 {
7568 int i;
7569
7570 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7571 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7572 /* addressing mode bits already removed */
7573 *memory_bar = pci_resource_start(pdev, i);
7574 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7575 *memory_bar);
7576 return 0;
7577 }
7578 dev_warn(&pdev->dev, "no memory BAR found\n");
7579 return -ENODEV;
7580 }
7581
hpsa_wait_for_board_state(struct pci_dev * pdev,void __iomem * vaddr,int wait_for_ready)7582 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7583 int wait_for_ready)
7584 {
7585 int i, iterations;
7586 u32 scratchpad;
7587 if (wait_for_ready)
7588 iterations = HPSA_BOARD_READY_ITERATIONS;
7589 else
7590 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7591
7592 for (i = 0; i < iterations; i++) {
7593 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7594 if (wait_for_ready) {
7595 if (scratchpad == HPSA_FIRMWARE_READY)
7596 return 0;
7597 } else {
7598 if (scratchpad != HPSA_FIRMWARE_READY)
7599 return 0;
7600 }
7601 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7602 }
7603 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7604 return -ENODEV;
7605 }
7606
hpsa_find_cfg_addrs(struct pci_dev * pdev,void __iomem * vaddr,u32 * cfg_base_addr,u64 * cfg_base_addr_index,u64 * cfg_offset)7607 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7608 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7609 u64 *cfg_offset)
7610 {
7611 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7612 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7613 *cfg_base_addr &= (u32) 0x0000ffff;
7614 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7615 if (*cfg_base_addr_index == -1) {
7616 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7617 return -ENODEV;
7618 }
7619 return 0;
7620 }
7621
hpsa_free_cfgtables(struct ctlr_info * h)7622 static void hpsa_free_cfgtables(struct ctlr_info *h)
7623 {
7624 if (h->transtable) {
7625 iounmap(h->transtable);
7626 h->transtable = NULL;
7627 }
7628 if (h->cfgtable) {
7629 iounmap(h->cfgtable);
7630 h->cfgtable = NULL;
7631 }
7632 }
7633
7634 /* Find and map CISS config table and transfer table
7635 + * several items must be unmapped (freed) later
7636 + * */
hpsa_find_cfgtables(struct ctlr_info * h)7637 static int hpsa_find_cfgtables(struct ctlr_info *h)
7638 {
7639 u64 cfg_offset;
7640 u32 cfg_base_addr;
7641 u64 cfg_base_addr_index;
7642 u32 trans_offset;
7643 int rc;
7644
7645 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7646 &cfg_base_addr_index, &cfg_offset);
7647 if (rc)
7648 return rc;
7649 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7650 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7651 if (!h->cfgtable) {
7652 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7653 return -ENOMEM;
7654 }
7655 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7656 if (rc)
7657 return rc;
7658 /* Find performant mode table. */
7659 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7660 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7661 cfg_base_addr_index)+cfg_offset+trans_offset,
7662 sizeof(*h->transtable));
7663 if (!h->transtable) {
7664 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7665 hpsa_free_cfgtables(h);
7666 return -ENOMEM;
7667 }
7668 return 0;
7669 }
7670
hpsa_get_max_perf_mode_cmds(struct ctlr_info * h)7671 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7672 {
7673 #define MIN_MAX_COMMANDS 16
7674 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7675
7676 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7677
7678 /* Limit commands in memory limited kdump scenario. */
7679 if (reset_devices && h->max_commands > 32)
7680 h->max_commands = 32;
7681
7682 if (h->max_commands < MIN_MAX_COMMANDS) {
7683 dev_warn(&h->pdev->dev,
7684 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7685 h->max_commands,
7686 MIN_MAX_COMMANDS);
7687 h->max_commands = MIN_MAX_COMMANDS;
7688 }
7689 }
7690
7691 /* If the controller reports that the total max sg entries is greater than 512,
7692 * then we know that chained SG blocks work. (Original smart arrays did not
7693 * support chained SG blocks and would return zero for max sg entries.)
7694 */
hpsa_supports_chained_sg_blocks(struct ctlr_info * h)7695 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7696 {
7697 return h->maxsgentries > 512;
7698 }
7699
7700 /* Interrogate the hardware for some limits:
7701 * max commands, max SG elements without chaining, and with chaining,
7702 * SG chain block size, etc.
7703 */
hpsa_find_board_params(struct ctlr_info * h)7704 static void hpsa_find_board_params(struct ctlr_info *h)
7705 {
7706 hpsa_get_max_perf_mode_cmds(h);
7707 h->nr_cmds = h->max_commands;
7708 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7709 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7710 if (hpsa_supports_chained_sg_blocks(h)) {
7711 /* Limit in-command s/g elements to 32 save dma'able memory. */
7712 h->max_cmd_sg_entries = 32;
7713 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7714 h->maxsgentries--; /* save one for chain pointer */
7715 } else {
7716 /*
7717 * Original smart arrays supported at most 31 s/g entries
7718 * embedded inline in the command (trying to use more
7719 * would lock up the controller)
7720 */
7721 h->max_cmd_sg_entries = 31;
7722 h->maxsgentries = 31; /* default to traditional values */
7723 h->chainsize = 0;
7724 }
7725
7726 /* Find out what task management functions are supported and cache */
7727 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7728 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7729 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7730 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7731 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7732 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7733 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7734 }
7735
hpsa_CISS_signature_present(struct ctlr_info * h)7736 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7737 {
7738 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7739 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7740 return false;
7741 }
7742 return true;
7743 }
7744
hpsa_set_driver_support_bits(struct ctlr_info * h)7745 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7746 {
7747 u32 driver_support;
7748
7749 driver_support = readl(&(h->cfgtable->driver_support));
7750 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7751 #ifdef CONFIG_X86
7752 driver_support |= ENABLE_SCSI_PREFETCH;
7753 #endif
7754 driver_support |= ENABLE_UNIT_ATTN;
7755 writel(driver_support, &(h->cfgtable->driver_support));
7756 }
7757
7758 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7759 * in a prefetch beyond physical memory.
7760 */
hpsa_p600_dma_prefetch_quirk(struct ctlr_info * h)7761 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7762 {
7763 u32 dma_prefetch;
7764
7765 if (h->board_id != 0x3225103C)
7766 return;
7767 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7768 dma_prefetch |= 0x8000;
7769 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7770 }
7771
hpsa_wait_for_clear_event_notify_ack(struct ctlr_info * h)7772 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7773 {
7774 int i;
7775 u32 doorbell_value;
7776 unsigned long flags;
7777 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7778 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7779 spin_lock_irqsave(&h->lock, flags);
7780 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7781 spin_unlock_irqrestore(&h->lock, flags);
7782 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7783 goto done;
7784 /* delay and try again */
7785 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7786 }
7787 return -ENODEV;
7788 done:
7789 return 0;
7790 }
7791
hpsa_wait_for_mode_change_ack(struct ctlr_info * h)7792 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7793 {
7794 int i;
7795 u32 doorbell_value;
7796 unsigned long flags;
7797
7798 /* under certain very rare conditions, this can take awhile.
7799 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7800 * as we enter this code.)
7801 */
7802 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7803 if (h->remove_in_progress)
7804 goto done;
7805 spin_lock_irqsave(&h->lock, flags);
7806 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7807 spin_unlock_irqrestore(&h->lock, flags);
7808 if (!(doorbell_value & CFGTBL_ChangeReq))
7809 goto done;
7810 /* delay and try again */
7811 msleep(MODE_CHANGE_WAIT_INTERVAL);
7812 }
7813 return -ENODEV;
7814 done:
7815 return 0;
7816 }
7817
7818 /* return -ENODEV or other reason on error, 0 on success */
hpsa_enter_simple_mode(struct ctlr_info * h)7819 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7820 {
7821 u32 trans_support;
7822
7823 trans_support = readl(&(h->cfgtable->TransportSupport));
7824 if (!(trans_support & SIMPLE_MODE))
7825 return -ENOTSUPP;
7826
7827 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7828
7829 /* Update the field, and then ring the doorbell */
7830 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7831 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7832 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7833 if (hpsa_wait_for_mode_change_ack(h))
7834 goto error;
7835 print_cfg_table(&h->pdev->dev, h->cfgtable);
7836 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7837 goto error;
7838 h->transMethod = CFGTBL_Trans_Simple;
7839 return 0;
7840 error:
7841 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7842 return -ENODEV;
7843 }
7844
7845 /* free items allocated or mapped by hpsa_pci_init */
hpsa_free_pci_init(struct ctlr_info * h)7846 static void hpsa_free_pci_init(struct ctlr_info *h)
7847 {
7848 hpsa_free_cfgtables(h); /* pci_init 4 */
7849 iounmap(h->vaddr); /* pci_init 3 */
7850 h->vaddr = NULL;
7851 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7852 /*
7853 * call pci_disable_device before pci_release_regions per
7854 * Documentation/driver-api/pci/pci.rst
7855 */
7856 pci_disable_device(h->pdev); /* pci_init 1 */
7857 pci_release_regions(h->pdev); /* pci_init 2 */
7858 }
7859
7860 /* several items must be freed later */
hpsa_pci_init(struct ctlr_info * h)7861 static int hpsa_pci_init(struct ctlr_info *h)
7862 {
7863 int prod_index, err;
7864 bool legacy_board;
7865
7866 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7867 if (prod_index < 0)
7868 return prod_index;
7869 h->product_name = products[prod_index].product_name;
7870 h->access = *(products[prod_index].access);
7871 h->legacy_board = legacy_board;
7872 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7873 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7874
7875 err = pci_enable_device(h->pdev);
7876 if (err) {
7877 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7878 pci_disable_device(h->pdev);
7879 return err;
7880 }
7881
7882 err = pci_request_regions(h->pdev, HPSA);
7883 if (err) {
7884 dev_err(&h->pdev->dev,
7885 "failed to obtain PCI resources\n");
7886 pci_disable_device(h->pdev);
7887 return err;
7888 }
7889
7890 pci_set_master(h->pdev);
7891
7892 err = hpsa_interrupt_mode(h);
7893 if (err)
7894 goto clean1;
7895
7896 /* setup mapping between CPU and reply queue */
7897 hpsa_setup_reply_map(h);
7898
7899 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7900 if (err)
7901 goto clean2; /* intmode+region, pci */
7902 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7903 if (!h->vaddr) {
7904 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7905 err = -ENOMEM;
7906 goto clean2; /* intmode+region, pci */
7907 }
7908 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7909 if (err)
7910 goto clean3; /* vaddr, intmode+region, pci */
7911 err = hpsa_find_cfgtables(h);
7912 if (err)
7913 goto clean3; /* vaddr, intmode+region, pci */
7914 hpsa_find_board_params(h);
7915
7916 if (!hpsa_CISS_signature_present(h)) {
7917 err = -ENODEV;
7918 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7919 }
7920 hpsa_set_driver_support_bits(h);
7921 hpsa_p600_dma_prefetch_quirk(h);
7922 err = hpsa_enter_simple_mode(h);
7923 if (err)
7924 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7925 return 0;
7926
7927 clean4: /* cfgtables, vaddr, intmode+region, pci */
7928 hpsa_free_cfgtables(h);
7929 clean3: /* vaddr, intmode+region, pci */
7930 iounmap(h->vaddr);
7931 h->vaddr = NULL;
7932 clean2: /* intmode+region, pci */
7933 hpsa_disable_interrupt_mode(h);
7934 clean1:
7935 /*
7936 * call pci_disable_device before pci_release_regions per
7937 * Documentation/driver-api/pci/pci.rst
7938 */
7939 pci_disable_device(h->pdev);
7940 pci_release_regions(h->pdev);
7941 return err;
7942 }
7943
hpsa_hba_inquiry(struct ctlr_info * h)7944 static void hpsa_hba_inquiry(struct ctlr_info *h)
7945 {
7946 int rc;
7947
7948 #define HBA_INQUIRY_BYTE_COUNT 64
7949 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7950 if (!h->hba_inquiry_data)
7951 return;
7952 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7953 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7954 if (rc != 0) {
7955 kfree(h->hba_inquiry_data);
7956 h->hba_inquiry_data = NULL;
7957 }
7958 }
7959
hpsa_init_reset_devices(struct pci_dev * pdev,u32 board_id)7960 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7961 {
7962 int rc, i;
7963 void __iomem *vaddr;
7964
7965 if (!reset_devices)
7966 return 0;
7967
7968 /* kdump kernel is loading, we don't know in which state is
7969 * the pci interface. The dev->enable_cnt is equal zero
7970 * so we call enable+disable, wait a while and switch it on.
7971 */
7972 rc = pci_enable_device(pdev);
7973 if (rc) {
7974 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7975 return -ENODEV;
7976 }
7977 pci_disable_device(pdev);
7978 msleep(260); /* a randomly chosen number */
7979 rc = pci_enable_device(pdev);
7980 if (rc) {
7981 dev_warn(&pdev->dev, "failed to enable device.\n");
7982 return -ENODEV;
7983 }
7984
7985 pci_set_master(pdev);
7986
7987 vaddr = pci_ioremap_bar(pdev, 0);
7988 if (vaddr == NULL) {
7989 rc = -ENOMEM;
7990 goto out_disable;
7991 }
7992 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7993 iounmap(vaddr);
7994
7995 /* Reset the controller with a PCI power-cycle or via doorbell */
7996 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7997
7998 /* -ENOTSUPP here means we cannot reset the controller
7999 * but it's already (and still) up and running in
8000 * "performant mode". Or, it might be 640x, which can't reset
8001 * due to concerns about shared bbwc between 6402/6404 pair.
8002 */
8003 if (rc)
8004 goto out_disable;
8005
8006 /* Now try to get the controller to respond to a no-op */
8007 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
8008 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8009 if (hpsa_noop(pdev) == 0)
8010 break;
8011 else
8012 dev_warn(&pdev->dev, "no-op failed%s\n",
8013 (i < 11 ? "; re-trying" : ""));
8014 }
8015
8016 out_disable:
8017
8018 pci_disable_device(pdev);
8019 return rc;
8020 }
8021
hpsa_free_cmd_pool(struct ctlr_info * h)8022 static void hpsa_free_cmd_pool(struct ctlr_info *h)
8023 {
8024 bitmap_free(h->cmd_pool_bits);
8025 h->cmd_pool_bits = NULL;
8026 if (h->cmd_pool) {
8027 dma_free_coherent(&h->pdev->dev,
8028 h->nr_cmds * sizeof(struct CommandList),
8029 h->cmd_pool,
8030 h->cmd_pool_dhandle);
8031 h->cmd_pool = NULL;
8032 h->cmd_pool_dhandle = 0;
8033 }
8034 if (h->errinfo_pool) {
8035 dma_free_coherent(&h->pdev->dev,
8036 h->nr_cmds * sizeof(struct ErrorInfo),
8037 h->errinfo_pool,
8038 h->errinfo_pool_dhandle);
8039 h->errinfo_pool = NULL;
8040 h->errinfo_pool_dhandle = 0;
8041 }
8042 }
8043
hpsa_alloc_cmd_pool(struct ctlr_info * h)8044 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
8045 {
8046 h->cmd_pool_bits = bitmap_zalloc(h->nr_cmds, GFP_KERNEL);
8047 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
8048 h->nr_cmds * sizeof(*h->cmd_pool),
8049 &h->cmd_pool_dhandle, GFP_KERNEL);
8050 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
8051 h->nr_cmds * sizeof(*h->errinfo_pool),
8052 &h->errinfo_pool_dhandle, GFP_KERNEL);
8053 if ((h->cmd_pool_bits == NULL)
8054 || (h->cmd_pool == NULL)
8055 || (h->errinfo_pool == NULL)) {
8056 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
8057 goto clean_up;
8058 }
8059 hpsa_preinitialize_commands(h);
8060 return 0;
8061 clean_up:
8062 hpsa_free_cmd_pool(h);
8063 return -ENOMEM;
8064 }
8065
8066 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
hpsa_free_irqs(struct ctlr_info * h)8067 static void hpsa_free_irqs(struct ctlr_info *h)
8068 {
8069 int i;
8070 int irq_vector = 0;
8071
8072 if (hpsa_simple_mode)
8073 irq_vector = h->intr_mode;
8074
8075 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8076 /* Single reply queue, only one irq to free */
8077 free_irq(pci_irq_vector(h->pdev, irq_vector),
8078 &h->q[h->intr_mode]);
8079 h->q[h->intr_mode] = 0;
8080 return;
8081 }
8082
8083 for (i = 0; i < h->msix_vectors; i++) {
8084 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8085 h->q[i] = 0;
8086 }
8087 for (; i < MAX_REPLY_QUEUES; i++)
8088 h->q[i] = 0;
8089 }
8090
8091 /* returns 0 on success; cleans up and returns -Enn on error */
hpsa_request_irqs(struct ctlr_info * h,irqreturn_t (* msixhandler)(int,void *),irqreturn_t (* intxhandler)(int,void *))8092 static int hpsa_request_irqs(struct ctlr_info *h,
8093 irqreturn_t (*msixhandler)(int, void *),
8094 irqreturn_t (*intxhandler)(int, void *))
8095 {
8096 int rc, i;
8097 int irq_vector = 0;
8098
8099 if (hpsa_simple_mode)
8100 irq_vector = h->intr_mode;
8101
8102 /*
8103 * initialize h->q[x] = x so that interrupt handlers know which
8104 * queue to process.
8105 */
8106 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8107 h->q[i] = (u8) i;
8108
8109 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8110 /* If performant mode and MSI-X, use multiple reply queues */
8111 for (i = 0; i < h->msix_vectors; i++) {
8112 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8113 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8114 0, h->intrname[i],
8115 &h->q[i]);
8116 if (rc) {
8117 int j;
8118
8119 dev_err(&h->pdev->dev,
8120 "failed to get irq %d for %s\n",
8121 pci_irq_vector(h->pdev, i), h->devname);
8122 for (j = 0; j < i; j++) {
8123 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8124 h->q[j] = 0;
8125 }
8126 for (; j < MAX_REPLY_QUEUES; j++)
8127 h->q[j] = 0;
8128 return rc;
8129 }
8130 }
8131 } else {
8132 /* Use single reply pool */
8133 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8134 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8135 h->msix_vectors ? "x" : "");
8136 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8137 msixhandler, 0,
8138 h->intrname[0],
8139 &h->q[h->intr_mode]);
8140 } else {
8141 sprintf(h->intrname[h->intr_mode],
8142 "%s-intx", h->devname);
8143 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8144 intxhandler, IRQF_SHARED,
8145 h->intrname[0],
8146 &h->q[h->intr_mode]);
8147 }
8148 }
8149 if (rc) {
8150 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8151 pci_irq_vector(h->pdev, irq_vector), h->devname);
8152 hpsa_free_irqs(h);
8153 return -ENODEV;
8154 }
8155 return 0;
8156 }
8157
hpsa_kdump_soft_reset(struct ctlr_info * h)8158 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8159 {
8160 int rc;
8161 hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
8162
8163 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8164 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8165 if (rc) {
8166 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8167 return rc;
8168 }
8169
8170 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8171 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8172 if (rc) {
8173 dev_warn(&h->pdev->dev, "Board failed to become ready "
8174 "after soft reset.\n");
8175 return rc;
8176 }
8177
8178 return 0;
8179 }
8180
hpsa_free_reply_queues(struct ctlr_info * h)8181 static void hpsa_free_reply_queues(struct ctlr_info *h)
8182 {
8183 int i;
8184
8185 for (i = 0; i < h->nreply_queues; i++) {
8186 if (!h->reply_queue[i].head)
8187 continue;
8188 dma_free_coherent(&h->pdev->dev,
8189 h->reply_queue_size,
8190 h->reply_queue[i].head,
8191 h->reply_queue[i].busaddr);
8192 h->reply_queue[i].head = NULL;
8193 h->reply_queue[i].busaddr = 0;
8194 }
8195 h->reply_queue_size = 0;
8196 }
8197
hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info * h)8198 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8199 {
8200 hpsa_free_performant_mode(h); /* init_one 7 */
8201 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8202 hpsa_free_cmd_pool(h); /* init_one 5 */
8203 hpsa_free_irqs(h); /* init_one 4 */
8204 scsi_host_put(h->scsi_host); /* init_one 3 */
8205 h->scsi_host = NULL; /* init_one 3 */
8206 hpsa_free_pci_init(h); /* init_one 2_5 */
8207 free_percpu(h->lockup_detected); /* init_one 2 */
8208 h->lockup_detected = NULL; /* init_one 2 */
8209 if (h->resubmit_wq) {
8210 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8211 h->resubmit_wq = NULL;
8212 }
8213 if (h->rescan_ctlr_wq) {
8214 destroy_workqueue(h->rescan_ctlr_wq);
8215 h->rescan_ctlr_wq = NULL;
8216 }
8217 if (h->monitor_ctlr_wq) {
8218 destroy_workqueue(h->monitor_ctlr_wq);
8219 h->monitor_ctlr_wq = NULL;
8220 }
8221
8222 kfree(h); /* init_one 1 */
8223 }
8224
8225 /* Called when controller lockup detected. */
fail_all_outstanding_cmds(struct ctlr_info * h)8226 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8227 {
8228 int i, refcount;
8229 struct CommandList *c;
8230 int failcount = 0;
8231
8232 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8233 for (i = 0; i < h->nr_cmds; i++) {
8234 c = h->cmd_pool + i;
8235 refcount = atomic_inc_return(&c->refcount);
8236 if (refcount > 1) {
8237 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8238 finish_cmd(c);
8239 atomic_dec(&h->commands_outstanding);
8240 failcount++;
8241 }
8242 cmd_free(h, c);
8243 }
8244 dev_warn(&h->pdev->dev,
8245 "failed %d commands in fail_all\n", failcount);
8246 }
8247
set_lockup_detected_for_all_cpus(struct ctlr_info * h,u32 value)8248 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8249 {
8250 int cpu;
8251
8252 for_each_online_cpu(cpu) {
8253 u32 *lockup_detected;
8254 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8255 *lockup_detected = value;
8256 }
8257 wmb(); /* be sure the per-cpu variables are out to memory */
8258 }
8259
controller_lockup_detected(struct ctlr_info * h)8260 static void controller_lockup_detected(struct ctlr_info *h)
8261 {
8262 unsigned long flags;
8263 u32 lockup_detected;
8264
8265 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8266 spin_lock_irqsave(&h->lock, flags);
8267 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8268 if (!lockup_detected) {
8269 /* no heartbeat, but controller gave us a zero. */
8270 dev_warn(&h->pdev->dev,
8271 "lockup detected after %d but scratchpad register is zero\n",
8272 h->heartbeat_sample_interval / HZ);
8273 lockup_detected = 0xffffffff;
8274 }
8275 set_lockup_detected_for_all_cpus(h, lockup_detected);
8276 spin_unlock_irqrestore(&h->lock, flags);
8277 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8278 lockup_detected, h->heartbeat_sample_interval / HZ);
8279 if (lockup_detected == 0xffff0000) {
8280 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8281 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8282 }
8283 pci_disable_device(h->pdev);
8284 fail_all_outstanding_cmds(h);
8285 }
8286
detect_controller_lockup(struct ctlr_info * h)8287 static int detect_controller_lockup(struct ctlr_info *h)
8288 {
8289 u64 now;
8290 u32 heartbeat;
8291 unsigned long flags;
8292
8293 now = get_jiffies_64();
8294 /* If we've received an interrupt recently, we're ok. */
8295 if (time_after64(h->last_intr_timestamp +
8296 (h->heartbeat_sample_interval), now))
8297 return false;
8298
8299 /*
8300 * If we've already checked the heartbeat recently, we're ok.
8301 * This could happen if someone sends us a signal. We
8302 * otherwise don't care about signals in this thread.
8303 */
8304 if (time_after64(h->last_heartbeat_timestamp +
8305 (h->heartbeat_sample_interval), now))
8306 return false;
8307
8308 /* If heartbeat has not changed since we last looked, we're not ok. */
8309 spin_lock_irqsave(&h->lock, flags);
8310 heartbeat = readl(&h->cfgtable->HeartBeat);
8311 spin_unlock_irqrestore(&h->lock, flags);
8312 if (h->last_heartbeat == heartbeat) {
8313 controller_lockup_detected(h);
8314 return true;
8315 }
8316
8317 /* We're ok. */
8318 h->last_heartbeat = heartbeat;
8319 h->last_heartbeat_timestamp = now;
8320 return false;
8321 }
8322
8323 /*
8324 * Set ioaccel status for all ioaccel volumes.
8325 *
8326 * Called from monitor controller worker (hpsa_event_monitor_worker)
8327 *
8328 * A Volume (or Volumes that comprise an Array set) may be undergoing a
8329 * transformation, so we will be turning off ioaccel for all volumes that
8330 * make up the Array.
8331 */
hpsa_set_ioaccel_status(struct ctlr_info * h)8332 static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8333 {
8334 int rc;
8335 int i;
8336 u8 ioaccel_status;
8337 unsigned char *buf;
8338 struct hpsa_scsi_dev_t *device;
8339
8340 if (!h)
8341 return;
8342
8343 buf = kmalloc(64, GFP_KERNEL);
8344 if (!buf)
8345 return;
8346
8347 /*
8348 * Run through current device list used during I/O requests.
8349 */
8350 for (i = 0; i < h->ndevices; i++) {
8351 int offload_to_be_enabled = 0;
8352 int offload_config = 0;
8353
8354 device = h->dev[i];
8355
8356 if (!device)
8357 continue;
8358 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8359 HPSA_VPD_LV_IOACCEL_STATUS))
8360 continue;
8361
8362 memset(buf, 0, 64);
8363
8364 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8365 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8366 buf, 64);
8367 if (rc != 0)
8368 continue;
8369
8370 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8371
8372 /*
8373 * Check if offload is still configured on
8374 */
8375 offload_config =
8376 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8377 /*
8378 * If offload is configured on, check to see if ioaccel
8379 * needs to be enabled.
8380 */
8381 if (offload_config)
8382 offload_to_be_enabled =
8383 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8384
8385 /*
8386 * If ioaccel is to be re-enabled, re-enable later during the
8387 * scan operation so the driver can get a fresh raidmap
8388 * before turning ioaccel back on.
8389 */
8390 if (offload_to_be_enabled)
8391 continue;
8392
8393 /*
8394 * Immediately turn off ioaccel for any volume the
8395 * controller tells us to. Some of the reasons could be:
8396 * transformation - change to the LVs of an Array.
8397 * degraded volume - component failure
8398 */
8399 hpsa_turn_off_ioaccel_for_device(device);
8400 }
8401
8402 kfree(buf);
8403 }
8404
hpsa_ack_ctlr_events(struct ctlr_info * h)8405 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8406 {
8407 char *event_type;
8408
8409 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8410 return;
8411
8412 /* Ask the controller to clear the events we're handling. */
8413 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8414 | CFGTBL_Trans_io_accel2)) &&
8415 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8416 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8417
8418 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8419 event_type = "state change";
8420 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8421 event_type = "configuration change";
8422 /* Stop sending new RAID offload reqs via the IO accelerator */
8423 scsi_block_requests(h->scsi_host);
8424 hpsa_set_ioaccel_status(h);
8425 hpsa_drain_accel_commands(h);
8426 /* Set 'accelerator path config change' bit */
8427 dev_warn(&h->pdev->dev,
8428 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8429 h->events, event_type);
8430 writel(h->events, &(h->cfgtable->clear_event_notify));
8431 /* Set the "clear event notify field update" bit 6 */
8432 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8433 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8434 hpsa_wait_for_clear_event_notify_ack(h);
8435 scsi_unblock_requests(h->scsi_host);
8436 } else {
8437 /* Acknowledge controller notification events. */
8438 writel(h->events, &(h->cfgtable->clear_event_notify));
8439 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8440 hpsa_wait_for_clear_event_notify_ack(h);
8441 }
8442 return;
8443 }
8444
8445 /* Check a register on the controller to see if there are configuration
8446 * changes (added/changed/removed logical drives, etc.) which mean that
8447 * we should rescan the controller for devices.
8448 * Also check flag for driver-initiated rescan.
8449 */
hpsa_ctlr_needs_rescan(struct ctlr_info * h)8450 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8451 {
8452 if (h->drv_req_rescan) {
8453 h->drv_req_rescan = 0;
8454 return 1;
8455 }
8456
8457 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8458 return 0;
8459
8460 h->events = readl(&(h->cfgtable->event_notify));
8461 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8462 }
8463
8464 /*
8465 * Check if any of the offline devices have become ready
8466 */
hpsa_offline_devices_ready(struct ctlr_info * h)8467 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8468 {
8469 unsigned long flags;
8470 struct offline_device_entry *d;
8471 struct list_head *this, *tmp;
8472
8473 spin_lock_irqsave(&h->offline_device_lock, flags);
8474 list_for_each_safe(this, tmp, &h->offline_device_list) {
8475 d = list_entry(this, struct offline_device_entry,
8476 offline_list);
8477 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8478 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8479 spin_lock_irqsave(&h->offline_device_lock, flags);
8480 list_del(&d->offline_list);
8481 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8482 return 1;
8483 }
8484 spin_lock_irqsave(&h->offline_device_lock, flags);
8485 }
8486 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8487 return 0;
8488 }
8489
hpsa_luns_changed(struct ctlr_info * h)8490 static int hpsa_luns_changed(struct ctlr_info *h)
8491 {
8492 int rc = 1; /* assume there are changes */
8493 struct ReportLUNdata *logdev = NULL;
8494
8495 /* if we can't find out if lun data has changed,
8496 * assume that it has.
8497 */
8498
8499 if (!h->lastlogicals)
8500 return rc;
8501
8502 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8503 if (!logdev)
8504 return rc;
8505
8506 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8507 dev_warn(&h->pdev->dev,
8508 "report luns failed, can't track lun changes.\n");
8509 goto out;
8510 }
8511 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8512 dev_info(&h->pdev->dev,
8513 "Lun changes detected.\n");
8514 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8515 goto out;
8516 } else
8517 rc = 0; /* no changes detected. */
8518 out:
8519 kfree(logdev);
8520 return rc;
8521 }
8522
hpsa_perform_rescan(struct ctlr_info * h)8523 static void hpsa_perform_rescan(struct ctlr_info *h)
8524 {
8525 struct Scsi_Host *sh = NULL;
8526 unsigned long flags;
8527
8528 /*
8529 * Do the scan after the reset
8530 */
8531 spin_lock_irqsave(&h->reset_lock, flags);
8532 if (h->reset_in_progress) {
8533 h->drv_req_rescan = 1;
8534 spin_unlock_irqrestore(&h->reset_lock, flags);
8535 return;
8536 }
8537 spin_unlock_irqrestore(&h->reset_lock, flags);
8538
8539 sh = scsi_host_get(h->scsi_host);
8540 if (sh != NULL) {
8541 hpsa_scan_start(sh);
8542 scsi_host_put(sh);
8543 h->drv_req_rescan = 0;
8544 }
8545 }
8546
8547 /*
8548 * watch for controller events
8549 */
hpsa_event_monitor_worker(struct work_struct * work)8550 static void hpsa_event_monitor_worker(struct work_struct *work)
8551 {
8552 struct ctlr_info *h = container_of(to_delayed_work(work),
8553 struct ctlr_info, event_monitor_work);
8554 unsigned long flags;
8555
8556 spin_lock_irqsave(&h->lock, flags);
8557 if (h->remove_in_progress) {
8558 spin_unlock_irqrestore(&h->lock, flags);
8559 return;
8560 }
8561 spin_unlock_irqrestore(&h->lock, flags);
8562
8563 if (hpsa_ctlr_needs_rescan(h)) {
8564 hpsa_ack_ctlr_events(h);
8565 hpsa_perform_rescan(h);
8566 }
8567
8568 spin_lock_irqsave(&h->lock, flags);
8569 if (!h->remove_in_progress)
8570 queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
8571 HPSA_EVENT_MONITOR_INTERVAL);
8572 spin_unlock_irqrestore(&h->lock, flags);
8573 }
8574
hpsa_rescan_ctlr_worker(struct work_struct * work)8575 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8576 {
8577 unsigned long flags;
8578 struct ctlr_info *h = container_of(to_delayed_work(work),
8579 struct ctlr_info, rescan_ctlr_work);
8580
8581 spin_lock_irqsave(&h->lock, flags);
8582 if (h->remove_in_progress) {
8583 spin_unlock_irqrestore(&h->lock, flags);
8584 return;
8585 }
8586 spin_unlock_irqrestore(&h->lock, flags);
8587
8588 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8589 hpsa_perform_rescan(h);
8590 } else if (h->discovery_polling) {
8591 if (hpsa_luns_changed(h)) {
8592 dev_info(&h->pdev->dev,
8593 "driver discovery polling rescan.\n");
8594 hpsa_perform_rescan(h);
8595 }
8596 }
8597 spin_lock_irqsave(&h->lock, flags);
8598 if (!h->remove_in_progress)
8599 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8600 h->heartbeat_sample_interval);
8601 spin_unlock_irqrestore(&h->lock, flags);
8602 }
8603
hpsa_monitor_ctlr_worker(struct work_struct * work)8604 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8605 {
8606 unsigned long flags;
8607 struct ctlr_info *h = container_of(to_delayed_work(work),
8608 struct ctlr_info, monitor_ctlr_work);
8609
8610 detect_controller_lockup(h);
8611 if (lockup_detected(h))
8612 return;
8613
8614 spin_lock_irqsave(&h->lock, flags);
8615 if (!h->remove_in_progress)
8616 queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
8617 h->heartbeat_sample_interval);
8618 spin_unlock_irqrestore(&h->lock, flags);
8619 }
8620
hpsa_create_controller_wq(struct ctlr_info * h,char * name)8621 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8622 char *name)
8623 {
8624 struct workqueue_struct *wq = NULL;
8625
8626 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8627 if (!wq)
8628 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8629
8630 return wq;
8631 }
8632
hpda_free_ctlr_info(struct ctlr_info * h)8633 static void hpda_free_ctlr_info(struct ctlr_info *h)
8634 {
8635 kfree(h->reply_map);
8636 kfree(h);
8637 }
8638
hpda_alloc_ctlr_info(void)8639 static struct ctlr_info *hpda_alloc_ctlr_info(void)
8640 {
8641 struct ctlr_info *h;
8642
8643 h = kzalloc(sizeof(*h), GFP_KERNEL);
8644 if (!h)
8645 return NULL;
8646
8647 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
8648 if (!h->reply_map) {
8649 kfree(h);
8650 return NULL;
8651 }
8652 return h;
8653 }
8654
hpsa_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)8655 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8656 {
8657 int rc;
8658 struct ctlr_info *h;
8659 int try_soft_reset = 0;
8660 unsigned long flags;
8661 u32 board_id;
8662
8663 if (number_of_controllers == 0)
8664 printk(KERN_INFO DRIVER_NAME "\n");
8665
8666 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8667 if (rc < 0) {
8668 dev_warn(&pdev->dev, "Board ID not found\n");
8669 return rc;
8670 }
8671
8672 rc = hpsa_init_reset_devices(pdev, board_id);
8673 if (rc) {
8674 if (rc != -ENOTSUPP)
8675 return rc;
8676 /* If the reset fails in a particular way (it has no way to do
8677 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8678 * a soft reset once we get the controller configured up to the
8679 * point that it can accept a command.
8680 */
8681 try_soft_reset = 1;
8682 rc = 0;
8683 }
8684
8685 reinit_after_soft_reset:
8686
8687 /* Command structures must be aligned on a 32-byte boundary because
8688 * the 5 lower bits of the address are used by the hardware. and by
8689 * the driver. See comments in hpsa.h for more info.
8690 */
8691 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8692 h = hpda_alloc_ctlr_info();
8693 if (!h) {
8694 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8695 return -ENOMEM;
8696 }
8697
8698 h->pdev = pdev;
8699
8700 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8701 INIT_LIST_HEAD(&h->offline_device_list);
8702 spin_lock_init(&h->lock);
8703 spin_lock_init(&h->offline_device_lock);
8704 spin_lock_init(&h->scan_lock);
8705 spin_lock_init(&h->reset_lock);
8706 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8707
8708 /* Allocate and clear per-cpu variable lockup_detected */
8709 h->lockup_detected = alloc_percpu(u32);
8710 if (!h->lockup_detected) {
8711 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8712 rc = -ENOMEM;
8713 goto clean1; /* aer/h */
8714 }
8715 set_lockup_detected_for_all_cpus(h, 0);
8716
8717 rc = hpsa_pci_init(h);
8718 if (rc)
8719 goto clean2; /* lu, aer/h */
8720
8721 /* relies on h-> settings made by hpsa_pci_init, including
8722 * interrupt_mode h->intr */
8723 rc = hpsa_scsi_host_alloc(h);
8724 if (rc)
8725 goto clean2_5; /* pci, lu, aer/h */
8726
8727 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8728 h->ctlr = number_of_controllers;
8729 number_of_controllers++;
8730
8731 /* configure PCI DMA stuff */
8732 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8733 if (rc != 0) {
8734 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8735 if (rc != 0) {
8736 dev_err(&pdev->dev, "no suitable DMA available\n");
8737 goto clean3; /* shost, pci, lu, aer/h */
8738 }
8739 }
8740
8741 /* make sure the board interrupts are off */
8742 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8743
8744 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8745 if (rc)
8746 goto clean3; /* shost, pci, lu, aer/h */
8747 rc = hpsa_alloc_cmd_pool(h);
8748 if (rc)
8749 goto clean4; /* irq, shost, pci, lu, aer/h */
8750 rc = hpsa_alloc_sg_chain_blocks(h);
8751 if (rc)
8752 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8753 init_waitqueue_head(&h->scan_wait_queue);
8754 init_waitqueue_head(&h->event_sync_wait_queue);
8755 mutex_init(&h->reset_mutex);
8756 h->scan_finished = 1; /* no scan currently in progress */
8757 h->scan_waiting = 0;
8758
8759 pci_set_drvdata(pdev, h);
8760 h->ndevices = 0;
8761
8762 spin_lock_init(&h->devlock);
8763 rc = hpsa_put_ctlr_into_performant_mode(h);
8764 if (rc)
8765 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8766
8767 /* create the resubmit workqueue */
8768 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8769 if (!h->rescan_ctlr_wq) {
8770 rc = -ENOMEM;
8771 goto clean7;
8772 }
8773
8774 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8775 if (!h->resubmit_wq) {
8776 rc = -ENOMEM;
8777 goto clean7; /* aer/h */
8778 }
8779
8780 h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
8781 if (!h->monitor_ctlr_wq) {
8782 rc = -ENOMEM;
8783 goto clean7;
8784 }
8785
8786 /*
8787 * At this point, the controller is ready to take commands.
8788 * Now, if reset_devices and the hard reset didn't work, try
8789 * the soft reset and see if that works.
8790 */
8791 if (try_soft_reset) {
8792
8793 /* This is kind of gross. We may or may not get a completion
8794 * from the soft reset command, and if we do, then the value
8795 * from the fifo may or may not be valid. So, we wait 10 secs
8796 * after the reset throwing away any completions we get during
8797 * that time. Unregister the interrupt handler and register
8798 * fake ones to scoop up any residual completions.
8799 */
8800 spin_lock_irqsave(&h->lock, flags);
8801 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8802 spin_unlock_irqrestore(&h->lock, flags);
8803 hpsa_free_irqs(h);
8804 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8805 hpsa_intx_discard_completions);
8806 if (rc) {
8807 dev_warn(&h->pdev->dev,
8808 "Failed to request_irq after soft reset.\n");
8809 /*
8810 * cannot goto clean7 or free_irqs will be called
8811 * again. Instead, do its work
8812 */
8813 hpsa_free_performant_mode(h); /* clean7 */
8814 hpsa_free_sg_chain_blocks(h); /* clean6 */
8815 hpsa_free_cmd_pool(h); /* clean5 */
8816 /*
8817 * skip hpsa_free_irqs(h) clean4 since that
8818 * was just called before request_irqs failed
8819 */
8820 goto clean3;
8821 }
8822
8823 rc = hpsa_kdump_soft_reset(h);
8824 if (rc)
8825 /* Neither hard nor soft reset worked, we're hosed. */
8826 goto clean7;
8827
8828 dev_info(&h->pdev->dev, "Board READY.\n");
8829 dev_info(&h->pdev->dev,
8830 "Waiting for stale completions to drain.\n");
8831 h->access.set_intr_mask(h, HPSA_INTR_ON);
8832 msleep(10000);
8833 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8834
8835 rc = controller_reset_failed(h->cfgtable);
8836 if (rc)
8837 dev_info(&h->pdev->dev,
8838 "Soft reset appears to have failed.\n");
8839
8840 /* since the controller's reset, we have to go back and re-init
8841 * everything. Easiest to just forget what we've done and do it
8842 * all over again.
8843 */
8844 hpsa_undo_allocations_after_kdump_soft_reset(h);
8845 try_soft_reset = 0;
8846 if (rc)
8847 /* don't goto clean, we already unallocated */
8848 return -ENODEV;
8849
8850 goto reinit_after_soft_reset;
8851 }
8852
8853 /* Enable Accelerated IO path at driver layer */
8854 h->acciopath_status = 1;
8855 /* Disable discovery polling.*/
8856 h->discovery_polling = 0;
8857
8858
8859 /* Turn the interrupts on so we can service requests */
8860 h->access.set_intr_mask(h, HPSA_INTR_ON);
8861
8862 hpsa_hba_inquiry(h);
8863
8864 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8865 if (!h->lastlogicals)
8866 dev_info(&h->pdev->dev,
8867 "Can't track change to report lun data\n");
8868
8869 /* hook into SCSI subsystem */
8870 rc = hpsa_scsi_add_host(h);
8871 if (rc)
8872 goto clean8; /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8873
8874 /* Monitor the controller for firmware lockups */
8875 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8876 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8877 schedule_delayed_work(&h->monitor_ctlr_work,
8878 h->heartbeat_sample_interval);
8879 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8880 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8881 h->heartbeat_sample_interval);
8882 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8883 schedule_delayed_work(&h->event_monitor_work,
8884 HPSA_EVENT_MONITOR_INTERVAL);
8885 return 0;
8886
8887 clean8: /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8888 kfree(h->lastlogicals);
8889 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8890 hpsa_free_performant_mode(h);
8891 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8892 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8893 hpsa_free_sg_chain_blocks(h);
8894 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8895 hpsa_free_cmd_pool(h);
8896 clean4: /* irq, shost, pci, lu, aer/h */
8897 hpsa_free_irqs(h);
8898 clean3: /* shost, pci, lu, aer/h */
8899 scsi_host_put(h->scsi_host);
8900 h->scsi_host = NULL;
8901 clean2_5: /* pci, lu, aer/h */
8902 hpsa_free_pci_init(h);
8903 clean2: /* lu, aer/h */
8904 if (h->lockup_detected) {
8905 free_percpu(h->lockup_detected);
8906 h->lockup_detected = NULL;
8907 }
8908 clean1: /* wq/aer/h */
8909 if (h->resubmit_wq) {
8910 destroy_workqueue(h->resubmit_wq);
8911 h->resubmit_wq = NULL;
8912 }
8913 if (h->rescan_ctlr_wq) {
8914 destroy_workqueue(h->rescan_ctlr_wq);
8915 h->rescan_ctlr_wq = NULL;
8916 }
8917 if (h->monitor_ctlr_wq) {
8918 destroy_workqueue(h->monitor_ctlr_wq);
8919 h->monitor_ctlr_wq = NULL;
8920 }
8921 hpda_free_ctlr_info(h);
8922 return rc;
8923 }
8924
hpsa_flush_cache(struct ctlr_info * h)8925 static void hpsa_flush_cache(struct ctlr_info *h)
8926 {
8927 char *flush_buf;
8928 struct CommandList *c;
8929 int rc;
8930
8931 if (unlikely(lockup_detected(h)))
8932 return;
8933 flush_buf = kzalloc(4, GFP_KERNEL);
8934 if (!flush_buf)
8935 return;
8936
8937 c = cmd_alloc(h);
8938
8939 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8940 RAID_CTLR_LUNID, TYPE_CMD)) {
8941 goto out;
8942 }
8943 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8944 DEFAULT_TIMEOUT);
8945 if (rc)
8946 goto out;
8947 if (c->err_info->CommandStatus != 0)
8948 out:
8949 dev_warn(&h->pdev->dev,
8950 "error flushing cache on controller\n");
8951 cmd_free(h, c);
8952 kfree(flush_buf);
8953 }
8954
8955 /* Make controller gather fresh report lun data each time we
8956 * send down a report luns request
8957 */
hpsa_disable_rld_caching(struct ctlr_info * h)8958 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8959 {
8960 u32 *options;
8961 struct CommandList *c;
8962 int rc;
8963
8964 /* Don't bother trying to set diag options if locked up */
8965 if (unlikely(h->lockup_detected))
8966 return;
8967
8968 options = kzalloc(sizeof(*options), GFP_KERNEL);
8969 if (!options)
8970 return;
8971
8972 c = cmd_alloc(h);
8973
8974 /* first, get the current diag options settings */
8975 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8976 RAID_CTLR_LUNID, TYPE_CMD))
8977 goto errout;
8978
8979 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8980 NO_TIMEOUT);
8981 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8982 goto errout;
8983
8984 /* Now, set the bit for disabling the RLD caching */
8985 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8986
8987 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8988 RAID_CTLR_LUNID, TYPE_CMD))
8989 goto errout;
8990
8991 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8992 NO_TIMEOUT);
8993 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8994 goto errout;
8995
8996 /* Now verify that it got set: */
8997 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8998 RAID_CTLR_LUNID, TYPE_CMD))
8999 goto errout;
9000
9001 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
9002 NO_TIMEOUT);
9003 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9004 goto errout;
9005
9006 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
9007 goto out;
9008
9009 errout:
9010 dev_err(&h->pdev->dev,
9011 "Error: failed to disable report lun data caching.\n");
9012 out:
9013 cmd_free(h, c);
9014 kfree(options);
9015 }
9016
__hpsa_shutdown(struct pci_dev * pdev)9017 static void __hpsa_shutdown(struct pci_dev *pdev)
9018 {
9019 struct ctlr_info *h;
9020
9021 h = pci_get_drvdata(pdev);
9022 /* Turn board interrupts off and send the flush cache command
9023 * sendcmd will turn off interrupt, and send the flush...
9024 * To write all data in the battery backed cache to disks
9025 */
9026 hpsa_flush_cache(h);
9027 h->access.set_intr_mask(h, HPSA_INTR_OFF);
9028 hpsa_free_irqs(h); /* init_one 4 */
9029 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
9030 }
9031
hpsa_shutdown(struct pci_dev * pdev)9032 static void hpsa_shutdown(struct pci_dev *pdev)
9033 {
9034 __hpsa_shutdown(pdev);
9035 pci_disable_device(pdev);
9036 }
9037
hpsa_free_device_info(struct ctlr_info * h)9038 static void hpsa_free_device_info(struct ctlr_info *h)
9039 {
9040 int i;
9041
9042 for (i = 0; i < h->ndevices; i++) {
9043 kfree(h->dev[i]);
9044 h->dev[i] = NULL;
9045 }
9046 }
9047
hpsa_remove_one(struct pci_dev * pdev)9048 static void hpsa_remove_one(struct pci_dev *pdev)
9049 {
9050 struct ctlr_info *h;
9051 unsigned long flags;
9052
9053 if (pci_get_drvdata(pdev) == NULL) {
9054 dev_err(&pdev->dev, "unable to remove device\n");
9055 return;
9056 }
9057 h = pci_get_drvdata(pdev);
9058
9059 /* Get rid of any controller monitoring work items */
9060 spin_lock_irqsave(&h->lock, flags);
9061 h->remove_in_progress = 1;
9062 spin_unlock_irqrestore(&h->lock, flags);
9063 cancel_delayed_work_sync(&h->monitor_ctlr_work);
9064 cancel_delayed_work_sync(&h->rescan_ctlr_work);
9065 cancel_delayed_work_sync(&h->event_monitor_work);
9066 destroy_workqueue(h->rescan_ctlr_wq);
9067 destroy_workqueue(h->resubmit_wq);
9068 destroy_workqueue(h->monitor_ctlr_wq);
9069
9070 hpsa_delete_sas_host(h);
9071
9072 /*
9073 * Call before disabling interrupts.
9074 * scsi_remove_host can trigger I/O operations especially
9075 * when multipath is enabled. There can be SYNCHRONIZE CACHE
9076 * operations which cannot complete and will hang the system.
9077 */
9078 if (h->scsi_host)
9079 scsi_remove_host(h->scsi_host); /* init_one 8 */
9080 /* includes hpsa_free_irqs - init_one 4 */
9081 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9082 __hpsa_shutdown(pdev);
9083
9084 hpsa_free_device_info(h); /* scan */
9085
9086 kfree(h->hba_inquiry_data); /* init_one 10 */
9087 h->hba_inquiry_data = NULL; /* init_one 10 */
9088 hpsa_free_ioaccel2_sg_chain_blocks(h);
9089 hpsa_free_performant_mode(h); /* init_one 7 */
9090 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
9091 hpsa_free_cmd_pool(h); /* init_one 5 */
9092 kfree(h->lastlogicals);
9093
9094 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9095
9096 scsi_host_put(h->scsi_host); /* init_one 3 */
9097 h->scsi_host = NULL; /* init_one 3 */
9098
9099 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9100 hpsa_free_pci_init(h); /* init_one 2.5 */
9101
9102 free_percpu(h->lockup_detected); /* init_one 2 */
9103 h->lockup_detected = NULL; /* init_one 2 */
9104
9105 hpda_free_ctlr_info(h); /* init_one 1 */
9106 }
9107
hpsa_suspend(struct device * dev)9108 static int __maybe_unused hpsa_suspend(
9109 __attribute__((unused)) struct device *dev)
9110 {
9111 return -ENOSYS;
9112 }
9113
hpsa_resume(struct device * dev)9114 static int __maybe_unused hpsa_resume
9115 (__attribute__((unused)) struct device *dev)
9116 {
9117 return -ENOSYS;
9118 }
9119
9120 static SIMPLE_DEV_PM_OPS(hpsa_pm_ops, hpsa_suspend, hpsa_resume);
9121
9122 static struct pci_driver hpsa_pci_driver = {
9123 .name = HPSA,
9124 .probe = hpsa_init_one,
9125 .remove = hpsa_remove_one,
9126 .id_table = hpsa_pci_device_id, /* id_table */
9127 .shutdown = hpsa_shutdown,
9128 .driver.pm = &hpsa_pm_ops,
9129 };
9130
9131 /* Fill in bucket_map[], given nsgs (the max number of
9132 * scatter gather elements supported) and bucket[],
9133 * which is an array of 8 integers. The bucket[] array
9134 * contains 8 different DMA transfer sizes (in 16
9135 * byte increments) which the controller uses to fetch
9136 * commands. This function fills in bucket_map[], which
9137 * maps a given number of scatter gather elements to one of
9138 * the 8 DMA transfer sizes. The point of it is to allow the
9139 * controller to only do as much DMA as needed to fetch the
9140 * command, with the DMA transfer size encoded in the lower
9141 * bits of the command address.
9142 */
calc_bucket_map(int bucket[],int num_buckets,int nsgs,int min_blocks,u32 * bucket_map)9143 static void calc_bucket_map(int bucket[], int num_buckets,
9144 int nsgs, int min_blocks, u32 *bucket_map)
9145 {
9146 int i, j, b, size;
9147
9148 /* Note, bucket_map must have nsgs+1 entries. */
9149 for (i = 0; i <= nsgs; i++) {
9150 /* Compute size of a command with i SG entries */
9151 size = i + min_blocks;
9152 b = num_buckets; /* Assume the biggest bucket */
9153 /* Find the bucket that is just big enough */
9154 for (j = 0; j < num_buckets; j++) {
9155 if (bucket[j] >= size) {
9156 b = j;
9157 break;
9158 }
9159 }
9160 /* for a command with i SG entries, use bucket b. */
9161 bucket_map[i] = b;
9162 }
9163 }
9164
9165 /*
9166 * return -ENODEV on err, 0 on success (or no action)
9167 * allocates numerous items that must be freed later
9168 */
hpsa_enter_performant_mode(struct ctlr_info * h,u32 trans_support)9169 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9170 {
9171 int i;
9172 unsigned long register_value;
9173 unsigned long transMethod = CFGTBL_Trans_Performant |
9174 (trans_support & CFGTBL_Trans_use_short_tags) |
9175 CFGTBL_Trans_enable_directed_msix |
9176 (trans_support & (CFGTBL_Trans_io_accel1 |
9177 CFGTBL_Trans_io_accel2));
9178 struct access_method access = SA5_performant_access;
9179
9180 /* This is a bit complicated. There are 8 registers on
9181 * the controller which we write to to tell it 8 different
9182 * sizes of commands which there may be. It's a way of
9183 * reducing the DMA done to fetch each command. Encoded into
9184 * each command's tag are 3 bits which communicate to the controller
9185 * which of the eight sizes that command fits within. The size of
9186 * each command depends on how many scatter gather entries there are.
9187 * Each SG entry requires 16 bytes. The eight registers are programmed
9188 * with the number of 16-byte blocks a command of that size requires.
9189 * The smallest command possible requires 5 such 16 byte blocks.
9190 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9191 * blocks. Note, this only extends to the SG entries contained
9192 * within the command block, and does not extend to chained blocks
9193 * of SG elements. bft[] contains the eight values we write to
9194 * the registers. They are not evenly distributed, but have more
9195 * sizes for small commands, and fewer sizes for larger commands.
9196 */
9197 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9198 #define MIN_IOACCEL2_BFT_ENTRY 5
9199 #define HPSA_IOACCEL2_HEADER_SZ 4
9200 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9201 13, 14, 15, 16, 17, 18, 19,
9202 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9203 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9204 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9205 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9206 16 * MIN_IOACCEL2_BFT_ENTRY);
9207 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9208 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9209 /* 5 = 1 s/g entry or 4k
9210 * 6 = 2 s/g entry or 8k
9211 * 8 = 4 s/g entry or 16k
9212 * 10 = 6 s/g entry or 24k
9213 */
9214
9215 /* If the controller supports either ioaccel method then
9216 * we can also use the RAID stack submit path that does not
9217 * perform the superfluous readl() after each command submission.
9218 */
9219 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9220 access = SA5_performant_access_no_read;
9221
9222 /* Controller spec: zero out this buffer. */
9223 for (i = 0; i < h->nreply_queues; i++)
9224 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9225
9226 bft[7] = SG_ENTRIES_IN_CMD + 4;
9227 calc_bucket_map(bft, ARRAY_SIZE(bft),
9228 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9229 for (i = 0; i < 8; i++)
9230 writel(bft[i], &h->transtable->BlockFetch[i]);
9231
9232 /* size of controller ring buffer */
9233 writel(h->max_commands, &h->transtable->RepQSize);
9234 writel(h->nreply_queues, &h->transtable->RepQCount);
9235 writel(0, &h->transtable->RepQCtrAddrLow32);
9236 writel(0, &h->transtable->RepQCtrAddrHigh32);
9237
9238 for (i = 0; i < h->nreply_queues; i++) {
9239 writel(0, &h->transtable->RepQAddr[i].upper);
9240 writel(h->reply_queue[i].busaddr,
9241 &h->transtable->RepQAddr[i].lower);
9242 }
9243
9244 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9245 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9246 /*
9247 * enable outbound interrupt coalescing in accelerator mode;
9248 */
9249 if (trans_support & CFGTBL_Trans_io_accel1) {
9250 access = SA5_ioaccel_mode1_access;
9251 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9252 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9253 } else
9254 if (trans_support & CFGTBL_Trans_io_accel2)
9255 access = SA5_ioaccel_mode2_access;
9256 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9257 if (hpsa_wait_for_mode_change_ack(h)) {
9258 dev_err(&h->pdev->dev,
9259 "performant mode problem - doorbell timeout\n");
9260 return -ENODEV;
9261 }
9262 register_value = readl(&(h->cfgtable->TransportActive));
9263 if (!(register_value & CFGTBL_Trans_Performant)) {
9264 dev_err(&h->pdev->dev,
9265 "performant mode problem - transport not active\n");
9266 return -ENODEV;
9267 }
9268 /* Change the access methods to the performant access methods */
9269 h->access = access;
9270 h->transMethod = transMethod;
9271
9272 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9273 (trans_support & CFGTBL_Trans_io_accel2)))
9274 return 0;
9275
9276 if (trans_support & CFGTBL_Trans_io_accel1) {
9277 /* Set up I/O accelerator mode */
9278 for (i = 0; i < h->nreply_queues; i++) {
9279 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9280 h->reply_queue[i].current_entry =
9281 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9282 }
9283 bft[7] = h->ioaccel_maxsg + 8;
9284 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9285 h->ioaccel1_blockFetchTable);
9286
9287 /* initialize all reply queue entries to unused */
9288 for (i = 0; i < h->nreply_queues; i++)
9289 memset(h->reply_queue[i].head,
9290 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9291 h->reply_queue_size);
9292
9293 /* set all the constant fields in the accelerator command
9294 * frames once at init time to save CPU cycles later.
9295 */
9296 for (i = 0; i < h->nr_cmds; i++) {
9297 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9298
9299 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9300 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9301 (i * sizeof(struct ErrorInfo)));
9302 cp->err_info_len = sizeof(struct ErrorInfo);
9303 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9304 cp->host_context_flags =
9305 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9306 cp->timeout_sec = 0;
9307 cp->ReplyQueue = 0;
9308 cp->tag =
9309 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9310 cp->host_addr =
9311 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9312 (i * sizeof(struct io_accel1_cmd)));
9313 }
9314 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9315 u64 cfg_offset, cfg_base_addr_index;
9316 u32 bft2_offset, cfg_base_addr;
9317
9318 hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9319 &cfg_base_addr_index, &cfg_offset);
9320 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9321 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9322 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9323 4, h->ioaccel2_blockFetchTable);
9324 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9325 BUILD_BUG_ON(offsetof(struct CfgTable,
9326 io_accel_request_size_offset) != 0xb8);
9327 h->ioaccel2_bft2_regs =
9328 remap_pci_mem(pci_resource_start(h->pdev,
9329 cfg_base_addr_index) +
9330 cfg_offset + bft2_offset,
9331 ARRAY_SIZE(bft2) *
9332 sizeof(*h->ioaccel2_bft2_regs));
9333 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9334 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9335 }
9336 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9337 if (hpsa_wait_for_mode_change_ack(h)) {
9338 dev_err(&h->pdev->dev,
9339 "performant mode problem - enabling ioaccel mode\n");
9340 return -ENODEV;
9341 }
9342 return 0;
9343 }
9344
9345 /* Free ioaccel1 mode command blocks and block fetch table */
hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info * h)9346 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9347 {
9348 if (h->ioaccel_cmd_pool) {
9349 dma_free_coherent(&h->pdev->dev,
9350 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9351 h->ioaccel_cmd_pool,
9352 h->ioaccel_cmd_pool_dhandle);
9353 h->ioaccel_cmd_pool = NULL;
9354 h->ioaccel_cmd_pool_dhandle = 0;
9355 }
9356 kfree(h->ioaccel1_blockFetchTable);
9357 h->ioaccel1_blockFetchTable = NULL;
9358 }
9359
9360 /* Allocate ioaccel1 mode command blocks and block fetch table */
hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info * h)9361 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9362 {
9363 h->ioaccel_maxsg =
9364 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9365 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9366 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9367
9368 /* Command structures must be aligned on a 128-byte boundary
9369 * because the 7 lower bits of the address are used by the
9370 * hardware.
9371 */
9372 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9373 IOACCEL1_COMMANDLIST_ALIGNMENT);
9374 h->ioaccel_cmd_pool =
9375 dma_alloc_coherent(&h->pdev->dev,
9376 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9377 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9378
9379 h->ioaccel1_blockFetchTable =
9380 kmalloc(((h->ioaccel_maxsg + 1) *
9381 sizeof(u32)), GFP_KERNEL);
9382
9383 if ((h->ioaccel_cmd_pool == NULL) ||
9384 (h->ioaccel1_blockFetchTable == NULL))
9385 goto clean_up;
9386
9387 memset(h->ioaccel_cmd_pool, 0,
9388 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9389 return 0;
9390
9391 clean_up:
9392 hpsa_free_ioaccel1_cmd_and_bft(h);
9393 return -ENOMEM;
9394 }
9395
9396 /* Free ioaccel2 mode command blocks and block fetch table */
hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info * h)9397 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9398 {
9399 hpsa_free_ioaccel2_sg_chain_blocks(h);
9400
9401 if (h->ioaccel2_cmd_pool) {
9402 dma_free_coherent(&h->pdev->dev,
9403 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9404 h->ioaccel2_cmd_pool,
9405 h->ioaccel2_cmd_pool_dhandle);
9406 h->ioaccel2_cmd_pool = NULL;
9407 h->ioaccel2_cmd_pool_dhandle = 0;
9408 }
9409 kfree(h->ioaccel2_blockFetchTable);
9410 h->ioaccel2_blockFetchTable = NULL;
9411 }
9412
9413 /* Allocate ioaccel2 mode command blocks and block fetch table */
hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info * h)9414 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9415 {
9416 int rc;
9417
9418 /* Allocate ioaccel2 mode command blocks and block fetch table */
9419
9420 h->ioaccel_maxsg =
9421 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9422 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9423 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9424
9425 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9426 IOACCEL2_COMMANDLIST_ALIGNMENT);
9427 h->ioaccel2_cmd_pool =
9428 dma_alloc_coherent(&h->pdev->dev,
9429 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9430 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9431
9432 h->ioaccel2_blockFetchTable =
9433 kmalloc(((h->ioaccel_maxsg + 1) *
9434 sizeof(u32)), GFP_KERNEL);
9435
9436 if ((h->ioaccel2_cmd_pool == NULL) ||
9437 (h->ioaccel2_blockFetchTable == NULL)) {
9438 rc = -ENOMEM;
9439 goto clean_up;
9440 }
9441
9442 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9443 if (rc)
9444 goto clean_up;
9445
9446 memset(h->ioaccel2_cmd_pool, 0,
9447 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9448 return 0;
9449
9450 clean_up:
9451 hpsa_free_ioaccel2_cmd_and_bft(h);
9452 return rc;
9453 }
9454
9455 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
hpsa_free_performant_mode(struct ctlr_info * h)9456 static void hpsa_free_performant_mode(struct ctlr_info *h)
9457 {
9458 kfree(h->blockFetchTable);
9459 h->blockFetchTable = NULL;
9460 hpsa_free_reply_queues(h);
9461 hpsa_free_ioaccel1_cmd_and_bft(h);
9462 hpsa_free_ioaccel2_cmd_and_bft(h);
9463 }
9464
9465 /* return -ENODEV on error, 0 on success (or no action)
9466 * allocates numerous items that must be freed later
9467 */
hpsa_put_ctlr_into_performant_mode(struct ctlr_info * h)9468 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9469 {
9470 u32 trans_support;
9471 int i, rc;
9472
9473 if (hpsa_simple_mode)
9474 return 0;
9475
9476 trans_support = readl(&(h->cfgtable->TransportSupport));
9477 if (!(trans_support & PERFORMANT_MODE))
9478 return 0;
9479
9480 /* Check for I/O accelerator mode support */
9481 if (trans_support & CFGTBL_Trans_io_accel1) {
9482 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9483 if (rc)
9484 return rc;
9485 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9486 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9487 if (rc)
9488 return rc;
9489 }
9490
9491 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9492 hpsa_get_max_perf_mode_cmds(h);
9493 /* Performant mode ring buffer and supporting data structures */
9494 h->reply_queue_size = h->max_commands * sizeof(u64);
9495
9496 for (i = 0; i < h->nreply_queues; i++) {
9497 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9498 h->reply_queue_size,
9499 &h->reply_queue[i].busaddr,
9500 GFP_KERNEL);
9501 if (!h->reply_queue[i].head) {
9502 rc = -ENOMEM;
9503 goto clean1; /* rq, ioaccel */
9504 }
9505 h->reply_queue[i].size = h->max_commands;
9506 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9507 h->reply_queue[i].current_entry = 0;
9508 }
9509
9510 /* Need a block fetch table for performant mode */
9511 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9512 sizeof(u32)), GFP_KERNEL);
9513 if (!h->blockFetchTable) {
9514 rc = -ENOMEM;
9515 goto clean1; /* rq, ioaccel */
9516 }
9517
9518 rc = hpsa_enter_performant_mode(h, trans_support);
9519 if (rc)
9520 goto clean2; /* bft, rq, ioaccel */
9521 return 0;
9522
9523 clean2: /* bft, rq, ioaccel */
9524 kfree(h->blockFetchTable);
9525 h->blockFetchTable = NULL;
9526 clean1: /* rq, ioaccel */
9527 hpsa_free_reply_queues(h);
9528 hpsa_free_ioaccel1_cmd_and_bft(h);
9529 hpsa_free_ioaccel2_cmd_and_bft(h);
9530 return rc;
9531 }
9532
is_accelerated_cmd(struct CommandList * c)9533 static int is_accelerated_cmd(struct CommandList *c)
9534 {
9535 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9536 }
9537
hpsa_drain_accel_commands(struct ctlr_info * h)9538 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9539 {
9540 struct CommandList *c = NULL;
9541 int i, accel_cmds_out;
9542 int refcount;
9543
9544 do { /* wait for all outstanding ioaccel commands to drain out */
9545 accel_cmds_out = 0;
9546 for (i = 0; i < h->nr_cmds; i++) {
9547 c = h->cmd_pool + i;
9548 refcount = atomic_inc_return(&c->refcount);
9549 if (refcount > 1) /* Command is allocated */
9550 accel_cmds_out += is_accelerated_cmd(c);
9551 cmd_free(h, c);
9552 }
9553 if (accel_cmds_out <= 0)
9554 break;
9555 msleep(100);
9556 } while (1);
9557 }
9558
hpsa_alloc_sas_phy(struct hpsa_sas_port * hpsa_sas_port)9559 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9560 struct hpsa_sas_port *hpsa_sas_port)
9561 {
9562 struct hpsa_sas_phy *hpsa_sas_phy;
9563 struct sas_phy *phy;
9564
9565 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9566 if (!hpsa_sas_phy)
9567 return NULL;
9568
9569 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9570 hpsa_sas_port->next_phy_index);
9571 if (!phy) {
9572 kfree(hpsa_sas_phy);
9573 return NULL;
9574 }
9575
9576 hpsa_sas_port->next_phy_index++;
9577 hpsa_sas_phy->phy = phy;
9578 hpsa_sas_phy->parent_port = hpsa_sas_port;
9579
9580 return hpsa_sas_phy;
9581 }
9582
hpsa_free_sas_phy(struct hpsa_sas_phy * hpsa_sas_phy)9583 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9584 {
9585 struct sas_phy *phy = hpsa_sas_phy->phy;
9586
9587 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9588 if (hpsa_sas_phy->added_to_port)
9589 list_del(&hpsa_sas_phy->phy_list_entry);
9590 sas_phy_delete(phy);
9591 kfree(hpsa_sas_phy);
9592 }
9593
hpsa_sas_port_add_phy(struct hpsa_sas_phy * hpsa_sas_phy)9594 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9595 {
9596 int rc;
9597 struct hpsa_sas_port *hpsa_sas_port;
9598 struct sas_phy *phy;
9599 struct sas_identify *identify;
9600
9601 hpsa_sas_port = hpsa_sas_phy->parent_port;
9602 phy = hpsa_sas_phy->phy;
9603
9604 identify = &phy->identify;
9605 memset(identify, 0, sizeof(*identify));
9606 identify->sas_address = hpsa_sas_port->sas_address;
9607 identify->device_type = SAS_END_DEVICE;
9608 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9609 identify->target_port_protocols = SAS_PROTOCOL_STP;
9610 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9611 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9612 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9613 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9614 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9615
9616 rc = sas_phy_add(hpsa_sas_phy->phy);
9617 if (rc)
9618 return rc;
9619
9620 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9621 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9622 &hpsa_sas_port->phy_list_head);
9623 hpsa_sas_phy->added_to_port = true;
9624
9625 return 0;
9626 }
9627
9628 static int
hpsa_sas_port_add_rphy(struct hpsa_sas_port * hpsa_sas_port,struct sas_rphy * rphy)9629 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9630 struct sas_rphy *rphy)
9631 {
9632 struct sas_identify *identify;
9633
9634 identify = &rphy->identify;
9635 identify->sas_address = hpsa_sas_port->sas_address;
9636 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9637 identify->target_port_protocols = SAS_PROTOCOL_STP;
9638
9639 return sas_rphy_add(rphy);
9640 }
9641
9642 static struct hpsa_sas_port
hpsa_alloc_sas_port(struct hpsa_sas_node * hpsa_sas_node,u64 sas_address)9643 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9644 u64 sas_address)
9645 {
9646 int rc;
9647 struct hpsa_sas_port *hpsa_sas_port;
9648 struct sas_port *port;
9649
9650 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9651 if (!hpsa_sas_port)
9652 return NULL;
9653
9654 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9655 hpsa_sas_port->parent_node = hpsa_sas_node;
9656
9657 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9658 if (!port)
9659 goto free_hpsa_port;
9660
9661 rc = sas_port_add(port);
9662 if (rc)
9663 goto free_sas_port;
9664
9665 hpsa_sas_port->port = port;
9666 hpsa_sas_port->sas_address = sas_address;
9667 list_add_tail(&hpsa_sas_port->port_list_entry,
9668 &hpsa_sas_node->port_list_head);
9669
9670 return hpsa_sas_port;
9671
9672 free_sas_port:
9673 sas_port_free(port);
9674 free_hpsa_port:
9675 kfree(hpsa_sas_port);
9676
9677 return NULL;
9678 }
9679
hpsa_free_sas_port(struct hpsa_sas_port * hpsa_sas_port)9680 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9681 {
9682 struct hpsa_sas_phy *hpsa_sas_phy;
9683 struct hpsa_sas_phy *next;
9684
9685 list_for_each_entry_safe(hpsa_sas_phy, next,
9686 &hpsa_sas_port->phy_list_head, phy_list_entry)
9687 hpsa_free_sas_phy(hpsa_sas_phy);
9688
9689 sas_port_delete(hpsa_sas_port->port);
9690 list_del(&hpsa_sas_port->port_list_entry);
9691 kfree(hpsa_sas_port);
9692 }
9693
hpsa_alloc_sas_node(struct device * parent_dev)9694 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9695 {
9696 struct hpsa_sas_node *hpsa_sas_node;
9697
9698 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9699 if (hpsa_sas_node) {
9700 hpsa_sas_node->parent_dev = parent_dev;
9701 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9702 }
9703
9704 return hpsa_sas_node;
9705 }
9706
hpsa_free_sas_node(struct hpsa_sas_node * hpsa_sas_node)9707 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9708 {
9709 struct hpsa_sas_port *hpsa_sas_port;
9710 struct hpsa_sas_port *next;
9711
9712 if (!hpsa_sas_node)
9713 return;
9714
9715 list_for_each_entry_safe(hpsa_sas_port, next,
9716 &hpsa_sas_node->port_list_head, port_list_entry)
9717 hpsa_free_sas_port(hpsa_sas_port);
9718
9719 kfree(hpsa_sas_node);
9720 }
9721
9722 static struct hpsa_scsi_dev_t
hpsa_find_device_by_sas_rphy(struct ctlr_info * h,struct sas_rphy * rphy)9723 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9724 struct sas_rphy *rphy)
9725 {
9726 int i;
9727 struct hpsa_scsi_dev_t *device;
9728
9729 for (i = 0; i < h->ndevices; i++) {
9730 device = h->dev[i];
9731 if (!device->sas_port)
9732 continue;
9733 if (device->sas_port->rphy == rphy)
9734 return device;
9735 }
9736
9737 return NULL;
9738 }
9739
hpsa_add_sas_host(struct ctlr_info * h)9740 static int hpsa_add_sas_host(struct ctlr_info *h)
9741 {
9742 int rc;
9743 struct device *parent_dev;
9744 struct hpsa_sas_node *hpsa_sas_node;
9745 struct hpsa_sas_port *hpsa_sas_port;
9746 struct hpsa_sas_phy *hpsa_sas_phy;
9747
9748 parent_dev = &h->scsi_host->shost_dev;
9749
9750 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9751 if (!hpsa_sas_node)
9752 return -ENOMEM;
9753
9754 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9755 if (!hpsa_sas_port) {
9756 rc = -ENODEV;
9757 goto free_sas_node;
9758 }
9759
9760 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9761 if (!hpsa_sas_phy) {
9762 rc = -ENODEV;
9763 goto free_sas_port;
9764 }
9765
9766 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9767 if (rc)
9768 goto free_sas_phy;
9769
9770 h->sas_host = hpsa_sas_node;
9771
9772 return 0;
9773
9774 free_sas_phy:
9775 sas_phy_free(hpsa_sas_phy->phy);
9776 kfree(hpsa_sas_phy);
9777 free_sas_port:
9778 hpsa_free_sas_port(hpsa_sas_port);
9779 free_sas_node:
9780 hpsa_free_sas_node(hpsa_sas_node);
9781
9782 return rc;
9783 }
9784
hpsa_delete_sas_host(struct ctlr_info * h)9785 static void hpsa_delete_sas_host(struct ctlr_info *h)
9786 {
9787 hpsa_free_sas_node(h->sas_host);
9788 }
9789
hpsa_add_sas_device(struct hpsa_sas_node * hpsa_sas_node,struct hpsa_scsi_dev_t * device)9790 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9791 struct hpsa_scsi_dev_t *device)
9792 {
9793 int rc;
9794 struct hpsa_sas_port *hpsa_sas_port;
9795 struct sas_rphy *rphy;
9796
9797 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9798 if (!hpsa_sas_port)
9799 return -ENOMEM;
9800
9801 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9802 if (!rphy) {
9803 rc = -ENODEV;
9804 goto free_sas_port;
9805 }
9806
9807 hpsa_sas_port->rphy = rphy;
9808 device->sas_port = hpsa_sas_port;
9809
9810 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9811 if (rc)
9812 goto free_sas_rphy;
9813
9814 return 0;
9815
9816 free_sas_rphy:
9817 sas_rphy_free(rphy);
9818 free_sas_port:
9819 hpsa_free_sas_port(hpsa_sas_port);
9820 device->sas_port = NULL;
9821
9822 return rc;
9823 }
9824
hpsa_remove_sas_device(struct hpsa_scsi_dev_t * device)9825 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9826 {
9827 if (device->sas_port) {
9828 hpsa_free_sas_port(device->sas_port);
9829 device->sas_port = NULL;
9830 }
9831 }
9832
9833 static int
hpsa_sas_get_linkerrors(struct sas_phy * phy)9834 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9835 {
9836 return 0;
9837 }
9838
9839 static int
hpsa_sas_get_enclosure_identifier(struct sas_rphy * rphy,u64 * identifier)9840 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9841 {
9842 struct Scsi_Host *shost = phy_to_shost(rphy);
9843 struct ctlr_info *h;
9844 struct hpsa_scsi_dev_t *sd;
9845
9846 if (!shost)
9847 return -ENXIO;
9848
9849 h = shost_to_hba(shost);
9850
9851 if (!h)
9852 return -ENXIO;
9853
9854 sd = hpsa_find_device_by_sas_rphy(h, rphy);
9855 if (!sd)
9856 return -ENXIO;
9857
9858 *identifier = sd->eli;
9859
9860 return 0;
9861 }
9862
9863 static int
hpsa_sas_get_bay_identifier(struct sas_rphy * rphy)9864 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9865 {
9866 return -ENXIO;
9867 }
9868
9869 static int
hpsa_sas_phy_reset(struct sas_phy * phy,int hard_reset)9870 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9871 {
9872 return 0;
9873 }
9874
9875 static int
hpsa_sas_phy_enable(struct sas_phy * phy,int enable)9876 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9877 {
9878 return 0;
9879 }
9880
9881 static int
hpsa_sas_phy_setup(struct sas_phy * phy)9882 hpsa_sas_phy_setup(struct sas_phy *phy)
9883 {
9884 return 0;
9885 }
9886
9887 static void
hpsa_sas_phy_release(struct sas_phy * phy)9888 hpsa_sas_phy_release(struct sas_phy *phy)
9889 {
9890 }
9891
9892 static int
hpsa_sas_phy_speed(struct sas_phy * phy,struct sas_phy_linkrates * rates)9893 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9894 {
9895 return -EINVAL;
9896 }
9897
9898 static struct sas_function_template hpsa_sas_transport_functions = {
9899 .get_linkerrors = hpsa_sas_get_linkerrors,
9900 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9901 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9902 .phy_reset = hpsa_sas_phy_reset,
9903 .phy_enable = hpsa_sas_phy_enable,
9904 .phy_setup = hpsa_sas_phy_setup,
9905 .phy_release = hpsa_sas_phy_release,
9906 .set_phy_speed = hpsa_sas_phy_speed,
9907 };
9908
9909 /*
9910 * This is it. Register the PCI driver information for the cards we control
9911 * the OS will call our registered routines when it finds one of our cards.
9912 */
hpsa_init(void)9913 static int __init hpsa_init(void)
9914 {
9915 int rc;
9916
9917 hpsa_sas_transport_template =
9918 sas_attach_transport(&hpsa_sas_transport_functions);
9919 if (!hpsa_sas_transport_template)
9920 return -ENODEV;
9921
9922 rc = pci_register_driver(&hpsa_pci_driver);
9923
9924 if (rc)
9925 sas_release_transport(hpsa_sas_transport_template);
9926
9927 return rc;
9928 }
9929
hpsa_cleanup(void)9930 static void __exit hpsa_cleanup(void)
9931 {
9932 pci_unregister_driver(&hpsa_pci_driver);
9933 sas_release_transport(hpsa_sas_transport_template);
9934 }
9935
verify_offsets(void)9936 static void __attribute__((unused)) verify_offsets(void)
9937 {
9938 #define VERIFY_OFFSET(member, offset) \
9939 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9940
9941 VERIFY_OFFSET(structure_size, 0);
9942 VERIFY_OFFSET(volume_blk_size, 4);
9943 VERIFY_OFFSET(volume_blk_cnt, 8);
9944 VERIFY_OFFSET(phys_blk_shift, 16);
9945 VERIFY_OFFSET(parity_rotation_shift, 17);
9946 VERIFY_OFFSET(strip_size, 18);
9947 VERIFY_OFFSET(disk_starting_blk, 20);
9948 VERIFY_OFFSET(disk_blk_cnt, 28);
9949 VERIFY_OFFSET(data_disks_per_row, 36);
9950 VERIFY_OFFSET(metadata_disks_per_row, 38);
9951 VERIFY_OFFSET(row_cnt, 40);
9952 VERIFY_OFFSET(layout_map_count, 42);
9953 VERIFY_OFFSET(flags, 44);
9954 VERIFY_OFFSET(dekindex, 46);
9955 /* VERIFY_OFFSET(reserved, 48 */
9956 VERIFY_OFFSET(data, 64);
9957
9958 #undef VERIFY_OFFSET
9959
9960 #define VERIFY_OFFSET(member, offset) \
9961 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9962
9963 VERIFY_OFFSET(IU_type, 0);
9964 VERIFY_OFFSET(direction, 1);
9965 VERIFY_OFFSET(reply_queue, 2);
9966 /* VERIFY_OFFSET(reserved1, 3); */
9967 VERIFY_OFFSET(scsi_nexus, 4);
9968 VERIFY_OFFSET(Tag, 8);
9969 VERIFY_OFFSET(cdb, 16);
9970 VERIFY_OFFSET(cciss_lun, 32);
9971 VERIFY_OFFSET(data_len, 40);
9972 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9973 VERIFY_OFFSET(sg_count, 45);
9974 /* VERIFY_OFFSET(reserved3 */
9975 VERIFY_OFFSET(err_ptr, 48);
9976 VERIFY_OFFSET(err_len, 56);
9977 /* VERIFY_OFFSET(reserved4 */
9978 VERIFY_OFFSET(sg, 64);
9979
9980 #undef VERIFY_OFFSET
9981
9982 #define VERIFY_OFFSET(member, offset) \
9983 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9984
9985 VERIFY_OFFSET(dev_handle, 0x00);
9986 VERIFY_OFFSET(reserved1, 0x02);
9987 VERIFY_OFFSET(function, 0x03);
9988 VERIFY_OFFSET(reserved2, 0x04);
9989 VERIFY_OFFSET(err_info, 0x0C);
9990 VERIFY_OFFSET(reserved3, 0x10);
9991 VERIFY_OFFSET(err_info_len, 0x12);
9992 VERIFY_OFFSET(reserved4, 0x13);
9993 VERIFY_OFFSET(sgl_offset, 0x14);
9994 VERIFY_OFFSET(reserved5, 0x15);
9995 VERIFY_OFFSET(transfer_len, 0x1C);
9996 VERIFY_OFFSET(reserved6, 0x20);
9997 VERIFY_OFFSET(io_flags, 0x24);
9998 VERIFY_OFFSET(reserved7, 0x26);
9999 VERIFY_OFFSET(LUN, 0x34);
10000 VERIFY_OFFSET(control, 0x3C);
10001 VERIFY_OFFSET(CDB, 0x40);
10002 VERIFY_OFFSET(reserved8, 0x50);
10003 VERIFY_OFFSET(host_context_flags, 0x60);
10004 VERIFY_OFFSET(timeout_sec, 0x62);
10005 VERIFY_OFFSET(ReplyQueue, 0x64);
10006 VERIFY_OFFSET(reserved9, 0x65);
10007 VERIFY_OFFSET(tag, 0x68);
10008 VERIFY_OFFSET(host_addr, 0x70);
10009 VERIFY_OFFSET(CISS_LUN, 0x78);
10010 VERIFY_OFFSET(SG, 0x78 + 8);
10011 #undef VERIFY_OFFSET
10012 }
10013
10014 module_init(hpsa_init);
10015 module_exit(hpsa_cleanup);
10016