xref: /freebsd/sys/gnu/dev/bwn/phy_n/if_bwn_radio_2056.h (revision 2ff63af9b88c7413b7d71715b5532625752a248e)
1 /*
2 
3   Broadcom B43 wireless driver
4   IEEE 802.11n PHY data tables
5 
6   Copyright (c) 2008 Michael Buesch <m@bues.ch>
7   Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
8 
9   This program is free software; you can redistribute it and/or modify
10   it under the terms of the GNU General Public License as published by
11   the Free Software Foundation; either version 2 of the License, or
12   (at your option) any later version.
13 
14   This program is distributed in the hope that it will be useful,
15   but WITHOUT ANY WARRANTY; without even the implied warranty of
16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17   GNU General Public License for more details.
18 
19   You should have received a copy of the GNU General Public License
20   along with this program; see the file COPYING.  If not, write to
21   the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22   Boston, MA 02110-1301, USA.
23 
24 */
25 
26 /*
27  */
28 
29 #ifndef	__IF_BWN_RADIO_2056_H__
30 #define	__IF_BWN_RADIO_2056_H__
31 
32 #define B2056_SYN			(0x0 << 12)
33 #define B2056_TX0			(0x2 << 12)
34 #define B2056_TX1			(0x3 << 12)
35 #define B2056_RX0			(0x6 << 12)
36 #define B2056_RX1			(0x7 << 12)
37 #define B2056_ALLTX			(0xE << 12)
38 #define B2056_ALLRX			(0xF << 12)
39 
40 #define B2056_SYN_RESERVED_ADDR0	0x00
41 #define B2056_SYN_IDCODE		0x01
42 #define B2056_SYN_RESERVED_ADDR2	0x02
43 #define B2056_SYN_RESERVED_ADDR3	0x03
44 #define B2056_SYN_RESERVED_ADDR4	0x04
45 #define B2056_SYN_RESERVED_ADDR5	0x05
46 #define B2056_SYN_RESERVED_ADDR6	0x06
47 #define B2056_SYN_RESERVED_ADDR7	0x07
48 #define B2056_SYN_COM_CTRL		0x08
49 #define B2056_SYN_COM_PU		0x09
50 #define B2056_SYN_COM_OVR		0x0A
51 #define B2056_SYN_COM_RESET		0x0B
52 #define B2056_SYN_COM_RCAL		0x0C
53 #define B2056_SYN_COM_RC_RXLPF		0x0D
54 #define B2056_SYN_COM_RC_TXLPF		0x0E
55 #define B2056_SYN_COM_RC_RXHPF		0x0F
56 #define B2056_SYN_RESERVED_ADDR16	0x10
57 #define B2056_SYN_RESERVED_ADDR17	0x11
58 #define B2056_SYN_RESERVED_ADDR18	0x12
59 #define B2056_SYN_RESERVED_ADDR19	0x13
60 #define B2056_SYN_RESERVED_ADDR20	0x14
61 #define B2056_SYN_RESERVED_ADDR21	0x15
62 #define B2056_SYN_RESERVED_ADDR22	0x16
63 #define B2056_SYN_RESERVED_ADDR23	0x17
64 #define B2056_SYN_RESERVED_ADDR24	0x18
65 #define B2056_SYN_RESERVED_ADDR25	0x19
66 #define B2056_SYN_RESERVED_ADDR26	0x1A
67 #define B2056_SYN_RESERVED_ADDR27	0x1B
68 #define B2056_SYN_RESERVED_ADDR28	0x1C
69 #define B2056_SYN_RESERVED_ADDR29	0x1D
70 #define B2056_SYN_RESERVED_ADDR30	0x1E
71 #define B2056_SYN_RESERVED_ADDR31	0x1F
72 #define B2056_SYN_GPIO_MASTER1		0x20
73 #define B2056_SYN_GPIO_MASTER2		0x21
74 #define B2056_SYN_TOPBIAS_MASTER	0x22
75 #define B2056_SYN_TOPBIAS_RCAL		0x23
76 #define B2056_SYN_AFEREG		0x24
77 #define B2056_SYN_TEMPPROCSENSE		0x25
78 #define B2056_SYN_TEMPPROCSENSEIDAC	0x26
79 #define B2056_SYN_TEMPPROCSENSERCAL	0x27
80 #define B2056_SYN_LPO			0x28
81 #define B2056_SYN_VDDCAL_MASTER		0x29
82 #define B2056_SYN_VDDCAL_IDAC		0x2A
83 #define B2056_SYN_VDDCAL_STATUS		0x2B
84 #define B2056_SYN_RCAL_MASTER		0x2C
85 #define B2056_SYN_RCAL_CODE_OUT		0x2D
86 #define B2056_SYN_RCCAL_CTRL0		0x2E
87 #define B2056_SYN_RCCAL_CTRL1		0x2F
88 #define B2056_SYN_RCCAL_CTRL2		0x30
89 #define B2056_SYN_RCCAL_CTRL3		0x31
90 #define B2056_SYN_RCCAL_CTRL4		0x32
91 #define B2056_SYN_RCCAL_CTRL5		0x33
92 #define B2056_SYN_RCCAL_CTRL6		0x34
93 #define B2056_SYN_RCCAL_CTRL7		0x35
94 #define B2056_SYN_RCCAL_CTRL8		0x36
95 #define B2056_SYN_RCCAL_CTRL9		0x37
96 #define B2056_SYN_RCCAL_CTRL10		0x38
97 #define B2056_SYN_RCCAL_CTRL11		0x39
98 #define B2056_SYN_ZCAL_SPARE1		0x3A
99 #define B2056_SYN_ZCAL_SPARE2		0x3B
100 #define B2056_SYN_PLL_MAST1		0x3C
101 #define B2056_SYN_PLL_MAST2		0x3D
102 #define B2056_SYN_PLL_MAST3		0x3E
103 #define B2056_SYN_PLL_BIAS_RESET	0x3F
104 #define B2056_SYN_PLL_XTAL0		0x40
105 #define B2056_SYN_PLL_XTAL1		0x41
106 #define B2056_SYN_PLL_XTAL3		0x42
107 #define B2056_SYN_PLL_XTAL4		0x43
108 #define B2056_SYN_PLL_XTAL5		0x44
109 #define B2056_SYN_PLL_XTAL6		0x45
110 #define B2056_SYN_PLL_REFDIV		0x46
111 #define B2056_SYN_PLL_PFD		0x47
112 #define B2056_SYN_PLL_CP1		0x48
113 #define B2056_SYN_PLL_CP2		0x49
114 #define B2056_SYN_PLL_CP3		0x4A
115 #define B2056_SYN_PLL_LOOPFILTER1	0x4B
116 #define B2056_SYN_PLL_LOOPFILTER2	0x4C
117 #define B2056_SYN_PLL_LOOPFILTER3	0x4D
118 #define B2056_SYN_PLL_LOOPFILTER4	0x4E
119 #define B2056_SYN_PLL_LOOPFILTER5	0x4F
120 #define B2056_SYN_PLL_MMD1		0x50
121 #define B2056_SYN_PLL_MMD2		0x51
122 #define B2056_SYN_PLL_VCO1		0x52
123 #define B2056_SYN_PLL_VCO2		0x53
124 #define B2056_SYN_PLL_MONITOR1		0x54
125 #define B2056_SYN_PLL_MONITOR2		0x55
126 #define B2056_SYN_PLL_VCOCAL1		0x56
127 #define B2056_SYN_PLL_VCOCAL2		0x57
128 #define B2056_SYN_PLL_VCOCAL4		0x58
129 #define B2056_SYN_PLL_VCOCAL5		0x59
130 #define B2056_SYN_PLL_VCOCAL6		0x5A
131 #define B2056_SYN_PLL_VCOCAL7		0x5B
132 #define B2056_SYN_PLL_VCOCAL8		0x5C
133 #define B2056_SYN_PLL_VCOCAL9		0x5D
134 #define B2056_SYN_PLL_VCOCAL10		0x5E
135 #define B2056_SYN_PLL_VCOCAL11		0x5F
136 #define B2056_SYN_PLL_VCOCAL12		0x60
137 #define B2056_SYN_PLL_VCOCAL13		0x61
138 #define B2056_SYN_PLL_VREG		0x62
139 #define B2056_SYN_PLL_STATUS1		0x63
140 #define B2056_SYN_PLL_STATUS2		0x64
141 #define B2056_SYN_PLL_STATUS3		0x65
142 #define B2056_SYN_LOGEN_PU0		0x66
143 #define B2056_SYN_LOGEN_PU1		0x67
144 #define B2056_SYN_LOGEN_PU2		0x68
145 #define B2056_SYN_LOGEN_PU3		0x69
146 #define B2056_SYN_LOGEN_PU5		0x6A
147 #define B2056_SYN_LOGEN_PU6		0x6B
148 #define B2056_SYN_LOGEN_PU7		0x6C
149 #define B2056_SYN_LOGEN_PU8		0x6D
150 #define B2056_SYN_LOGEN_BIAS_RESET	0x6E
151 #define B2056_SYN_LOGEN_RCCR1		0x6F
152 #define B2056_SYN_LOGEN_VCOBUF1		0x70
153 #define B2056_SYN_LOGEN_MIXER1		0x71
154 #define B2056_SYN_LOGEN_MIXER2		0x72
155 #define B2056_SYN_LOGEN_BUF1		0x73
156 #define B2056_SYN_LOGENBUF2		0x74
157 #define B2056_SYN_LOGEN_BUF3		0x75
158 #define B2056_SYN_LOGEN_BUF4		0x76
159 #define B2056_SYN_LOGEN_DIV1		0x77
160 #define B2056_SYN_LOGEN_DIV2		0x78
161 #define B2056_SYN_LOGEN_DIV3		0x79
162 #define B2056_SYN_LOGEN_ACL1		0x7A
163 #define B2056_SYN_LOGEN_ACL2		0x7B
164 #define B2056_SYN_LOGEN_ACL3		0x7C
165 #define B2056_SYN_LOGEN_ACL4		0x7D
166 #define B2056_SYN_LOGEN_ACL5		0x7E
167 #define B2056_SYN_LOGEN_ACL6		0x7F
168 #define B2056_SYN_LOGEN_ACLOUT		0x80
169 #define B2056_SYN_LOGEN_ACLCAL1		0x81
170 #define B2056_SYN_LOGEN_ACLCAL2		0x82
171 #define B2056_SYN_LOGEN_ACLCAL3		0x83
172 #define B2056_SYN_CALEN			0x84
173 #define B2056_SYN_LOGEN_PEAKDET1	0x85
174 #define B2056_SYN_LOGEN_CORE_ACL_OVR	0x86
175 #define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR	0x87
176 #define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR	0x88
177 #define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR	0x89
178 #define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR	0x8A
179 #define B2056_SYN_LOGEN_VCOBUF2		0x8B
180 #define B2056_SYN_LOGEN_MIXER3		0x8C
181 #define B2056_SYN_LOGEN_BUF5		0x8D
182 #define B2056_SYN_LOGEN_BUF6		0x8E
183 #define B2056_SYN_LOGEN_CBUFRX1		0x8F
184 #define B2056_SYN_LOGEN_CBUFRX2		0x90
185 #define B2056_SYN_LOGEN_CBUFRX3		0x91
186 #define B2056_SYN_LOGEN_CBUFRX4		0x92
187 #define B2056_SYN_LOGEN_CBUFTX1		0x93
188 #define B2056_SYN_LOGEN_CBUFTX2		0x94
189 #define B2056_SYN_LOGEN_CBUFTX3		0x95
190 #define B2056_SYN_LOGEN_CBUFTX4		0x96
191 #define B2056_SYN_LOGEN_CMOSRX1		0x97
192 #define B2056_SYN_LOGEN_CMOSRX2		0x98
193 #define B2056_SYN_LOGEN_CMOSRX3		0x99
194 #define B2056_SYN_LOGEN_CMOSRX4		0x9A
195 #define B2056_SYN_LOGEN_CMOSTX1		0x9B
196 #define B2056_SYN_LOGEN_CMOSTX2		0x9C
197 #define B2056_SYN_LOGEN_CMOSTX3		0x9D
198 #define B2056_SYN_LOGEN_CMOSTX4		0x9E
199 #define B2056_SYN_LOGEN_VCOBUF2_OVRVAL	0x9F
200 #define B2056_SYN_LOGEN_MIXER3_OVRVAL	0xA0
201 #define B2056_SYN_LOGEN_BUF5_OVRVAL	0xA1
202 #define B2056_SYN_LOGEN_BUF6_OVRVAL	0xA2
203 #define B2056_SYN_LOGEN_CBUFRX1_OVRVAL	0xA3
204 #define B2056_SYN_LOGEN_CBUFRX2_OVRVAL	0xA4
205 #define B2056_SYN_LOGEN_CBUFRX3_OVRVAL	0xA5
206 #define B2056_SYN_LOGEN_CBUFRX4_OVRVAL	0xA6
207 #define B2056_SYN_LOGEN_CBUFTX1_OVRVAL	0xA7
208 #define B2056_SYN_LOGEN_CBUFTX2_OVRVAL	0xA8
209 #define B2056_SYN_LOGEN_CBUFTX3_OVRVAL	0xA9
210 #define B2056_SYN_LOGEN_CBUFTX4_OVRVAL	0xAA
211 #define B2056_SYN_LOGEN_CMOSRX1_OVRVAL	0xAB
212 #define B2056_SYN_LOGEN_CMOSRX2_OVRVAL	0xAC
213 #define B2056_SYN_LOGEN_CMOSRX3_OVRVAL	0xAD
214 #define B2056_SYN_LOGEN_CMOSRX4_OVRVAL	0xAE
215 #define B2056_SYN_LOGEN_CMOSTX1_OVRVAL	0xAF
216 #define B2056_SYN_LOGEN_CMOSTX2_OVRVAL	0xB0
217 #define B2056_SYN_LOGEN_CMOSTX3_OVRVAL	0xB1
218 #define B2056_SYN_LOGEN_CMOSTX4_OVRVAL	0xB2
219 #define B2056_SYN_LOGEN_ACL_WAITCNT	0xB3
220 #define B2056_SYN_LOGEN_CORE_CALVALID	0xB4
221 #define B2056_SYN_LOGEN_RX_CMOS_CALVALID	0xB5
222 #define B2056_SYN_LOGEN_TX_CMOS_VALID	0xB6
223 
224 #define B2056_TX_RESERVED_ADDR0		0x00
225 #define B2056_TX_IDCODE			0x01
226 #define B2056_TX_RESERVED_ADDR2		0x02
227 #define B2056_TX_RESERVED_ADDR3		0x03
228 #define B2056_TX_RESERVED_ADDR4		0x04
229 #define B2056_TX_RESERVED_ADDR5		0x05
230 #define B2056_TX_RESERVED_ADDR6		0x06
231 #define B2056_TX_RESERVED_ADDR7		0x07
232 #define B2056_TX_COM_CTRL		0x08
233 #define B2056_TX_COM_PU			0x09
234 #define B2056_TX_COM_OVR		0x0A
235 #define B2056_TX_COM_RESET		0x0B
236 #define B2056_TX_COM_RCAL		0x0C
237 #define B2056_TX_COM_RC_RXLPF		0x0D
238 #define B2056_TX_COM_RC_TXLPF		0x0E
239 #define B2056_TX_COM_RC_RXHPF		0x0F
240 #define B2056_TX_RESERVED_ADDR16	0x10
241 #define B2056_TX_RESERVED_ADDR17	0x11
242 #define B2056_TX_RESERVED_ADDR18	0x12
243 #define B2056_TX_RESERVED_ADDR19	0x13
244 #define B2056_TX_RESERVED_ADDR20	0x14
245 #define B2056_TX_RESERVED_ADDR21	0x15
246 #define B2056_TX_RESERVED_ADDR22	0x16
247 #define B2056_TX_RESERVED_ADDR23	0x17
248 #define B2056_TX_RESERVED_ADDR24	0x18
249 #define B2056_TX_RESERVED_ADDR25	0x19
250 #define B2056_TX_RESERVED_ADDR26	0x1A
251 #define B2056_TX_RESERVED_ADDR27	0x1B
252 #define B2056_TX_RESERVED_ADDR28	0x1C
253 #define B2056_TX_RESERVED_ADDR29	0x1D
254 #define B2056_TX_RESERVED_ADDR30	0x1E
255 #define B2056_TX_RESERVED_ADDR31	0x1F
256 #define B2056_TX_IQCAL_GAIN_BW		0x20
257 #define B2056_TX_LOFT_FINE_I		0x21
258 #define B2056_TX_LOFT_FINE_Q		0x22
259 #define B2056_TX_LOFT_COARSE_I		0x23
260 #define B2056_TX_LOFT_COARSE_Q		0x24
261 #define B2056_TX_TX_COM_MASTER1		0x25
262 #define B2056_TX_TX_COM_MASTER2		0x26
263 #define B2056_TX_RXIQCAL_TXMUX		0x27
264 #define B2056_TX_TX_SSI_MASTER		0x28
265 #define B2056_TX_IQCAL_VCM_HG		0x29
266 #define B2056_TX_IQCAL_IDAC		0x2A
267 #define B2056_TX_TSSI_VCM		0x2B
268 #define B2056_TX_TX_AMP_DET		0x2C
269 #define B2056_TX_TX_SSI_MUX		0x2D
270 #define B2056_TX_TSSIA			0x2E
271 #define B2056_TX_TSSIG			0x2F
272 #define B2056_TX_TSSI_MISC1		0x30
273 #define B2056_TX_TSSI_MISC2		0x31
274 #define B2056_TX_TSSI_MISC3		0x32
275 #define B2056_TX_PA_SPARE1		0x33
276 #define B2056_TX_PA_SPARE2		0x34
277 #define B2056_TX_INTPAA_MASTER		0x35
278 #define B2056_TX_INTPAA_GAIN		0x36
279 #define B2056_TX_INTPAA_BOOST_TUNE	0x37
280 #define B2056_TX_INTPAA_IAUX_STAT	0x38
281 #define B2056_TX_INTPAA_IAUX_DYN	0x39
282 #define B2056_TX_INTPAA_IMAIN_STAT	0x3A
283 #define B2056_TX_INTPAA_IMAIN_DYN	0x3B
284 #define B2056_TX_INTPAA_CASCBIAS	0x3C
285 #define B2056_TX_INTPAA_PASLOPE		0x3D
286 #define B2056_TX_INTPAA_PA_MISC		0x3E
287 #define B2056_TX_INTPAG_MASTER		0x3F
288 #define B2056_TX_INTPAG_GAIN		0x40
289 #define B2056_TX_INTPAG_BOOST_TUNE	0x41
290 #define B2056_TX_INTPAG_IAUX_STAT	0x42
291 #define B2056_TX_INTPAG_IAUX_DYN	0x43
292 #define B2056_TX_INTPAG_IMAIN_STAT	0x44
293 #define B2056_TX_INTPAG_IMAIN_DYN	0x45
294 #define B2056_TX_INTPAG_CASCBIAS	0x46
295 #define B2056_TX_INTPAG_PASLOPE		0x47
296 #define B2056_TX_INTPAG_PA_MISC		0x48
297 #define B2056_TX_PADA_MASTER		0x49
298 #define B2056_TX_PADA_IDAC		0x4A
299 #define B2056_TX_PADA_CASCBIAS		0x4B
300 #define B2056_TX_PADA_GAIN		0x4C
301 #define B2056_TX_PADA_BOOST_TUNE	0x4D
302 #define B2056_TX_PADA_SLOPE		0x4E
303 #define B2056_TX_PADG_MASTER		0x4F
304 #define B2056_TX_PADG_IDAC		0x50
305 #define B2056_TX_PADG_CASCBIAS		0x51
306 #define B2056_TX_PADG_GAIN		0x52
307 #define B2056_TX_PADG_BOOST_TUNE	0x53
308 #define B2056_TX_PADG_SLOPE		0x54
309 #define B2056_TX_PGAA_MASTER		0x55
310 #define B2056_TX_PGAA_IDAC		0x56
311 #define B2056_TX_PGAA_GAIN		0x57
312 #define B2056_TX_PGAA_BOOST_TUNE	0x58
313 #define B2056_TX_PGAA_SLOPE		0x59
314 #define B2056_TX_PGAA_MISC		0x5A
315 #define B2056_TX_PGAG_MASTER		0x5B
316 #define B2056_TX_PGAG_IDAC		0x5C
317 #define B2056_TX_PGAG_GAIN		0x5D
318 #define B2056_TX_PGAG_BOOST_TUNE	0x5E
319 #define B2056_TX_PGAG_SLOPE		0x5F
320 #define B2056_TX_PGAG_MISC		0x60
321 #define B2056_TX_MIXA_MASTER		0x61
322 #define B2056_TX_MIXA_BOOST_TUNE	0x62
323 #define B2056_TX_MIXG			0x63
324 #define B2056_TX_MIXG_BOOST_TUNE	0x64
325 #define B2056_TX_BB_GM_MASTER		0x65
326 #define B2056_TX_GMBB_GM		0x66
327 #define B2056_TX_GMBB_IDAC		0x67
328 #define B2056_TX_TXLPF_MASTER		0x68
329 #define B2056_TX_TXLPF_RCCAL		0x69
330 #define B2056_TX_TXLPF_RCCAL_OFF0	0x6A
331 #define B2056_TX_TXLPF_RCCAL_OFF1	0x6B
332 #define B2056_TX_TXLPF_RCCAL_OFF2	0x6C
333 #define B2056_TX_TXLPF_RCCAL_OFF3	0x6D
334 #define B2056_TX_TXLPF_RCCAL_OFF4	0x6E
335 #define B2056_TX_TXLPF_RCCAL_OFF5	0x6F
336 #define B2056_TX_TXLPF_RCCAL_OFF6	0x70
337 #define B2056_TX_TXLPF_BW		0x71
338 #define B2056_TX_TXLPF_GAIN		0x72
339 #define B2056_TX_TXLPF_IDAC		0x73
340 #define B2056_TX_TXLPF_IDAC_0		0x74
341 #define B2056_TX_TXLPF_IDAC_1		0x75
342 #define B2056_TX_TXLPF_IDAC_2		0x76
343 #define B2056_TX_TXLPF_IDAC_3		0x77
344 #define B2056_TX_TXLPF_IDAC_4		0x78
345 #define B2056_TX_TXLPF_IDAC_5		0x79
346 #define B2056_TX_TXLPF_IDAC_6		0x7A
347 #define B2056_TX_TXLPF_OPAMP_IDAC	0x7B
348 #define B2056_TX_TXLPF_MISC		0x7C
349 #define B2056_TX_TXSPARE1		0x7D
350 #define B2056_TX_TXSPARE2		0x7E
351 #define B2056_TX_TXSPARE3		0x7F
352 #define B2056_TX_TXSPARE4		0x80
353 #define B2056_TX_TXSPARE5		0x81
354 #define B2056_TX_TXSPARE6		0x82
355 #define B2056_TX_TXSPARE7		0x83
356 #define B2056_TX_TXSPARE8		0x84
357 #define B2056_TX_TXSPARE9		0x85
358 #define B2056_TX_TXSPARE10		0x86
359 #define B2056_TX_TXSPARE11		0x87
360 #define B2056_TX_TXSPARE12		0x88
361 #define B2056_TX_TXSPARE13		0x89
362 #define B2056_TX_TXSPARE14		0x8A
363 #define B2056_TX_TXSPARE15		0x8B
364 #define B2056_TX_TXSPARE16		0x8C
365 #define B2056_TX_STATUS_INTPA_GAIN	0x8D
366 #define B2056_TX_STATUS_PAD_GAIN	0x8E
367 #define B2056_TX_STATUS_PGA_GAIN	0x8F
368 #define B2056_TX_STATUS_GM_TXLPF_GAIN	0x90
369 #define B2056_TX_STATUS_TXLPF_BW	0x91
370 #define B2056_TX_STATUS_TXLPF_RC	0x92
371 #define B2056_TX_GMBB_IDAC0		0x93
372 #define B2056_TX_GMBB_IDAC1		0x94
373 #define B2056_TX_GMBB_IDAC2		0x95
374 #define B2056_TX_GMBB_IDAC3		0x96
375 #define B2056_TX_GMBB_IDAC4		0x97
376 #define B2056_TX_GMBB_IDAC5		0x98
377 #define B2056_TX_GMBB_IDAC6		0x99
378 #define B2056_TX_GMBB_IDAC7		0x9A
379 
380 #define B2056_RX_RESERVED_ADDR0		0x00
381 #define B2056_RX_IDCODE			0x01
382 #define B2056_RX_RESERVED_ADDR2		0x02
383 #define B2056_RX_RESERVED_ADDR3		0x03
384 #define B2056_RX_RESERVED_ADDR4		0x04
385 #define B2056_RX_RESERVED_ADDR5		0x05
386 #define B2056_RX_RESERVED_ADDR6		0x06
387 #define B2056_RX_RESERVED_ADDR7		0x07
388 #define B2056_RX_COM_CTRL		0x08
389 #define B2056_RX_COM_PU			0x09
390 #define B2056_RX_COM_OVR		0x0A
391 #define B2056_RX_COM_RESET		0x0B
392 #define B2056_RX_COM_RCAL		0x0C
393 #define B2056_RX_COM_RC_RXLPF		0x0D
394 #define B2056_RX_COM_RC_TXLPF		0x0E
395 #define B2056_RX_COM_RC_RXHPF		0x0F
396 #define B2056_RX_RESERVED_ADDR16	0x10
397 #define B2056_RX_RESERVED_ADDR17	0x11
398 #define B2056_RX_RESERVED_ADDR18	0x12
399 #define B2056_RX_RESERVED_ADDR19	0x13
400 #define B2056_RX_RESERVED_ADDR20	0x14
401 #define B2056_RX_RESERVED_ADDR21	0x15
402 #define B2056_RX_RESERVED_ADDR22	0x16
403 #define B2056_RX_RESERVED_ADDR23	0x17
404 #define B2056_RX_RESERVED_ADDR24	0x18
405 #define B2056_RX_RESERVED_ADDR25	0x19
406 #define B2056_RX_RESERVED_ADDR26	0x1A
407 #define B2056_RX_RESERVED_ADDR27	0x1B
408 #define B2056_RX_RESERVED_ADDR28	0x1C
409 #define B2056_RX_RESERVED_ADDR29	0x1D
410 #define B2056_RX_RESERVED_ADDR30	0x1E
411 #define B2056_RX_RESERVED_ADDR31	0x1F
412 #define B2056_RX_RXIQCAL_RXMUX		0x20
413 #define B2056_RX_RSSI_PU		0x21
414 #define B2056_RX_RSSI_SEL		0x22
415 #define B2056_RX_RSSI_GAIN		0x23
416 #define B2056_RX_RSSI_NB_IDAC		0x24
417 #define B2056_RX_RSSI_WB2I_IDAC_1	0x25
418 #define B2056_RX_RSSI_WB2I_IDAC_2	0x26
419 #define B2056_RX_RSSI_WB2Q_IDAC_1	0x27
420 #define B2056_RX_RSSI_WB2Q_IDAC_2	0x28
421 #define B2056_RX_RSSI_POLE		0x29
422 #define B2056_RX_RSSI_WB1_IDAC		0x2A
423 #define B2056_RX_RSSI_MISC		0x2B
424 #define B2056_RX_LNAA_MASTER		0x2C
425 #define B2056_RX_LNAA_TUNE		0x2D
426 #define B2056_RX_LNAA_GAIN		0x2E
427 #define B2056_RX_LNA_A_SLOPE		0x2F
428 #define B2056_RX_BIASPOLE_LNAA1_IDAC	0x30
429 #define B2056_RX_LNAA2_IDAC		0x31
430 #define B2056_RX_LNA1A_MISC		0x32
431 #define B2056_RX_LNAG_MASTER		0x33
432 #define B2056_RX_LNAG_TUNE		0x34
433 #define B2056_RX_LNAG_GAIN		0x35
434 #define B2056_RX_LNA_G_SLOPE		0x36
435 #define B2056_RX_BIASPOLE_LNAG1_IDAC	0x37
436 #define B2056_RX_LNAG2_IDAC		0x38
437 #define B2056_RX_LNA1G_MISC		0x39
438 #define B2056_RX_MIXA_MASTER		0x3A
439 #define B2056_RX_MIXA_VCM		0x3B
440 #define B2056_RX_MIXA_CTRLPTAT		0x3C
441 #define B2056_RX_MIXA_LOB_BIAS		0x3D
442 #define B2056_RX_MIXA_CORE_IDAC		0x3E
443 #define B2056_RX_MIXA_CMFB_IDAC		0x3F
444 #define B2056_RX_MIXA_BIAS_AUX		0x40
445 #define B2056_RX_MIXA_BIAS_MAIN		0x41
446 #define B2056_RX_MIXA_BIAS_MISC		0x42
447 #define B2056_RX_MIXA_MAST_BIAS		0x43
448 #define B2056_RX_MIXG_MASTER		0x44
449 #define B2056_RX_MIXG_VCM		0x45
450 #define B2056_RX_MIXG_CTRLPTAT		0x46
451 #define B2056_RX_MIXG_LOB_BIAS		0x47
452 #define B2056_RX_MIXG_CORE_IDAC		0x48
453 #define B2056_RX_MIXG_CMFB_IDAC		0x49
454 #define B2056_RX_MIXG_BIAS_AUX		0x4A
455 #define B2056_RX_MIXG_BIAS_MAIN		0x4B
456 #define B2056_RX_MIXG_BIAS_MISC		0x4C
457 #define B2056_RX_MIXG_MAST_BIAS		0x4D
458 #define B2056_RX_TIA_MASTER		0x4E
459 #define B2056_RX_TIA_IOPAMP		0x4F
460 #define B2056_RX_TIA_QOPAMP		0x50
461 #define B2056_RX_TIA_IMISC		0x51
462 #define B2056_RX_TIA_QMISC		0x52
463 #define B2056_RX_TIA_GAIN		0x53
464 #define B2056_RX_TIA_SPARE1		0x54
465 #define B2056_RX_TIA_SPARE2		0x55
466 #define B2056_RX_BB_LPF_MASTER		0x56
467 #define B2056_RX_AACI_MASTER		0x57
468 #define B2056_RX_RXLPF_IDAC		0x58
469 #define B2056_RX_RXLPF_OPAMPBIAS_LOWQ	0x59
470 #define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ	0x5A
471 #define B2056_RX_RXLPF_BIAS_DCCANCEL	0x5B
472 #define B2056_RX_RXLPF_OUTVCM		0x5C
473 #define B2056_RX_RXLPF_INVCM_BODY	0x5D
474 #define B2056_RX_RXLPF_CC_OP		0x5E
475 #define B2056_RX_RXLPF_GAIN		0x5F
476 #define B2056_RX_RXLPF_Q_BW		0x60
477 #define B2056_RX_RXLPF_HP_CORNER_BW	0x61
478 #define B2056_RX_RXLPF_RCCAL_HPC	0x62
479 #define B2056_RX_RXHPF_OFF0		0x63
480 #define B2056_RX_RXHPF_OFF1		0x64
481 #define B2056_RX_RXHPF_OFF2		0x65
482 #define B2056_RX_RXHPF_OFF3		0x66
483 #define B2056_RX_RXHPF_OFF4		0x67
484 #define B2056_RX_RXHPF_OFF5		0x68
485 #define B2056_RX_RXHPF_OFF6		0x69
486 #define B2056_RX_RXHPF_OFF7		0x6A
487 #define B2056_RX_RXLPF_RCCAL_LPC	0x6B
488 #define B2056_RX_RXLPF_OFF_0		0x6C
489 #define B2056_RX_RXLPF_OFF_1		0x6D
490 #define B2056_RX_RXLPF_OFF_2		0x6E
491 #define B2056_RX_RXLPF_OFF_3		0x6F
492 #define B2056_RX_RXLPF_OFF_4		0x70
493 #define B2056_RX_UNUSED			0x71
494 #define B2056_RX_VGA_MASTER		0x72
495 #define B2056_RX_VGA_BIAS		0x73
496 #define B2056_RX_VGA_BIAS_DCCANCEL	0x74
497 #define B2056_RX_VGA_GAIN		0x75
498 #define B2056_RX_VGA_HP_CORNER_BW	0x76
499 #define B2056_RX_VGABUF_BIAS		0x77
500 #define B2056_RX_VGABUF_GAIN_BW		0x78
501 #define B2056_RX_TXFBMIX_A		0x79
502 #define B2056_RX_TXFBMIX_G		0x7A
503 #define B2056_RX_RXSPARE1		0x7B
504 #define B2056_RX_RXSPARE2		0x7C
505 #define B2056_RX_RXSPARE3		0x7D
506 #define B2056_RX_RXSPARE4		0x7E
507 #define B2056_RX_RXSPARE5		0x7F
508 #define B2056_RX_RXSPARE6		0x80
509 #define B2056_RX_RXSPARE7		0x81
510 #define B2056_RX_RXSPARE8		0x82
511 #define B2056_RX_RXSPARE9		0x83
512 #define B2056_RX_RXSPARE10		0x84
513 #define B2056_RX_RXSPARE11		0x85
514 #define B2056_RX_RXSPARE12		0x86
515 #define B2056_RX_RXSPARE13		0x87
516 #define B2056_RX_RXSPARE14		0x88
517 #define B2056_RX_RXSPARE15		0x89
518 #define B2056_RX_RXSPARE16		0x8A
519 #define B2056_RX_STATUS_LNAA_GAIN	0x8B
520 #define B2056_RX_STATUS_LNAG_GAIN	0x8C
521 #define B2056_RX_STATUS_MIXTIA_GAIN	0x8D
522 #define B2056_RX_STATUS_RXLPF_GAIN	0x8E
523 #define B2056_RX_STATUS_VGA_BUF_GAIN	0x8F
524 #define B2056_RX_STATUS_RXLPF_Q		0x90
525 #define B2056_RX_STATUS_RXLPF_BUF_BW	0x91
526 #define B2056_RX_STATUS_RXLPF_VGA_HPC	0x92
527 #define B2056_RX_STATUS_RXLPF_RC	0x93
528 #define B2056_RX_STATUS_HPC_RC		0x94
529 
530 #define B2056_LNA1_A_PU			0x01
531 #define B2056_LNA2_A_PU			0x02
532 #define B2056_LNA1_G_PU			0x01
533 #define B2056_LNA2_G_PU			0x02
534 #define B2056_MIXA_PU_I			0x01
535 #define B2056_MIXA_PU_Q			0x02
536 #define B2056_MIXA_PU_GM		0x10
537 #define B2056_MIXG_PU_I			0x01
538 #define B2056_MIXG_PU_Q			0x02
539 #define B2056_MIXG_PU_GM		0x10
540 #define B2056_TIA_PU			0x01
541 #define B2056_BB_LPF_PU			0x20
542 #define B2056_W1_PU			0x02
543 #define B2056_W2_PU			0x04
544 #define B2056_NB_PU			0x08
545 #define B2056_RSSI_W1_SEL		0x02
546 #define B2056_RSSI_W2_SEL		0x04
547 #define B2056_RSSI_NB_SEL		0x08
548 #define B2056_VCM_MASK			0x1C
549 #define B2056_RSSI_VCM_SHIFT		0x02
550 
551 #define B2056_SYN			(0x0 << 12)
552 #define B2056_TX0			(0x2 << 12)
553 #define B2056_TX1			(0x3 << 12)
554 #define B2056_RX0			(0x6 << 12)
555 #define B2056_RX1			(0x7 << 12)
556 #define B2056_ALLTX			(0xE << 12)
557 #define B2056_ALLRX			(0xF << 12)
558 
559 #define B2056_SYN_RESERVED_ADDR0	0x00
560 #define B2056_SYN_IDCODE		0x01
561 #define B2056_SYN_RESERVED_ADDR2	0x02
562 #define B2056_SYN_RESERVED_ADDR3	0x03
563 #define B2056_SYN_RESERVED_ADDR4	0x04
564 #define B2056_SYN_RESERVED_ADDR5	0x05
565 #define B2056_SYN_RESERVED_ADDR6	0x06
566 #define B2056_SYN_RESERVED_ADDR7	0x07
567 #define B2056_SYN_COM_CTRL		0x08
568 #define B2056_SYN_COM_PU		0x09
569 #define B2056_SYN_COM_OVR		0x0A
570 #define B2056_SYN_COM_RESET		0x0B
571 #define B2056_SYN_COM_RCAL		0x0C
572 #define B2056_SYN_COM_RC_RXLPF		0x0D
573 #define B2056_SYN_COM_RC_TXLPF		0x0E
574 #define B2056_SYN_COM_RC_RXHPF		0x0F
575 #define B2056_SYN_RESERVED_ADDR16	0x10
576 #define B2056_SYN_RESERVED_ADDR17	0x11
577 #define B2056_SYN_RESERVED_ADDR18	0x12
578 #define B2056_SYN_RESERVED_ADDR19	0x13
579 #define B2056_SYN_RESERVED_ADDR20	0x14
580 #define B2056_SYN_RESERVED_ADDR21	0x15
581 #define B2056_SYN_RESERVED_ADDR22	0x16
582 #define B2056_SYN_RESERVED_ADDR23	0x17
583 #define B2056_SYN_RESERVED_ADDR24	0x18
584 #define B2056_SYN_RESERVED_ADDR25	0x19
585 #define B2056_SYN_RESERVED_ADDR26	0x1A
586 #define B2056_SYN_RESERVED_ADDR27	0x1B
587 #define B2056_SYN_RESERVED_ADDR28	0x1C
588 #define B2056_SYN_RESERVED_ADDR29	0x1D
589 #define B2056_SYN_RESERVED_ADDR30	0x1E
590 #define B2056_SYN_RESERVED_ADDR31	0x1F
591 #define B2056_SYN_GPIO_MASTER1		0x20
592 #define B2056_SYN_GPIO_MASTER2		0x21
593 #define B2056_SYN_TOPBIAS_MASTER	0x22
594 #define B2056_SYN_TOPBIAS_RCAL		0x23
595 #define B2056_SYN_AFEREG		0x24
596 #define B2056_SYN_TEMPPROCSENSE		0x25
597 #define B2056_SYN_TEMPPROCSENSEIDAC	0x26
598 #define B2056_SYN_TEMPPROCSENSERCAL	0x27
599 #define B2056_SYN_LPO			0x28
600 #define B2056_SYN_VDDCAL_MASTER		0x29
601 #define B2056_SYN_VDDCAL_IDAC		0x2A
602 #define B2056_SYN_VDDCAL_STATUS		0x2B
603 #define B2056_SYN_RCAL_MASTER		0x2C
604 #define B2056_SYN_RCAL_CODE_OUT		0x2D
605 #define B2056_SYN_RCCAL_CTRL0		0x2E
606 #define B2056_SYN_RCCAL_CTRL1		0x2F
607 #define B2056_SYN_RCCAL_CTRL2		0x30
608 #define B2056_SYN_RCCAL_CTRL3		0x31
609 #define B2056_SYN_RCCAL_CTRL4		0x32
610 #define B2056_SYN_RCCAL_CTRL5		0x33
611 #define B2056_SYN_RCCAL_CTRL6		0x34
612 #define B2056_SYN_RCCAL_CTRL7		0x35
613 #define B2056_SYN_RCCAL_CTRL8		0x36
614 #define B2056_SYN_RCCAL_CTRL9		0x37
615 #define B2056_SYN_RCCAL_CTRL10		0x38
616 #define B2056_SYN_RCCAL_CTRL11		0x39
617 #define B2056_SYN_ZCAL_SPARE1		0x3A
618 #define B2056_SYN_ZCAL_SPARE2		0x3B
619 #define B2056_SYN_PLL_MAST1		0x3C
620 #define B2056_SYN_PLL_MAST2		0x3D
621 #define B2056_SYN_PLL_MAST3		0x3E
622 #define B2056_SYN_PLL_BIAS_RESET	0x3F
623 #define B2056_SYN_PLL_XTAL0		0x40
624 #define B2056_SYN_PLL_XTAL1		0x41
625 #define B2056_SYN_PLL_XTAL3		0x42
626 #define B2056_SYN_PLL_XTAL4		0x43
627 #define B2056_SYN_PLL_XTAL5		0x44
628 #define B2056_SYN_PLL_XTAL6		0x45
629 #define B2056_SYN_PLL_REFDIV		0x46
630 #define B2056_SYN_PLL_PFD		0x47
631 #define B2056_SYN_PLL_CP1		0x48
632 #define B2056_SYN_PLL_CP2		0x49
633 #define B2056_SYN_PLL_CP3		0x4A
634 #define B2056_SYN_PLL_LOOPFILTER1	0x4B
635 #define B2056_SYN_PLL_LOOPFILTER2	0x4C
636 #define B2056_SYN_PLL_LOOPFILTER3	0x4D
637 #define B2056_SYN_PLL_LOOPFILTER4	0x4E
638 #define B2056_SYN_PLL_LOOPFILTER5	0x4F
639 #define B2056_SYN_PLL_MMD1		0x50
640 #define B2056_SYN_PLL_MMD2		0x51
641 #define B2056_SYN_PLL_VCO1		0x52
642 #define B2056_SYN_PLL_VCO2		0x53
643 #define B2056_SYN_PLL_MONITOR1		0x54
644 #define B2056_SYN_PLL_MONITOR2		0x55
645 #define B2056_SYN_PLL_VCOCAL1		0x56
646 #define B2056_SYN_PLL_VCOCAL2		0x57
647 #define B2056_SYN_PLL_VCOCAL4		0x58
648 #define B2056_SYN_PLL_VCOCAL5		0x59
649 #define B2056_SYN_PLL_VCOCAL6		0x5A
650 #define B2056_SYN_PLL_VCOCAL7		0x5B
651 #define B2056_SYN_PLL_VCOCAL8		0x5C
652 #define B2056_SYN_PLL_VCOCAL9		0x5D
653 #define B2056_SYN_PLL_VCOCAL10		0x5E
654 #define B2056_SYN_PLL_VCOCAL11		0x5F
655 #define B2056_SYN_PLL_VCOCAL12		0x60
656 #define B2056_SYN_PLL_VCOCAL13		0x61
657 #define B2056_SYN_PLL_VREG		0x62
658 #define B2056_SYN_PLL_STATUS1		0x63
659 #define B2056_SYN_PLL_STATUS2		0x64
660 #define B2056_SYN_PLL_STATUS3		0x65
661 #define B2056_SYN_LOGEN_PU0		0x66
662 #define B2056_SYN_LOGEN_PU1		0x67
663 #define B2056_SYN_LOGEN_PU2		0x68
664 #define B2056_SYN_LOGEN_PU3		0x69
665 #define B2056_SYN_LOGEN_PU5		0x6A
666 #define B2056_SYN_LOGEN_PU6		0x6B
667 #define B2056_SYN_LOGEN_PU7		0x6C
668 #define B2056_SYN_LOGEN_PU8		0x6D
669 #define B2056_SYN_LOGEN_BIAS_RESET	0x6E
670 #define B2056_SYN_LOGEN_RCCR1		0x6F
671 #define B2056_SYN_LOGEN_VCOBUF1		0x70
672 #define B2056_SYN_LOGEN_MIXER1		0x71
673 #define B2056_SYN_LOGEN_MIXER2		0x72
674 #define B2056_SYN_LOGEN_BUF1		0x73
675 #define B2056_SYN_LOGENBUF2		0x74
676 #define B2056_SYN_LOGEN_BUF3		0x75
677 #define B2056_SYN_LOGEN_BUF4		0x76
678 #define B2056_SYN_LOGEN_DIV1		0x77
679 #define B2056_SYN_LOGEN_DIV2		0x78
680 #define B2056_SYN_LOGEN_DIV3		0x79
681 #define B2056_SYN_LOGEN_ACL1		0x7A
682 #define B2056_SYN_LOGEN_ACL2		0x7B
683 #define B2056_SYN_LOGEN_ACL3		0x7C
684 #define B2056_SYN_LOGEN_ACL4		0x7D
685 #define B2056_SYN_LOGEN_ACL5		0x7E
686 #define B2056_SYN_LOGEN_ACL6		0x7F
687 #define B2056_SYN_LOGEN_ACLOUT		0x80
688 #define B2056_SYN_LOGEN_ACLCAL1		0x81
689 #define B2056_SYN_LOGEN_ACLCAL2		0x82
690 #define B2056_SYN_LOGEN_ACLCAL3		0x83
691 #define B2056_SYN_CALEN			0x84
692 #define B2056_SYN_LOGEN_PEAKDET1	0x85
693 #define B2056_SYN_LOGEN_CORE_ACL_OVR	0x86
694 #define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR	0x87
695 #define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR	0x88
696 #define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR	0x89
697 #define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR	0x8A
698 #define B2056_SYN_LOGEN_VCOBUF2		0x8B
699 #define B2056_SYN_LOGEN_MIXER3		0x8C
700 #define B2056_SYN_LOGEN_BUF5		0x8D
701 #define B2056_SYN_LOGEN_BUF6		0x8E
702 #define B2056_SYN_LOGEN_CBUFRX1		0x8F
703 #define B2056_SYN_LOGEN_CBUFRX2		0x90
704 #define B2056_SYN_LOGEN_CBUFRX3		0x91
705 #define B2056_SYN_LOGEN_CBUFRX4		0x92
706 #define B2056_SYN_LOGEN_CBUFTX1		0x93
707 #define B2056_SYN_LOGEN_CBUFTX2		0x94
708 #define B2056_SYN_LOGEN_CBUFTX3		0x95
709 #define B2056_SYN_LOGEN_CBUFTX4		0x96
710 #define B2056_SYN_LOGEN_CMOSRX1		0x97
711 #define B2056_SYN_LOGEN_CMOSRX2		0x98
712 #define B2056_SYN_LOGEN_CMOSRX3		0x99
713 #define B2056_SYN_LOGEN_CMOSRX4		0x9A
714 #define B2056_SYN_LOGEN_CMOSTX1		0x9B
715 #define B2056_SYN_LOGEN_CMOSTX2		0x9C
716 #define B2056_SYN_LOGEN_CMOSTX3		0x9D
717 #define B2056_SYN_LOGEN_CMOSTX4		0x9E
718 #define B2056_SYN_LOGEN_VCOBUF2_OVRVAL	0x9F
719 #define B2056_SYN_LOGEN_MIXER3_OVRVAL	0xA0
720 #define B2056_SYN_LOGEN_BUF5_OVRVAL	0xA1
721 #define B2056_SYN_LOGEN_BUF6_OVRVAL	0xA2
722 #define B2056_SYN_LOGEN_CBUFRX1_OVRVAL	0xA3
723 #define B2056_SYN_LOGEN_CBUFRX2_OVRVAL	0xA4
724 #define B2056_SYN_LOGEN_CBUFRX3_OVRVAL	0xA5
725 #define B2056_SYN_LOGEN_CBUFRX4_OVRVAL	0xA6
726 #define B2056_SYN_LOGEN_CBUFTX1_OVRVAL	0xA7
727 #define B2056_SYN_LOGEN_CBUFTX2_OVRVAL	0xA8
728 #define B2056_SYN_LOGEN_CBUFTX3_OVRVAL	0xA9
729 #define B2056_SYN_LOGEN_CBUFTX4_OVRVAL	0xAA
730 #define B2056_SYN_LOGEN_CMOSRX1_OVRVAL	0xAB
731 #define B2056_SYN_LOGEN_CMOSRX2_OVRVAL	0xAC
732 #define B2056_SYN_LOGEN_CMOSRX3_OVRVAL	0xAD
733 #define B2056_SYN_LOGEN_CMOSRX4_OVRVAL	0xAE
734 #define B2056_SYN_LOGEN_CMOSTX1_OVRVAL	0xAF
735 #define B2056_SYN_LOGEN_CMOSTX2_OVRVAL	0xB0
736 #define B2056_SYN_LOGEN_CMOSTX3_OVRVAL	0xB1
737 #define B2056_SYN_LOGEN_CMOSTX4_OVRVAL	0xB2
738 #define B2056_SYN_LOGEN_ACL_WAITCNT	0xB3
739 #define B2056_SYN_LOGEN_CORE_CALVALID	0xB4
740 #define B2056_SYN_LOGEN_RX_CMOS_CALVALID	0xB5
741 #define B2056_SYN_LOGEN_TX_CMOS_VALID	0xB6
742 
743 #define B2056_TX_RESERVED_ADDR0		0x00
744 #define B2056_TX_IDCODE			0x01
745 #define B2056_TX_RESERVED_ADDR2		0x02
746 #define B2056_TX_RESERVED_ADDR3		0x03
747 #define B2056_TX_RESERVED_ADDR4		0x04
748 #define B2056_TX_RESERVED_ADDR5		0x05
749 #define B2056_TX_RESERVED_ADDR6		0x06
750 #define B2056_TX_RESERVED_ADDR7		0x07
751 #define B2056_TX_COM_CTRL		0x08
752 #define B2056_TX_COM_PU			0x09
753 #define B2056_TX_COM_OVR		0x0A
754 #define B2056_TX_COM_RESET		0x0B
755 #define B2056_TX_COM_RCAL		0x0C
756 #define B2056_TX_COM_RC_RXLPF		0x0D
757 #define B2056_TX_COM_RC_TXLPF		0x0E
758 #define B2056_TX_COM_RC_RXHPF		0x0F
759 #define B2056_TX_RESERVED_ADDR16	0x10
760 #define B2056_TX_RESERVED_ADDR17	0x11
761 #define B2056_TX_RESERVED_ADDR18	0x12
762 #define B2056_TX_RESERVED_ADDR19	0x13
763 #define B2056_TX_RESERVED_ADDR20	0x14
764 #define B2056_TX_RESERVED_ADDR21	0x15
765 #define B2056_TX_RESERVED_ADDR22	0x16
766 #define B2056_TX_RESERVED_ADDR23	0x17
767 #define B2056_TX_RESERVED_ADDR24	0x18
768 #define B2056_TX_RESERVED_ADDR25	0x19
769 #define B2056_TX_RESERVED_ADDR26	0x1A
770 #define B2056_TX_RESERVED_ADDR27	0x1B
771 #define B2056_TX_RESERVED_ADDR28	0x1C
772 #define B2056_TX_RESERVED_ADDR29	0x1D
773 #define B2056_TX_RESERVED_ADDR30	0x1E
774 #define B2056_TX_RESERVED_ADDR31	0x1F
775 #define B2056_TX_IQCAL_GAIN_BW		0x20
776 #define B2056_TX_LOFT_FINE_I		0x21
777 #define B2056_TX_LOFT_FINE_Q		0x22
778 #define B2056_TX_LOFT_COARSE_I		0x23
779 #define B2056_TX_LOFT_COARSE_Q		0x24
780 #define B2056_TX_TX_COM_MASTER1		0x25
781 #define B2056_TX_TX_COM_MASTER2		0x26
782 #define B2056_TX_RXIQCAL_TXMUX		0x27
783 #define B2056_TX_TX_SSI_MASTER		0x28
784 #define B2056_TX_IQCAL_VCM_HG		0x29
785 #define B2056_TX_IQCAL_IDAC		0x2A
786 #define B2056_TX_TSSI_VCM		0x2B
787 #define B2056_TX_TX_AMP_DET		0x2C
788 #define B2056_TX_TX_SSI_MUX		0x2D
789 #define B2056_TX_TSSIA			0x2E
790 #define B2056_TX_TSSIG			0x2F
791 #define B2056_TX_TSSI_MISC1		0x30
792 #define B2056_TX_TSSI_MISC2		0x31
793 #define B2056_TX_TSSI_MISC3		0x32
794 #define B2056_TX_PA_SPARE1		0x33
795 #define B2056_TX_PA_SPARE2		0x34
796 #define B2056_TX_INTPAA_MASTER		0x35
797 #define B2056_TX_INTPAA_GAIN		0x36
798 #define B2056_TX_INTPAA_BOOST_TUNE	0x37
799 #define B2056_TX_INTPAA_IAUX_STAT	0x38
800 #define B2056_TX_INTPAA_IAUX_DYN	0x39
801 #define B2056_TX_INTPAA_IMAIN_STAT	0x3A
802 #define B2056_TX_INTPAA_IMAIN_DYN	0x3B
803 #define B2056_TX_INTPAA_CASCBIAS	0x3C
804 #define B2056_TX_INTPAA_PASLOPE		0x3D
805 #define B2056_TX_INTPAA_PA_MISC		0x3E
806 #define B2056_TX_INTPAG_MASTER		0x3F
807 #define B2056_TX_INTPAG_GAIN		0x40
808 #define B2056_TX_INTPAG_BOOST_TUNE	0x41
809 #define B2056_TX_INTPAG_IAUX_STAT	0x42
810 #define B2056_TX_INTPAG_IAUX_DYN	0x43
811 #define B2056_TX_INTPAG_IMAIN_STAT	0x44
812 #define B2056_TX_INTPAG_IMAIN_DYN	0x45
813 #define B2056_TX_INTPAG_CASCBIAS	0x46
814 #define B2056_TX_INTPAG_PASLOPE		0x47
815 #define B2056_TX_INTPAG_PA_MISC		0x48
816 #define B2056_TX_PADA_MASTER		0x49
817 #define B2056_TX_PADA_IDAC		0x4A
818 #define B2056_TX_PADA_CASCBIAS		0x4B
819 #define B2056_TX_PADA_GAIN		0x4C
820 #define B2056_TX_PADA_BOOST_TUNE	0x4D
821 #define B2056_TX_PADA_SLOPE		0x4E
822 #define B2056_TX_PADG_MASTER		0x4F
823 #define B2056_TX_PADG_IDAC		0x50
824 #define B2056_TX_PADG_CASCBIAS		0x51
825 #define B2056_TX_PADG_GAIN		0x52
826 #define B2056_TX_PADG_BOOST_TUNE	0x53
827 #define B2056_TX_PADG_SLOPE		0x54
828 #define B2056_TX_PGAA_MASTER		0x55
829 #define B2056_TX_PGAA_IDAC		0x56
830 #define B2056_TX_PGAA_GAIN		0x57
831 #define B2056_TX_PGAA_BOOST_TUNE	0x58
832 #define B2056_TX_PGAA_SLOPE		0x59
833 #define B2056_TX_PGAA_MISC		0x5A
834 #define B2056_TX_PGAG_MASTER		0x5B
835 #define B2056_TX_PGAG_IDAC		0x5C
836 #define B2056_TX_PGAG_GAIN		0x5D
837 #define B2056_TX_PGAG_BOOST_TUNE	0x5E
838 #define B2056_TX_PGAG_SLOPE		0x5F
839 #define B2056_TX_PGAG_MISC		0x60
840 #define B2056_TX_MIXA_MASTER		0x61
841 #define B2056_TX_MIXA_BOOST_TUNE	0x62
842 #define B2056_TX_MIXG			0x63
843 #define B2056_TX_MIXG_BOOST_TUNE	0x64
844 #define B2056_TX_BB_GM_MASTER		0x65
845 #define B2056_TX_GMBB_GM		0x66
846 #define B2056_TX_GMBB_IDAC		0x67
847 #define B2056_TX_TXLPF_MASTER		0x68
848 #define B2056_TX_TXLPF_RCCAL		0x69
849 #define B2056_TX_TXLPF_RCCAL_OFF0	0x6A
850 #define B2056_TX_TXLPF_RCCAL_OFF1	0x6B
851 #define B2056_TX_TXLPF_RCCAL_OFF2	0x6C
852 #define B2056_TX_TXLPF_RCCAL_OFF3	0x6D
853 #define B2056_TX_TXLPF_RCCAL_OFF4	0x6E
854 #define B2056_TX_TXLPF_RCCAL_OFF5	0x6F
855 #define B2056_TX_TXLPF_RCCAL_OFF6	0x70
856 #define B2056_TX_TXLPF_BW		0x71
857 #define B2056_TX_TXLPF_GAIN		0x72
858 #define B2056_TX_TXLPF_IDAC		0x73
859 #define B2056_TX_TXLPF_IDAC_0		0x74
860 #define B2056_TX_TXLPF_IDAC_1		0x75
861 #define B2056_TX_TXLPF_IDAC_2		0x76
862 #define B2056_TX_TXLPF_IDAC_3		0x77
863 #define B2056_TX_TXLPF_IDAC_4		0x78
864 #define B2056_TX_TXLPF_IDAC_5		0x79
865 #define B2056_TX_TXLPF_IDAC_6		0x7A
866 #define B2056_TX_TXLPF_OPAMP_IDAC	0x7B
867 #define B2056_TX_TXLPF_MISC		0x7C
868 #define B2056_TX_TXSPARE1		0x7D
869 #define B2056_TX_TXSPARE2		0x7E
870 #define B2056_TX_TXSPARE3		0x7F
871 #define B2056_TX_TXSPARE4		0x80
872 #define B2056_TX_TXSPARE5		0x81
873 #define B2056_TX_TXSPARE6		0x82
874 #define B2056_TX_TXSPARE7		0x83
875 #define B2056_TX_TXSPARE8		0x84
876 #define B2056_TX_TXSPARE9		0x85
877 #define B2056_TX_TXSPARE10		0x86
878 #define B2056_TX_TXSPARE11		0x87
879 #define B2056_TX_TXSPARE12		0x88
880 #define B2056_TX_TXSPARE13		0x89
881 #define B2056_TX_TXSPARE14		0x8A
882 #define B2056_TX_TXSPARE15		0x8B
883 #define B2056_TX_TXSPARE16		0x8C
884 #define B2056_TX_STATUS_INTPA_GAIN	0x8D
885 #define B2056_TX_STATUS_PAD_GAIN	0x8E
886 #define B2056_TX_STATUS_PGA_GAIN	0x8F
887 #define B2056_TX_STATUS_GM_TXLPF_GAIN	0x90
888 #define B2056_TX_STATUS_TXLPF_BW	0x91
889 #define B2056_TX_STATUS_TXLPF_RC	0x92
890 #define B2056_TX_GMBB_IDAC0		0x93
891 #define B2056_TX_GMBB_IDAC1		0x94
892 #define B2056_TX_GMBB_IDAC2		0x95
893 #define B2056_TX_GMBB_IDAC3		0x96
894 #define B2056_TX_GMBB_IDAC4		0x97
895 #define B2056_TX_GMBB_IDAC5		0x98
896 #define B2056_TX_GMBB_IDAC6		0x99
897 #define B2056_TX_GMBB_IDAC7		0x9A
898 
899 #define B2056_RX_RESERVED_ADDR0		0x00
900 #define B2056_RX_IDCODE			0x01
901 #define B2056_RX_RESERVED_ADDR2		0x02
902 #define B2056_RX_RESERVED_ADDR3		0x03
903 #define B2056_RX_RESERVED_ADDR4		0x04
904 #define B2056_RX_RESERVED_ADDR5		0x05
905 #define B2056_RX_RESERVED_ADDR6		0x06
906 #define B2056_RX_RESERVED_ADDR7		0x07
907 #define B2056_RX_COM_CTRL		0x08
908 #define B2056_RX_COM_PU			0x09
909 #define B2056_RX_COM_OVR		0x0A
910 #define B2056_RX_COM_RESET		0x0B
911 #define B2056_RX_COM_RCAL		0x0C
912 #define B2056_RX_COM_RC_RXLPF		0x0D
913 #define B2056_RX_COM_RC_TXLPF		0x0E
914 #define B2056_RX_COM_RC_RXHPF		0x0F
915 #define B2056_RX_RESERVED_ADDR16	0x10
916 #define B2056_RX_RESERVED_ADDR17	0x11
917 #define B2056_RX_RESERVED_ADDR18	0x12
918 #define B2056_RX_RESERVED_ADDR19	0x13
919 #define B2056_RX_RESERVED_ADDR20	0x14
920 #define B2056_RX_RESERVED_ADDR21	0x15
921 #define B2056_RX_RESERVED_ADDR22	0x16
922 #define B2056_RX_RESERVED_ADDR23	0x17
923 #define B2056_RX_RESERVED_ADDR24	0x18
924 #define B2056_RX_RESERVED_ADDR25	0x19
925 #define B2056_RX_RESERVED_ADDR26	0x1A
926 #define B2056_RX_RESERVED_ADDR27	0x1B
927 #define B2056_RX_RESERVED_ADDR28	0x1C
928 #define B2056_RX_RESERVED_ADDR29	0x1D
929 #define B2056_RX_RESERVED_ADDR30	0x1E
930 #define B2056_RX_RESERVED_ADDR31	0x1F
931 #define B2056_RX_RXIQCAL_RXMUX		0x20
932 #define B2056_RX_RSSI_PU		0x21
933 #define B2056_RX_RSSI_SEL		0x22
934 #define B2056_RX_RSSI_GAIN		0x23
935 #define B2056_RX_RSSI_NB_IDAC		0x24
936 #define B2056_RX_RSSI_WB2I_IDAC_1	0x25
937 #define B2056_RX_RSSI_WB2I_IDAC_2	0x26
938 #define B2056_RX_RSSI_WB2Q_IDAC_1	0x27
939 #define B2056_RX_RSSI_WB2Q_IDAC_2	0x28
940 #define B2056_RX_RSSI_POLE		0x29
941 #define B2056_RX_RSSI_WB1_IDAC		0x2A
942 #define B2056_RX_RSSI_MISC		0x2B
943 #define B2056_RX_LNAA_MASTER		0x2C
944 #define B2056_RX_LNAA_TUNE		0x2D
945 #define B2056_RX_LNAA_GAIN		0x2E
946 #define B2056_RX_LNA_A_SLOPE		0x2F
947 #define B2056_RX_BIASPOLE_LNAA1_IDAC	0x30
948 #define B2056_RX_LNAA2_IDAC		0x31
949 #define B2056_RX_LNA1A_MISC		0x32
950 #define B2056_RX_LNAG_MASTER		0x33
951 #define B2056_RX_LNAG_TUNE		0x34
952 #define B2056_RX_LNAG_GAIN		0x35
953 #define B2056_RX_LNA_G_SLOPE		0x36
954 #define B2056_RX_BIASPOLE_LNAG1_IDAC	0x37
955 #define B2056_RX_LNAG2_IDAC		0x38
956 #define B2056_RX_LNA1G_MISC		0x39
957 #define B2056_RX_MIXA_MASTER		0x3A
958 #define B2056_RX_MIXA_VCM		0x3B
959 #define B2056_RX_MIXA_CTRLPTAT		0x3C
960 #define B2056_RX_MIXA_LOB_BIAS		0x3D
961 #define B2056_RX_MIXA_CORE_IDAC		0x3E
962 #define B2056_RX_MIXA_CMFB_IDAC		0x3F
963 #define B2056_RX_MIXA_BIAS_AUX		0x40
964 #define B2056_RX_MIXA_BIAS_MAIN		0x41
965 #define B2056_RX_MIXA_BIAS_MISC		0x42
966 #define B2056_RX_MIXA_MAST_BIAS		0x43
967 #define B2056_RX_MIXG_MASTER		0x44
968 #define B2056_RX_MIXG_VCM		0x45
969 #define B2056_RX_MIXG_CTRLPTAT		0x46
970 #define B2056_RX_MIXG_LOB_BIAS		0x47
971 #define B2056_RX_MIXG_CORE_IDAC		0x48
972 #define B2056_RX_MIXG_CMFB_IDAC		0x49
973 #define B2056_RX_MIXG_BIAS_AUX		0x4A
974 #define B2056_RX_MIXG_BIAS_MAIN		0x4B
975 #define B2056_RX_MIXG_BIAS_MISC		0x4C
976 #define B2056_RX_MIXG_MAST_BIAS		0x4D
977 #define B2056_RX_TIA_MASTER		0x4E
978 #define B2056_RX_TIA_IOPAMP		0x4F
979 #define B2056_RX_TIA_QOPAMP		0x50
980 #define B2056_RX_TIA_IMISC		0x51
981 #define B2056_RX_TIA_QMISC		0x52
982 #define B2056_RX_TIA_GAIN		0x53
983 #define B2056_RX_TIA_SPARE1		0x54
984 #define B2056_RX_TIA_SPARE2		0x55
985 #define B2056_RX_BB_LPF_MASTER		0x56
986 #define B2056_RX_AACI_MASTER		0x57
987 #define B2056_RX_RXLPF_IDAC		0x58
988 #define B2056_RX_RXLPF_OPAMPBIAS_LOWQ	0x59
989 #define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ	0x5A
990 #define B2056_RX_RXLPF_BIAS_DCCANCEL	0x5B
991 #define B2056_RX_RXLPF_OUTVCM		0x5C
992 #define B2056_RX_RXLPF_INVCM_BODY	0x5D
993 #define B2056_RX_RXLPF_CC_OP		0x5E
994 #define B2056_RX_RXLPF_GAIN		0x5F
995 #define B2056_RX_RXLPF_Q_BW		0x60
996 #define B2056_RX_RXLPF_HP_CORNER_BW	0x61
997 #define B2056_RX_RXLPF_RCCAL_HPC	0x62
998 #define B2056_RX_RXHPF_OFF0		0x63
999 #define B2056_RX_RXHPF_OFF1		0x64
1000 #define B2056_RX_RXHPF_OFF2		0x65
1001 #define B2056_RX_RXHPF_OFF3		0x66
1002 #define B2056_RX_RXHPF_OFF4		0x67
1003 #define B2056_RX_RXHPF_OFF5		0x68
1004 #define B2056_RX_RXHPF_OFF6		0x69
1005 #define B2056_RX_RXHPF_OFF7		0x6A
1006 #define B2056_RX_RXLPF_RCCAL_LPC	0x6B
1007 #define B2056_RX_RXLPF_OFF_0		0x6C
1008 #define B2056_RX_RXLPF_OFF_1		0x6D
1009 #define B2056_RX_RXLPF_OFF_2		0x6E
1010 #define B2056_RX_RXLPF_OFF_3		0x6F
1011 #define B2056_RX_RXLPF_OFF_4		0x70
1012 #define B2056_RX_UNUSED			0x71
1013 #define B2056_RX_VGA_MASTER		0x72
1014 #define B2056_RX_VGA_BIAS		0x73
1015 #define B2056_RX_VGA_BIAS_DCCANCEL	0x74
1016 #define B2056_RX_VGA_GAIN		0x75
1017 #define B2056_RX_VGA_HP_CORNER_BW	0x76
1018 #define B2056_RX_VGABUF_BIAS		0x77
1019 #define B2056_RX_VGABUF_GAIN_BW		0x78
1020 #define B2056_RX_TXFBMIX_A		0x79
1021 #define B2056_RX_TXFBMIX_G		0x7A
1022 #define B2056_RX_RXSPARE1		0x7B
1023 #define B2056_RX_RXSPARE2		0x7C
1024 #define B2056_RX_RXSPARE3		0x7D
1025 #define B2056_RX_RXSPARE4		0x7E
1026 #define B2056_RX_RXSPARE5		0x7F
1027 #define B2056_RX_RXSPARE6		0x80
1028 #define B2056_RX_RXSPARE7		0x81
1029 #define B2056_RX_RXSPARE8		0x82
1030 #define B2056_RX_RXSPARE9		0x83
1031 #define B2056_RX_RXSPARE10		0x84
1032 #define B2056_RX_RXSPARE11		0x85
1033 #define B2056_RX_RXSPARE12		0x86
1034 #define B2056_RX_RXSPARE13		0x87
1035 #define B2056_RX_RXSPARE14		0x88
1036 #define B2056_RX_RXSPARE15		0x89
1037 #define B2056_RX_RXSPARE16		0x8A
1038 #define B2056_RX_STATUS_LNAA_GAIN	0x8B
1039 #define B2056_RX_STATUS_LNAG_GAIN	0x8C
1040 #define B2056_RX_STATUS_MIXTIA_GAIN	0x8D
1041 #define B2056_RX_STATUS_RXLPF_GAIN	0x8E
1042 #define B2056_RX_STATUS_VGA_BUF_GAIN	0x8F
1043 #define B2056_RX_STATUS_RXLPF_Q		0x90
1044 #define B2056_RX_STATUS_RXLPF_BUF_BW	0x91
1045 #define B2056_RX_STATUS_RXLPF_VGA_HPC	0x92
1046 #define B2056_RX_STATUS_RXLPF_RC	0x93
1047 #define B2056_RX_STATUS_HPC_RC		0x94
1048 
1049 #define B2056_LNA1_A_PU			0x01
1050 #define B2056_LNA2_A_PU			0x02
1051 #define B2056_LNA1_G_PU			0x01
1052 #define B2056_LNA2_G_PU			0x02
1053 #define B2056_MIXA_PU_I			0x01
1054 #define B2056_MIXA_PU_Q			0x02
1055 #define B2056_MIXA_PU_GM		0x10
1056 #define B2056_MIXG_PU_I			0x01
1057 #define B2056_MIXG_PU_Q			0x02
1058 #define B2056_MIXG_PU_GM		0x10
1059 #define B2056_TIA_PU			0x01
1060 #define B2056_BB_LPF_PU			0x20
1061 #define B2056_W1_PU			0x02
1062 #define B2056_W2_PU			0x04
1063 #define B2056_NB_PU			0x08
1064 #define B2056_RSSI_W1_SEL		0x02
1065 #define B2056_RSSI_W2_SEL		0x04
1066 #define B2056_RSSI_NB_SEL		0x08
1067 #define B2056_VCM_MASK			0x1C
1068 #define B2056_RSSI_VCM_SHIFT		0x02
1069 
1070 struct bwn_nphy_channeltab_entry_rev3 {
1071 	/* The channel frequency in MHz */
1072 	uint16_t freq;
1073 	/* Radio register values on channelswitch */
1074 	uint8_t radio_syn_pll_vcocal1;
1075 	uint8_t radio_syn_pll_vcocal2;
1076 	uint8_t radio_syn_pll_refdiv;
1077 	uint8_t radio_syn_pll_mmd2;
1078 	uint8_t radio_syn_pll_mmd1;
1079 	uint8_t radio_syn_pll_loopfilter1;
1080 	uint8_t radio_syn_pll_loopfilter2;
1081 	uint8_t radio_syn_pll_loopfilter3;
1082 	uint8_t radio_syn_pll_loopfilter4;
1083 	uint8_t radio_syn_pll_loopfilter5;
1084 	uint8_t radio_syn_reserved_addr27;
1085 	uint8_t radio_syn_reserved_addr28;
1086 	uint8_t radio_syn_reserved_addr29;
1087 	uint8_t radio_syn_logen_vcobuf1;
1088 	uint8_t radio_syn_logen_mixer2;
1089 	uint8_t radio_syn_logen_buf3;
1090 	uint8_t radio_syn_logen_buf4;
1091 	uint8_t radio_rx0_lnaa_tune;
1092 	uint8_t radio_rx0_lnag_tune;
1093 	uint8_t radio_tx0_intpaa_boost_tune;
1094 	uint8_t radio_tx0_intpag_boost_tune;
1095 	uint8_t radio_tx0_pada_boost_tune;
1096 	uint8_t radio_tx0_padg_boost_tune;
1097 	uint8_t radio_tx0_pgaa_boost_tune;
1098 	uint8_t radio_tx0_pgag_boost_tune;
1099 	uint8_t radio_tx0_mixa_boost_tune;
1100 	uint8_t radio_tx0_mixg_boost_tune;
1101 	uint8_t radio_rx1_lnaa_tune;
1102 	uint8_t radio_rx1_lnag_tune;
1103 	uint8_t radio_tx1_intpaa_boost_tune;
1104 	uint8_t radio_tx1_intpag_boost_tune;
1105 	uint8_t radio_tx1_pada_boost_tune;
1106 	uint8_t radio_tx1_padg_boost_tune;
1107 	uint8_t radio_tx1_pgaa_boost_tune;
1108 	uint8_t radio_tx1_pgag_boost_tune;
1109 	uint8_t radio_tx1_mixa_boost_tune;
1110 	uint8_t radio_tx1_mixg_boost_tune;
1111 	/* PHY register values on channelswitch */
1112 	struct bwn_phy_n_sfo_cfg phy_regs;
1113 };
1114 
1115 void b2056_upload_inittabs(struct bwn_mac *mac,
1116 			   bool ghz5, bool ignore_uploadflag);
1117 void b2056_upload_syn_pll_cp2(struct bwn_mac *mac, bool ghz5);
1118 
1119 /* Get the NPHY Channel Switch Table entry for a channel.
1120  * Returns NULL on failure to find an entry. */
1121 const struct bwn_nphy_channeltab_entry_rev3 *
1122 bwn_nphy_get_chantabent_rev3(struct bwn_mac *mac, uint16_t freq);
1123 
1124 #endif	/* __IF_BWN_RADIO_2056_H__ */
1125