1 /*-
2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 #include "opt_wlan.h"
29
30 #include <sys/param.h>
31 #include <sys/lock.h>
32 #include <sys/mutex.h>
33 #include <sys/mbuf.h>
34 #include <sys/kernel.h>
35 #include <sys/socket.h>
36 #include <sys/systm.h>
37 #include <sys/malloc.h>
38 #include <sys/queue.h>
39 #include <sys/taskqueue.h>
40 #include <sys/bus.h>
41 #include <sys/endian.h>
42 #include <sys/linker.h>
43
44 #include <net/if.h>
45 #include <net/ethernet.h>
46 #include <net/if_media.h>
47
48 #include <net80211/ieee80211_var.h>
49 #include <net80211/ieee80211_radiotap.h>
50
51 #include <dev/rtwn/if_rtwnreg.h>
52 #include <dev/rtwn/if_rtwnvar.h>
53
54 #include <dev/rtwn/rtl8812a/r12a_var.h>
55
56 #include <dev/rtwn/rtl8812a/usb/r12au.h>
57 #include <dev/rtwn/rtl8812a/usb/r12au_reg.h>
58
59 void
r12au_init_rx_agg(struct rtwn_softc * sc)60 r12au_init_rx_agg(struct rtwn_softc *sc)
61 {
62 struct r12a_softc *rs = sc->sc_priv;
63
64 /* Rx aggregation (USB). */
65 rtwn_write_2(sc, R92C_RXDMA_AGG_PG_TH,
66 rs->ac_usb_dma_size | (rs->ac_usb_dma_time << 8));
67 rtwn_setbits_1(sc, R92C_TRXDMA_CTRL, 0,
68 R92C_TRXDMA_CTRL_RXDMA_AGG_EN);
69 }
70
71 void
r12au_init_burstlen_usb2(struct rtwn_softc * sc)72 r12au_init_burstlen_usb2(struct rtwn_softc *sc)
73 {
74 const uint8_t dma_count = R12A_DMA_MODE | SM(R12A_BURST_CNT, 3);
75
76 if ((rtwn_read_1(sc, R92C_USB_INFO) & 0x30) == 0) {
77 /* Set burst packet length to 512 B. */
78 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M,
79 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB2));
80 } else {
81 /* Set burst packet length to 64 B. */
82 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M,
83 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB1));
84 }
85 }
86
87 void
r12au_init_burstlen(struct rtwn_softc * sc)88 r12au_init_burstlen(struct rtwn_softc *sc)
89 {
90 const uint8_t dma_count = R12A_DMA_MODE | SM(R12A_BURST_CNT, 3);
91
92 if (rtwn_read_1(sc, R92C_TYPE_ID + 3) & 0x80)
93 r12au_init_burstlen_usb2(sc);
94 else { /* USB 3.0 */
95 /* Set burst packet length to 1 KB. */
96 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M,
97 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB3));
98
99 rtwn_setbits_1(sc, 0xf008, 0x18, 0);
100 }
101 }
102
103 static void
r12au_arfb_init(struct rtwn_softc * sc)104 r12au_arfb_init(struct rtwn_softc *sc)
105 {
106 /* ARFB table 9 for 11ac 5G 2SS. */
107 rtwn_write_4(sc, R12A_ARFR_5G(0), 0x00000010);
108 rtwn_write_4(sc, R12A_ARFR_5G(0) + 4, 0xfffff000);
109
110 /* ARFB table 10 for 11ac 5G 1SS. */
111 rtwn_write_4(sc, R12A_ARFR_5G(1), 0x00000010);
112 rtwn_write_4(sc, R12A_ARFR_5G(1) + 4, 0x003ff000);
113
114 /* ARFB table 11 for 11ac 2G 1SS. */
115 rtwn_write_4(sc, R12A_ARFR_2G(0), 0x00000015);
116 rtwn_write_4(sc, R12A_ARFR_2G(0) + 4, 0x003ff000);
117
118 /* ARFB table 12 for 11ac 2G 2SS. */
119 rtwn_write_4(sc, R12A_ARFR_2G(1), 0x00000015);
120 rtwn_write_4(sc, R12A_ARFR_2G(1) + 4, 0xffcff000);
121 }
122
123 void
r12au_init_ampdu_fwhw(struct rtwn_softc * sc)124 r12au_init_ampdu_fwhw(struct rtwn_softc *sc)
125 {
126 rtwn_setbits_1(sc, R92C_FWHW_TXQ_CTRL,
127 R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW, 0);
128 }
129
130 void
r12au_init_ampdu(struct rtwn_softc * sc)131 r12au_init_ampdu(struct rtwn_softc *sc)
132 {
133 struct r12a_softc *rs = sc->sc_priv;
134
135 /* Rx interval (USB3). */
136 rtwn_write_1(sc, 0xf050, 0x01);
137
138 /* burst length = 4 */
139 rtwn_write_2(sc, R92C_RXDMA_STATUS, 0x7400);
140
141 rtwn_write_1(sc, R92C_RXDMA_STATUS + 1, 0xf5);
142
143 /* Setup AMPDU aggregation. */
144 rtwn_write_1(sc, R12A_AMPDU_MAX_TIME, rs->ampdu_max_time);
145 rtwn_write_4(sc, R12A_AMPDU_MAX_LENGTH, 0xffffffff);
146
147 /* 80 MHz clock (again?) */
148 rtwn_write_1(sc, R92C_USTIME_TSF, 0x50);
149 rtwn_write_1(sc, R92C_USTIME_EDCA, 0x50);
150
151 rtwn_r12a_init_burstlen(sc);
152
153 /* Enable single packet AMPDU. */
154 rtwn_setbits_1(sc, R12A_HT_SINGLE_AMPDU, 0,
155 R12A_HT_SINGLE_AMPDU_PKT_ENA);
156
157 /* 11K packet length for VHT. */
158 rtwn_write_1(sc, R92C_RX_PKT_LIMIT, 0x18);
159
160 rtwn_write_1(sc, R92C_PIFS, 0);
161
162 rtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x1f1f);
163
164 rtwn_r12a_init_ampdu_fwhw(sc);
165
166 /* Do not reset MAC. */
167 rtwn_setbits_1(sc, R92C_RSV_CTRL, 0, 0x60);
168
169 r12au_arfb_init(sc);
170 }
171
172 void
r12au_post_init(struct rtwn_softc * sc)173 r12au_post_init(struct rtwn_softc *sc)
174 {
175
176 /* Setup RTS BW (equal to data BW). */
177 rtwn_setbits_1(sc, R92C_QUEUE_CTRL, 0x08, 0);
178
179 rtwn_write_1(sc, R12A_EARLY_MODE_CONTROL + 3, 0x01);
180
181 /* Reset USB mode switch setting. */
182 rtwn_write_1(sc, R12A_SDIO_CTRL, 0);
183 rtwn_write_1(sc, R92C_ACLK_MON, 0);
184
185 rtwn_write_1(sc, R92C_USB_HRPWM, 0);
186
187 #ifndef RTWN_WITHOUT_UCODE
188 if (sc->sc_flags & RTWN_FW_LOADED) {
189 if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) {
190 /* TODO: implement */
191 sc->sc_ratectl = RTWN_RATECTL_NET80211;
192 } else
193 sc->sc_ratectl = sc->sc_ratectl_sysctl;
194 } else
195 #endif
196 sc->sc_ratectl = RTWN_RATECTL_NONE;
197 }
198