xref: /freebsd/sys/dev/qat/qat_common/adf_freebsd_heartbeat_dbg.c (revision 71625ec9ad2a9bc8c09784fbd23b759830e0ee5f)
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
3 #include <sys/types.h>
4 #include <sys/sysctl.h>
5 #include <sys/systm.h>
6 #include "adf_heartbeat_dbg.h"
7 #include "adf_common_drv.h"
8 #include "adf_cfg.h"
9 #include "adf_heartbeat.h"
10 
11 #define HB_SYSCTL_ERR(RC)                                                           \
12 	do {                                                                        \
13 		if (RC == NULL) {                                                   \
14 			printf(                                                     \
15 			    "Memory allocation failed in adf_heartbeat_dbg_add\n"); \
16 			return ENOMEM;                                              \
17 		}                                                                   \
18 	} while (0)
19 
20 /* Handler for HB status check */
qat_dev_hb_read(SYSCTL_HANDLER_ARGS)21 static int qat_dev_hb_read(SYSCTL_HANDLER_ARGS)
22 {
23 	enum adf_device_heartbeat_status hb_status = DEV_HB_UNRESPONSIVE;
24 	struct adf_accel_dev *accel_dev = arg1;
25 	struct adf_heartbeat *hb;
26 	int ret = 0;
27 	if (accel_dev == NULL) {
28 		return EINVAL;
29 	}
30 	hb = accel_dev->heartbeat;
31 
32 	/* if FW is loaded, proceed else set heartbeat down */
33 	if (test_bit(ADF_STATUS_AE_UCODE_LOADED, &accel_dev->status)) {
34 		adf_heartbeat_status(accel_dev, &hb_status);
35 	}
36 	if (hb_status == DEV_HB_ALIVE) {
37 		hb->heartbeat.hb_sysctlvar = 1;
38 	} else {
39 		hb->heartbeat.hb_sysctlvar = 0;
40 	}
41 	ret = sysctl_handle_int(oidp, &hb->heartbeat.hb_sysctlvar, 0, req);
42 	return ret;
43 }
44 
45 int
adf_heartbeat_dbg_add(struct adf_accel_dev * accel_dev)46 adf_heartbeat_dbg_add(struct adf_accel_dev *accel_dev)
47 {
48 	struct sysctl_ctx_list *qat_hb_sysctl_ctx;
49 	struct sysctl_oid *qat_hb_sysctl_tree;
50 	struct adf_heartbeat *hb;
51 	struct sysctl_oid *rc = 0;
52 
53 	if (accel_dev == NULL) {
54 		return EINVAL;
55 	}
56 
57 	if (adf_heartbeat_init(accel_dev))
58 		return EINVAL;
59 
60 	hb = accel_dev->heartbeat;
61 	qat_hb_sysctl_ctx =
62 	    device_get_sysctl_ctx(accel_dev->accel_pci_dev.pci_dev);
63 	qat_hb_sysctl_tree =
64 	    device_get_sysctl_tree(accel_dev->accel_pci_dev.pci_dev);
65 
66 	rc = SYSCTL_ADD_UINT(qat_hb_sysctl_ctx,
67 			     SYSCTL_CHILDREN(qat_hb_sysctl_tree),
68 			     OID_AUTO,
69 			     "heartbeat_sent",
70 			     CTLFLAG_RD,
71 			     &hb->hb_sent_counter,
72 			     0,
73 			     "HB sent count");
74 	HB_SYSCTL_ERR(rc);
75 
76 	rc = SYSCTL_ADD_UINT(qat_hb_sysctl_ctx,
77 			     SYSCTL_CHILDREN(qat_hb_sysctl_tree),
78 			     OID_AUTO,
79 			     "heartbeat_failed",
80 			     CTLFLAG_RD,
81 			     &hb->hb_failed_counter,
82 			     0,
83 			     "HB failed count");
84 	HB_SYSCTL_ERR(rc);
85 
86 	rc = SYSCTL_ADD_PROC(qat_hb_sysctl_ctx,
87 			     SYSCTL_CHILDREN(qat_hb_sysctl_tree),
88 			     OID_AUTO,
89 			     "heartbeat",
90 			     CTLTYPE_INT | CTLFLAG_RD,
91 			     accel_dev,
92 			     0,
93 			     qat_dev_hb_read,
94 			     "IU",
95 			     "QAT device status");
96 	HB_SYSCTL_ERR(rc);
97 	return 0;
98 }
99 
100 int
adf_heartbeat_dbg_del(struct adf_accel_dev * accel_dev)101 adf_heartbeat_dbg_del(struct adf_accel_dev *accel_dev)
102 {
103 	adf_heartbeat_clean(accel_dev);
104 	return 0;
105 }
106