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Searched defs:pll_settings (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dclock_source.h107 struct pll_settings { struct
108 uint32_t actual_pix_clk_100hz;
109 uint32_t adjusted_pix_clk_100hz;
110 uint32_t calculated_pix_clk_100hz;
111 uint32_t vco_freq;
112 uint32_t reference_freq;
113 uint32_t reference_divider;
114 uint32_t feedback_divider;
115 uint32_t fract_feedback_divider;
116 uint32_t pix_clk_post_divider;
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/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.c197 struct pll_settings *pll_settings, in calc_fb_divider_checking_tolerance()
253 struct pll_settings *pll_settings, in calc_pll_dividers_in_range()
295 struct pll_settings *pll_settings) in calculate_pixel_clock_pll_dividers()
399 struct pll_settings *pll_settings) in pll_adjust_pix_clk()
477 struct pll_settings *pll_settings, in dce110_get_pix_clk_dividers_helper()
539 struct pll_settings *pll_settings, in dce112_get_pix_clk_dividers_helper()
571 struct pll_settings *pll_settings) in dce110_get_pix_clk_dividers()
604 struct pll_settings *pll_settings) in dce112_get_pix_clk_dividers()
650 const struct pll_settings *pll_settings, in calculate_ss()
716 enum signal_type signal, struct pll_settings *pll_settings) in enable_spread_spectrum()
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