1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2013 Red Hat
5 * Author: Rob Clark <robdclark@gmail.com>
6 */
7
8 #ifndef _DPU_PLANE_H_
9 #define _DPU_PLANE_H_
10
11 #include <drm/drm_crtc.h>
12
13 #include "dpu_kms.h"
14 #include "dpu_hw_mdss.h"
15 #include "dpu_hw_sspp.h"
16
17 /**
18 * struct dpu_plane_state: Define dpu extension of drm plane state object
19 * @base: base drm plane state object
20 * @aspace: pointer to address space for input/output buffers
21 * @pipe: software pipe description
22 * @r_pipe: software pipe description of the second pipe
23 * @pipe_cfg: software pipe configuration
24 * @r_pipe_cfg: software pipe configuration for the second pipe
25 * @stage: assigned by crtc blender
26 * @needs_qos_remap: qos remap settings need to be updated
27 * @multirect_index: index of the rectangle of SSPP
28 * @multirect_mode: parallel or time multiplex multirect mode
29 * @pending: whether the current update is still pending
30 * @plane_fetch_bw: calculated BW per plane
31 * @plane_clk: calculated clk per plane
32 * @needs_dirtyfb: whether attached CRTC needs pixel data explicitly flushed
33 * @layout: framebuffer memory layout
34 */
35 struct dpu_plane_state {
36 struct drm_plane_state base;
37 struct msm_gem_address_space *aspace;
38 struct dpu_sw_pipe pipe;
39 struct dpu_sw_pipe r_pipe;
40 struct dpu_sw_pipe_cfg pipe_cfg;
41 struct dpu_sw_pipe_cfg r_pipe_cfg;
42 enum dpu_stage stage;
43 bool needs_qos_remap;
44 bool pending;
45
46 u64 plane_fetch_bw;
47 u64 plane_clk;
48
49 bool needs_dirtyfb;
50
51 struct dpu_hw_fmt_layout layout;
52 };
53
54 #define to_dpu_plane_state(x) \
55 container_of(x, struct dpu_plane_state, base)
56
57 void dpu_plane_flush(struct drm_plane *plane);
58
59 void dpu_plane_set_error(struct drm_plane *plane, bool error);
60
61 struct drm_plane *dpu_plane_init(struct drm_device *dev,
62 uint32_t pipe, enum drm_plane_type type,
63 unsigned long possible_crtcs);
64
65 struct drm_plane *dpu_plane_init_virtual(struct drm_device *dev,
66 enum drm_plane_type type,
67 unsigned long possible_crtcs);
68
69 int dpu_plane_color_fill(struct drm_plane *plane,
70 uint32_t color, uint32_t alpha);
71
72 #ifdef CONFIG_DEBUG_FS
73 void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);
74 #else
dpu_plane_danger_signal_ctrl(struct drm_plane * plane,bool enable)75 static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}
76 #endif
77
78 int dpu_assign_plane_resources(struct dpu_global_state *global_state,
79 struct drm_atomic_state *state,
80 struct drm_crtc *crtc,
81 struct drm_plane_state **states,
82 unsigned int num_planes);
83
84 #endif /* _DPU_PLANE_H_ */
85