1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 32 PCS_STATE_DOWN = 0, 33 PCS_STATE_STARTING, 34 PCS_STATE_STARTED, 35 }; 36 37 /** 38 * struct phylink - internal data type for phylink 39 */ 40 struct phylink { 41 /* private: */ 42 struct net_device *netdev; 43 const struct phylink_mac_ops *mac_ops; 44 struct phylink_config *config; 45 struct phylink_pcs *pcs; 46 struct device *dev; 47 unsigned int old_link_state:1; 48 49 unsigned long phylink_disable_state; /* bitmask of disables */ 50 struct phy_device *phydev; 51 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 52 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 53 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 54 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 55 u8 link_port; /* The current non-phy ethtool port */ 56 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 69 struct mutex state_mutex; 70 /* Serialize updates to pl->phydev with phylink_resolve() */ 71 struct mutex phydev_mutex; 72 struct phylink_link_state phy_state; 73 unsigned int phy_ib_mode; 74 struct work_struct resolve; 75 unsigned int pcs_neg_mode; 76 unsigned int pcs_state; 77 78 bool link_failed; 79 bool suspend_link_up; 80 bool major_config_failed; 81 bool mac_supports_eee_ops; 82 bool mac_supports_eee; 83 bool phy_enable_tx_lpi; 84 bool mac_enable_tx_lpi; 85 bool mac_tx_clk_stop; 86 u32 mac_tx_lpi_timer; 87 u8 mac_rx_clk_stop_blocked; 88 89 struct sfp_bus *sfp_bus; 90 bool sfp_may_have_phy; 91 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 92 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 93 u8 sfp_port; 94 95 struct eee_config eee_cfg; 96 }; 97 98 #define phylink_printk(level, pl, fmt, ...) \ 99 do { \ 100 if ((pl)->config->type == PHYLINK_NETDEV) \ 101 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 102 else if ((pl)->config->type == PHYLINK_DEV) \ 103 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 104 } while (0) 105 106 #define phylink_err(pl, fmt, ...) \ 107 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 108 #define phylink_warn(pl, fmt, ...) \ 109 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 110 #define phylink_info(pl, fmt, ...) \ 111 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 112 #if defined(CONFIG_DYNAMIC_DEBUG) 113 #define phylink_dbg(pl, fmt, ...) \ 114 do { \ 115 if ((pl)->config->type == PHYLINK_NETDEV) \ 116 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 117 else if ((pl)->config->type == PHYLINK_DEV) \ 118 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 119 } while (0) 120 #elif defined(DEBUG) 121 #define phylink_dbg(pl, fmt, ...) \ 122 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 123 #else 124 #define phylink_dbg(pl, fmt, ...) \ 125 ({ \ 126 if (0) \ 127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 128 }) 129 #endif 130 131 static const phy_interface_t phylink_sfp_interface_preference[] = { 132 PHY_INTERFACE_MODE_100GBASEP, 133 PHY_INTERFACE_MODE_50GBASER, 134 PHY_INTERFACE_MODE_LAUI, 135 PHY_INTERFACE_MODE_25GBASER, 136 PHY_INTERFACE_MODE_USXGMII, 137 PHY_INTERFACE_MODE_10GBASER, 138 PHY_INTERFACE_MODE_5GBASER, 139 PHY_INTERFACE_MODE_2500BASEX, 140 PHY_INTERFACE_MODE_SGMII, 141 PHY_INTERFACE_MODE_1000BASEX, 142 PHY_INTERFACE_MODE_100BASEX, 143 }; 144 145 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 146 147 /** 148 * phylink_set_port_modes() - set the port type modes in the ethtool mask 149 * @mask: ethtool link mode mask 150 * 151 * Sets all the port type modes in the ethtool mask. MAC drivers should 152 * use this in their 'validate' callback. 153 */ 154 void phylink_set_port_modes(unsigned long *mask) 155 { 156 phylink_set(mask, TP); 157 phylink_set(mask, AUI); 158 phylink_set(mask, MII); 159 phylink_set(mask, FIBRE); 160 phylink_set(mask, BNC); 161 phylink_set(mask, Backplane); 162 } 163 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 164 165 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 166 { 167 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 168 169 phylink_set_port_modes(tmp); 170 phylink_set(tmp, Autoneg); 171 phylink_set(tmp, Pause); 172 phylink_set(tmp, Asym_Pause); 173 174 return linkmode_subset(linkmode, tmp); 175 } 176 177 static const char *phylink_an_mode_str(unsigned int mode) 178 { 179 static const char *modestr[] = { 180 [MLO_AN_PHY] = "phy", 181 [MLO_AN_FIXED] = "fixed", 182 [MLO_AN_INBAND] = "inband", 183 }; 184 185 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 186 } 187 188 static const char *phylink_pcs_mode_str(unsigned int mode) 189 { 190 if (!mode) 191 return "none"; 192 193 if (mode & PHYLINK_PCS_NEG_OUTBAND) 194 return "outband"; 195 196 if (mode & PHYLINK_PCS_NEG_INBAND) { 197 if (mode & PHYLINK_PCS_NEG_ENABLED) 198 return "inband,an-enabled"; 199 else 200 return "inband,an-disabled"; 201 } 202 203 return "unknown"; 204 } 205 206 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 207 { 208 switch (interface) { 209 case PHY_INTERFACE_MODE_SGMII: 210 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 211 return 1250; 212 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 213 return 3125; 214 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 215 return 5156; 216 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 217 return 10313; 218 default: 219 return 0; 220 } 221 } 222 223 /** 224 * phylink_interface_max_speed() - get the maximum speed of a phy interface 225 * @interface: phy interface mode defined by &typedef phy_interface_t 226 * 227 * Determine the maximum speed of a phy interface. This is intended to help 228 * determine the correct speed to pass to the MAC when the phy is performing 229 * rate matching. 230 * 231 * Return: The maximum speed of @interface 232 */ 233 static int phylink_interface_max_speed(phy_interface_t interface) 234 { 235 switch (interface) { 236 case PHY_INTERFACE_MODE_100BASEX: 237 case PHY_INTERFACE_MODE_REVRMII: 238 case PHY_INTERFACE_MODE_RMII: 239 case PHY_INTERFACE_MODE_SMII: 240 case PHY_INTERFACE_MODE_REVMII: 241 case PHY_INTERFACE_MODE_MII: 242 case PHY_INTERFACE_MODE_MIILITE: 243 return SPEED_100; 244 245 case PHY_INTERFACE_MODE_TBI: 246 case PHY_INTERFACE_MODE_MOCA: 247 case PHY_INTERFACE_MODE_RTBI: 248 case PHY_INTERFACE_MODE_1000BASEX: 249 case PHY_INTERFACE_MODE_1000BASEKX: 250 case PHY_INTERFACE_MODE_TRGMII: 251 case PHY_INTERFACE_MODE_RGMII_TXID: 252 case PHY_INTERFACE_MODE_RGMII_RXID: 253 case PHY_INTERFACE_MODE_RGMII_ID: 254 case PHY_INTERFACE_MODE_RGMII: 255 case PHY_INTERFACE_MODE_PSGMII: 256 case PHY_INTERFACE_MODE_QSGMII: 257 case PHY_INTERFACE_MODE_QUSGMII: 258 case PHY_INTERFACE_MODE_SGMII: 259 case PHY_INTERFACE_MODE_GMII: 260 return SPEED_1000; 261 262 case PHY_INTERFACE_MODE_2500BASEX: 263 case PHY_INTERFACE_MODE_10G_QXGMII: 264 return SPEED_2500; 265 266 case PHY_INTERFACE_MODE_5GBASER: 267 return SPEED_5000; 268 269 case PHY_INTERFACE_MODE_XGMII: 270 case PHY_INTERFACE_MODE_RXAUI: 271 case PHY_INTERFACE_MODE_XAUI: 272 case PHY_INTERFACE_MODE_10GBASER: 273 case PHY_INTERFACE_MODE_10GKR: 274 case PHY_INTERFACE_MODE_USXGMII: 275 return SPEED_10000; 276 277 case PHY_INTERFACE_MODE_25GBASER: 278 return SPEED_25000; 279 280 case PHY_INTERFACE_MODE_XLGMII: 281 return SPEED_40000; 282 283 case PHY_INTERFACE_MODE_50GBASER: 284 case PHY_INTERFACE_MODE_LAUI: 285 return SPEED_50000; 286 287 case PHY_INTERFACE_MODE_100GBASEP: 288 return SPEED_100000; 289 290 case PHY_INTERFACE_MODE_INTERNAL: 291 case PHY_INTERFACE_MODE_NA: 292 case PHY_INTERFACE_MODE_MAX: 293 /* No idea! Garbage in, unknown out */ 294 return SPEED_UNKNOWN; 295 } 296 297 /* If we get here, someone forgot to add an interface mode above */ 298 WARN_ON_ONCE(1); 299 return SPEED_UNKNOWN; 300 } 301 302 static struct { 303 unsigned long mask; 304 int speed; 305 unsigned int duplex; 306 unsigned int caps_bit; 307 } phylink_caps_params[] = { 308 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 309 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 310 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 311 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 312 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 313 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 314 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 315 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 316 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 317 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 318 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 319 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 320 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 321 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 322 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 323 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 324 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 325 }; 326 327 /** 328 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 329 * @caps: A set of MAC capabilities 330 * 331 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 332 */ 333 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 334 { 335 unsigned long link_caps = 0; 336 int i; 337 338 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 339 if (caps & phylink_caps_params[i].mask) 340 link_caps |= phylink_caps_params[i].caps_bit; 341 342 return link_caps; 343 } 344 345 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 346 { 347 unsigned long caps = 0; 348 int i; 349 350 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 351 if (link_caps & phylink_caps_params[i].caps_bit) 352 caps |= phylink_caps_params[i].mask; 353 354 return caps; 355 } 356 357 /** 358 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 359 * @linkmodes: ethtool linkmode mask (must be already initialised) 360 * @caps: bitmask of MAC capabilities 361 * 362 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 363 * supported by the @caps. @linkmodes must have been initialised previously. 364 */ 365 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 366 unsigned long caps) 367 { 368 unsigned long link_caps = phylink_caps_to_link_caps(caps); 369 370 if (caps & MAC_SYM_PAUSE) 371 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 372 373 if (caps & MAC_ASYM_PAUSE) 374 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 375 376 phy_caps_linkmodes(link_caps, linkmodes); 377 } 378 379 /** 380 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 381 * @config: pointer to a &struct phylink_config 382 * @max_speed: maximum speed 383 * 384 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 385 * Any further motifications of config.mac_capabilities will override this. 386 */ 387 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 388 { 389 int i; 390 391 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 392 phylink_caps_params[i].speed > max_speed; i++) 393 config->mac_capabilities &= ~phylink_caps_params[i].mask; 394 } 395 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 396 397 /** 398 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 399 * @speed: the speed to search for 400 * @duplex: the duplex to search for 401 * 402 * Find the mac capability for a given speed and duplex. 403 * 404 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 405 * there were no matches. 406 */ 407 static unsigned long phylink_cap_from_speed_duplex(int speed, 408 unsigned int duplex) 409 { 410 int i; 411 412 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 413 if (speed == phylink_caps_params[i].speed && 414 duplex == phylink_caps_params[i].duplex) 415 return phylink_caps_params[i].mask; 416 } 417 418 return 0; 419 } 420 421 /** 422 * phylink_get_capabilities() - get capabilities for a given MAC 423 * @interface: phy interface mode defined by &typedef phy_interface_t 424 * @mac_capabilities: bitmask of MAC capabilities 425 * @rate_matching: type of rate matching being performed 426 * 427 * Get the MAC capabilities that are supported by the @interface mode and 428 * @mac_capabilities. 429 */ 430 static unsigned long phylink_get_capabilities(phy_interface_t interface, 431 unsigned long mac_capabilities, 432 int rate_matching) 433 { 434 unsigned long link_caps = phy_caps_from_interface(interface); 435 int max_speed = phylink_interface_max_speed(interface); 436 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 437 unsigned long matched_caps = 0; 438 439 caps |= phylink_link_caps_to_mac_caps(link_caps); 440 441 switch (rate_matching) { 442 case RATE_MATCH_OPEN_LOOP: 443 /* TODO */ 444 fallthrough; 445 case RATE_MATCH_NONE: 446 matched_caps = 0; 447 break; 448 case RATE_MATCH_PAUSE: { 449 /* The MAC must support asymmetric pause towards the local 450 * device for this. We could allow just symmetric pause, but 451 * then we might have to renegotiate if the link partner 452 * doesn't support pause. This is because there's no way to 453 * accept pause frames without transmitting them if we only 454 * support symmetric pause. 455 */ 456 if (!(mac_capabilities & MAC_SYM_PAUSE) || 457 !(mac_capabilities & MAC_ASYM_PAUSE)) 458 break; 459 460 /* We can't adapt if the MAC doesn't support the interface's 461 * max speed at full duplex. 462 */ 463 if (mac_capabilities & 464 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 465 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 466 break; 467 } 468 case RATE_MATCH_CRS: 469 /* The MAC must support half duplex at the interface's max 470 * speed. 471 */ 472 if (mac_capabilities & 473 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 474 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 475 matched_caps &= mac_capabilities; 476 } 477 break; 478 } 479 480 return (caps & mac_capabilities) | matched_caps; 481 } 482 483 /** 484 * phylink_validate_mask_caps() - Restrict link modes based on caps 485 * @supported: ethtool bitmask for supported link modes. 486 * @state: pointer to a &struct phylink_link_state. 487 * @mac_capabilities: bitmask of MAC capabilities 488 * 489 * Calculate the supported link modes based on @mac_capabilities, and restrict 490 * @supported and @state based on that. Use this function if your capabiliies 491 * aren't constant, such as if they vary depending on the interface. 492 */ 493 static void phylink_validate_mask_caps(unsigned long *supported, 494 struct phylink_link_state *state, 495 unsigned long mac_capabilities) 496 { 497 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 498 unsigned long caps; 499 500 phylink_set_port_modes(mask); 501 phylink_set(mask, Autoneg); 502 caps = phylink_get_capabilities(state->interface, mac_capabilities, 503 state->rate_matching); 504 phylink_caps_to_linkmodes(mask, caps); 505 506 linkmode_and(supported, supported, mask); 507 linkmode_and(state->advertising, state->advertising, mask); 508 } 509 510 static int phylink_validate_mac_and_pcs(struct phylink *pl, 511 unsigned long *supported, 512 struct phylink_link_state *state) 513 { 514 struct phylink_pcs *pcs = NULL; 515 unsigned long capabilities; 516 int ret; 517 518 /* Get the PCS for this interface mode */ 519 if (pl->mac_ops->mac_select_pcs) { 520 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 521 if (IS_ERR(pcs)) 522 return PTR_ERR(pcs); 523 } 524 525 if (pcs) { 526 /* The PCS, if present, must be setup before phylink_create() 527 * has been called. If the ops is not initialised, print an 528 * error and backtrace rather than oopsing the kernel. 529 */ 530 if (!pcs->ops) { 531 phylink_err(pl, "interface %s: uninitialised PCS\n", 532 phy_modes(state->interface)); 533 dump_stack(); 534 return -EINVAL; 535 } 536 537 /* Ensure that this PCS supports the interface which the MAC 538 * returned it for. It is an error for the MAC to return a PCS 539 * that does not support the interface mode. 540 */ 541 if (!phy_interface_empty(pcs->supported_interfaces) && 542 !test_bit(state->interface, pcs->supported_interfaces)) { 543 phylink_err(pl, "MAC returned PCS which does not support %s\n", 544 phy_modes(state->interface)); 545 return -EINVAL; 546 } 547 548 /* Validate the link parameters with the PCS */ 549 if (pcs->ops->pcs_validate) { 550 ret = pcs->ops->pcs_validate(pcs, supported, state); 551 if (ret < 0 || phylink_is_empty_linkmode(supported)) 552 return -EINVAL; 553 554 /* Ensure the advertising mask is a subset of the 555 * supported mask. 556 */ 557 linkmode_and(state->advertising, state->advertising, 558 supported); 559 } 560 } 561 562 /* Then validate the link parameters with the MAC */ 563 if (pl->mac_ops->mac_get_caps) 564 capabilities = pl->mac_ops->mac_get_caps(pl->config, 565 state->interface); 566 else 567 capabilities = pl->config->mac_capabilities; 568 569 phylink_validate_mask_caps(supported, state, capabilities); 570 571 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 572 } 573 574 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 575 const unsigned long *supported, 576 const struct phylink_link_state *state, 577 phy_interface_t interface, 578 unsigned long *accum_supported, 579 unsigned long *accum_advertising) 580 { 581 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 582 struct phylink_link_state tmp_state; 583 584 linkmode_copy(tmp_supported, supported); 585 586 tmp_state = *state; 587 tmp_state.interface = interface; 588 589 if (phy) 590 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 591 592 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 593 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 594 interface, phy_modes(interface), 595 phy_rate_matching_to_str(tmp_state.rate_matching), 596 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 597 598 linkmode_or(accum_supported, accum_supported, tmp_supported); 599 linkmode_or(accum_advertising, accum_advertising, 600 tmp_state.advertising); 601 } 602 } 603 604 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 605 unsigned long *supported, 606 struct phylink_link_state *state, 607 const unsigned long *interfaces) 608 { 609 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 610 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 611 int interface; 612 613 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 614 phylink_validate_one(pl, phy, supported, state, interface, 615 all_s, all_adv); 616 617 linkmode_copy(supported, all_s); 618 linkmode_copy(state->advertising, all_adv); 619 620 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 621 } 622 623 static int phylink_validate(struct phylink *pl, unsigned long *supported, 624 struct phylink_link_state *state) 625 { 626 const unsigned long *interfaces = pl->config->supported_interfaces; 627 628 if (state->interface == PHY_INTERFACE_MODE_NA) 629 return phylink_validate_mask(pl, NULL, supported, state, 630 interfaces); 631 632 if (!test_bit(state->interface, interfaces)) 633 return -EINVAL; 634 635 return phylink_validate_mac_and_pcs(pl, supported, state); 636 } 637 638 static void phylink_fill_fixedlink_supported(unsigned long *supported) 639 { 640 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 641 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 642 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 643 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 644 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 645 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 652 } 653 654 static int phylink_parse_fixedlink(struct phylink *pl, 655 const struct fwnode_handle *fwnode) 656 { 657 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 658 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 659 const struct link_capabilities *c; 660 struct fwnode_handle *fixed_node; 661 struct gpio_desc *desc; 662 u32 speed; 663 int ret; 664 665 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 666 if (fixed_node) { 667 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 668 669 pl->link_config.speed = speed; 670 pl->link_config.duplex = DUPLEX_HALF; 671 672 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 673 pl->link_config.duplex = DUPLEX_FULL; 674 675 /* We treat the "pause" and "asym-pause" terminology as 676 * defining the link partner's ability. 677 */ 678 if (fwnode_property_read_bool(fixed_node, "pause")) 679 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 680 pl->link_config.lp_advertising); 681 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 682 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 683 pl->link_config.lp_advertising); 684 685 if (ret == 0) { 686 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 687 GPIOD_IN, "?"); 688 689 if (!IS_ERR(desc)) 690 pl->link_gpio = desc; 691 else if (desc == ERR_PTR(-EPROBE_DEFER)) 692 ret = -EPROBE_DEFER; 693 } 694 fwnode_handle_put(fixed_node); 695 696 if (ret) 697 return ret; 698 } else { 699 u32 prop[5]; 700 701 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 702 NULL, 0); 703 if (ret != ARRAY_SIZE(prop)) { 704 phylink_err(pl, "broken fixed-link?\n"); 705 return -EINVAL; 706 } 707 708 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 709 fwnode); 710 711 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 712 prop, ARRAY_SIZE(prop)); 713 if (!ret) { 714 pl->link_config.duplex = prop[1] ? 715 DUPLEX_FULL : DUPLEX_HALF; 716 pl->link_config.speed = prop[2]; 717 if (prop[3]) 718 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 719 pl->link_config.lp_advertising); 720 if (prop[4]) 721 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 722 pl->link_config.lp_advertising); 723 } 724 } 725 726 if (pl->link_config.speed > SPEED_1000 && 727 pl->link_config.duplex != DUPLEX_FULL) 728 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 729 pl->link_config.speed); 730 731 linkmode_zero(pl->supported); 732 phylink_fill_fixedlink_supported(pl->supported); 733 734 linkmode_copy(pl->link_config.advertising, pl->supported); 735 phylink_validate(pl, pl->supported, &pl->link_config); 736 737 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 738 pl->supported, true); 739 if (c) 740 linkmode_and(match, pl->supported, c->linkmodes); 741 742 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 743 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 744 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 745 linkmode_and(pl->supported, pl->supported, mask); 746 747 phylink_set(pl->supported, MII); 748 749 if (c) { 750 linkmode_or(pl->supported, pl->supported, match); 751 linkmode_or(pl->link_config.lp_advertising, 752 pl->link_config.lp_advertising, match); 753 } else { 754 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 755 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 756 pl->link_config.speed); 757 } 758 759 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 760 pl->supported); 761 762 pl->link_config.link = 1; 763 pl->link_config.an_complete = 1; 764 765 return 0; 766 } 767 768 static int phylink_parse_mode(struct phylink *pl, 769 const struct fwnode_handle *fwnode) 770 { 771 struct fwnode_handle *dn; 772 const char *managed; 773 unsigned long caps; 774 775 if (pl->config->default_an_inband) 776 pl->cfg_link_an_mode = MLO_AN_INBAND; 777 778 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 779 if (dn || fwnode_property_present(fwnode, "fixed-link")) 780 pl->cfg_link_an_mode = MLO_AN_FIXED; 781 fwnode_handle_put(dn); 782 783 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 784 strcmp(managed, "in-band-status") == 0)) { 785 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 786 phylink_err(pl, 787 "can't use both fixed-link and in-band-status\n"); 788 return -EINVAL; 789 } 790 791 pl->cfg_link_an_mode = MLO_AN_INBAND; 792 } 793 794 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 795 linkmode_zero(pl->supported); 796 phylink_set(pl->supported, MII); 797 phylink_set(pl->supported, Autoneg); 798 phylink_set(pl->supported, Asym_Pause); 799 phylink_set(pl->supported, Pause); 800 801 switch (pl->link_config.interface) { 802 case PHY_INTERFACE_MODE_SGMII: 803 case PHY_INTERFACE_MODE_PSGMII: 804 case PHY_INTERFACE_MODE_QSGMII: 805 case PHY_INTERFACE_MODE_QUSGMII: 806 case PHY_INTERFACE_MODE_RGMII: 807 case PHY_INTERFACE_MODE_RGMII_ID: 808 case PHY_INTERFACE_MODE_RGMII_RXID: 809 case PHY_INTERFACE_MODE_RGMII_TXID: 810 case PHY_INTERFACE_MODE_RTBI: 811 case PHY_INTERFACE_MODE_1000BASEX: 812 case PHY_INTERFACE_MODE_2500BASEX: 813 case PHY_INTERFACE_MODE_5GBASER: 814 case PHY_INTERFACE_MODE_25GBASER: 815 case PHY_INTERFACE_MODE_USXGMII: 816 case PHY_INTERFACE_MODE_10G_QXGMII: 817 case PHY_INTERFACE_MODE_10GKR: 818 case PHY_INTERFACE_MODE_10GBASER: 819 case PHY_INTERFACE_MODE_XLGMII: 820 case PHY_INTERFACE_MODE_50GBASER: 821 case PHY_INTERFACE_MODE_LAUI: 822 case PHY_INTERFACE_MODE_100GBASEP: 823 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 824 caps = phylink_get_capabilities(pl->link_config.interface, caps, 825 RATE_MATCH_NONE); 826 phylink_caps_to_linkmodes(pl->supported, caps); 827 break; 828 829 default: 830 phylink_err(pl, 831 "incorrect link mode %s for in-band status\n", 832 phy_modes(pl->link_config.interface)); 833 return -EINVAL; 834 } 835 836 linkmode_copy(pl->link_config.advertising, pl->supported); 837 838 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 839 phylink_err(pl, 840 "failed to validate link configuration for in-band status\n"); 841 return -EINVAL; 842 } 843 } 844 845 return 0; 846 } 847 848 static void phylink_apply_manual_flow(struct phylink *pl, 849 struct phylink_link_state *state) 850 { 851 /* If autoneg is disabled, pause AN is also disabled */ 852 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 853 state->advertising)) 854 state->pause &= ~MLO_PAUSE_AN; 855 856 /* Manual configuration of pause modes */ 857 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 858 state->pause = pl->link_config.pause; 859 } 860 861 static void phylink_resolve_an_pause(struct phylink_link_state *state) 862 { 863 bool tx_pause, rx_pause; 864 865 if (state->duplex == DUPLEX_FULL) { 866 linkmode_resolve_pause(state->advertising, 867 state->lp_advertising, 868 &tx_pause, &rx_pause); 869 if (tx_pause) 870 state->pause |= MLO_PAUSE_TX; 871 if (rx_pause) 872 state->pause |= MLO_PAUSE_RX; 873 } 874 } 875 876 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 877 phy_interface_t interface) 878 { 879 if (pcs && pcs->ops->pcs_inband_caps) 880 return pcs->ops->pcs_inband_caps(pcs, interface); 881 882 return 0; 883 } 884 885 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 886 phy_interface_t interface) 887 { 888 if (pcs && pcs->ops->pcs_pre_config) 889 pcs->ops->pcs_pre_config(pcs, interface); 890 } 891 892 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 893 phy_interface_t interface) 894 { 895 int err = 0; 896 897 if (pcs && pcs->ops->pcs_post_config) 898 err = pcs->ops->pcs_post_config(pcs, interface); 899 900 return err; 901 } 902 903 static void phylink_pcs_disable(struct phylink_pcs *pcs) 904 { 905 if (pcs && pcs->ops->pcs_disable) 906 pcs->ops->pcs_disable(pcs); 907 } 908 909 static int phylink_pcs_enable(struct phylink_pcs *pcs) 910 { 911 int err = 0; 912 913 if (pcs && pcs->ops->pcs_enable) 914 err = pcs->ops->pcs_enable(pcs); 915 916 return err; 917 } 918 919 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 920 const struct phylink_link_state *state, 921 bool permit_pause_to_mac) 922 { 923 if (!pcs) 924 return 0; 925 926 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 927 state->advertising, permit_pause_to_mac); 928 } 929 930 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 931 phy_interface_t interface, int speed, 932 int duplex) 933 { 934 if (pcs && pcs->ops->pcs_link_up) 935 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 936 } 937 938 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 939 { 940 if (pcs && pcs->ops->pcs_disable_eee) 941 pcs->ops->pcs_disable_eee(pcs); 942 } 943 944 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 945 { 946 if (pcs && pcs->ops->pcs_enable_eee) 947 pcs->ops->pcs_enable_eee(pcs); 948 } 949 950 /* Query inband for a specific interface mode, asking the MAC for the 951 * PCS which will be used to handle the interface mode. 952 */ 953 static unsigned int phylink_inband_caps(struct phylink *pl, 954 phy_interface_t interface) 955 { 956 struct phylink_pcs *pcs; 957 958 if (!pl->mac_ops->mac_select_pcs) 959 return 0; 960 961 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 962 if (!pcs) 963 return 0; 964 965 return phylink_pcs_inband_caps(pcs, interface); 966 } 967 968 static void phylink_pcs_poll_stop(struct phylink *pl) 969 { 970 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 971 timer_delete(&pl->link_poll); 972 } 973 974 static void phylink_pcs_poll_start(struct phylink *pl) 975 { 976 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 977 mod_timer(&pl->link_poll, jiffies + HZ); 978 } 979 980 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 981 { 982 int ret = 0; 983 984 /* Signal to PCS driver that MAC requires RX clock for init */ 985 if (pl->config->mac_requires_rxc) 986 pcs->rxc_always_on = true; 987 988 if (pcs->ops->pcs_pre_init) 989 ret = pcs->ops->pcs_pre_init(pcs); 990 991 return ret; 992 } 993 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 994 995 static void phylink_mac_config(struct phylink *pl, 996 const struct phylink_link_state *state) 997 { 998 struct phylink_link_state st = *state; 999 1000 /* Stop drivers incorrectly using these */ 1001 linkmode_zero(st.lp_advertising); 1002 st.speed = SPEED_UNKNOWN; 1003 st.duplex = DUPLEX_UNKNOWN; 1004 st.an_complete = false; 1005 st.link = false; 1006 1007 phylink_dbg(pl, 1008 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1009 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1010 phy_modes(st.interface), 1011 phy_rate_matching_to_str(st.rate_matching), 1012 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1013 st.pause); 1014 1015 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1016 } 1017 1018 static void phylink_pcs_an_restart(struct phylink *pl) 1019 { 1020 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1021 pl->link_config.advertising) && 1022 phy_interface_mode_is_8023z(pl->link_config.interface) && 1023 phylink_autoneg_inband(pl->act_link_an_mode)) 1024 pl->pcs->ops->pcs_an_restart(pl->pcs); 1025 } 1026 1027 enum inband_type { 1028 INBAND_NONE, 1029 INBAND_CISCO_SGMII, 1030 INBAND_BASEX, 1031 }; 1032 1033 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1034 { 1035 switch (interface) { 1036 case PHY_INTERFACE_MODE_SGMII: 1037 case PHY_INTERFACE_MODE_QSGMII: 1038 case PHY_INTERFACE_MODE_QUSGMII: 1039 case PHY_INTERFACE_MODE_USXGMII: 1040 case PHY_INTERFACE_MODE_10G_QXGMII: 1041 /* These protocols are designed for use with a PHY which 1042 * communicates its negotiation result back to the MAC via 1043 * inband communication. Note: there exist PHYs that run 1044 * with SGMII but do not send the inband data. 1045 */ 1046 return INBAND_CISCO_SGMII; 1047 1048 case PHY_INTERFACE_MODE_1000BASEX: 1049 case PHY_INTERFACE_MODE_2500BASEX: 1050 /* 1000base-X is designed for use media-side for Fibre 1051 * connections, and thus the Autoneg bit needs to be 1052 * taken into account. We also do this for 2500base-X 1053 * as well, but drivers may not support this, so may 1054 * need to override this. 1055 */ 1056 return INBAND_BASEX; 1057 1058 default: 1059 return INBAND_NONE; 1060 } 1061 } 1062 1063 /** 1064 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1065 * @pl: a pointer to a &struct phylink returned from phylink_create() 1066 * @pcs: a pointer to &struct phylink_pcs 1067 * @interface: interface mode to be used 1068 * @advertising: adertisement ethtool link mode mask 1069 * 1070 * Determines the negotiation mode to be used by the PCS, and returns 1071 * one of: 1072 * 1073 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1074 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1075 * will be used. 1076 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1077 * disabled 1078 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1079 * 1080 * Note: this is for cases where the PCS itself is involved in negotiation 1081 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1082 */ 1083 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1084 phy_interface_t interface, 1085 const unsigned long *advertising) 1086 { 1087 unsigned int pcs_ib_caps = 0; 1088 unsigned int phy_ib_caps = 0; 1089 unsigned int neg_mode, mode; 1090 enum inband_type type; 1091 1092 type = phylink_get_inband_type(interface); 1093 if (type == INBAND_NONE) { 1094 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1095 pl->act_link_an_mode = pl->req_link_an_mode; 1096 return; 1097 } 1098 1099 mode = pl->req_link_an_mode; 1100 1101 pl->phy_ib_mode = 0; 1102 1103 if (pcs) 1104 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1105 1106 if (pl->phydev) 1107 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1108 1109 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1110 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1111 1112 if (!phylink_autoneg_inband(mode)) { 1113 bool pcs_ib_only = false; 1114 bool phy_ib_only = false; 1115 1116 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1117 /* PCS supports reporting in-band capabilities, and 1118 * supports more than disable mode. 1119 */ 1120 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1121 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1122 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1123 pcs_ib_only = true; 1124 } 1125 1126 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1127 /* PHY supports in-band capabilities, and supports 1128 * more than disable mode. 1129 */ 1130 if (phy_ib_caps & LINK_INBAND_DISABLE) 1131 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1132 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1133 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1134 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1135 phy_ib_only = true; 1136 } 1137 1138 /* If either the PCS or PHY requires inband to be enabled, 1139 * this is an invalid configuration. Provide a diagnostic 1140 * message for this case, but don't try to force the issue. 1141 */ 1142 if (pcs_ib_only || phy_ib_only) 1143 phylink_warn(pl, 1144 "firmware wants %s mode, but %s%s%s requires inband\n", 1145 phylink_an_mode_str(mode), 1146 pcs_ib_only ? "PCS" : "", 1147 pcs_ib_only && phy_ib_only ? " and " : "", 1148 phy_ib_only ? "PHY" : ""); 1149 1150 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1151 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1152 /* For SGMII modes which are designed to be used with PHYs, or 1153 * Base-X with a PHY, we try to use in-band mode where-ever 1154 * possible. However, there are some PHYs e.g. BCM84881 which 1155 * do not support in-band. 1156 */ 1157 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1158 LINK_INBAND_BYPASS; 1159 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1160 LINK_INBAND_BYPASS; 1161 /* PCS PHY 1162 * D E D E 1163 * 0 0 0 0 no information inband enabled 1164 * 1 0 0 0 pcs doesn't support outband 1165 * 0 1 0 0 pcs required inband enabled 1166 * 1 1 0 0 pcs optional inband enabled 1167 * 0 0 1 0 phy doesn't support outband 1168 * 1 0 1 0 pcs+phy doesn't support outband 1169 * 0 1 1 0 pcs required, phy doesn't support, invalid 1170 * 1 1 1 0 pcs optional, phy doesn't support, outband 1171 * 0 0 0 1 phy required inband enabled 1172 * 1 0 0 1 pcs doesn't support, phy required, invalid 1173 * 0 1 0 1 pcs+phy required inband enabled 1174 * 1 1 0 1 pcs optional, phy required inband enabled 1175 * 0 0 1 1 phy optional inband enabled 1176 * 1 0 1 1 pcs doesn't support, phy optional, outband 1177 * 0 1 1 1 pcs required, phy optional inband enabled 1178 * 1 1 1 1 pcs+phy optional inband enabled 1179 */ 1180 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1181 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1182 /* In-band supported or unknown at both ends. Enable 1183 * in-band mode with or without bypass at the PHY. 1184 */ 1185 if (phy_ib_caps & LINK_INBAND_ENABLE) 1186 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1187 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1188 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1189 1190 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1191 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1192 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1193 /* Either in-band not supported at at least one end. 1194 * In-band bypass at the other end is possible. 1195 */ 1196 if (phy_ib_caps & LINK_INBAND_DISABLE) 1197 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1198 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1199 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1200 1201 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1202 if (pl->phydev) 1203 mode = MLO_AN_PHY; 1204 } else { 1205 /* invalid */ 1206 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1207 phy_modes(interface)); 1208 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1209 } 1210 } else { 1211 /* For Base-X without a PHY */ 1212 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1213 /* If the PCS doesn't support inband, then inband must 1214 * be disabled. 1215 */ 1216 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1217 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1218 /* If the PCS requires inband, then inband must always 1219 * be enabled. 1220 */ 1221 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1222 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1223 advertising)) 1224 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1225 else 1226 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1227 } 1228 1229 pl->pcs_neg_mode = neg_mode; 1230 pl->act_link_an_mode = mode; 1231 } 1232 1233 static void phylink_major_config(struct phylink *pl, bool restart, 1234 const struct phylink_link_state *state) 1235 { 1236 struct phylink_pcs *pcs = NULL; 1237 bool pcs_changed = false; 1238 unsigned int rate_kbd; 1239 int err; 1240 1241 phylink_dbg(pl, "major config, requested %s/%s\n", 1242 phylink_an_mode_str(pl->req_link_an_mode), 1243 phy_modes(state->interface)); 1244 1245 pl->major_config_failed = false; 1246 1247 if (pl->mac_ops->mac_select_pcs) { 1248 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1249 if (IS_ERR(pcs)) { 1250 phylink_err(pl, 1251 "mac_select_pcs unexpectedly failed: %pe\n", 1252 pcs); 1253 1254 pl->major_config_failed = true; 1255 return; 1256 } 1257 1258 pcs_changed = pl->pcs != pcs; 1259 } 1260 1261 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1262 1263 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1264 phylink_an_mode_str(pl->act_link_an_mode), 1265 phylink_pcs_mode_str(pl->pcs_neg_mode), 1266 phy_modes(state->interface)); 1267 1268 phylink_pcs_poll_stop(pl); 1269 1270 if (pl->mac_ops->mac_prepare) { 1271 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1272 state->interface); 1273 if (err < 0) { 1274 phylink_err(pl, "mac_prepare failed: %pe\n", 1275 ERR_PTR(err)); 1276 pl->major_config_failed = true; 1277 return; 1278 } 1279 } 1280 1281 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1282 * for the change. 1283 */ 1284 if (pcs_changed) { 1285 phylink_pcs_disable(pl->pcs); 1286 1287 if (pl->pcs) 1288 pl->pcs->phylink = NULL; 1289 1290 pcs->phylink = pl; 1291 1292 pl->pcs = pcs; 1293 } 1294 1295 if (pl->pcs) 1296 phylink_pcs_pre_config(pl->pcs, state->interface); 1297 1298 phylink_mac_config(pl, state); 1299 1300 if (pl->pcs) { 1301 err = phylink_pcs_post_config(pl->pcs, state->interface); 1302 if (err < 0) { 1303 phylink_err(pl, "pcs_post_config failed: %pe\n", 1304 ERR_PTR(err)); 1305 1306 pl->major_config_failed = true; 1307 } 1308 } 1309 1310 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1311 phylink_pcs_enable(pl->pcs); 1312 1313 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1314 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1315 if (err < 0) { 1316 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1317 pl->major_config_failed = true; 1318 } else if (err > 0) { 1319 restart = true; 1320 } 1321 1322 if (restart) 1323 phylink_pcs_an_restart(pl); 1324 1325 if (pl->mac_ops->mac_finish) { 1326 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1327 state->interface); 1328 if (err < 0) { 1329 phylink_err(pl, "mac_finish failed: %pe\n", 1330 ERR_PTR(err)); 1331 1332 pl->major_config_failed = true; 1333 } 1334 } 1335 1336 if (pl->phydev && pl->phy_ib_mode) { 1337 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1338 if (err < 0) { 1339 phylink_err(pl, "phy_config_inband: %pe\n", 1340 ERR_PTR(err)); 1341 1342 pl->major_config_failed = true; 1343 } 1344 } 1345 1346 if (pl->sfp_bus) { 1347 rate_kbd = phylink_interface_signal_rate(state->interface); 1348 if (rate_kbd) 1349 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1350 } 1351 1352 phylink_pcs_poll_start(pl); 1353 } 1354 1355 /* 1356 * Reconfigure for a change of inband advertisement. 1357 * If we have a separate PCS, we only need to call its pcs_config() method, 1358 * and then restart AN if it indicates something changed. Otherwise, we do 1359 * the full MAC reconfiguration. 1360 */ 1361 static int phylink_change_inband_advert(struct phylink *pl) 1362 { 1363 int ret; 1364 1365 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1366 return 0; 1367 1368 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1369 phylink_an_mode_str(pl->req_link_an_mode), 1370 phy_modes(pl->link_config.interface), 1371 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1372 pl->link_config.pause); 1373 1374 /* Recompute the PCS neg mode */ 1375 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1376 pl->link_config.advertising); 1377 1378 /* Modern PCS-based method; update the advert at the PCS, and 1379 * restart negotiation if the pcs_config() helper indicates that 1380 * the programmed advertisement has changed. 1381 */ 1382 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1383 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1384 if (ret < 0) 1385 return ret; 1386 1387 if (ret > 0) 1388 phylink_pcs_an_restart(pl); 1389 1390 return 0; 1391 } 1392 1393 static void phylink_mac_pcs_get_state(struct phylink *pl, 1394 struct phylink_link_state *state) 1395 { 1396 struct phylink_pcs *pcs; 1397 bool autoneg; 1398 1399 linkmode_copy(state->advertising, pl->link_config.advertising); 1400 linkmode_zero(state->lp_advertising); 1401 state->interface = pl->link_config.interface; 1402 state->rate_matching = pl->link_config.rate_matching; 1403 state->an_complete = 0; 1404 state->link = 1; 1405 1406 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1407 if (autoneg) { 1408 state->speed = SPEED_UNKNOWN; 1409 state->duplex = DUPLEX_UNKNOWN; 1410 state->pause = MLO_PAUSE_NONE; 1411 } else { 1412 state->speed = pl->link_config.speed; 1413 state->duplex = pl->link_config.duplex; 1414 state->pause = pl->link_config.pause; 1415 } 1416 1417 pcs = pl->pcs; 1418 if (pcs) 1419 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1420 else 1421 state->link = 0; 1422 } 1423 1424 /* The fixed state is... fixed except for the link state, 1425 * which may be determined by a GPIO or a callback. 1426 */ 1427 static void phylink_get_fixed_state(struct phylink *pl, 1428 struct phylink_link_state *state) 1429 { 1430 *state = pl->link_config; 1431 if (pl->config->get_fixed_state) 1432 pl->config->get_fixed_state(pl->config, state); 1433 else if (pl->link_gpio) 1434 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1435 1436 state->pause = MLO_PAUSE_NONE; 1437 phylink_resolve_an_pause(state); 1438 } 1439 1440 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1441 { 1442 struct phylink_link_state link_state; 1443 struct phy_device *phy = pl->phydev; 1444 1445 switch (pl->req_link_an_mode) { 1446 case MLO_AN_PHY: 1447 link_state = pl->phy_state; 1448 break; 1449 1450 case MLO_AN_FIXED: 1451 phylink_get_fixed_state(pl, &link_state); 1452 break; 1453 1454 case MLO_AN_INBAND: 1455 link_state = pl->link_config; 1456 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1457 link_state.pause = MLO_PAUSE_NONE; 1458 break; 1459 1460 default: /* can't happen */ 1461 return; 1462 } 1463 1464 link_state.link = false; 1465 1466 phylink_apply_manual_flow(pl, &link_state); 1467 if (phy) 1468 mutex_lock(&phy->lock); 1469 phylink_major_config(pl, force_restart, &link_state); 1470 if (phy) 1471 mutex_unlock(&phy->lock); 1472 } 1473 1474 static const char *phylink_pause_to_str(int pause) 1475 { 1476 switch (pause & MLO_PAUSE_TXRX_MASK) { 1477 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1478 return "rx/tx"; 1479 case MLO_PAUSE_TX: 1480 return "tx"; 1481 case MLO_PAUSE_RX: 1482 return "rx"; 1483 default: 1484 return "off"; 1485 } 1486 } 1487 1488 static void phylink_deactivate_lpi(struct phylink *pl) 1489 { 1490 if (pl->mac_enable_tx_lpi) { 1491 pl->mac_enable_tx_lpi = false; 1492 1493 phylink_dbg(pl, "disabling LPI\n"); 1494 1495 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1496 1497 phylink_pcs_disable_eee(pl->pcs); 1498 } 1499 } 1500 1501 static void phylink_activate_lpi(struct phylink *pl) 1502 { 1503 int err; 1504 1505 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1506 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1507 phy_modes(pl->cur_interface)); 1508 return; 1509 } 1510 1511 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1512 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1513 1514 phylink_pcs_enable_eee(pl->pcs); 1515 1516 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1517 pl->mac_tx_clk_stop); 1518 if (err) { 1519 phylink_pcs_disable_eee(pl->pcs); 1520 phylink_err(pl, "%ps() failed: %pe\n", 1521 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1522 return; 1523 } 1524 1525 pl->mac_enable_tx_lpi = true; 1526 } 1527 1528 static void phylink_link_up(struct phylink *pl, 1529 struct phylink_link_state link_state) 1530 { 1531 struct net_device *ndev = pl->netdev; 1532 int speed, duplex; 1533 bool rx_pause; 1534 1535 speed = link_state.speed; 1536 duplex = link_state.duplex; 1537 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1538 1539 switch (link_state.rate_matching) { 1540 case RATE_MATCH_PAUSE: 1541 /* The PHY is doing rate matchion from the media rate (in 1542 * the link_state) to the interface speed, and will send 1543 * pause frames to the MAC to limit its transmission speed. 1544 */ 1545 speed = phylink_interface_max_speed(link_state.interface); 1546 duplex = DUPLEX_FULL; 1547 rx_pause = true; 1548 break; 1549 1550 case RATE_MATCH_CRS: 1551 /* The PHY is doing rate matchion from the media rate (in 1552 * the link_state) to the interface speed, and will cause 1553 * collisions to the MAC to limit its transmission speed. 1554 */ 1555 speed = phylink_interface_max_speed(link_state.interface); 1556 duplex = DUPLEX_HALF; 1557 break; 1558 } 1559 1560 pl->cur_interface = link_state.interface; 1561 1562 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1563 duplex); 1564 1565 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1566 pl->cur_interface, speed, duplex, 1567 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1568 1569 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1570 phylink_activate_lpi(pl); 1571 1572 if (ndev) 1573 netif_carrier_on(ndev); 1574 1575 phylink_info(pl, 1576 "Link is Up - %s/%s - flow control %s\n", 1577 phy_speed_to_str(link_state.speed), 1578 phy_duplex_to_str(link_state.duplex), 1579 phylink_pause_to_str(link_state.pause)); 1580 } 1581 1582 static void phylink_link_down(struct phylink *pl) 1583 { 1584 struct net_device *ndev = pl->netdev; 1585 1586 if (ndev) 1587 netif_carrier_off(ndev); 1588 1589 phylink_deactivate_lpi(pl); 1590 1591 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1592 pl->cur_interface); 1593 phylink_info(pl, "Link is Down\n"); 1594 } 1595 1596 static bool phylink_link_is_up(struct phylink *pl) 1597 { 1598 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1599 } 1600 1601 static void phylink_resolve(struct work_struct *w) 1602 { 1603 struct phylink *pl = container_of(w, struct phylink, resolve); 1604 struct phylink_link_state link_state; 1605 bool mac_config = false; 1606 bool retrigger = false; 1607 struct phy_device *phy; 1608 bool cur_link_state; 1609 1610 mutex_lock(&pl->phydev_mutex); 1611 phy = pl->phydev; 1612 if (phy) 1613 mutex_lock(&phy->lock); 1614 mutex_lock(&pl->state_mutex); 1615 cur_link_state = phylink_link_is_up(pl); 1616 1617 if (pl->phylink_disable_state) { 1618 pl->link_failed = false; 1619 link_state.link = false; 1620 } else if (pl->link_failed) { 1621 link_state.link = false; 1622 retrigger = true; 1623 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1624 phylink_get_fixed_state(pl, &link_state); 1625 mac_config = link_state.link; 1626 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1627 link_state = pl->phy_state; 1628 mac_config = link_state.link; 1629 } else { 1630 phylink_mac_pcs_get_state(pl, &link_state); 1631 1632 /* The PCS may have a latching link-fail indicator. If the link 1633 * was up, bring the link down and re-trigger the resolve. 1634 * Otherwise, re-read the PCS state to get the current status 1635 * of the link. 1636 */ 1637 if (!link_state.link) { 1638 if (cur_link_state) 1639 retrigger = true; 1640 else 1641 phylink_mac_pcs_get_state(pl, &link_state); 1642 } 1643 1644 /* If we have a phy, the "up" state is the union of both the 1645 * PHY and the MAC 1646 */ 1647 if (phy) 1648 link_state.link &= pl->phy_state.link; 1649 1650 /* Only update if the PHY link is up */ 1651 if (phy && pl->phy_state.link) { 1652 /* If the interface has changed, force a link down 1653 * event if the link isn't already down, and re-resolve. 1654 */ 1655 if (link_state.interface != pl->phy_state.interface) { 1656 retrigger = true; 1657 link_state.link = false; 1658 } 1659 1660 link_state.interface = pl->phy_state.interface; 1661 1662 /* If we are doing rate matching, then the link 1663 * speed/duplex comes from the PHY 1664 */ 1665 if (pl->phy_state.rate_matching) { 1666 link_state.rate_matching = 1667 pl->phy_state.rate_matching; 1668 link_state.speed = pl->phy_state.speed; 1669 link_state.duplex = pl->phy_state.duplex; 1670 } 1671 1672 /* If we have a PHY, we need to update with the PHY 1673 * flow control bits. 1674 */ 1675 link_state.pause = pl->phy_state.pause; 1676 mac_config = true; 1677 } 1678 } 1679 1680 if (pl->act_link_an_mode != MLO_AN_FIXED) 1681 phylink_apply_manual_flow(pl, &link_state); 1682 1683 if (mac_config) { 1684 if (link_state.interface != pl->link_config.interface) { 1685 /* The interface has changed, force the link down and 1686 * then reconfigure. 1687 */ 1688 if (cur_link_state) { 1689 phylink_link_down(pl); 1690 cur_link_state = false; 1691 } 1692 phylink_major_config(pl, false, &link_state); 1693 pl->link_config.interface = link_state.interface; 1694 } 1695 } 1696 1697 /* If configuration of the interface failed, force the link down 1698 * until we get a successful configuration. 1699 */ 1700 if (pl->major_config_failed) 1701 link_state.link = false; 1702 1703 if (link_state.link != cur_link_state) { 1704 pl->old_link_state = link_state.link; 1705 if (!link_state.link) 1706 phylink_link_down(pl); 1707 else 1708 phylink_link_up(pl, link_state); 1709 } 1710 if (!link_state.link && retrigger) { 1711 pl->link_failed = false; 1712 queue_work(system_power_efficient_wq, &pl->resolve); 1713 } 1714 mutex_unlock(&pl->state_mutex); 1715 if (phy) 1716 mutex_unlock(&phy->lock); 1717 mutex_unlock(&pl->phydev_mutex); 1718 } 1719 1720 static void phylink_run_resolve(struct phylink *pl) 1721 { 1722 if (!pl->phylink_disable_state) 1723 queue_work(system_power_efficient_wq, &pl->resolve); 1724 } 1725 1726 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1727 { 1728 unsigned long state = pl->phylink_disable_state; 1729 1730 set_bit(bit, &pl->phylink_disable_state); 1731 if (state == 0) { 1732 queue_work(system_power_efficient_wq, &pl->resolve); 1733 flush_work(&pl->resolve); 1734 } 1735 } 1736 1737 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1738 { 1739 clear_bit(bit, &pl->phylink_disable_state); 1740 phylink_run_resolve(pl); 1741 } 1742 1743 static void phylink_fixed_poll(struct timer_list *t) 1744 { 1745 struct phylink *pl = container_of(t, struct phylink, link_poll); 1746 1747 mod_timer(t, jiffies + HZ); 1748 1749 phylink_run_resolve(pl); 1750 } 1751 1752 static const struct sfp_upstream_ops sfp_phylink_ops; 1753 1754 static int phylink_register_sfp(struct phylink *pl, 1755 const struct fwnode_handle *fwnode) 1756 { 1757 struct sfp_bus *bus; 1758 int ret; 1759 1760 if (!fwnode) 1761 return 0; 1762 1763 bus = sfp_bus_find_fwnode(fwnode); 1764 if (IS_ERR(bus)) { 1765 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1766 return PTR_ERR(bus); 1767 } 1768 1769 pl->sfp_bus = bus; 1770 1771 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1772 sfp_bus_put(bus); 1773 1774 return ret; 1775 } 1776 1777 /** 1778 * phylink_set_fixed_link() - set the fixed link 1779 * @pl: a pointer to a &struct phylink returned from phylink_create() 1780 * @state: a pointer to a struct phylink_link_state. 1781 * 1782 * This function is used when the link parameters are known and do not change, 1783 * making it suitable for certain types of network connections. 1784 * 1785 * Returns: zero on success or negative error code. 1786 */ 1787 int phylink_set_fixed_link(struct phylink *pl, 1788 const struct phylink_link_state *state) 1789 { 1790 const struct link_capabilities *c; 1791 unsigned long *adv; 1792 1793 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1794 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1795 return -EINVAL; 1796 1797 c = phy_caps_lookup(state->speed, state->duplex, 1798 pl->supported, true); 1799 if (!c) 1800 return -EINVAL; 1801 1802 adv = pl->link_config.advertising; 1803 linkmode_and(adv, pl->supported, c->linkmodes); 1804 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1805 1806 pl->link_config.speed = state->speed; 1807 pl->link_config.duplex = state->duplex; 1808 pl->link_config.link = 1; 1809 pl->link_config.an_complete = 1; 1810 1811 pl->cfg_link_an_mode = MLO_AN_FIXED; 1812 pl->req_link_an_mode = pl->cfg_link_an_mode; 1813 1814 return 0; 1815 } 1816 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1817 1818 /** 1819 * phylink_create() - create a phylink instance 1820 * @config: a pointer to the target &struct phylink_config 1821 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1822 * interface 1823 * @iface: the desired link mode defined by &typedef phy_interface_t 1824 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1825 * 1826 * Create a new phylink instance, and parse the link parameters found in @np. 1827 * This will parse in-band modes, fixed-link or SFP configuration. 1828 * 1829 * Note: the rtnl lock must not be held when calling this function. 1830 * 1831 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1832 * must use IS_ERR() to check for errors from this function. 1833 */ 1834 struct phylink *phylink_create(struct phylink_config *config, 1835 const struct fwnode_handle *fwnode, 1836 phy_interface_t iface, 1837 const struct phylink_mac_ops *mac_ops) 1838 { 1839 struct phylink *pl; 1840 int ret; 1841 1842 /* Validate the supplied configuration */ 1843 if (phy_interface_empty(config->supported_interfaces)) { 1844 dev_err(config->dev, 1845 "phylink: error: empty supported_interfaces\n"); 1846 return ERR_PTR(-EINVAL); 1847 } 1848 1849 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1850 if (!pl) 1851 return ERR_PTR(-ENOMEM); 1852 1853 mutex_init(&pl->phydev_mutex); 1854 mutex_init(&pl->state_mutex); 1855 INIT_WORK(&pl->resolve, phylink_resolve); 1856 1857 pl->config = config; 1858 if (config->type == PHYLINK_NETDEV) { 1859 pl->netdev = to_net_dev(config->dev); 1860 netif_carrier_off(pl->netdev); 1861 } else if (config->type == PHYLINK_DEV) { 1862 pl->dev = config->dev; 1863 } else { 1864 kfree(pl); 1865 return ERR_PTR(-EINVAL); 1866 } 1867 1868 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1869 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1870 pl->config->lpi_capabilities && 1871 !phy_interface_empty(pl->config->lpi_interfaces); 1872 1873 /* Set the default EEE configuration */ 1874 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1875 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1876 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1877 1878 pl->phy_state.interface = iface; 1879 pl->link_interface = iface; 1880 if (iface == PHY_INTERFACE_MODE_MOCA) 1881 pl->link_port = PORT_BNC; 1882 else 1883 pl->link_port = PORT_MII; 1884 pl->link_config.interface = iface; 1885 pl->link_config.pause = MLO_PAUSE_AN; 1886 pl->link_config.speed = SPEED_UNKNOWN; 1887 pl->link_config.duplex = DUPLEX_UNKNOWN; 1888 pl->pcs_state = PCS_STATE_DOWN; 1889 pl->mac_ops = mac_ops; 1890 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1891 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1892 1893 linkmode_fill(pl->supported); 1894 linkmode_copy(pl->link_config.advertising, pl->supported); 1895 phylink_validate(pl, pl->supported, &pl->link_config); 1896 1897 ret = phylink_parse_mode(pl, fwnode); 1898 if (ret < 0) { 1899 kfree(pl); 1900 return ERR_PTR(ret); 1901 } 1902 1903 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1904 ret = phylink_parse_fixedlink(pl, fwnode); 1905 if (ret < 0) { 1906 kfree(pl); 1907 return ERR_PTR(ret); 1908 } 1909 } 1910 1911 pl->req_link_an_mode = pl->cfg_link_an_mode; 1912 1913 ret = phylink_register_sfp(pl, fwnode); 1914 if (ret < 0) { 1915 kfree(pl); 1916 return ERR_PTR(ret); 1917 } 1918 1919 return pl; 1920 } 1921 EXPORT_SYMBOL_GPL(phylink_create); 1922 1923 /** 1924 * phylink_destroy() - cleanup and destroy the phylink instance 1925 * @pl: a pointer to a &struct phylink returned from phylink_create() 1926 * 1927 * Destroy a phylink instance. Any PHY that has been attached must have been 1928 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1929 * 1930 * Note: the rtnl lock must not be held when calling this function. 1931 */ 1932 void phylink_destroy(struct phylink *pl) 1933 { 1934 sfp_bus_del_upstream(pl->sfp_bus); 1935 if (pl->link_gpio) 1936 gpiod_put(pl->link_gpio); 1937 1938 cancel_work_sync(&pl->resolve); 1939 kfree(pl); 1940 } 1941 EXPORT_SYMBOL_GPL(phylink_destroy); 1942 1943 /** 1944 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1945 * @pl: a pointer to a &struct phylink returned from phylink_create() 1946 * 1947 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1948 * no PHY is needed. 1949 * 1950 * Returns true if phylink will be expecting a PHY. 1951 */ 1952 bool phylink_expects_phy(struct phylink *pl) 1953 { 1954 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1955 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1956 phy_interface_mode_is_8023z(pl->link_interface))) 1957 return false; 1958 return true; 1959 } 1960 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1961 1962 static void phylink_phy_change(struct phy_device *phydev, bool up) 1963 { 1964 struct phylink *pl = phydev->phylink; 1965 bool tx_pause, rx_pause; 1966 1967 phy_get_pause(phydev, &tx_pause, &rx_pause); 1968 1969 mutex_lock(&pl->state_mutex); 1970 pl->phy_state.speed = phydev->speed; 1971 pl->phy_state.duplex = phydev->duplex; 1972 pl->phy_state.rate_matching = phydev->rate_matching; 1973 pl->phy_state.pause = MLO_PAUSE_NONE; 1974 if (tx_pause) 1975 pl->phy_state.pause |= MLO_PAUSE_TX; 1976 if (rx_pause) 1977 pl->phy_state.pause |= MLO_PAUSE_RX; 1978 pl->phy_state.interface = phydev->interface; 1979 pl->phy_state.link = up; 1980 if (!up) 1981 pl->link_failed = true; 1982 1983 /* Get the LPI state from phylib */ 1984 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1985 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1986 mutex_unlock(&pl->state_mutex); 1987 1988 phylink_run_resolve(pl); 1989 1990 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 1991 up ? "up" : "down", 1992 phy_modes(phydev->interface), 1993 phy_speed_to_str(phydev->speed), 1994 phy_duplex_to_str(phydev->duplex), 1995 phy_rate_matching_to_str(phydev->rate_matching), 1996 phylink_pause_to_str(pl->phy_state.pause), 1997 phydev->enable_tx_lpi ? "" : "no"); 1998 } 1999 2000 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2001 unsigned long *supported, 2002 struct phylink_link_state *state) 2003 { 2004 DECLARE_PHY_INTERFACE_MASK(interfaces); 2005 2006 /* If the PHY provides a bitmap of the interfaces it will be using 2007 * depending on the negotiated media speeds, use this to validate 2008 * which ethtool link modes can be used. 2009 */ 2010 if (!phy_interface_empty(phy->possible_interfaces)) { 2011 /* We only care about the union of the PHY's interfaces and 2012 * those which the host supports. 2013 */ 2014 phy_interface_and(interfaces, phy->possible_interfaces, 2015 pl->config->supported_interfaces); 2016 2017 if (phy_interface_empty(interfaces)) { 2018 phylink_err(pl, "PHY has no common interfaces\n"); 2019 return -EINVAL; 2020 } 2021 2022 if (phy_on_sfp(phy)) { 2023 /* If the PHY is on a SFP, limit the interfaces to 2024 * those that can be used with a SFP module. 2025 */ 2026 phy_interface_and(interfaces, interfaces, 2027 phylink_sfp_interfaces); 2028 2029 if (phy_interface_empty(interfaces)) { 2030 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2031 return -EINVAL; 2032 } 2033 } 2034 2035 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2036 phydev_name(phy), 2037 (int)PHY_INTERFACE_MODE_MAX, 2038 phy->possible_interfaces, 2039 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2040 2041 return phylink_validate_mask(pl, phy, supported, state, 2042 interfaces); 2043 } 2044 2045 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2046 phydev_name(phy)); 2047 2048 /* Check whether we would use rate matching for the proposed interface 2049 * mode. 2050 */ 2051 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2052 2053 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2054 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2055 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2056 * their Serdes is either unnecessary or not reasonable. 2057 * 2058 * For these which switch interface modes, we really need to know which 2059 * interface modes the PHY supports to properly work out which ethtool 2060 * linkmodes can be supported. For now, as a work-around, we validate 2061 * against all interface modes, which may lead to more ethtool link 2062 * modes being advertised than are actually supported. 2063 */ 2064 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2065 state->interface != PHY_INTERFACE_MODE_RXAUI && 2066 state->interface != PHY_INTERFACE_MODE_XAUI && 2067 state->interface != PHY_INTERFACE_MODE_USXGMII) 2068 state->interface = PHY_INTERFACE_MODE_NA; 2069 2070 return phylink_validate(pl, supported, state); 2071 } 2072 2073 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2074 phy_interface_t interface) 2075 { 2076 struct phylink_link_state config; 2077 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2078 char *irq_str; 2079 int ret; 2080 2081 /* 2082 * This is the new way of dealing with flow control for PHYs, 2083 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2084 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2085 * using our validate call to the MAC, we rely upon the MAC 2086 * clearing the bits from both supported and advertising fields. 2087 */ 2088 phy_support_asym_pause(phy); 2089 2090 memset(&config, 0, sizeof(config)); 2091 linkmode_copy(supported, phy->supported); 2092 linkmode_copy(config.advertising, phy->advertising); 2093 config.interface = interface; 2094 2095 ret = phylink_validate_phy(pl, phy, supported, &config); 2096 if (ret) { 2097 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2098 phy_modes(config.interface), 2099 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2100 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2101 ERR_PTR(ret)); 2102 return ret; 2103 } 2104 2105 phy->phylink = pl; 2106 phy->phy_link_change = phylink_phy_change; 2107 2108 irq_str = phy_attached_info_irq(phy); 2109 phylink_info(pl, 2110 "PHY [%s] driver [%s] (irq=%s)\n", 2111 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2112 kfree(irq_str); 2113 2114 mutex_lock(&pl->phydev_mutex); 2115 mutex_lock(&phy->lock); 2116 mutex_lock(&pl->state_mutex); 2117 pl->phydev = phy; 2118 pl->phy_state.interface = interface; 2119 pl->phy_state.pause = MLO_PAUSE_NONE; 2120 pl->phy_state.speed = SPEED_UNKNOWN; 2121 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2122 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2123 linkmode_copy(pl->supported, supported); 2124 linkmode_copy(pl->link_config.advertising, config.advertising); 2125 2126 /* Restrict the phy advertisement according to the MAC support. */ 2127 linkmode_copy(phy->advertising, config.advertising); 2128 2129 /* If the MAC supports phylink managed EEE, restrict the EEE 2130 * advertisement according to the MAC's LPI capabilities. 2131 */ 2132 if (pl->mac_supports_eee) { 2133 /* If EEE is enabled, then we need to call phy_support_eee() 2134 * to ensure that the advertising mask is appropriately set. 2135 * This also enables EEE at the PHY. 2136 */ 2137 if (pl->eee_cfg.eee_enabled) 2138 phy_support_eee(phy); 2139 2140 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2141 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2142 2143 /* Convert the MAC's LPI capabilities to linkmodes */ 2144 linkmode_zero(pl->supported_lpi); 2145 phylink_caps_to_linkmodes(pl->supported_lpi, 2146 pl->config->lpi_capabilities); 2147 2148 /* Restrict the PHYs EEE support/advertisement to the modes 2149 * that the MAC supports. 2150 */ 2151 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2152 pl->supported_lpi); 2153 } else if (pl->mac_supports_eee_ops) { 2154 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2155 phy_disable_eee(phy); 2156 } 2157 2158 mutex_unlock(&pl->state_mutex); 2159 mutex_unlock(&phy->lock); 2160 mutex_unlock(&pl->phydev_mutex); 2161 2162 phylink_dbg(pl, 2163 "phy: %s setting supported %*pb advertising %*pb\n", 2164 phy_modes(interface), 2165 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2166 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2167 2168 if (pl->config->mac_managed_pm) 2169 phy->mac_managed_pm = true; 2170 2171 /* Allow the MAC to stop its clock if the PHY has the capability */ 2172 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2173 2174 if (pl->mac_supports_eee_ops) { 2175 /* Explicitly configure whether the PHY is allowed to stop it's 2176 * receive clock. 2177 */ 2178 ret = phy_eee_rx_clock_stop(phy, 2179 pl->config->eee_rx_clk_stop_enable); 2180 if (ret == -EOPNOTSUPP) 2181 ret = 0; 2182 } 2183 2184 if (ret == 0 && phy_interrupt_is_valid(phy)) 2185 phy_request_interrupt(phy); 2186 2187 return ret; 2188 } 2189 2190 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2191 phy_interface_t interface) 2192 { 2193 u32 flags = 0; 2194 2195 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2196 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2197 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2198 return -EINVAL; 2199 2200 if (pl->phydev) 2201 return -EBUSY; 2202 2203 if (pl->config->mac_requires_rxc) 2204 flags |= PHY_F_RXC_ALWAYS_ON; 2205 2206 return phy_attach_direct(pl->netdev, phy, flags, interface); 2207 } 2208 2209 /** 2210 * phylink_connect_phy() - connect a PHY to the phylink instance 2211 * @pl: a pointer to a &struct phylink returned from phylink_create() 2212 * @phy: a pointer to a &struct phy_device. 2213 * 2214 * Connect @phy to the phylink instance specified by @pl by calling 2215 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2216 * capabilities, start the PHYLIB state machine and enable any interrupts 2217 * that the PHY supports. 2218 * 2219 * This updates the phylink's ethtool supported and advertising link mode 2220 * masks. 2221 * 2222 * Returns 0 on success or a negative errno. 2223 */ 2224 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2225 { 2226 int ret; 2227 2228 /* Use PHY device/driver interface */ 2229 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2230 pl->link_interface = phy->interface; 2231 pl->link_config.interface = pl->link_interface; 2232 } 2233 2234 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2235 if (ret < 0) 2236 return ret; 2237 2238 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2239 if (ret) 2240 phy_detach(phy); 2241 2242 return ret; 2243 } 2244 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2245 2246 /** 2247 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2248 * @pl: a pointer to a &struct phylink returned from phylink_create() 2249 * @dn: a pointer to a &struct device_node. 2250 * @flags: PHY-specific flags to communicate to the PHY device driver 2251 * 2252 * Connect the phy specified in the device node @dn to the phylink instance 2253 * specified by @pl. Actions specified in phylink_connect_phy() will be 2254 * performed. 2255 * 2256 * Returns 0 on success or a negative errno. 2257 */ 2258 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2259 u32 flags) 2260 { 2261 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2262 } 2263 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2264 2265 /** 2266 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2267 * @pl: a pointer to a &struct phylink returned from phylink_create() 2268 * @fwnode: a pointer to a &struct fwnode_handle. 2269 * @flags: PHY-specific flags to communicate to the PHY device driver 2270 * 2271 * Connect the phy specified @fwnode to the phylink instance specified 2272 * by @pl. 2273 * 2274 * Returns 0 on success or a negative errno. 2275 */ 2276 int phylink_fwnode_phy_connect(struct phylink *pl, 2277 const struct fwnode_handle *fwnode, 2278 u32 flags) 2279 { 2280 struct fwnode_handle *phy_fwnode; 2281 struct phy_device *phy_dev; 2282 int ret; 2283 2284 /* Fixed links and 802.3z are handled without needing a PHY */ 2285 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2286 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2287 phy_interface_mode_is_8023z(pl->link_interface))) 2288 return 0; 2289 2290 phy_fwnode = fwnode_get_phy_node(fwnode); 2291 if (IS_ERR(phy_fwnode)) { 2292 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2293 return -ENODEV; 2294 return 0; 2295 } 2296 2297 phy_dev = fwnode_phy_find_device(phy_fwnode); 2298 /* We're done with the phy_node handle */ 2299 fwnode_handle_put(phy_fwnode); 2300 if (!phy_dev) 2301 return -ENODEV; 2302 2303 /* Use PHY device/driver interface */ 2304 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2305 pl->link_interface = phy_dev->interface; 2306 pl->link_config.interface = pl->link_interface; 2307 } 2308 2309 if (pl->config->mac_requires_rxc) 2310 flags |= PHY_F_RXC_ALWAYS_ON; 2311 2312 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2313 pl->link_interface); 2314 phy_device_free(phy_dev); 2315 if (ret) 2316 return ret; 2317 2318 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2319 if (ret) 2320 phy_detach(phy_dev); 2321 2322 return ret; 2323 } 2324 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2325 2326 /** 2327 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2328 * instance. 2329 * @pl: a pointer to a &struct phylink returned from phylink_create() 2330 * 2331 * Disconnect any current PHY from the phylink instance described by @pl. 2332 */ 2333 void phylink_disconnect_phy(struct phylink *pl) 2334 { 2335 struct phy_device *phy; 2336 2337 ASSERT_RTNL(); 2338 2339 mutex_lock(&pl->phydev_mutex); 2340 phy = pl->phydev; 2341 if (phy) { 2342 mutex_lock(&phy->lock); 2343 mutex_lock(&pl->state_mutex); 2344 pl->phydev = NULL; 2345 pl->phy_enable_tx_lpi = false; 2346 pl->mac_tx_clk_stop = false; 2347 mutex_unlock(&pl->state_mutex); 2348 mutex_unlock(&phy->lock); 2349 } 2350 mutex_unlock(&pl->phydev_mutex); 2351 2352 if (phy) { 2353 flush_work(&pl->resolve); 2354 phy_disconnect(phy); 2355 } 2356 } 2357 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2358 2359 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2360 { 2361 if (!up) 2362 pl->link_failed = true; 2363 phylink_run_resolve(pl); 2364 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2365 } 2366 2367 /** 2368 * phylink_mac_change() - notify phylink of a change in MAC state 2369 * @pl: a pointer to a &struct phylink returned from phylink_create() 2370 * @up: indicates whether the link is currently up. 2371 * 2372 * The MAC driver should call this driver when the state of its link 2373 * changes (eg, link failure, new negotiation results, etc.) 2374 */ 2375 void phylink_mac_change(struct phylink *pl, bool up) 2376 { 2377 phylink_link_changed(pl, up, "mac"); 2378 } 2379 EXPORT_SYMBOL_GPL(phylink_mac_change); 2380 2381 /** 2382 * phylink_pcs_change() - notify phylink of a change to PCS link state 2383 * @pcs: pointer to &struct phylink_pcs 2384 * @up: indicates whether the link is currently up. 2385 * 2386 * The PCS driver should call this when the state of its link changes 2387 * (e.g. link failure, new negotiation results, etc.) Note: it should 2388 * not determine "up" by reading the BMSR. If in doubt about the link 2389 * state at interrupt time, then pass true if pcs_get_state() returns 2390 * the latched link-down state, otherwise pass false. 2391 */ 2392 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2393 { 2394 struct phylink *pl = pcs->phylink; 2395 2396 if (pl) 2397 phylink_link_changed(pl, up, "pcs"); 2398 } 2399 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2400 2401 static irqreturn_t phylink_link_handler(int irq, void *data) 2402 { 2403 struct phylink *pl = data; 2404 2405 phylink_run_resolve(pl); 2406 2407 return IRQ_HANDLED; 2408 } 2409 2410 /** 2411 * phylink_start() - start a phylink instance 2412 * @pl: a pointer to a &struct phylink returned from phylink_create() 2413 * 2414 * Start the phylink instance specified by @pl, configuring the MAC for the 2415 * desired link mode(s) and negotiation style. This should be called from the 2416 * network device driver's &struct net_device_ops ndo_open() method. 2417 */ 2418 void phylink_start(struct phylink *pl) 2419 { 2420 bool poll = false; 2421 2422 ASSERT_RTNL(); 2423 2424 phylink_info(pl, "configuring for %s/%s link mode\n", 2425 phylink_an_mode_str(pl->req_link_an_mode), 2426 phy_modes(pl->link_config.interface)); 2427 2428 /* Always set the carrier off */ 2429 if (pl->netdev) 2430 netif_carrier_off(pl->netdev); 2431 2432 pl->pcs_state = PCS_STATE_STARTING; 2433 2434 /* Apply the link configuration to the MAC when starting. This allows 2435 * a fixed-link to start with the correct parameters, and also 2436 * ensures that we set the appropriate advertisement for Serdes links. 2437 * 2438 * Restart autonegotiation if using 802.3z to ensure that the link 2439 * parameters are properly negotiated. This is necessary for DSA 2440 * switches using 802.3z negotiation to ensure they see our modes. 2441 */ 2442 phylink_mac_initial_config(pl, true); 2443 2444 pl->pcs_state = PCS_STATE_STARTED; 2445 2446 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2447 2448 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2449 int irq = gpiod_to_irq(pl->link_gpio); 2450 2451 if (irq > 0) { 2452 if (!request_irq(irq, phylink_link_handler, 2453 IRQF_TRIGGER_RISING | 2454 IRQF_TRIGGER_FALLING, 2455 "netdev link", pl)) 2456 pl->link_irq = irq; 2457 else 2458 irq = 0; 2459 } 2460 if (irq <= 0) 2461 poll = true; 2462 } 2463 2464 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2465 poll |= pl->config->poll_fixed_state; 2466 2467 if (poll) 2468 mod_timer(&pl->link_poll, jiffies + HZ); 2469 if (pl->phydev) 2470 phy_start(pl->phydev); 2471 if (pl->sfp_bus) 2472 sfp_upstream_start(pl->sfp_bus); 2473 } 2474 EXPORT_SYMBOL_GPL(phylink_start); 2475 2476 /** 2477 * phylink_stop() - stop a phylink instance 2478 * @pl: a pointer to a &struct phylink returned from phylink_create() 2479 * 2480 * Stop the phylink instance specified by @pl. This should be called from the 2481 * network device driver's &struct net_device_ops ndo_stop() method. The 2482 * network device's carrier state should not be changed prior to calling this 2483 * function. 2484 * 2485 * This will synchronously bring down the link if the link is not already 2486 * down (in other words, it will trigger a mac_link_down() method call.) 2487 */ 2488 void phylink_stop(struct phylink *pl) 2489 { 2490 ASSERT_RTNL(); 2491 2492 if (pl->sfp_bus) 2493 sfp_upstream_stop(pl->sfp_bus); 2494 if (pl->phydev) 2495 phy_stop(pl->phydev); 2496 timer_delete_sync(&pl->link_poll); 2497 if (pl->link_irq) { 2498 free_irq(pl->link_irq, pl); 2499 pl->link_irq = 0; 2500 } 2501 2502 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2503 2504 pl->pcs_state = PCS_STATE_DOWN; 2505 2506 phylink_pcs_disable(pl->pcs); 2507 } 2508 EXPORT_SYMBOL_GPL(phylink_stop); 2509 2510 /** 2511 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2512 * @pl: a pointer to a &struct phylink returned from phylink_create() 2513 * 2514 * Disable the PHY's ability to stop the receive clock while the receive path 2515 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2516 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2517 */ 2518 void phylink_rx_clk_stop_block(struct phylink *pl) 2519 { 2520 ASSERT_RTNL(); 2521 2522 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2523 phylink_warn(pl, "%s called too many times - ignoring\n", 2524 __func__); 2525 dump_stack(); 2526 return; 2527 } 2528 2529 /* Disable PHY receive clock stop if this is the first time this 2530 * function has been called and clock-stop was previously enabled. 2531 */ 2532 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2533 pl->mac_supports_eee_ops && pl->phydev && 2534 pl->config->eee_rx_clk_stop_enable) 2535 phy_eee_rx_clock_stop(pl->phydev, false); 2536 } 2537 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2538 2539 /** 2540 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2541 * @pl: a pointer to a &struct phylink returned from phylink_create() 2542 * 2543 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2544 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2545 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2546 */ 2547 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2548 { 2549 ASSERT_RTNL(); 2550 2551 if (pl->mac_rx_clk_stop_blocked == 0) { 2552 phylink_warn(pl, "%s called too many times - ignoring\n", 2553 __func__); 2554 dump_stack(); 2555 return; 2556 } 2557 2558 /* Re-enable PHY receive clock stop if the number of unblocks matches 2559 * the number of calls to the block function above. 2560 */ 2561 if (--pl->mac_rx_clk_stop_blocked == 0 && 2562 pl->mac_supports_eee_ops && pl->phydev && 2563 pl->config->eee_rx_clk_stop_enable) 2564 phy_eee_rx_clock_stop(pl->phydev, true); 2565 } 2566 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2567 2568 /** 2569 * phylink_suspend() - handle a network device suspend event 2570 * @pl: a pointer to a &struct phylink returned from phylink_create() 2571 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2572 * 2573 * Handle a network device suspend event. There are several cases: 2574 * 2575 * - If Wake-on-Lan is not active, we can bring down the link between 2576 * the MAC and PHY by calling phylink_stop(). 2577 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2578 * can also bring down the link between the MAC and PHY. 2579 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2580 * still needs to receive packets, so we can not bring the link down. 2581 */ 2582 void phylink_suspend(struct phylink *pl, bool mac_wol) 2583 { 2584 ASSERT_RTNL(); 2585 2586 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2587 /* Wake-on-Lan enabled, MAC handling */ 2588 mutex_lock(&pl->state_mutex); 2589 2590 /* Stop the resolver bringing the link up */ 2591 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2592 2593 pl->suspend_link_up = phylink_link_is_up(pl); 2594 if (pl->suspend_link_up) { 2595 /* Disable the carrier, to prevent transmit timeouts, 2596 * but one would hope all packets have been sent. This 2597 * also means phylink_resolve() will do nothing. 2598 */ 2599 if (pl->netdev) 2600 netif_carrier_off(pl->netdev); 2601 pl->old_link_state = false; 2602 } 2603 2604 /* We do not call mac_link_down() here as we want the 2605 * link to remain up to receive the WoL packets. 2606 */ 2607 mutex_unlock(&pl->state_mutex); 2608 } else { 2609 phylink_stop(pl); 2610 } 2611 } 2612 EXPORT_SYMBOL_GPL(phylink_suspend); 2613 2614 /** 2615 * phylink_prepare_resume() - prepare to resume a network device 2616 * @pl: a pointer to a &struct phylink returned from phylink_create() 2617 * 2618 * Optional, but if called must be called prior to phylink_resume(). 2619 * 2620 * Prepare to resume a network device, preparing the PHY as necessary. 2621 */ 2622 void phylink_prepare_resume(struct phylink *pl) 2623 { 2624 struct phy_device *phydev = pl->phydev; 2625 2626 ASSERT_RTNL(); 2627 2628 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2629 * when PDOWN is set. However, some MACs require RXC to be running 2630 * in order to resume. If the MAC requires RXC, and we have a PHY, 2631 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2632 * the clock meets requirements. We do not implement this delay. 2633 */ 2634 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2635 phy_resume(phydev); 2636 } 2637 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2638 2639 /** 2640 * phylink_resume() - handle a network device resume event 2641 * @pl: a pointer to a &struct phylink returned from phylink_create() 2642 * 2643 * Undo the effects of phylink_suspend(), returning the link to an 2644 * operational state. 2645 */ 2646 void phylink_resume(struct phylink *pl) 2647 { 2648 ASSERT_RTNL(); 2649 2650 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2651 /* Wake-on-Lan enabled, MAC handling */ 2652 2653 if (pl->suspend_link_up) { 2654 /* Call mac_link_down() so we keep the overall state 2655 * balanced. Do this under the state_mutex lock for 2656 * consistency. This will cause a "Link Down" message 2657 * to be printed during resume, which is harmless - 2658 * the true link state will be printed when we run a 2659 * resolve. 2660 */ 2661 mutex_lock(&pl->state_mutex); 2662 phylink_link_down(pl); 2663 mutex_unlock(&pl->state_mutex); 2664 } 2665 2666 /* Re-apply the link parameters so that all the settings get 2667 * restored to the MAC. 2668 */ 2669 phylink_mac_initial_config(pl, true); 2670 2671 /* Re-enable and re-resolve the link parameters */ 2672 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2673 } else { 2674 phylink_start(pl); 2675 } 2676 } 2677 EXPORT_SYMBOL_GPL(phylink_resume); 2678 2679 /** 2680 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2681 * @pl: a pointer to a &struct phylink returned from phylink_create() 2682 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2683 * 2684 * Read the wake on lan parameters from the PHY attached to the phylink 2685 * instance specified by @pl. If no PHY is currently attached, report no 2686 * support for wake on lan. 2687 */ 2688 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2689 { 2690 ASSERT_RTNL(); 2691 2692 wol->supported = 0; 2693 wol->wolopts = 0; 2694 2695 if (pl->phydev) 2696 phy_ethtool_get_wol(pl->phydev, wol); 2697 } 2698 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2699 2700 /** 2701 * phylink_ethtool_set_wol() - set wake on lan parameters 2702 * @pl: a pointer to a &struct phylink returned from phylink_create() 2703 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2704 * 2705 * Set the wake on lan parameters for the PHY attached to the phylink 2706 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2707 * error. 2708 * 2709 * Returns zero on success or negative errno code. 2710 */ 2711 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2712 { 2713 int ret = -EOPNOTSUPP; 2714 2715 ASSERT_RTNL(); 2716 2717 if (pl->phydev) 2718 ret = phy_ethtool_set_wol(pl->phydev, wol); 2719 2720 return ret; 2721 } 2722 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2723 2724 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2725 const unsigned long *link_modes) 2726 { 2727 phy_interface_t interface; 2728 2729 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2730 if (interface == PHY_INTERFACE_MODE_NA) { 2731 phylink_err(pl, 2732 "selection of interface failed, advertisement %*pb\n", 2733 __ETHTOOL_LINK_MODE_MASK_NBITS, 2734 link_modes); 2735 return interface; 2736 } 2737 2738 if (!test_bit(interface, pl->config->supported_interfaces)) { 2739 phylink_err(pl, 2740 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2741 phy_modes(interface), interface, 2742 (int)PHY_INTERFACE_MODE_MAX, 2743 pl->config->supported_interfaces); 2744 return PHY_INTERFACE_MODE_NA; 2745 } 2746 2747 return interface; 2748 } 2749 2750 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2751 u32 speed) 2752 { 2753 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2754 phy_interface_t interface; 2755 u32 max_speed; 2756 int i; 2757 2758 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2759 interface = phylink_sfp_interface_preference[i]; 2760 if (!test_bit(interface, pl->sfp_interfaces)) 2761 continue; 2762 2763 max_speed = phylink_interface_max_speed(interface); 2764 2765 /* The logic here is: if speed == max_speed, then we've found 2766 * the best interface. Otherwise we find the interface that 2767 * can just support the requested speed. 2768 */ 2769 if (max_speed >= speed) 2770 best_interface = interface; 2771 2772 if (max_speed <= speed) 2773 break; 2774 } 2775 2776 if (best_interface == PHY_INTERFACE_MODE_NA) 2777 phylink_err(pl, "selection of interface failed, speed %u\n", 2778 speed); 2779 2780 return best_interface; 2781 } 2782 2783 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2784 { 2785 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2786 2787 linkmode_zero(mask); 2788 phylink_set_port_modes(mask); 2789 2790 linkmode_and(dst, dst, mask); 2791 linkmode_or(dst, dst, b); 2792 } 2793 2794 static void phylink_get_ksettings(const struct phylink_link_state *state, 2795 struct ethtool_link_ksettings *kset) 2796 { 2797 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2798 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2799 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2800 kset->base.speed = state->speed; 2801 kset->base.duplex = state->duplex; 2802 } 2803 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2804 state->advertising) ? 2805 AUTONEG_ENABLE : AUTONEG_DISABLE; 2806 } 2807 2808 /** 2809 * phylink_ethtool_ksettings_get() - get the current link settings 2810 * @pl: a pointer to a &struct phylink returned from phylink_create() 2811 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2812 * 2813 * Read the current link settings for the phylink instance specified by @pl. 2814 * This will be the link settings read from the MAC, PHY or fixed link 2815 * settings depending on the current negotiation mode. 2816 */ 2817 int phylink_ethtool_ksettings_get(struct phylink *pl, 2818 struct ethtool_link_ksettings *kset) 2819 { 2820 struct phylink_link_state link_state; 2821 2822 ASSERT_RTNL(); 2823 2824 if (pl->phydev) 2825 phy_ethtool_ksettings_get(pl->phydev, kset); 2826 else 2827 kset->base.port = pl->link_port; 2828 2829 linkmode_copy(kset->link_modes.supported, pl->supported); 2830 2831 switch (pl->act_link_an_mode) { 2832 case MLO_AN_FIXED: 2833 /* We are using fixed settings. Report these as the 2834 * current link settings - and note that these also 2835 * represent the supported speeds/duplex/pause modes. 2836 */ 2837 phylink_get_fixed_state(pl, &link_state); 2838 phylink_get_ksettings(&link_state, kset); 2839 break; 2840 2841 case MLO_AN_INBAND: 2842 /* If there is a phy attached, then use the reported 2843 * settings from the phy with no modification. 2844 */ 2845 if (pl->phydev) 2846 break; 2847 2848 phylink_mac_pcs_get_state(pl, &link_state); 2849 2850 /* The MAC is reporting the link results from its own PCS 2851 * layer via in-band status. Report these as the current 2852 * link settings. 2853 */ 2854 phylink_get_ksettings(&link_state, kset); 2855 break; 2856 } 2857 2858 return 0; 2859 } 2860 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2861 2862 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2863 phy_interface_t interface, 2864 unsigned long *adv) 2865 { 2866 unsigned int inband = phylink_inband_caps(pl, interface); 2867 unsigned int mask; 2868 2869 /* If the PCS doesn't implement inband support, be permissive. */ 2870 if (!inband) 2871 return true; 2872 2873 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2874 mask = LINK_INBAND_ENABLE; 2875 else 2876 mask = LINK_INBAND_DISABLE; 2877 2878 /* Check whether the PCS implements the required mode */ 2879 return !!(inband & mask); 2880 } 2881 2882 /** 2883 * phylink_ethtool_ksettings_set() - set the link settings 2884 * @pl: a pointer to a &struct phylink returned from phylink_create() 2885 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2886 */ 2887 int phylink_ethtool_ksettings_set(struct phylink *pl, 2888 const struct ethtool_link_ksettings *kset) 2889 { 2890 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2891 const struct link_capabilities *c; 2892 struct phylink_link_state config; 2893 2894 ASSERT_RTNL(); 2895 2896 if (pl->phydev) { 2897 struct ethtool_link_ksettings phy_kset = *kset; 2898 2899 linkmode_and(phy_kset.link_modes.advertising, 2900 phy_kset.link_modes.advertising, 2901 pl->supported); 2902 2903 /* We can rely on phylib for this update; we also do not need 2904 * to update the pl->link_config settings: 2905 * - the configuration returned via ksettings_get() will come 2906 * from phylib whenever a PHY is present. 2907 * - link_config.interface will be updated by the PHY calling 2908 * back via phylink_phy_change() and a subsequent resolve. 2909 * - initial link configuration for PHY mode comes from the 2910 * last phy state updated via phylink_phy_change(). 2911 * - other configuration changes (e.g. pause modes) are 2912 * performed directly via phylib. 2913 * - if in in-band mode with a PHY, the link configuration 2914 * is passed on the link from the PHY, and all of 2915 * link_config.{speed,duplex,an_enabled,pause} are not used. 2916 * - the only possible use would be link_config.advertising 2917 * pause modes when in 1000base-X mode with a PHY, but in 2918 * the presence of a PHY, this should not be changed as that 2919 * should be determined from the media side advertisement. 2920 */ 2921 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2922 } 2923 2924 config = pl->link_config; 2925 /* Mask out unsupported advertisements */ 2926 linkmode_and(config.advertising, kset->link_modes.advertising, 2927 pl->supported); 2928 2929 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2930 switch (kset->base.autoneg) { 2931 case AUTONEG_DISABLE: 2932 /* Autonegotiation disabled, select a suitable speed and 2933 * duplex. 2934 */ 2935 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 2936 pl->supported, false); 2937 if (!c) 2938 return -EINVAL; 2939 2940 /* If we have a fixed link, refuse to change link parameters. 2941 * If the link parameters match, accept them but do nothing. 2942 */ 2943 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2944 if (c->speed != pl->link_config.speed || 2945 c->duplex != pl->link_config.duplex) 2946 return -EINVAL; 2947 return 0; 2948 } 2949 2950 config.speed = c->speed; 2951 config.duplex = c->duplex; 2952 break; 2953 2954 case AUTONEG_ENABLE: 2955 /* If we have a fixed link, allow autonegotiation (since that 2956 * is our default case) but do not allow the advertisement to 2957 * be changed. If the advertisement matches, simply return. 2958 */ 2959 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2960 if (!linkmode_equal(config.advertising, 2961 pl->link_config.advertising)) 2962 return -EINVAL; 2963 return 0; 2964 } 2965 2966 config.speed = SPEED_UNKNOWN; 2967 config.duplex = DUPLEX_UNKNOWN; 2968 break; 2969 2970 default: 2971 return -EINVAL; 2972 } 2973 2974 /* We have ruled out the case with a PHY attached, and the 2975 * fixed-link cases. All that is left are in-band links. 2976 */ 2977 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2978 kset->base.autoneg == AUTONEG_ENABLE); 2979 2980 /* If this link is with an SFP, ensure that changes to advertised modes 2981 * also cause the associated interface to be selected such that the 2982 * link can be configured correctly. 2983 */ 2984 if (pl->sfp_bus) { 2985 if (kset->base.autoneg == AUTONEG_ENABLE) 2986 config.interface = 2987 phylink_sfp_select_interface(pl, 2988 config.advertising); 2989 else 2990 config.interface = 2991 phylink_sfp_select_interface_speed(pl, 2992 config.speed); 2993 if (config.interface == PHY_INTERFACE_MODE_NA) 2994 return -EINVAL; 2995 2996 /* Revalidate with the selected interface */ 2997 linkmode_copy(support, pl->supported); 2998 if (phylink_validate(pl, support, &config)) { 2999 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3000 phylink_an_mode_str(pl->req_link_an_mode), 3001 phy_modes(config.interface), 3002 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3003 return -EINVAL; 3004 } 3005 } else { 3006 /* Validate without changing the current supported mask. */ 3007 linkmode_copy(support, pl->supported); 3008 if (phylink_validate(pl, support, &config)) 3009 return -EINVAL; 3010 } 3011 3012 /* If autonegotiation is enabled, we must have an advertisement */ 3013 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3014 config.advertising) && 3015 phylink_is_empty_linkmode(config.advertising)) 3016 return -EINVAL; 3017 3018 /* Validate the autonegotiation state. We don't have a PHY in this 3019 * situation, so the PCS is the media-facing entity. 3020 */ 3021 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3022 config.advertising)) 3023 return -EINVAL; 3024 3025 mutex_lock(&pl->state_mutex); 3026 pl->link_config.speed = config.speed; 3027 pl->link_config.duplex = config.duplex; 3028 3029 if (pl->link_config.interface != config.interface) { 3030 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3031 /* We need to force the link down, then change the interface */ 3032 if (pl->old_link_state) { 3033 phylink_link_down(pl); 3034 pl->old_link_state = false; 3035 } 3036 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3037 &pl->phylink_disable_state)) 3038 phylink_major_config(pl, false, &config); 3039 pl->link_config.interface = config.interface; 3040 linkmode_copy(pl->link_config.advertising, config.advertising); 3041 } else if (!linkmode_equal(pl->link_config.advertising, 3042 config.advertising)) { 3043 linkmode_copy(pl->link_config.advertising, config.advertising); 3044 phylink_change_inband_advert(pl); 3045 } 3046 mutex_unlock(&pl->state_mutex); 3047 3048 return 0; 3049 } 3050 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3051 3052 /** 3053 * phylink_ethtool_nway_reset() - restart negotiation 3054 * @pl: a pointer to a &struct phylink returned from phylink_create() 3055 * 3056 * Restart negotiation for the phylink instance specified by @pl. This will 3057 * cause any attached phy to restart negotiation with the link partner, and 3058 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3059 * negotiation. 3060 * 3061 * Returns zero on success, or negative error code. 3062 */ 3063 int phylink_ethtool_nway_reset(struct phylink *pl) 3064 { 3065 int ret = 0; 3066 3067 ASSERT_RTNL(); 3068 3069 if (pl->phydev) 3070 ret = phy_restart_aneg(pl->phydev); 3071 phylink_pcs_an_restart(pl); 3072 3073 return ret; 3074 } 3075 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3076 3077 /** 3078 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3079 * @pl: a pointer to a &struct phylink returned from phylink_create() 3080 * @pause: a pointer to a &struct ethtool_pauseparam 3081 */ 3082 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3083 struct ethtool_pauseparam *pause) 3084 { 3085 ASSERT_RTNL(); 3086 3087 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3088 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3089 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3090 } 3091 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3092 3093 /** 3094 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3095 * @pl: a pointer to a &struct phylink returned from phylink_create() 3096 * @pause: a pointer to a &struct ethtool_pauseparam 3097 */ 3098 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3099 struct ethtool_pauseparam *pause) 3100 { 3101 struct phylink_link_state *config = &pl->link_config; 3102 bool manual_changed; 3103 int pause_state; 3104 3105 ASSERT_RTNL(); 3106 3107 if (pl->req_link_an_mode == MLO_AN_FIXED) 3108 return -EOPNOTSUPP; 3109 3110 if (!phylink_test(pl->supported, Pause) && 3111 !phylink_test(pl->supported, Asym_Pause)) 3112 return -EOPNOTSUPP; 3113 3114 if (!phylink_test(pl->supported, Asym_Pause) && 3115 pause->rx_pause != pause->tx_pause) 3116 return -EINVAL; 3117 3118 pause_state = 0; 3119 if (pause->autoneg) 3120 pause_state |= MLO_PAUSE_AN; 3121 if (pause->rx_pause) 3122 pause_state |= MLO_PAUSE_RX; 3123 if (pause->tx_pause) 3124 pause_state |= MLO_PAUSE_TX; 3125 3126 mutex_lock(&pl->state_mutex); 3127 /* 3128 * See the comments for linkmode_set_pause(), wrt the deficiencies 3129 * with the current implementation. A solution to this issue would 3130 * be: 3131 * ethtool Local device 3132 * rx tx Pause AsymDir 3133 * 0 0 0 0 3134 * 1 0 1 1 3135 * 0 1 0 1 3136 * 1 1 1 1 3137 * and then use the ethtool rx/tx enablement status to mask the 3138 * rx/tx pause resolution. 3139 */ 3140 linkmode_set_pause(config->advertising, pause->tx_pause, 3141 pause->rx_pause); 3142 3143 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3144 (!(pause_state & MLO_PAUSE_AN) && 3145 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3146 3147 config->pause = pause_state; 3148 3149 /* Update our in-band advertisement, triggering a renegotiation if 3150 * the advertisement changed. 3151 */ 3152 if (!pl->phydev) 3153 phylink_change_inband_advert(pl); 3154 3155 mutex_unlock(&pl->state_mutex); 3156 3157 /* If we have a PHY, a change of the pause frame advertisement will 3158 * cause phylib to renegotiate (if AN is enabled) which will in turn 3159 * call our phylink_phy_change() and trigger a resolve. Note that 3160 * we can't hold our state mutex while calling phy_set_asym_pause(). 3161 */ 3162 if (pl->phydev) 3163 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3164 pause->tx_pause); 3165 3166 /* If the manual pause settings changed, make sure we trigger a 3167 * resolve to update their state; we can not guarantee that the 3168 * link will cycle. 3169 */ 3170 if (manual_changed) { 3171 pl->link_failed = true; 3172 phylink_run_resolve(pl); 3173 } 3174 3175 return 0; 3176 } 3177 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3178 3179 /** 3180 * phylink_get_eee_err() - read the energy efficient ethernet error 3181 * counter 3182 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3183 * 3184 * Read the Energy Efficient Ethernet error counter from the PHY associated 3185 * with the phylink instance specified by @pl. 3186 * 3187 * Returns positive error counter value, or negative error code. 3188 */ 3189 int phylink_get_eee_err(struct phylink *pl) 3190 { 3191 int ret = 0; 3192 3193 ASSERT_RTNL(); 3194 3195 if (pl->phydev) 3196 ret = phy_get_eee_err(pl->phydev); 3197 3198 return ret; 3199 } 3200 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3201 3202 /** 3203 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3204 * @pl: a pointer to a &struct phylink returned from phylink_create() 3205 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3206 */ 3207 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3208 { 3209 int ret = -EOPNOTSUPP; 3210 3211 ASSERT_RTNL(); 3212 3213 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3214 return ret; 3215 3216 if (pl->phydev) { 3217 ret = phy_ethtool_get_eee(pl->phydev, eee); 3218 /* Restrict supported linkmode mask */ 3219 if (ret == 0 && pl->mac_supports_eee_ops) 3220 linkmode_and(eee->supported, eee->supported, 3221 pl->supported_lpi); 3222 } 3223 3224 return ret; 3225 } 3226 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3227 3228 /** 3229 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3230 * @pl: a pointer to a &struct phylink returned from phylink_create() 3231 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3232 */ 3233 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3234 { 3235 bool mac_eee = pl->mac_supports_eee; 3236 int ret = -EOPNOTSUPP; 3237 3238 ASSERT_RTNL(); 3239 3240 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3241 mac_eee ? "supports" : "does not support", 3242 eee->eee_enabled ? ", enabled" : "", 3243 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3244 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3245 3246 if (pl->mac_supports_eee_ops && !mac_eee) 3247 return ret; 3248 3249 if (pl->phydev) { 3250 /* Restrict advertisement mask */ 3251 if (pl->mac_supports_eee_ops) 3252 linkmode_and(eee->advertised, eee->advertised, 3253 pl->supported_lpi); 3254 ret = phy_ethtool_set_eee(pl->phydev, eee); 3255 if (ret == 0) 3256 eee_to_eeecfg(&pl->eee_cfg, eee); 3257 } 3258 3259 return ret; 3260 } 3261 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3262 3263 /* This emulates MII registers for a fixed-mode phy operating as per the 3264 * passed in state. "aneg" defines if we report negotiation is possible. 3265 * 3266 * FIXME: should deal with negotiation state too. 3267 */ 3268 static int phylink_mii_emul_read(unsigned int reg, 3269 struct phylink_link_state *state) 3270 { 3271 struct fixed_phy_status fs; 3272 unsigned long *lpa = state->lp_advertising; 3273 int val; 3274 3275 fs.link = state->link; 3276 fs.speed = state->speed; 3277 fs.duplex = state->duplex; 3278 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3279 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3280 3281 val = swphy_read_reg(reg, &fs); 3282 if (reg == MII_BMSR) { 3283 if (!state->an_complete) 3284 val &= ~BMSR_ANEGCOMPLETE; 3285 } 3286 return val; 3287 } 3288 3289 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3290 unsigned int reg) 3291 { 3292 struct phy_device *phydev = pl->phydev; 3293 int prtad, devad; 3294 3295 if (mdio_phy_id_is_c45(phy_id)) { 3296 prtad = mdio_phy_id_prtad(phy_id); 3297 devad = mdio_phy_id_devad(phy_id); 3298 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3299 reg); 3300 } 3301 3302 if (phydev->is_c45) { 3303 switch (reg) { 3304 case MII_BMCR: 3305 case MII_BMSR: 3306 case MII_PHYSID1: 3307 case MII_PHYSID2: 3308 devad = __ffs(phydev->c45_ids.mmds_present); 3309 break; 3310 case MII_ADVERTISE: 3311 case MII_LPA: 3312 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3313 return -EINVAL; 3314 devad = MDIO_MMD_AN; 3315 if (reg == MII_ADVERTISE) 3316 reg = MDIO_AN_ADVERTISE; 3317 else 3318 reg = MDIO_AN_LPA; 3319 break; 3320 default: 3321 return -EINVAL; 3322 } 3323 prtad = phy_id; 3324 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3325 reg); 3326 } 3327 3328 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3329 } 3330 3331 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3332 unsigned int reg, unsigned int val) 3333 { 3334 struct phy_device *phydev = pl->phydev; 3335 int prtad, devad; 3336 3337 if (mdio_phy_id_is_c45(phy_id)) { 3338 prtad = mdio_phy_id_prtad(phy_id); 3339 devad = mdio_phy_id_devad(phy_id); 3340 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3341 reg, val); 3342 } 3343 3344 if (phydev->is_c45) { 3345 switch (reg) { 3346 case MII_BMCR: 3347 case MII_BMSR: 3348 case MII_PHYSID1: 3349 case MII_PHYSID2: 3350 devad = __ffs(phydev->c45_ids.mmds_present); 3351 break; 3352 case MII_ADVERTISE: 3353 case MII_LPA: 3354 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3355 return -EINVAL; 3356 devad = MDIO_MMD_AN; 3357 if (reg == MII_ADVERTISE) 3358 reg = MDIO_AN_ADVERTISE; 3359 else 3360 reg = MDIO_AN_LPA; 3361 break; 3362 default: 3363 return -EINVAL; 3364 } 3365 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3366 reg, val); 3367 } 3368 3369 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3370 } 3371 3372 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3373 unsigned int reg) 3374 { 3375 struct phylink_link_state state; 3376 int val = 0xffff; 3377 3378 switch (pl->act_link_an_mode) { 3379 case MLO_AN_FIXED: 3380 if (phy_id == 0) { 3381 phylink_get_fixed_state(pl, &state); 3382 val = phylink_mii_emul_read(reg, &state); 3383 } 3384 break; 3385 3386 case MLO_AN_PHY: 3387 return -EOPNOTSUPP; 3388 3389 case MLO_AN_INBAND: 3390 if (phy_id == 0) { 3391 phylink_mac_pcs_get_state(pl, &state); 3392 val = phylink_mii_emul_read(reg, &state); 3393 } 3394 break; 3395 } 3396 3397 return val & 0xffff; 3398 } 3399 3400 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3401 unsigned int reg, unsigned int val) 3402 { 3403 switch (pl->act_link_an_mode) { 3404 case MLO_AN_FIXED: 3405 break; 3406 3407 case MLO_AN_PHY: 3408 return -EOPNOTSUPP; 3409 3410 case MLO_AN_INBAND: 3411 break; 3412 } 3413 3414 return 0; 3415 } 3416 3417 /** 3418 * phylink_mii_ioctl() - generic mii ioctl interface 3419 * @pl: a pointer to a &struct phylink returned from phylink_create() 3420 * @ifr: a pointer to a &struct ifreq for socket ioctls 3421 * @cmd: ioctl cmd to execute 3422 * 3423 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3424 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3425 * 3426 * Returns: zero on success or negative error code. 3427 * 3428 * %SIOCGMIIPHY: 3429 * read register from the current PHY. 3430 * %SIOCGMIIREG: 3431 * read register from the specified PHY. 3432 * %SIOCSMIIREG: 3433 * set a register on the specified PHY. 3434 */ 3435 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3436 { 3437 struct mii_ioctl_data *mii = if_mii(ifr); 3438 int ret; 3439 3440 ASSERT_RTNL(); 3441 3442 if (pl->phydev) { 3443 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3444 switch (cmd) { 3445 case SIOCGMIIPHY: 3446 mii->phy_id = pl->phydev->mdio.addr; 3447 fallthrough; 3448 3449 case SIOCGMIIREG: 3450 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3451 if (ret >= 0) { 3452 mii->val_out = ret; 3453 ret = 0; 3454 } 3455 break; 3456 3457 case SIOCSMIIREG: 3458 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3459 mii->val_in); 3460 break; 3461 3462 default: 3463 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3464 break; 3465 } 3466 } else { 3467 switch (cmd) { 3468 case SIOCGMIIPHY: 3469 mii->phy_id = 0; 3470 fallthrough; 3471 3472 case SIOCGMIIREG: 3473 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3474 if (ret >= 0) { 3475 mii->val_out = ret; 3476 ret = 0; 3477 } 3478 break; 3479 3480 case SIOCSMIIREG: 3481 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3482 mii->val_in); 3483 break; 3484 3485 default: 3486 ret = -EOPNOTSUPP; 3487 break; 3488 } 3489 } 3490 3491 return ret; 3492 } 3493 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3494 3495 /** 3496 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3497 * link partners 3498 * @pl: a pointer to a &struct phylink returned from phylink_create() 3499 * @sync: perform action synchronously 3500 * 3501 * If we have a PHY that is not part of a SFP module, then set the speed 3502 * as described in the phy_speed_down() function. Please see this function 3503 * for a description of the @sync parameter. 3504 * 3505 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3506 */ 3507 int phylink_speed_down(struct phylink *pl, bool sync) 3508 { 3509 int ret = 0; 3510 3511 ASSERT_RTNL(); 3512 3513 if (!pl->sfp_bus && pl->phydev) 3514 ret = phy_speed_down(pl->phydev, sync); 3515 3516 return ret; 3517 } 3518 EXPORT_SYMBOL_GPL(phylink_speed_down); 3519 3520 /** 3521 * phylink_speed_up() - restore the advertised speeds prior to the call to 3522 * phylink_speed_down() 3523 * @pl: a pointer to a &struct phylink returned from phylink_create() 3524 * 3525 * If we have a PHY that is not part of a SFP module, then restore the 3526 * PHY speeds as per phy_speed_up(). 3527 * 3528 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3529 */ 3530 int phylink_speed_up(struct phylink *pl) 3531 { 3532 int ret = 0; 3533 3534 ASSERT_RTNL(); 3535 3536 if (!pl->sfp_bus && pl->phydev) 3537 ret = phy_speed_up(pl->phydev); 3538 3539 return ret; 3540 } 3541 EXPORT_SYMBOL_GPL(phylink_speed_up); 3542 3543 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3544 { 3545 struct phylink *pl = upstream; 3546 3547 pl->netdev->sfp_bus = bus; 3548 } 3549 3550 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3551 { 3552 struct phylink *pl = upstream; 3553 3554 pl->netdev->sfp_bus = NULL; 3555 } 3556 3557 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3558 const unsigned long *intf) 3559 { 3560 phy_interface_t interface; 3561 size_t i; 3562 3563 interface = PHY_INTERFACE_MODE_NA; 3564 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3565 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3566 interface = phylink_sfp_interface_preference[i]; 3567 break; 3568 } 3569 3570 return interface; 3571 } 3572 3573 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3574 struct phylink_link_state *state, 3575 bool changed) 3576 { 3577 u8 mode = MLO_AN_INBAND; 3578 3579 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3580 phylink_an_mode_str(mode), phy_modes(state->interface), 3581 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3582 3583 if (!linkmode_equal(pl->supported, supported)) { 3584 linkmode_copy(pl->supported, supported); 3585 changed = true; 3586 } 3587 3588 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3589 linkmode_copy(pl->link_config.advertising, state->advertising); 3590 changed = true; 3591 } 3592 3593 if (pl->req_link_an_mode != mode || 3594 pl->link_config.interface != state->interface) { 3595 pl->req_link_an_mode = mode; 3596 pl->link_config.interface = state->interface; 3597 3598 changed = true; 3599 3600 phylink_info(pl, "switched to %s/%s link mode\n", 3601 phylink_an_mode_str(mode), 3602 phy_modes(state->interface)); 3603 } 3604 3605 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3606 &pl->phylink_disable_state)) 3607 phylink_mac_initial_config(pl, false); 3608 } 3609 3610 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3611 { 3612 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3613 struct phylink_link_state config; 3614 int ret; 3615 3616 /* We're not using pl->sfp_interfaces, so clear it. */ 3617 phy_interface_zero(pl->sfp_interfaces); 3618 linkmode_copy(support, phy->supported); 3619 3620 memset(&config, 0, sizeof(config)); 3621 linkmode_copy(config.advertising, phy->advertising); 3622 config.interface = PHY_INTERFACE_MODE_NA; 3623 config.speed = SPEED_UNKNOWN; 3624 config.duplex = DUPLEX_UNKNOWN; 3625 config.pause = MLO_PAUSE_AN; 3626 3627 /* Ignore errors if we're expecting a PHY to attach later */ 3628 ret = phylink_validate(pl, support, &config); 3629 if (ret) { 3630 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3631 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3632 ERR_PTR(ret)); 3633 return ret; 3634 } 3635 3636 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3637 if (config.interface == PHY_INTERFACE_MODE_NA) 3638 return -EINVAL; 3639 3640 /* Attach the PHY so that the PHY is present when we do the major 3641 * configuration step. 3642 */ 3643 ret = phylink_attach_phy(pl, phy, config.interface); 3644 if (ret < 0) 3645 return ret; 3646 3647 /* This will validate the configuration for us. */ 3648 ret = phylink_bringup_phy(pl, phy, config.interface); 3649 if (ret < 0) { 3650 phy_detach(phy); 3651 return ret; 3652 } 3653 3654 pl->link_port = pl->sfp_port; 3655 3656 phylink_sfp_set_config(pl, support, &config, true); 3657 3658 return 0; 3659 } 3660 3661 static int phylink_sfp_config_optical(struct phylink *pl) 3662 { 3663 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3664 struct phylink_link_state config; 3665 enum inband_type inband_type; 3666 phy_interface_t interface; 3667 int ret; 3668 3669 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3670 (int)PHY_INTERFACE_MODE_MAX, 3671 pl->config->supported_interfaces, 3672 (int)PHY_INTERFACE_MODE_MAX, 3673 pl->sfp_interfaces); 3674 3675 /* Find the union of the supported interfaces by the PCS/MAC and 3676 * the SFP module. 3677 */ 3678 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3679 pl->sfp_interfaces); 3680 if (phy_interface_empty(pl->sfp_interfaces)) { 3681 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3682 return -EINVAL; 3683 } 3684 3685 memset(&config, 0, sizeof(config)); 3686 linkmode_copy(support, pl->sfp_support); 3687 linkmode_copy(config.advertising, pl->sfp_support); 3688 config.speed = SPEED_UNKNOWN; 3689 config.duplex = DUPLEX_UNKNOWN; 3690 config.pause = MLO_PAUSE_AN; 3691 3692 /* For all the interfaces that are supported, reduce the sfp_support 3693 * mask to only those link modes that can be supported. 3694 */ 3695 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3696 pl->sfp_interfaces); 3697 if (ret) { 3698 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3699 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3700 return ret; 3701 } 3702 3703 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3704 if (interface == PHY_INTERFACE_MODE_NA) { 3705 phylink_err(pl, "failed to select SFP interface\n"); 3706 return -EINVAL; 3707 } 3708 3709 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3710 phy_modes(interface)); 3711 3712 inband_type = phylink_get_inband_type(interface); 3713 if (inband_type == INBAND_NONE) { 3714 /* If this is the sole interface, and there is no inband 3715 * support, clear the advertising mask and Autoneg bit in 3716 * the support mask. Otherwise, just clear the Autoneg bit 3717 * in the advertising mask. 3718 */ 3719 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3720 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3721 pl->sfp_support); 3722 linkmode_zero(config.advertising); 3723 } else { 3724 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3725 config.advertising); 3726 } 3727 } 3728 3729 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3730 config.advertising)) { 3731 phylink_err(pl, "autoneg setting not compatible with PCS"); 3732 return -EINVAL; 3733 } 3734 3735 config.interface = interface; 3736 3737 /* Ignore errors if we're expecting a PHY to attach later */ 3738 ret = phylink_validate(pl, support, &config); 3739 if (ret) { 3740 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3741 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3742 ERR_PTR(ret)); 3743 return ret; 3744 } 3745 3746 pl->link_port = pl->sfp_port; 3747 3748 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3749 3750 return 0; 3751 } 3752 3753 static int phylink_sfp_module_insert(void *upstream, 3754 const struct sfp_eeprom_id *id) 3755 { 3756 const struct sfp_module_caps *caps; 3757 struct phylink *pl = upstream; 3758 3759 ASSERT_RTNL(); 3760 3761 caps = sfp_get_module_caps(pl->sfp_bus); 3762 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3763 linkmode_copy(pl->sfp_support, caps->link_modes); 3764 pl->sfp_may_have_phy = caps->may_have_phy; 3765 pl->sfp_port = caps->port; 3766 3767 /* If this module may have a PHY connecting later, defer until later */ 3768 if (pl->sfp_may_have_phy) 3769 return 0; 3770 3771 return phylink_sfp_config_optical(pl); 3772 } 3773 3774 static void phylink_sfp_module_remove(void *upstream) 3775 { 3776 struct phylink *pl = upstream; 3777 3778 phy_interface_zero(pl->sfp_interfaces); 3779 } 3780 3781 static int phylink_sfp_module_start(void *upstream) 3782 { 3783 struct phylink *pl = upstream; 3784 3785 /* If this SFP module has a PHY, start the PHY now. */ 3786 if (pl->phydev) { 3787 phy_start(pl->phydev); 3788 return 0; 3789 } 3790 3791 /* If the module may have a PHY but we didn't detect one we 3792 * need to configure the MAC here. 3793 */ 3794 if (!pl->sfp_may_have_phy) 3795 return 0; 3796 3797 return phylink_sfp_config_optical(pl); 3798 } 3799 3800 static void phylink_sfp_module_stop(void *upstream) 3801 { 3802 struct phylink *pl = upstream; 3803 3804 /* If this SFP module has a PHY, stop it. */ 3805 if (pl->phydev) 3806 phy_stop(pl->phydev); 3807 } 3808 3809 static void phylink_sfp_link_down(void *upstream) 3810 { 3811 struct phylink *pl = upstream; 3812 3813 ASSERT_RTNL(); 3814 3815 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3816 } 3817 3818 static void phylink_sfp_link_up(void *upstream) 3819 { 3820 struct phylink *pl = upstream; 3821 3822 ASSERT_RTNL(); 3823 3824 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3825 } 3826 3827 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3828 { 3829 struct phylink *pl = upstream; 3830 3831 if (!phy->drv) { 3832 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3833 phydev_name(phy), (unsigned long)phy->phy_id); 3834 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3835 return -EINVAL; 3836 } 3837 3838 /* 3839 * This is the new way of dealing with flow control for PHYs, 3840 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3841 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3842 * using our validate call to the MAC, we rely upon the MAC 3843 * clearing the bits from both supported and advertising fields. 3844 */ 3845 phy_support_asym_pause(phy); 3846 3847 /* Set the PHY's host supported interfaces */ 3848 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3849 pl->config->supported_interfaces); 3850 3851 /* Do the initial configuration */ 3852 return phylink_sfp_config_phy(pl, phy); 3853 } 3854 3855 static void phylink_sfp_disconnect_phy(void *upstream, 3856 struct phy_device *phydev) 3857 { 3858 phylink_disconnect_phy(upstream); 3859 } 3860 3861 static const struct sfp_upstream_ops sfp_phylink_ops = { 3862 .attach = phylink_sfp_attach, 3863 .detach = phylink_sfp_detach, 3864 .module_insert = phylink_sfp_module_insert, 3865 .module_remove = phylink_sfp_module_remove, 3866 .module_start = phylink_sfp_module_start, 3867 .module_stop = phylink_sfp_module_stop, 3868 .link_up = phylink_sfp_link_up, 3869 .link_down = phylink_sfp_link_down, 3870 .connect_phy = phylink_sfp_connect_phy, 3871 .disconnect_phy = phylink_sfp_disconnect_phy, 3872 }; 3873 3874 /* Helpers for MAC drivers */ 3875 3876 static struct { 3877 int bit; 3878 int speed; 3879 } phylink_c73_priority_resolution[] = { 3880 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3881 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3882 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3883 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3884 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3885 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3886 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3887 /* 5GBASE-KR not supported */ 3888 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3889 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3890 }; 3891 3892 void phylink_resolve_c73(struct phylink_link_state *state) 3893 { 3894 int i; 3895 3896 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3897 int bit = phylink_c73_priority_resolution[i].bit; 3898 if (linkmode_test_bit(bit, state->advertising) && 3899 linkmode_test_bit(bit, state->lp_advertising)) 3900 break; 3901 } 3902 3903 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3904 state->speed = phylink_c73_priority_resolution[i].speed; 3905 state->duplex = DUPLEX_FULL; 3906 } else { 3907 /* negotiation failure */ 3908 state->link = false; 3909 } 3910 3911 phylink_resolve_an_pause(state); 3912 } 3913 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3914 3915 static void phylink_decode_c37_word(struct phylink_link_state *state, 3916 uint16_t config_reg, int speed) 3917 { 3918 int fd_bit; 3919 3920 if (speed == SPEED_2500) 3921 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3922 else 3923 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3924 3925 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3926 3927 if (linkmode_test_bit(fd_bit, state->advertising) && 3928 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3929 state->speed = speed; 3930 state->duplex = DUPLEX_FULL; 3931 } else { 3932 /* negotiation failure */ 3933 state->link = false; 3934 } 3935 3936 phylink_resolve_an_pause(state); 3937 } 3938 3939 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3940 uint16_t config_reg) 3941 { 3942 if (!(config_reg & LPA_SGMII_LINK)) { 3943 state->link = false; 3944 return; 3945 } 3946 3947 switch (config_reg & LPA_SGMII_SPD_MASK) { 3948 case LPA_SGMII_10: 3949 state->speed = SPEED_10; 3950 break; 3951 case LPA_SGMII_100: 3952 state->speed = SPEED_100; 3953 break; 3954 case LPA_SGMII_1000: 3955 state->speed = SPEED_1000; 3956 break; 3957 default: 3958 state->link = false; 3959 return; 3960 } 3961 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3962 state->duplex = DUPLEX_FULL; 3963 else 3964 state->duplex = DUPLEX_HALF; 3965 } 3966 3967 /** 3968 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3969 * @state: a pointer to a struct phylink_link_state. 3970 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3971 * 3972 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3973 * code word. Decode the USXGMII code word and populate the corresponding fields 3974 * (speed, duplex) into the phylink_link_state structure. 3975 */ 3976 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3977 uint16_t lpa) 3978 { 3979 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3980 case MDIO_USXGMII_10: 3981 state->speed = SPEED_10; 3982 break; 3983 case MDIO_USXGMII_100: 3984 state->speed = SPEED_100; 3985 break; 3986 case MDIO_USXGMII_1000: 3987 state->speed = SPEED_1000; 3988 break; 3989 case MDIO_USXGMII_2500: 3990 state->speed = SPEED_2500; 3991 break; 3992 case MDIO_USXGMII_5000: 3993 state->speed = SPEED_5000; 3994 break; 3995 case MDIO_USXGMII_10G: 3996 state->speed = SPEED_10000; 3997 break; 3998 default: 3999 state->link = false; 4000 return; 4001 } 4002 4003 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4004 state->duplex = DUPLEX_FULL; 4005 else 4006 state->duplex = DUPLEX_HALF; 4007 } 4008 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4009 4010 /** 4011 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4012 * @state: a pointer to a struct phylink_link_state. 4013 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4014 * 4015 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4016 * code word. Decode the USGMII code word and populate the corresponding fields 4017 * (speed, duplex) into the phylink_link_state structure. The structure for this 4018 * word is the same as the USXGMII word, except it only supports speeds up to 4019 * 1Gbps. 4020 */ 4021 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4022 uint16_t lpa) 4023 { 4024 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4025 case MDIO_USXGMII_10: 4026 state->speed = SPEED_10; 4027 break; 4028 case MDIO_USXGMII_100: 4029 state->speed = SPEED_100; 4030 break; 4031 case MDIO_USXGMII_1000: 4032 state->speed = SPEED_1000; 4033 break; 4034 default: 4035 state->link = false; 4036 return; 4037 } 4038 4039 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4040 state->duplex = DUPLEX_FULL; 4041 else 4042 state->duplex = DUPLEX_HALF; 4043 } 4044 4045 /** 4046 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4047 * @state: a pointer to a &struct phylink_link_state. 4048 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4049 * @bmsr: The value of the %MII_BMSR register 4050 * @lpa: The value of the %MII_LPA register 4051 * 4052 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4053 * clause 37 negotiation and/or SGMII control. 4054 * 4055 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4056 * the phylink @state structure. This is suitable to be used for implementing 4057 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4058 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4059 */ 4060 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4061 unsigned int neg_mode, u16 bmsr, u16 lpa) 4062 { 4063 state->link = !!(bmsr & BMSR_LSTATUS); 4064 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4065 4066 /* If the link is down, the advertisement data is undefined. */ 4067 if (!state->link) 4068 return; 4069 4070 switch (state->interface) { 4071 case PHY_INTERFACE_MODE_1000BASEX: 4072 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4073 phylink_decode_c37_word(state, lpa, SPEED_1000); 4074 } else { 4075 state->speed = SPEED_1000; 4076 state->duplex = DUPLEX_FULL; 4077 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4078 } 4079 break; 4080 4081 case PHY_INTERFACE_MODE_2500BASEX: 4082 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4083 phylink_decode_c37_word(state, lpa, SPEED_2500); 4084 } else { 4085 state->speed = SPEED_2500; 4086 state->duplex = DUPLEX_FULL; 4087 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4088 } 4089 break; 4090 4091 case PHY_INTERFACE_MODE_SGMII: 4092 case PHY_INTERFACE_MODE_QSGMII: 4093 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4094 phylink_decode_sgmii_word(state, lpa); 4095 break; 4096 4097 case PHY_INTERFACE_MODE_QUSGMII: 4098 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4099 phylink_decode_usgmii_word(state, lpa); 4100 break; 4101 4102 default: 4103 state->link = false; 4104 break; 4105 } 4106 } 4107 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4108 4109 /** 4110 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4111 * @pcs: a pointer to a &struct mdio_device. 4112 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4113 * @state: a pointer to a &struct phylink_link_state. 4114 * 4115 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4116 * clause 37 negotiation and/or SGMII control. 4117 * 4118 * Read the MAC PCS state from the MII device configured in @config and 4119 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4120 * the phylink @state structure. This is suitable to be directly plugged 4121 * into the pcs_get_state() member of the struct phylink_pcs_ops 4122 * structure. 4123 */ 4124 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4125 unsigned int neg_mode, 4126 struct phylink_link_state *state) 4127 { 4128 int bmsr, lpa; 4129 4130 bmsr = mdiodev_read(pcs, MII_BMSR); 4131 lpa = mdiodev_read(pcs, MII_LPA); 4132 if (bmsr < 0 || lpa < 0) { 4133 state->link = false; 4134 return; 4135 } 4136 4137 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4138 } 4139 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4140 4141 /** 4142 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4143 * advertisement 4144 * @interface: the PHY interface mode being configured 4145 * @advertising: the ethtool advertisement mask 4146 * 4147 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4148 * clause 37 negotiation and/or SGMII control. 4149 * 4150 * Encode the clause 37 PCS advertisement as specified by @interface and 4151 * @advertising. 4152 * 4153 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4154 */ 4155 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4156 const unsigned long *advertising) 4157 { 4158 u16 adv; 4159 4160 switch (interface) { 4161 case PHY_INTERFACE_MODE_1000BASEX: 4162 case PHY_INTERFACE_MODE_2500BASEX: 4163 adv = ADVERTISE_1000XFULL; 4164 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4165 advertising)) 4166 adv |= ADVERTISE_1000XPAUSE; 4167 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4168 advertising)) 4169 adv |= ADVERTISE_1000XPSE_ASYM; 4170 return adv; 4171 case PHY_INTERFACE_MODE_SGMII: 4172 case PHY_INTERFACE_MODE_QSGMII: 4173 return 0x0001; 4174 default: 4175 /* Nothing to do for other modes */ 4176 return -EINVAL; 4177 } 4178 } 4179 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4180 4181 /** 4182 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4183 * @pcs: a pointer to a &struct mdio_device. 4184 * @interface: the PHY interface mode being configured 4185 * @advertising: the ethtool advertisement mask 4186 * @neg_mode: PCS negotiation mode 4187 * 4188 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4189 * parameters for the @mode, @interface and @advertising parameters. 4190 * Returns negative error number on failure, zero if the advertisement 4191 * has not changed, or positive if there is a change. 4192 */ 4193 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4194 phy_interface_t interface, 4195 const unsigned long *advertising, 4196 unsigned int neg_mode) 4197 { 4198 bool changed = 0; 4199 u16 bmcr; 4200 int ret, adv; 4201 4202 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4203 if (adv >= 0) { 4204 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4205 MII_ADVERTISE, 0xffff, adv); 4206 if (ret < 0) 4207 return ret; 4208 changed = ret; 4209 } 4210 4211 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4212 bmcr = BMCR_ANENABLE; 4213 else 4214 bmcr = 0; 4215 4216 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4217 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4218 if (ret < 0) 4219 return ret; 4220 4221 return changed; 4222 } 4223 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4224 4225 /** 4226 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4227 * @pcs: a pointer to a &struct mdio_device. 4228 * 4229 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4230 * clause 37 negotiation. 4231 * 4232 * Restart the clause 37 negotiation with the link partner. This is 4233 * suitable to be directly plugged into the pcs_get_state() member 4234 * of the struct phylink_pcs_ops structure. 4235 */ 4236 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4237 { 4238 int val = mdiodev_read(pcs, MII_BMCR); 4239 4240 if (val >= 0) { 4241 val |= BMCR_ANRESTART; 4242 4243 mdiodev_write(pcs, MII_BMCR, val); 4244 } 4245 } 4246 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4247 4248 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4249 struct phylink_link_state *state) 4250 { 4251 struct mii_bus *bus = pcs->bus; 4252 int addr = pcs->addr; 4253 int stat; 4254 4255 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4256 if (stat < 0) { 4257 state->link = false; 4258 return; 4259 } 4260 4261 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4262 if (!state->link) 4263 return; 4264 4265 switch (state->interface) { 4266 case PHY_INTERFACE_MODE_10GBASER: 4267 state->speed = SPEED_10000; 4268 state->duplex = DUPLEX_FULL; 4269 break; 4270 4271 default: 4272 break; 4273 } 4274 } 4275 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4276 4277 static int __init phylink_init(void) 4278 { 4279 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4280 __set_bit(phylink_sfp_interface_preference[i], 4281 phylink_sfp_interfaces); 4282 4283 return 0; 4284 } 4285 4286 module_init(phylink_init); 4287 4288 MODULE_LICENSE("GPL v2"); 4289 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4290