1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
5 *
6 * Copyright (C) 2015 Russell King
7 */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22
23 #include "sfp.h"
24 #include "swphy.h"
25
26 #define SUPPORTED_INTERFACES \
27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32
33 enum {
34 PHYLINK_DISABLE_STOPPED,
35 PHYLINK_DISABLE_LINK,
36 PHYLINK_DISABLE_MAC_WOL,
37
38 PCS_STATE_DOWN = 0,
39 PCS_STATE_STARTING,
40 PCS_STATE_STARTED,
41 };
42
43 /**
44 * struct phylink - internal data type for phylink
45 */
46 struct phylink {
47 /* private: */
48 struct net_device *netdev;
49 const struct phylink_mac_ops *mac_ops;
50 struct phylink_config *config;
51 struct phylink_pcs *pcs;
52 struct device *dev;
53 unsigned int old_link_state:1;
54
55 unsigned long phylink_disable_state; /* bitmask of disables */
56 struct phy_device *phydev;
57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
58 u8 cfg_link_an_mode; /* MLO_AN_xxx */
59 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */
60 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */
61 u8 link_port; /* The current non-phy ethtool port */
62 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
63 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi);
64
65 /* The link configuration settings */
66 struct phylink_link_state link_config;
67
68 /* The current settings */
69 phy_interface_t cur_interface;
70
71 struct gpio_desc *link_gpio;
72 unsigned int link_irq;
73 struct timer_list link_poll;
74 void (*get_fixed_state)(struct net_device *dev,
75 struct phylink_link_state *s);
76
77 struct mutex state_mutex;
78 struct phylink_link_state phy_state;
79 unsigned int phy_ib_mode;
80 struct work_struct resolve;
81 unsigned int pcs_neg_mode;
82 unsigned int pcs_state;
83
84 bool link_failed;
85 bool mac_supports_eee_ops;
86 bool mac_supports_eee;
87 bool phy_enable_tx_lpi;
88 bool mac_enable_tx_lpi;
89 bool mac_tx_clk_stop;
90 u32 mac_tx_lpi_timer;
91
92 struct sfp_bus *sfp_bus;
93 bool sfp_may_have_phy;
94 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
95 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
96 u8 sfp_port;
97
98 struct eee_config eee_cfg;
99 };
100
101 #define phylink_printk(level, pl, fmt, ...) \
102 do { \
103 if ((pl)->config->type == PHYLINK_NETDEV) \
104 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
105 else if ((pl)->config->type == PHYLINK_DEV) \
106 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
107 } while (0)
108
109 #define phylink_err(pl, fmt, ...) \
110 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
111 #define phylink_warn(pl, fmt, ...) \
112 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
113 #define phylink_info(pl, fmt, ...) \
114 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
115 #if defined(CONFIG_DYNAMIC_DEBUG)
116 #define phylink_dbg(pl, fmt, ...) \
117 do { \
118 if ((pl)->config->type == PHYLINK_NETDEV) \
119 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
120 else if ((pl)->config->type == PHYLINK_DEV) \
121 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
122 } while (0)
123 #elif defined(DEBUG)
124 #define phylink_dbg(pl, fmt, ...) \
125 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
126 #else
127 #define phylink_dbg(pl, fmt, ...) \
128 ({ \
129 if (0) \
130 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
131 })
132 #endif
133
134 static const phy_interface_t phylink_sfp_interface_preference[] = {
135 PHY_INTERFACE_MODE_25GBASER,
136 PHY_INTERFACE_MODE_USXGMII,
137 PHY_INTERFACE_MODE_10GBASER,
138 PHY_INTERFACE_MODE_5GBASER,
139 PHY_INTERFACE_MODE_2500BASEX,
140 PHY_INTERFACE_MODE_SGMII,
141 PHY_INTERFACE_MODE_1000BASEX,
142 PHY_INTERFACE_MODE_100BASEX,
143 };
144
145 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
146
147 /**
148 * phylink_set_port_modes() - set the port type modes in the ethtool mask
149 * @mask: ethtool link mode mask
150 *
151 * Sets all the port type modes in the ethtool mask. MAC drivers should
152 * use this in their 'validate' callback.
153 */
phylink_set_port_modes(unsigned long * mask)154 void phylink_set_port_modes(unsigned long *mask)
155 {
156 phylink_set(mask, TP);
157 phylink_set(mask, AUI);
158 phylink_set(mask, MII);
159 phylink_set(mask, FIBRE);
160 phylink_set(mask, BNC);
161 phylink_set(mask, Backplane);
162 }
163 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
164
phylink_is_empty_linkmode(const unsigned long * linkmode)165 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
166 {
167 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
168
169 phylink_set_port_modes(tmp);
170 phylink_set(tmp, Autoneg);
171 phylink_set(tmp, Pause);
172 phylink_set(tmp, Asym_Pause);
173
174 return linkmode_subset(linkmode, tmp);
175 }
176
phylink_an_mode_str(unsigned int mode)177 static const char *phylink_an_mode_str(unsigned int mode)
178 {
179 static const char *modestr[] = {
180 [MLO_AN_PHY] = "phy",
181 [MLO_AN_FIXED] = "fixed",
182 [MLO_AN_INBAND] = "inband",
183 };
184
185 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
186 }
187
phylink_pcs_mode_str(unsigned int mode)188 static const char *phylink_pcs_mode_str(unsigned int mode)
189 {
190 if (!mode)
191 return "none";
192
193 if (mode & PHYLINK_PCS_NEG_OUTBAND)
194 return "outband";
195
196 if (mode & PHYLINK_PCS_NEG_INBAND) {
197 if (mode & PHYLINK_PCS_NEG_ENABLED)
198 return "inband,an-enabled";
199 else
200 return "inband,an-disabled";
201 }
202
203 return "unknown";
204 }
205
phylink_interface_signal_rate(phy_interface_t interface)206 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
207 {
208 switch (interface) {
209 case PHY_INTERFACE_MODE_SGMII:
210 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
211 return 1250;
212 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
213 return 3125;
214 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
215 return 5156;
216 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
217 return 10313;
218 default:
219 return 0;
220 }
221 }
222
223 /**
224 * phylink_interface_max_speed() - get the maximum speed of a phy interface
225 * @interface: phy interface mode defined by &typedef phy_interface_t
226 *
227 * Determine the maximum speed of a phy interface. This is intended to help
228 * determine the correct speed to pass to the MAC when the phy is performing
229 * rate matching.
230 *
231 * Return: The maximum speed of @interface
232 */
phylink_interface_max_speed(phy_interface_t interface)233 static int phylink_interface_max_speed(phy_interface_t interface)
234 {
235 switch (interface) {
236 case PHY_INTERFACE_MODE_100BASEX:
237 case PHY_INTERFACE_MODE_REVRMII:
238 case PHY_INTERFACE_MODE_RMII:
239 case PHY_INTERFACE_MODE_SMII:
240 case PHY_INTERFACE_MODE_REVMII:
241 case PHY_INTERFACE_MODE_MII:
242 return SPEED_100;
243
244 case PHY_INTERFACE_MODE_TBI:
245 case PHY_INTERFACE_MODE_MOCA:
246 case PHY_INTERFACE_MODE_RTBI:
247 case PHY_INTERFACE_MODE_1000BASEX:
248 case PHY_INTERFACE_MODE_1000BASEKX:
249 case PHY_INTERFACE_MODE_TRGMII:
250 case PHY_INTERFACE_MODE_RGMII_TXID:
251 case PHY_INTERFACE_MODE_RGMII_RXID:
252 case PHY_INTERFACE_MODE_RGMII_ID:
253 case PHY_INTERFACE_MODE_RGMII:
254 case PHY_INTERFACE_MODE_PSGMII:
255 case PHY_INTERFACE_MODE_QSGMII:
256 case PHY_INTERFACE_MODE_QUSGMII:
257 case PHY_INTERFACE_MODE_SGMII:
258 case PHY_INTERFACE_MODE_GMII:
259 return SPEED_1000;
260
261 case PHY_INTERFACE_MODE_2500BASEX:
262 case PHY_INTERFACE_MODE_10G_QXGMII:
263 return SPEED_2500;
264
265 case PHY_INTERFACE_MODE_5GBASER:
266 return SPEED_5000;
267
268 case PHY_INTERFACE_MODE_XGMII:
269 case PHY_INTERFACE_MODE_RXAUI:
270 case PHY_INTERFACE_MODE_XAUI:
271 case PHY_INTERFACE_MODE_10GBASER:
272 case PHY_INTERFACE_MODE_10GKR:
273 case PHY_INTERFACE_MODE_USXGMII:
274 return SPEED_10000;
275
276 case PHY_INTERFACE_MODE_25GBASER:
277 return SPEED_25000;
278
279 case PHY_INTERFACE_MODE_XLGMII:
280 return SPEED_40000;
281
282 case PHY_INTERFACE_MODE_INTERNAL:
283 case PHY_INTERFACE_MODE_NA:
284 case PHY_INTERFACE_MODE_MAX:
285 /* No idea! Garbage in, unknown out */
286 return SPEED_UNKNOWN;
287 }
288
289 /* If we get here, someone forgot to add an interface mode above */
290 WARN_ON_ONCE(1);
291 return SPEED_UNKNOWN;
292 }
293
294 /**
295 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
296 * @linkmodes: ethtool linkmode mask (must be already initialised)
297 * @caps: bitmask of MAC capabilities
298 *
299 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
300 * supported by the @caps. @linkmodes must have been initialised previously.
301 */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)302 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
303 unsigned long caps)
304 {
305 if (caps & MAC_SYM_PAUSE)
306 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
307
308 if (caps & MAC_ASYM_PAUSE)
309 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
310
311 if (caps & MAC_10HD) {
312 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
313 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
314 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
315 }
316
317 if (caps & MAC_10FD) {
318 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
319 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
320 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
321 }
322
323 if (caps & MAC_100HD) {
324 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
325 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
326 }
327
328 if (caps & MAC_100FD) {
329 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
330 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
331 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
332 }
333
334 if (caps & MAC_1000HD)
335 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
336
337 if (caps & MAC_1000FD) {
338 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
339 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
340 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
341 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
342 }
343
344 if (caps & MAC_2500FD) {
345 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
346 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
347 }
348
349 if (caps & MAC_5000FD)
350 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
351
352 if (caps & MAC_10000FD) {
353 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
354 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
355 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
356 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
357 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
358 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
359 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
360 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
361 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
362 }
363
364 if (caps & MAC_25000FD) {
365 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
366 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
367 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
368 }
369
370 if (caps & MAC_40000FD) {
371 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
372 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
373 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
374 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
375 }
376
377 if (caps & MAC_50000FD) {
378 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
379 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
380 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
381 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
382 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
383 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
384 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
385 linkmodes);
386 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
387 }
388
389 if (caps & MAC_56000FD) {
390 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
391 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
392 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
393 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
394 }
395
396 if (caps & MAC_100000FD) {
397 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
398 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
399 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
400 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
401 linkmodes);
402 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
403 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
404 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
405 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
406 linkmodes);
407 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
408 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
409 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
410 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
411 linkmodes);
412 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
413 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
414 }
415
416 if (caps & MAC_200000FD) {
417 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
418 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
419 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
420 linkmodes);
421 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
422 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
423 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
424 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
425 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
426 linkmodes);
427 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
428 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
429 }
430
431 if (caps & MAC_400000FD) {
432 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
433 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
434 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
435 linkmodes);
436 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
437 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
438 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
439 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
440 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
441 linkmodes);
442 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
443 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
444 }
445 }
446
447 static struct {
448 unsigned long mask;
449 int speed;
450 unsigned int duplex;
451 } phylink_caps_params[] = {
452 { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
453 { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
454 { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
455 { MAC_56000FD, SPEED_56000, DUPLEX_FULL },
456 { MAC_50000FD, SPEED_50000, DUPLEX_FULL },
457 { MAC_40000FD, SPEED_40000, DUPLEX_FULL },
458 { MAC_25000FD, SPEED_25000, DUPLEX_FULL },
459 { MAC_20000FD, SPEED_20000, DUPLEX_FULL },
460 { MAC_10000FD, SPEED_10000, DUPLEX_FULL },
461 { MAC_5000FD, SPEED_5000, DUPLEX_FULL },
462 { MAC_2500FD, SPEED_2500, DUPLEX_FULL },
463 { MAC_1000FD, SPEED_1000, DUPLEX_FULL },
464 { MAC_1000HD, SPEED_1000, DUPLEX_HALF },
465 { MAC_100FD, SPEED_100, DUPLEX_FULL },
466 { MAC_100HD, SPEED_100, DUPLEX_HALF },
467 { MAC_10FD, SPEED_10, DUPLEX_FULL },
468 { MAC_10HD, SPEED_10, DUPLEX_HALF },
469 };
470
471 /**
472 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
473 * @config: pointer to a &struct phylink_config
474 * @max_speed: maximum speed
475 *
476 * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
477 * Any further motifications of config.mac_capabilities will override this.
478 */
phylink_limit_mac_speed(struct phylink_config * config,u32 max_speed)479 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
480 {
481 int i;
482
483 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
484 phylink_caps_params[i].speed > max_speed; i++)
485 config->mac_capabilities &= ~phylink_caps_params[i].mask;
486 }
487 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
488
489 /**
490 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
491 * @speed: the speed to search for
492 * @duplex: the duplex to search for
493 *
494 * Find the mac capability for a given speed and duplex.
495 *
496 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
497 * there were no matches.
498 */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)499 static unsigned long phylink_cap_from_speed_duplex(int speed,
500 unsigned int duplex)
501 {
502 int i;
503
504 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
505 if (speed == phylink_caps_params[i].speed &&
506 duplex == phylink_caps_params[i].duplex)
507 return phylink_caps_params[i].mask;
508 }
509
510 return 0;
511 }
512
513 /**
514 * phylink_get_capabilities() - get capabilities for a given MAC
515 * @interface: phy interface mode defined by &typedef phy_interface_t
516 * @mac_capabilities: bitmask of MAC capabilities
517 * @rate_matching: type of rate matching being performed
518 *
519 * Get the MAC capabilities that are supported by the @interface mode and
520 * @mac_capabilities.
521 */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)522 static unsigned long phylink_get_capabilities(phy_interface_t interface,
523 unsigned long mac_capabilities,
524 int rate_matching)
525 {
526 int max_speed = phylink_interface_max_speed(interface);
527 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
528 unsigned long matched_caps = 0;
529
530 switch (interface) {
531 case PHY_INTERFACE_MODE_USXGMII:
532 caps |= MAC_10000FD | MAC_5000FD;
533 fallthrough;
534
535 case PHY_INTERFACE_MODE_10G_QXGMII:
536 caps |= MAC_2500FD;
537 fallthrough;
538
539 case PHY_INTERFACE_MODE_RGMII_TXID:
540 case PHY_INTERFACE_MODE_RGMII_RXID:
541 case PHY_INTERFACE_MODE_RGMII_ID:
542 case PHY_INTERFACE_MODE_RGMII:
543 case PHY_INTERFACE_MODE_PSGMII:
544 case PHY_INTERFACE_MODE_QSGMII:
545 case PHY_INTERFACE_MODE_QUSGMII:
546 case PHY_INTERFACE_MODE_SGMII:
547 case PHY_INTERFACE_MODE_GMII:
548 caps |= MAC_1000HD | MAC_1000FD;
549 fallthrough;
550
551 case PHY_INTERFACE_MODE_REVRMII:
552 case PHY_INTERFACE_MODE_RMII:
553 case PHY_INTERFACE_MODE_SMII:
554 case PHY_INTERFACE_MODE_REVMII:
555 case PHY_INTERFACE_MODE_MII:
556 caps |= MAC_10HD | MAC_10FD;
557 fallthrough;
558
559 case PHY_INTERFACE_MODE_100BASEX:
560 caps |= MAC_100HD | MAC_100FD;
561 break;
562
563 case PHY_INTERFACE_MODE_TBI:
564 case PHY_INTERFACE_MODE_MOCA:
565 case PHY_INTERFACE_MODE_RTBI:
566 case PHY_INTERFACE_MODE_1000BASEX:
567 caps |= MAC_1000HD;
568 fallthrough;
569 case PHY_INTERFACE_MODE_1000BASEKX:
570 case PHY_INTERFACE_MODE_TRGMII:
571 caps |= MAC_1000FD;
572 break;
573
574 case PHY_INTERFACE_MODE_2500BASEX:
575 caps |= MAC_2500FD;
576 break;
577
578 case PHY_INTERFACE_MODE_5GBASER:
579 caps |= MAC_5000FD;
580 break;
581
582 case PHY_INTERFACE_MODE_XGMII:
583 case PHY_INTERFACE_MODE_RXAUI:
584 case PHY_INTERFACE_MODE_XAUI:
585 case PHY_INTERFACE_MODE_10GBASER:
586 case PHY_INTERFACE_MODE_10GKR:
587 caps |= MAC_10000FD;
588 break;
589
590 case PHY_INTERFACE_MODE_25GBASER:
591 caps |= MAC_25000FD;
592 break;
593
594 case PHY_INTERFACE_MODE_XLGMII:
595 caps |= MAC_40000FD;
596 break;
597
598 case PHY_INTERFACE_MODE_INTERNAL:
599 caps |= ~0;
600 break;
601
602 case PHY_INTERFACE_MODE_NA:
603 case PHY_INTERFACE_MODE_MAX:
604 break;
605 }
606
607 switch (rate_matching) {
608 case RATE_MATCH_OPEN_LOOP:
609 /* TODO */
610 fallthrough;
611 case RATE_MATCH_NONE:
612 matched_caps = 0;
613 break;
614 case RATE_MATCH_PAUSE: {
615 /* The MAC must support asymmetric pause towards the local
616 * device for this. We could allow just symmetric pause, but
617 * then we might have to renegotiate if the link partner
618 * doesn't support pause. This is because there's no way to
619 * accept pause frames without transmitting them if we only
620 * support symmetric pause.
621 */
622 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
623 !(mac_capabilities & MAC_ASYM_PAUSE))
624 break;
625
626 /* We can't adapt if the MAC doesn't support the interface's
627 * max speed at full duplex.
628 */
629 if (mac_capabilities &
630 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL))
631 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
632 break;
633 }
634 case RATE_MATCH_CRS:
635 /* The MAC must support half duplex at the interface's max
636 * speed.
637 */
638 if (mac_capabilities &
639 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
640 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
641 matched_caps &= mac_capabilities;
642 }
643 break;
644 }
645
646 return (caps & mac_capabilities) | matched_caps;
647 }
648
649 /**
650 * phylink_validate_mask_caps() - Restrict link modes based on caps
651 * @supported: ethtool bitmask for supported link modes.
652 * @state: pointer to a &struct phylink_link_state.
653 * @mac_capabilities: bitmask of MAC capabilities
654 *
655 * Calculate the supported link modes based on @mac_capabilities, and restrict
656 * @supported and @state based on that. Use this function if your capabiliies
657 * aren't constant, such as if they vary depending on the interface.
658 */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)659 static void phylink_validate_mask_caps(unsigned long *supported,
660 struct phylink_link_state *state,
661 unsigned long mac_capabilities)
662 {
663 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
664 unsigned long caps;
665
666 phylink_set_port_modes(mask);
667 phylink_set(mask, Autoneg);
668 caps = phylink_get_capabilities(state->interface, mac_capabilities,
669 state->rate_matching);
670 phylink_caps_to_linkmodes(mask, caps);
671
672 linkmode_and(supported, supported, mask);
673 linkmode_and(state->advertising, state->advertising, mask);
674 }
675
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)676 static int phylink_validate_mac_and_pcs(struct phylink *pl,
677 unsigned long *supported,
678 struct phylink_link_state *state)
679 {
680 struct phylink_pcs *pcs = NULL;
681 unsigned long capabilities;
682 int ret;
683
684 /* Get the PCS for this interface mode */
685 if (pl->mac_ops->mac_select_pcs) {
686 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
687 if (IS_ERR(pcs))
688 return PTR_ERR(pcs);
689 }
690
691 if (pcs) {
692 /* The PCS, if present, must be setup before phylink_create()
693 * has been called. If the ops is not initialised, print an
694 * error and backtrace rather than oopsing the kernel.
695 */
696 if (!pcs->ops) {
697 phylink_err(pl, "interface %s: uninitialised PCS\n",
698 phy_modes(state->interface));
699 dump_stack();
700 return -EINVAL;
701 }
702
703 /* Ensure that this PCS supports the interface which the MAC
704 * returned it for. It is an error for the MAC to return a PCS
705 * that does not support the interface mode.
706 */
707 if (!phy_interface_empty(pcs->supported_interfaces) &&
708 !test_bit(state->interface, pcs->supported_interfaces)) {
709 phylink_err(pl, "MAC returned PCS which does not support %s\n",
710 phy_modes(state->interface));
711 return -EINVAL;
712 }
713
714 /* Validate the link parameters with the PCS */
715 if (pcs->ops->pcs_validate) {
716 ret = pcs->ops->pcs_validate(pcs, supported, state);
717 if (ret < 0 || phylink_is_empty_linkmode(supported))
718 return -EINVAL;
719
720 /* Ensure the advertising mask is a subset of the
721 * supported mask.
722 */
723 linkmode_and(state->advertising, state->advertising,
724 supported);
725 }
726 }
727
728 /* Then validate the link parameters with the MAC */
729 if (pl->mac_ops->mac_get_caps)
730 capabilities = pl->mac_ops->mac_get_caps(pl->config,
731 state->interface);
732 else
733 capabilities = pl->config->mac_capabilities;
734
735 phylink_validate_mask_caps(supported, state, capabilities);
736
737 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
738 }
739
phylink_validate_one(struct phylink * pl,struct phy_device * phy,const unsigned long * supported,const struct phylink_link_state * state,phy_interface_t interface,unsigned long * accum_supported,unsigned long * accum_advertising)740 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
741 const unsigned long *supported,
742 const struct phylink_link_state *state,
743 phy_interface_t interface,
744 unsigned long *accum_supported,
745 unsigned long *accum_advertising)
746 {
747 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
748 struct phylink_link_state tmp_state;
749
750 linkmode_copy(tmp_supported, supported);
751
752 tmp_state = *state;
753 tmp_state.interface = interface;
754
755 if (phy)
756 tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
757
758 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
759 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
760 interface, phy_modes(interface),
761 phy_rate_matching_to_str(tmp_state.rate_matching),
762 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
763
764 linkmode_or(accum_supported, accum_supported, tmp_supported);
765 linkmode_or(accum_advertising, accum_advertising,
766 tmp_state.advertising);
767 }
768 }
769
phylink_validate_mask(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)770 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
771 unsigned long *supported,
772 struct phylink_link_state *state,
773 const unsigned long *interfaces)
774 {
775 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
776 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
777 int interface;
778
779 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
780 phylink_validate_one(pl, phy, supported, state, interface,
781 all_s, all_adv);
782
783 linkmode_copy(supported, all_s);
784 linkmode_copy(state->advertising, all_adv);
785
786 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
787 }
788
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)789 static int phylink_validate(struct phylink *pl, unsigned long *supported,
790 struct phylink_link_state *state)
791 {
792 const unsigned long *interfaces = pl->config->supported_interfaces;
793
794 if (state->interface == PHY_INTERFACE_MODE_NA)
795 return phylink_validate_mask(pl, NULL, supported, state,
796 interfaces);
797
798 if (!test_bit(state->interface, interfaces))
799 return -EINVAL;
800
801 return phylink_validate_mac_and_pcs(pl, supported, state);
802 }
803
phylink_parse_fixedlink(struct phylink * pl,const struct fwnode_handle * fwnode)804 static int phylink_parse_fixedlink(struct phylink *pl,
805 const struct fwnode_handle *fwnode)
806 {
807 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
808 struct fwnode_handle *fixed_node;
809 const struct phy_setting *s;
810 struct gpio_desc *desc;
811 u32 speed;
812 int ret;
813
814 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
815 if (fixed_node) {
816 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
817
818 pl->link_config.speed = speed;
819 pl->link_config.duplex = DUPLEX_HALF;
820
821 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
822 pl->link_config.duplex = DUPLEX_FULL;
823
824 /* We treat the "pause" and "asym-pause" terminology as
825 * defining the link partner's ability.
826 */
827 if (fwnode_property_read_bool(fixed_node, "pause"))
828 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
829 pl->link_config.lp_advertising);
830 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
831 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
832 pl->link_config.lp_advertising);
833
834 if (ret == 0) {
835 desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
836 GPIOD_IN, "?");
837
838 if (!IS_ERR(desc))
839 pl->link_gpio = desc;
840 else if (desc == ERR_PTR(-EPROBE_DEFER))
841 ret = -EPROBE_DEFER;
842 }
843 fwnode_handle_put(fixed_node);
844
845 if (ret)
846 return ret;
847 } else {
848 u32 prop[5];
849
850 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
851 NULL, 0);
852 if (ret != ARRAY_SIZE(prop)) {
853 phylink_err(pl, "broken fixed-link?\n");
854 return -EINVAL;
855 }
856
857 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
858 prop, ARRAY_SIZE(prop));
859 if (!ret) {
860 pl->link_config.duplex = prop[1] ?
861 DUPLEX_FULL : DUPLEX_HALF;
862 pl->link_config.speed = prop[2];
863 if (prop[3])
864 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
865 pl->link_config.lp_advertising);
866 if (prop[4])
867 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
868 pl->link_config.lp_advertising);
869 }
870 }
871
872 if (pl->link_config.speed > SPEED_1000 &&
873 pl->link_config.duplex != DUPLEX_FULL)
874 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
875 pl->link_config.speed);
876
877 linkmode_fill(pl->supported);
878 linkmode_copy(pl->link_config.advertising, pl->supported);
879 phylink_validate(pl, pl->supported, &pl->link_config);
880
881 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
882 pl->supported, true);
883
884 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);
885 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);
886 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);
887 linkmode_and(pl->supported, pl->supported, mask);
888
889 phylink_set(pl->supported, MII);
890
891 if (s) {
892 __set_bit(s->bit, pl->supported);
893 __set_bit(s->bit, pl->link_config.lp_advertising);
894 } else {
895 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
896 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
897 pl->link_config.speed);
898 }
899
900 linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
901 pl->supported);
902
903 pl->link_config.link = 1;
904 pl->link_config.an_complete = 1;
905
906 return 0;
907 }
908
phylink_parse_mode(struct phylink * pl,const struct fwnode_handle * fwnode)909 static int phylink_parse_mode(struct phylink *pl,
910 const struct fwnode_handle *fwnode)
911 {
912 struct fwnode_handle *dn;
913 const char *managed;
914 unsigned long caps;
915
916 if (pl->config->default_an_inband)
917 pl->cfg_link_an_mode = MLO_AN_INBAND;
918
919 dn = fwnode_get_named_child_node(fwnode, "fixed-link");
920 if (dn || fwnode_property_present(fwnode, "fixed-link"))
921 pl->cfg_link_an_mode = MLO_AN_FIXED;
922 fwnode_handle_put(dn);
923
924 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
925 strcmp(managed, "in-band-status") == 0)) {
926 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
927 phylink_err(pl,
928 "can't use both fixed-link and in-band-status\n");
929 return -EINVAL;
930 }
931
932 pl->cfg_link_an_mode = MLO_AN_INBAND;
933 }
934
935 if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
936 linkmode_zero(pl->supported);
937 phylink_set(pl->supported, MII);
938 phylink_set(pl->supported, Autoneg);
939 phylink_set(pl->supported, Asym_Pause);
940 phylink_set(pl->supported, Pause);
941
942 switch (pl->link_config.interface) {
943 case PHY_INTERFACE_MODE_SGMII:
944 case PHY_INTERFACE_MODE_PSGMII:
945 case PHY_INTERFACE_MODE_QSGMII:
946 case PHY_INTERFACE_MODE_QUSGMII:
947 case PHY_INTERFACE_MODE_RGMII:
948 case PHY_INTERFACE_MODE_RGMII_ID:
949 case PHY_INTERFACE_MODE_RGMII_RXID:
950 case PHY_INTERFACE_MODE_RGMII_TXID:
951 case PHY_INTERFACE_MODE_RTBI:
952 case PHY_INTERFACE_MODE_1000BASEX:
953 case PHY_INTERFACE_MODE_2500BASEX:
954 case PHY_INTERFACE_MODE_5GBASER:
955 case PHY_INTERFACE_MODE_25GBASER:
956 case PHY_INTERFACE_MODE_USXGMII:
957 case PHY_INTERFACE_MODE_10G_QXGMII:
958 case PHY_INTERFACE_MODE_10GKR:
959 case PHY_INTERFACE_MODE_10GBASER:
960 case PHY_INTERFACE_MODE_XLGMII:
961 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
962 caps = phylink_get_capabilities(pl->link_config.interface, caps,
963 RATE_MATCH_NONE);
964 phylink_caps_to_linkmodes(pl->supported, caps);
965 break;
966
967 default:
968 phylink_err(pl,
969 "incorrect link mode %s for in-band status\n",
970 phy_modes(pl->link_config.interface));
971 return -EINVAL;
972 }
973
974 linkmode_copy(pl->link_config.advertising, pl->supported);
975
976 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
977 phylink_err(pl,
978 "failed to validate link configuration for in-band status\n");
979 return -EINVAL;
980 }
981 }
982
983 return 0;
984 }
985
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)986 static void phylink_apply_manual_flow(struct phylink *pl,
987 struct phylink_link_state *state)
988 {
989 /* If autoneg is disabled, pause AN is also disabled */
990 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
991 state->advertising))
992 state->pause &= ~MLO_PAUSE_AN;
993
994 /* Manual configuration of pause modes */
995 if (!(pl->link_config.pause & MLO_PAUSE_AN))
996 state->pause = pl->link_config.pause;
997 }
998
phylink_resolve_an_pause(struct phylink_link_state * state)999 static void phylink_resolve_an_pause(struct phylink_link_state *state)
1000 {
1001 bool tx_pause, rx_pause;
1002
1003 if (state->duplex == DUPLEX_FULL) {
1004 linkmode_resolve_pause(state->advertising,
1005 state->lp_advertising,
1006 &tx_pause, &rx_pause);
1007 if (tx_pause)
1008 state->pause |= MLO_PAUSE_TX;
1009 if (rx_pause)
1010 state->pause |= MLO_PAUSE_RX;
1011 }
1012 }
1013
phylink_pcs_inband_caps(struct phylink_pcs * pcs,phy_interface_t interface)1014 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
1015 phy_interface_t interface)
1016 {
1017 if (pcs && pcs->ops->pcs_inband_caps)
1018 return pcs->ops->pcs_inband_caps(pcs, interface);
1019
1020 return 0;
1021 }
1022
phylink_pcs_pre_config(struct phylink_pcs * pcs,phy_interface_t interface)1023 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
1024 phy_interface_t interface)
1025 {
1026 if (pcs && pcs->ops->pcs_pre_config)
1027 pcs->ops->pcs_pre_config(pcs, interface);
1028 }
1029
phylink_pcs_post_config(struct phylink_pcs * pcs,phy_interface_t interface)1030 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
1031 phy_interface_t interface)
1032 {
1033 int err = 0;
1034
1035 if (pcs && pcs->ops->pcs_post_config)
1036 err = pcs->ops->pcs_post_config(pcs, interface);
1037
1038 return err;
1039 }
1040
phylink_pcs_disable(struct phylink_pcs * pcs)1041 static void phylink_pcs_disable(struct phylink_pcs *pcs)
1042 {
1043 if (pcs && pcs->ops->pcs_disable)
1044 pcs->ops->pcs_disable(pcs);
1045 }
1046
phylink_pcs_enable(struct phylink_pcs * pcs)1047 static int phylink_pcs_enable(struct phylink_pcs *pcs)
1048 {
1049 int err = 0;
1050
1051 if (pcs && pcs->ops->pcs_enable)
1052 err = pcs->ops->pcs_enable(pcs);
1053
1054 return err;
1055 }
1056
phylink_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,const struct phylink_link_state * state,bool permit_pause_to_mac)1057 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1058 const struct phylink_link_state *state,
1059 bool permit_pause_to_mac)
1060 {
1061 if (!pcs)
1062 return 0;
1063
1064 return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1065 state->advertising, permit_pause_to_mac);
1066 }
1067
phylink_pcs_link_up(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,int speed,int duplex)1068 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1069 phy_interface_t interface, int speed,
1070 int duplex)
1071 {
1072 if (pcs && pcs->ops->pcs_link_up)
1073 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1074 }
1075
1076 /* Query inband for a specific interface mode, asking the MAC for the
1077 * PCS which will be used to handle the interface mode.
1078 */
phylink_inband_caps(struct phylink * pl,phy_interface_t interface)1079 static unsigned int phylink_inband_caps(struct phylink *pl,
1080 phy_interface_t interface)
1081 {
1082 struct phylink_pcs *pcs;
1083
1084 if (!pl->mac_ops->mac_select_pcs)
1085 return 0;
1086
1087 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
1088 if (!pcs)
1089 return 0;
1090
1091 return phylink_pcs_inband_caps(pcs, interface);
1092 }
1093
phylink_pcs_poll_stop(struct phylink * pl)1094 static void phylink_pcs_poll_stop(struct phylink *pl)
1095 {
1096 if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1097 del_timer(&pl->link_poll);
1098 }
1099
phylink_pcs_poll_start(struct phylink * pl)1100 static void phylink_pcs_poll_start(struct phylink *pl)
1101 {
1102 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1103 mod_timer(&pl->link_poll, jiffies + HZ);
1104 }
1105
phylink_pcs_pre_init(struct phylink * pl,struct phylink_pcs * pcs)1106 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
1107 {
1108 int ret = 0;
1109
1110 /* Signal to PCS driver that MAC requires RX clock for init */
1111 if (pl->config->mac_requires_rxc)
1112 pcs->rxc_always_on = true;
1113
1114 if (pcs->ops->pcs_pre_init)
1115 ret = pcs->ops->pcs_pre_init(pcs);
1116
1117 return ret;
1118 }
1119 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
1120
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)1121 static void phylink_mac_config(struct phylink *pl,
1122 const struct phylink_link_state *state)
1123 {
1124 struct phylink_link_state st = *state;
1125
1126 /* Stop drivers incorrectly using these */
1127 linkmode_zero(st.lp_advertising);
1128 st.speed = SPEED_UNKNOWN;
1129 st.duplex = DUPLEX_UNKNOWN;
1130 st.an_complete = false;
1131 st.link = false;
1132
1133 phylink_dbg(pl,
1134 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1135 __func__, phylink_an_mode_str(pl->act_link_an_mode),
1136 phy_modes(st.interface),
1137 phy_rate_matching_to_str(st.rate_matching),
1138 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1139 st.pause);
1140
1141 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st);
1142 }
1143
phylink_pcs_an_restart(struct phylink * pl)1144 static void phylink_pcs_an_restart(struct phylink *pl)
1145 {
1146 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1147 pl->link_config.advertising) &&
1148 phy_interface_mode_is_8023z(pl->link_config.interface) &&
1149 phylink_autoneg_inband(pl->act_link_an_mode))
1150 pl->pcs->ops->pcs_an_restart(pl->pcs);
1151 }
1152
1153 /**
1154 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1155 * @pl: a pointer to a &struct phylink returned from phylink_create()
1156 * @pcs: a pointer to &struct phylink_pcs
1157 * @interface: interface mode to be used
1158 * @advertising: adertisement ethtool link mode mask
1159 *
1160 * Determines the negotiation mode to be used by the PCS, and returns
1161 * one of:
1162 *
1163 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1164 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1165 * will be used.
1166 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1167 * disabled
1168 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1169 *
1170 * Note: this is for cases where the PCS itself is involved in negotiation
1171 * (e.g. Clause 37, SGMII and similar) not Clause 73.
1172 */
phylink_pcs_neg_mode(struct phylink * pl,struct phylink_pcs * pcs,phy_interface_t interface,const unsigned long * advertising)1173 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,
1174 phy_interface_t interface,
1175 const unsigned long *advertising)
1176 {
1177 unsigned int pcs_ib_caps = 0;
1178 unsigned int phy_ib_caps = 0;
1179 unsigned int neg_mode, mode;
1180 enum {
1181 INBAND_CISCO_SGMII,
1182 INBAND_BASEX,
1183 } type;
1184
1185 mode = pl->req_link_an_mode;
1186
1187 pl->phy_ib_mode = 0;
1188
1189 switch (interface) {
1190 case PHY_INTERFACE_MODE_SGMII:
1191 case PHY_INTERFACE_MODE_QSGMII:
1192 case PHY_INTERFACE_MODE_QUSGMII:
1193 case PHY_INTERFACE_MODE_USXGMII:
1194 case PHY_INTERFACE_MODE_10G_QXGMII:
1195 /* These protocols are designed for use with a PHY which
1196 * communicates its negotiation result back to the MAC via
1197 * inband communication. Note: there exist PHYs that run
1198 * with SGMII but do not send the inband data.
1199 */
1200 type = INBAND_CISCO_SGMII;
1201 break;
1202
1203 case PHY_INTERFACE_MODE_1000BASEX:
1204 case PHY_INTERFACE_MODE_2500BASEX:
1205 /* 1000base-X is designed for use media-side for Fibre
1206 * connections, and thus the Autoneg bit needs to be
1207 * taken into account. We also do this for 2500base-X
1208 * as well, but drivers may not support this, so may
1209 * need to override this.
1210 */
1211 type = INBAND_BASEX;
1212 break;
1213
1214 default:
1215 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE;
1216 pl->act_link_an_mode = mode;
1217 return;
1218 }
1219
1220 if (pcs)
1221 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);
1222
1223 if (pl->phydev)
1224 phy_ib_caps = phy_inband_caps(pl->phydev, interface);
1225
1226 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",
1227 phy_modes(interface), pcs_ib_caps, phy_ib_caps);
1228
1229 if (!phylink_autoneg_inband(mode)) {
1230 bool pcs_ib_only = false;
1231 bool phy_ib_only = false;
1232
1233 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) {
1234 /* PCS supports reporting in-band capabilities, and
1235 * supports more than disable mode.
1236 */
1237 if (pcs_ib_caps & LINK_INBAND_DISABLE)
1238 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1239 else if (pcs_ib_caps & LINK_INBAND_ENABLE)
1240 pcs_ib_only = true;
1241 }
1242
1243 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) {
1244 /* PHY supports in-band capabilities, and supports
1245 * more than disable mode.
1246 */
1247 if (phy_ib_caps & LINK_INBAND_DISABLE)
1248 pl->phy_ib_mode = LINK_INBAND_DISABLE;
1249 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1250 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1251 else if (phy_ib_caps & LINK_INBAND_ENABLE)
1252 phy_ib_only = true;
1253 }
1254
1255 /* If either the PCS or PHY requires inband to be enabled,
1256 * this is an invalid configuration. Provide a diagnostic
1257 * message for this case, but don't try to force the issue.
1258 */
1259 if (pcs_ib_only || phy_ib_only)
1260 phylink_warn(pl,
1261 "firmware wants %s mode, but %s%s%s requires inband\n",
1262 phylink_an_mode_str(mode),
1263 pcs_ib_only ? "PCS" : "",
1264 pcs_ib_only && phy_ib_only ? " and " : "",
1265 phy_ib_only ? "PHY" : "");
1266
1267 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1268 } else if (type == INBAND_CISCO_SGMII || pl->phydev) {
1269 /* For SGMII modes which are designed to be used with PHYs, or
1270 * Base-X with a PHY, we try to use in-band mode where-ever
1271 * possible. However, there are some PHYs e.g. BCM84881 which
1272 * do not support in-band.
1273 */
1274 const unsigned int inband_ok = LINK_INBAND_ENABLE |
1275 LINK_INBAND_BYPASS;
1276 const unsigned int outband_ok = LINK_INBAND_DISABLE |
1277 LINK_INBAND_BYPASS;
1278 /* PCS PHY
1279 * D E D E
1280 * 0 0 0 0 no information inband enabled
1281 * 1 0 0 0 pcs doesn't support outband
1282 * 0 1 0 0 pcs required inband enabled
1283 * 1 1 0 0 pcs optional inband enabled
1284 * 0 0 1 0 phy doesn't support outband
1285 * 1 0 1 0 pcs+phy doesn't support outband
1286 * 0 1 1 0 pcs required, phy doesn't support, invalid
1287 * 1 1 1 0 pcs optional, phy doesn't support, outband
1288 * 0 0 0 1 phy required inband enabled
1289 * 1 0 0 1 pcs doesn't support, phy required, invalid
1290 * 0 1 0 1 pcs+phy required inband enabled
1291 * 1 1 0 1 pcs optional, phy required inband enabled
1292 * 0 0 1 1 phy optional inband enabled
1293 * 1 0 1 1 pcs doesn't support, phy optional, outband
1294 * 0 1 1 1 pcs required, phy optional inband enabled
1295 * 1 1 1 1 pcs+phy optional inband enabled
1296 */
1297 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) &&
1298 (!phy_ib_caps || phy_ib_caps & inband_ok)) {
1299 /* In-band supported or unknown at both ends. Enable
1300 * in-band mode with or without bypass at the PHY.
1301 */
1302 if (phy_ib_caps & LINK_INBAND_ENABLE)
1303 pl->phy_ib_mode = LINK_INBAND_ENABLE;
1304 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1305 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1306
1307 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1308 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) &&
1309 (!phy_ib_caps || phy_ib_caps & outband_ok)) {
1310 /* Either in-band not supported at at least one end.
1311 * In-band bypass at the other end is possible.
1312 */
1313 if (phy_ib_caps & LINK_INBAND_DISABLE)
1314 pl->phy_ib_mode = LINK_INBAND_DISABLE;
1315 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1316 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1317
1318 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1319 if (pl->phydev)
1320 mode = MLO_AN_PHY;
1321 } else {
1322 /* invalid */
1323 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",
1324 phy_modes(interface));
1325 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1326 }
1327 } else {
1328 /* For Base-X without a PHY */
1329 if (pcs_ib_caps == LINK_INBAND_DISABLE)
1330 /* If the PCS doesn't support inband, then inband must
1331 * be disabled.
1332 */
1333 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1334 else if (pcs_ib_caps == LINK_INBAND_ENABLE)
1335 /* If the PCS requires inband, then inband must always
1336 * be enabled.
1337 */
1338 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1339 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1340 advertising))
1341 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1342 else
1343 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1344 }
1345
1346 pl->pcs_neg_mode = neg_mode;
1347 pl->act_link_an_mode = mode;
1348 }
1349
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1350 static void phylink_major_config(struct phylink *pl, bool restart,
1351 const struct phylink_link_state *state)
1352 {
1353 struct phylink_pcs *pcs = NULL;
1354 bool pcs_changed = false;
1355 unsigned int rate_kbd;
1356 unsigned int neg_mode;
1357 int err;
1358
1359 phylink_dbg(pl, "major config, requested %s/%s\n",
1360 phylink_an_mode_str(pl->req_link_an_mode),
1361 phy_modes(state->interface));
1362
1363 if (pl->mac_ops->mac_select_pcs) {
1364 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1365 if (IS_ERR(pcs)) {
1366 phylink_err(pl,
1367 "mac_select_pcs unexpectedly failed: %pe\n",
1368 pcs);
1369 return;
1370 }
1371
1372 pcs_changed = pl->pcs != pcs;
1373 }
1374
1375 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising);
1376
1377 phylink_dbg(pl, "major config, active %s/%s/%s\n",
1378 phylink_an_mode_str(pl->act_link_an_mode),
1379 phylink_pcs_mode_str(pl->pcs_neg_mode),
1380 phy_modes(state->interface));
1381
1382 phylink_pcs_poll_stop(pl);
1383
1384 if (pl->mac_ops->mac_prepare) {
1385 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode,
1386 state->interface);
1387 if (err < 0) {
1388 phylink_err(pl, "mac_prepare failed: %pe\n",
1389 ERR_PTR(err));
1390 return;
1391 }
1392 }
1393
1394 /* If we have a new PCS, switch to the new PCS after preparing the MAC
1395 * for the change.
1396 */
1397 if (pcs_changed) {
1398 phylink_pcs_disable(pl->pcs);
1399
1400 if (pl->pcs)
1401 pl->pcs->phylink = NULL;
1402
1403 pcs->phylink = pl;
1404
1405 pl->pcs = pcs;
1406 }
1407
1408 if (pl->pcs)
1409 phylink_pcs_pre_config(pl->pcs, state->interface);
1410
1411 phylink_mac_config(pl, state);
1412
1413 if (pl->pcs)
1414 phylink_pcs_post_config(pl->pcs, state->interface);
1415
1416 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1417 phylink_pcs_enable(pl->pcs);
1418
1419 neg_mode = pl->act_link_an_mode;
1420 if (pl->pcs && pl->pcs->neg_mode)
1421 neg_mode = pl->pcs_neg_mode;
1422
1423 err = phylink_pcs_config(pl->pcs, neg_mode, state,
1424 !!(pl->link_config.pause & MLO_PAUSE_AN));
1425 if (err < 0)
1426 phylink_err(pl, "pcs_config failed: %pe\n",
1427 ERR_PTR(err));
1428 else if (err > 0)
1429 restart = true;
1430
1431 if (restart)
1432 phylink_pcs_an_restart(pl);
1433
1434 if (pl->mac_ops->mac_finish) {
1435 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode,
1436 state->interface);
1437 if (err < 0)
1438 phylink_err(pl, "mac_finish failed: %pe\n",
1439 ERR_PTR(err));
1440 }
1441
1442 if (pl->phydev && pl->phy_ib_mode) {
1443 err = phy_config_inband(pl->phydev, pl->phy_ib_mode);
1444 if (err < 0)
1445 phylink_err(pl, "phy_config_inband: %pe\n",
1446 ERR_PTR(err));
1447 }
1448
1449 if (pl->sfp_bus) {
1450 rate_kbd = phylink_interface_signal_rate(state->interface);
1451 if (rate_kbd)
1452 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1453 }
1454
1455 phylink_pcs_poll_start(pl);
1456 }
1457
1458 /*
1459 * Reconfigure for a change of inband advertisement.
1460 * If we have a separate PCS, we only need to call its pcs_config() method,
1461 * and then restart AN if it indicates something changed. Otherwise, we do
1462 * the full MAC reconfiguration.
1463 */
phylink_change_inband_advert(struct phylink * pl)1464 static int phylink_change_inband_advert(struct phylink *pl)
1465 {
1466 unsigned int neg_mode;
1467 int ret;
1468
1469 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1470 return 0;
1471
1472 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1473 phylink_an_mode_str(pl->req_link_an_mode),
1474 phy_modes(pl->link_config.interface),
1475 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1476 pl->link_config.pause);
1477
1478 /* Recompute the PCS neg mode */
1479 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface,
1480 pl->link_config.advertising);
1481
1482 neg_mode = pl->act_link_an_mode;
1483 if (pl->pcs->neg_mode)
1484 neg_mode = pl->pcs_neg_mode;
1485
1486 /* Modern PCS-based method; update the advert at the PCS, and
1487 * restart negotiation if the pcs_config() helper indicates that
1488 * the programmed advertisement has changed.
1489 */
1490 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1491 !!(pl->link_config.pause & MLO_PAUSE_AN));
1492 if (ret < 0)
1493 return ret;
1494
1495 if (ret > 0)
1496 phylink_pcs_an_restart(pl);
1497
1498 return 0;
1499 }
1500
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1501 static void phylink_mac_pcs_get_state(struct phylink *pl,
1502 struct phylink_link_state *state)
1503 {
1504 struct phylink_pcs *pcs;
1505 bool autoneg;
1506
1507 linkmode_copy(state->advertising, pl->link_config.advertising);
1508 linkmode_zero(state->lp_advertising);
1509 state->interface = pl->link_config.interface;
1510 state->rate_matching = pl->link_config.rate_matching;
1511 state->an_complete = 0;
1512 state->link = 1;
1513
1514 pcs = pl->pcs;
1515 if (!pcs || pcs->neg_mode)
1516 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
1517 else
1518 autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1519 state->advertising);
1520
1521 if (autoneg) {
1522 state->speed = SPEED_UNKNOWN;
1523 state->duplex = DUPLEX_UNKNOWN;
1524 state->pause = MLO_PAUSE_NONE;
1525 } else {
1526 state->speed = pl->link_config.speed;
1527 state->duplex = pl->link_config.duplex;
1528 state->pause = pl->link_config.pause;
1529 }
1530
1531 if (pcs)
1532 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state);
1533 else
1534 state->link = 0;
1535 }
1536
1537 /* The fixed state is... fixed except for the link state,
1538 * which may be determined by a GPIO or a callback.
1539 */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1540 static void phylink_get_fixed_state(struct phylink *pl,
1541 struct phylink_link_state *state)
1542 {
1543 *state = pl->link_config;
1544 if (pl->config->get_fixed_state)
1545 pl->config->get_fixed_state(pl->config, state);
1546 else if (pl->link_gpio)
1547 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1548
1549 state->pause = MLO_PAUSE_NONE;
1550 phylink_resolve_an_pause(state);
1551 }
1552
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1553 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1554 {
1555 struct phylink_link_state link_state;
1556
1557 switch (pl->req_link_an_mode) {
1558 case MLO_AN_PHY:
1559 link_state = pl->phy_state;
1560 break;
1561
1562 case MLO_AN_FIXED:
1563 phylink_get_fixed_state(pl, &link_state);
1564 break;
1565
1566 case MLO_AN_INBAND:
1567 link_state = pl->link_config;
1568 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1569 link_state.pause = MLO_PAUSE_NONE;
1570 break;
1571
1572 default: /* can't happen */
1573 return;
1574 }
1575
1576 link_state.link = false;
1577
1578 phylink_apply_manual_flow(pl, &link_state);
1579 phylink_major_config(pl, force_restart, &link_state);
1580 }
1581
phylink_pause_to_str(int pause)1582 static const char *phylink_pause_to_str(int pause)
1583 {
1584 switch (pause & MLO_PAUSE_TXRX_MASK) {
1585 case MLO_PAUSE_TX | MLO_PAUSE_RX:
1586 return "rx/tx";
1587 case MLO_PAUSE_TX:
1588 return "tx";
1589 case MLO_PAUSE_RX:
1590 return "rx";
1591 default:
1592 return "off";
1593 }
1594 }
1595
phylink_deactivate_lpi(struct phylink * pl)1596 static void phylink_deactivate_lpi(struct phylink *pl)
1597 {
1598 if (pl->mac_enable_tx_lpi) {
1599 pl->mac_enable_tx_lpi = false;
1600
1601 phylink_dbg(pl, "disabling LPI\n");
1602
1603 pl->mac_ops->mac_disable_tx_lpi(pl->config);
1604 }
1605 }
1606
phylink_activate_lpi(struct phylink * pl)1607 static void phylink_activate_lpi(struct phylink *pl)
1608 {
1609 int err;
1610
1611 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) {
1612 phylink_dbg(pl, "MAC does not support LPI with %s\n",
1613 phy_modes(pl->cur_interface));
1614 return;
1615 }
1616
1617 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n",
1618 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop);
1619
1620 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer,
1621 pl->mac_tx_clk_stop);
1622 if (!err)
1623 pl->mac_enable_tx_lpi = true;
1624 else
1625 phylink_err(pl, "%ps() failed: %pe\n",
1626 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err));
1627 }
1628
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1629 static void phylink_link_up(struct phylink *pl,
1630 struct phylink_link_state link_state)
1631 {
1632 struct net_device *ndev = pl->netdev;
1633 unsigned int neg_mode;
1634 int speed, duplex;
1635 bool rx_pause;
1636
1637 speed = link_state.speed;
1638 duplex = link_state.duplex;
1639 rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1640
1641 switch (link_state.rate_matching) {
1642 case RATE_MATCH_PAUSE:
1643 /* The PHY is doing rate matchion from the media rate (in
1644 * the link_state) to the interface speed, and will send
1645 * pause frames to the MAC to limit its transmission speed.
1646 */
1647 speed = phylink_interface_max_speed(link_state.interface);
1648 duplex = DUPLEX_FULL;
1649 rx_pause = true;
1650 break;
1651
1652 case RATE_MATCH_CRS:
1653 /* The PHY is doing rate matchion from the media rate (in
1654 * the link_state) to the interface speed, and will cause
1655 * collisions to the MAC to limit its transmission speed.
1656 */
1657 speed = phylink_interface_max_speed(link_state.interface);
1658 duplex = DUPLEX_HALF;
1659 break;
1660 }
1661
1662 pl->cur_interface = link_state.interface;
1663
1664 neg_mode = pl->act_link_an_mode;
1665 if (pl->pcs && pl->pcs->neg_mode)
1666 neg_mode = pl->pcs_neg_mode;
1667
1668 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1669 duplex);
1670
1671 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode,
1672 pl->cur_interface, speed, duplex,
1673 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1674
1675 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi)
1676 phylink_activate_lpi(pl);
1677
1678 if (ndev)
1679 netif_carrier_on(ndev);
1680
1681 phylink_info(pl,
1682 "Link is Up - %s/%s - flow control %s\n",
1683 phy_speed_to_str(link_state.speed),
1684 phy_duplex_to_str(link_state.duplex),
1685 phylink_pause_to_str(link_state.pause));
1686 }
1687
phylink_link_down(struct phylink * pl)1688 static void phylink_link_down(struct phylink *pl)
1689 {
1690 struct net_device *ndev = pl->netdev;
1691
1692 if (ndev)
1693 netif_carrier_off(ndev);
1694
1695 phylink_deactivate_lpi(pl);
1696
1697 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode,
1698 pl->cur_interface);
1699 phylink_info(pl, "Link is Down\n");
1700 }
1701
phylink_link_is_up(struct phylink * pl)1702 static bool phylink_link_is_up(struct phylink *pl)
1703 {
1704 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state;
1705 }
1706
phylink_resolve(struct work_struct * w)1707 static void phylink_resolve(struct work_struct *w)
1708 {
1709 struct phylink *pl = container_of(w, struct phylink, resolve);
1710 struct phylink_link_state link_state;
1711 bool mac_config = false;
1712 bool retrigger = false;
1713 bool cur_link_state;
1714
1715 mutex_lock(&pl->state_mutex);
1716 cur_link_state = phylink_link_is_up(pl);
1717
1718 if (pl->phylink_disable_state) {
1719 pl->link_failed = false;
1720 link_state.link = false;
1721 } else if (pl->link_failed) {
1722 link_state.link = false;
1723 retrigger = true;
1724 } else if (pl->act_link_an_mode == MLO_AN_FIXED) {
1725 phylink_get_fixed_state(pl, &link_state);
1726 mac_config = link_state.link;
1727 } else if (pl->act_link_an_mode == MLO_AN_PHY) {
1728 link_state = pl->phy_state;
1729 mac_config = link_state.link;
1730 } else {
1731 phylink_mac_pcs_get_state(pl, &link_state);
1732
1733 /* The PCS may have a latching link-fail indicator. If the link
1734 * was up, bring the link down and re-trigger the resolve.
1735 * Otherwise, re-read the PCS state to get the current status
1736 * of the link.
1737 */
1738 if (!link_state.link) {
1739 if (cur_link_state)
1740 retrigger = true;
1741 else
1742 phylink_mac_pcs_get_state(pl, &link_state);
1743 }
1744
1745 /* If we have a phy, the "up" state is the union of both the
1746 * PHY and the MAC
1747 */
1748 if (pl->phydev)
1749 link_state.link &= pl->phy_state.link;
1750
1751 /* Only update if the PHY link is up */
1752 if (pl->phydev && pl->phy_state.link) {
1753 /* If the interface has changed, force a link down
1754 * event if the link isn't already down, and re-resolve.
1755 */
1756 if (link_state.interface != pl->phy_state.interface) {
1757 retrigger = true;
1758 link_state.link = false;
1759 }
1760
1761 link_state.interface = pl->phy_state.interface;
1762
1763 /* If we are doing rate matching, then the link
1764 * speed/duplex comes from the PHY
1765 */
1766 if (pl->phy_state.rate_matching) {
1767 link_state.rate_matching =
1768 pl->phy_state.rate_matching;
1769 link_state.speed = pl->phy_state.speed;
1770 link_state.duplex = pl->phy_state.duplex;
1771 }
1772
1773 /* If we have a PHY, we need to update with the PHY
1774 * flow control bits.
1775 */
1776 link_state.pause = pl->phy_state.pause;
1777 mac_config = true;
1778 }
1779 }
1780
1781 if (pl->act_link_an_mode != MLO_AN_FIXED)
1782 phylink_apply_manual_flow(pl, &link_state);
1783
1784 if (mac_config) {
1785 if (link_state.interface != pl->link_config.interface) {
1786 /* The interface has changed, force the link down and
1787 * then reconfigure.
1788 */
1789 if (cur_link_state) {
1790 phylink_link_down(pl);
1791 cur_link_state = false;
1792 }
1793 phylink_major_config(pl, false, &link_state);
1794 pl->link_config.interface = link_state.interface;
1795 }
1796 }
1797
1798 if (link_state.link != cur_link_state) {
1799 pl->old_link_state = link_state.link;
1800 if (!link_state.link)
1801 phylink_link_down(pl);
1802 else
1803 phylink_link_up(pl, link_state);
1804 }
1805 if (!link_state.link && retrigger) {
1806 pl->link_failed = false;
1807 queue_work(system_power_efficient_wq, &pl->resolve);
1808 }
1809 mutex_unlock(&pl->state_mutex);
1810 }
1811
phylink_run_resolve(struct phylink * pl)1812 static void phylink_run_resolve(struct phylink *pl)
1813 {
1814 if (!pl->phylink_disable_state)
1815 queue_work(system_power_efficient_wq, &pl->resolve);
1816 }
1817
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1818 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1819 {
1820 unsigned long state = pl->phylink_disable_state;
1821
1822 set_bit(bit, &pl->phylink_disable_state);
1823 if (state == 0) {
1824 queue_work(system_power_efficient_wq, &pl->resolve);
1825 flush_work(&pl->resolve);
1826 }
1827 }
1828
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1829 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1830 {
1831 clear_bit(bit, &pl->phylink_disable_state);
1832 phylink_run_resolve(pl);
1833 }
1834
phylink_fixed_poll(struct timer_list * t)1835 static void phylink_fixed_poll(struct timer_list *t)
1836 {
1837 struct phylink *pl = container_of(t, struct phylink, link_poll);
1838
1839 mod_timer(t, jiffies + HZ);
1840
1841 phylink_run_resolve(pl);
1842 }
1843
1844 static const struct sfp_upstream_ops sfp_phylink_ops;
1845
phylink_register_sfp(struct phylink * pl,const struct fwnode_handle * fwnode)1846 static int phylink_register_sfp(struct phylink *pl,
1847 const struct fwnode_handle *fwnode)
1848 {
1849 struct sfp_bus *bus;
1850 int ret;
1851
1852 if (!fwnode)
1853 return 0;
1854
1855 bus = sfp_bus_find_fwnode(fwnode);
1856 if (IS_ERR(bus)) {
1857 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1858 return PTR_ERR(bus);
1859 }
1860
1861 pl->sfp_bus = bus;
1862
1863 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1864 sfp_bus_put(bus);
1865
1866 return ret;
1867 }
1868
1869 /**
1870 * phylink_set_fixed_link() - set the fixed link
1871 * @pl: a pointer to a &struct phylink returned from phylink_create()
1872 * @state: a pointer to a struct phylink_link_state.
1873 *
1874 * This function is used when the link parameters are known and do not change,
1875 * making it suitable for certain types of network connections.
1876 *
1877 * Returns: zero on success or negative error code.
1878 */
phylink_set_fixed_link(struct phylink * pl,const struct phylink_link_state * state)1879 int phylink_set_fixed_link(struct phylink *pl,
1880 const struct phylink_link_state *state)
1881 {
1882 const struct phy_setting *s;
1883 unsigned long *adv;
1884
1885 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1886 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1887 return -EINVAL;
1888
1889 s = phy_lookup_setting(state->speed, state->duplex,
1890 pl->supported, true);
1891 if (!s)
1892 return -EINVAL;
1893
1894 adv = pl->link_config.advertising;
1895 linkmode_zero(adv);
1896 linkmode_set_bit(s->bit, adv);
1897 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1898
1899 pl->link_config.speed = state->speed;
1900 pl->link_config.duplex = state->duplex;
1901 pl->link_config.link = 1;
1902 pl->link_config.an_complete = 1;
1903
1904 pl->cfg_link_an_mode = MLO_AN_FIXED;
1905 pl->req_link_an_mode = pl->cfg_link_an_mode;
1906
1907 return 0;
1908 }
1909 EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1910
1911 /**
1912 * phylink_create() - create a phylink instance
1913 * @config: a pointer to the target &struct phylink_config
1914 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1915 * interface
1916 * @iface: the desired link mode defined by &typedef phy_interface_t
1917 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1918 *
1919 * Create a new phylink instance, and parse the link parameters found in @np.
1920 * This will parse in-band modes, fixed-link or SFP configuration.
1921 *
1922 * Note: the rtnl lock must not be held when calling this function.
1923 *
1924 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1925 * must use IS_ERR() to check for errors from this function.
1926 */
phylink_create(struct phylink_config * config,const struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1927 struct phylink *phylink_create(struct phylink_config *config,
1928 const struct fwnode_handle *fwnode,
1929 phy_interface_t iface,
1930 const struct phylink_mac_ops *mac_ops)
1931 {
1932 struct phylink *pl;
1933 int ret;
1934
1935 /* Validate the supplied configuration */
1936 if (phy_interface_empty(config->supported_interfaces)) {
1937 dev_err(config->dev,
1938 "phylink: error: empty supported_interfaces\n");
1939 return ERR_PTR(-EINVAL);
1940 }
1941
1942 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1943 if (!pl)
1944 return ERR_PTR(-ENOMEM);
1945
1946 mutex_init(&pl->state_mutex);
1947 INIT_WORK(&pl->resolve, phylink_resolve);
1948
1949 pl->config = config;
1950 if (config->type == PHYLINK_NETDEV) {
1951 pl->netdev = to_net_dev(config->dev);
1952 netif_carrier_off(pl->netdev);
1953 } else if (config->type == PHYLINK_DEV) {
1954 pl->dev = config->dev;
1955 } else {
1956 kfree(pl);
1957 return ERR_PTR(-EINVAL);
1958 }
1959
1960 pl->mac_supports_eee_ops = mac_ops->mac_disable_tx_lpi &&
1961 mac_ops->mac_enable_tx_lpi;
1962 pl->mac_supports_eee = pl->mac_supports_eee_ops &&
1963 pl->config->lpi_capabilities &&
1964 !phy_interface_empty(pl->config->lpi_interfaces);
1965
1966 /* Set the default EEE configuration */
1967 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default;
1968 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled;
1969 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default;
1970
1971 pl->phy_state.interface = iface;
1972 pl->link_interface = iface;
1973 if (iface == PHY_INTERFACE_MODE_MOCA)
1974 pl->link_port = PORT_BNC;
1975 else
1976 pl->link_port = PORT_MII;
1977 pl->link_config.interface = iface;
1978 pl->link_config.pause = MLO_PAUSE_AN;
1979 pl->link_config.speed = SPEED_UNKNOWN;
1980 pl->link_config.duplex = DUPLEX_UNKNOWN;
1981 pl->pcs_state = PCS_STATE_DOWN;
1982 pl->mac_ops = mac_ops;
1983 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1984 timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1985
1986 linkmode_fill(pl->supported);
1987 linkmode_copy(pl->link_config.advertising, pl->supported);
1988 phylink_validate(pl, pl->supported, &pl->link_config);
1989
1990 ret = phylink_parse_mode(pl, fwnode);
1991 if (ret < 0) {
1992 kfree(pl);
1993 return ERR_PTR(ret);
1994 }
1995
1996 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1997 ret = phylink_parse_fixedlink(pl, fwnode);
1998 if (ret < 0) {
1999 kfree(pl);
2000 return ERR_PTR(ret);
2001 }
2002 }
2003
2004 pl->req_link_an_mode = pl->cfg_link_an_mode;
2005
2006 ret = phylink_register_sfp(pl, fwnode);
2007 if (ret < 0) {
2008 kfree(pl);
2009 return ERR_PTR(ret);
2010 }
2011
2012 return pl;
2013 }
2014 EXPORT_SYMBOL_GPL(phylink_create);
2015
2016 /**
2017 * phylink_destroy() - cleanup and destroy the phylink instance
2018 * @pl: a pointer to a &struct phylink returned from phylink_create()
2019 *
2020 * Destroy a phylink instance. Any PHY that has been attached must have been
2021 * cleaned up via phylink_disconnect_phy() prior to calling this function.
2022 *
2023 * Note: the rtnl lock must not be held when calling this function.
2024 */
phylink_destroy(struct phylink * pl)2025 void phylink_destroy(struct phylink *pl)
2026 {
2027 sfp_bus_del_upstream(pl->sfp_bus);
2028 if (pl->link_gpio)
2029 gpiod_put(pl->link_gpio);
2030
2031 cancel_work_sync(&pl->resolve);
2032 kfree(pl);
2033 }
2034 EXPORT_SYMBOL_GPL(phylink_destroy);
2035
2036 /**
2037 * phylink_expects_phy() - Determine if phylink expects a phy to be attached
2038 * @pl: a pointer to a &struct phylink returned from phylink_create()
2039 *
2040 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
2041 * no PHY is needed.
2042 *
2043 * Returns true if phylink will be expecting a PHY.
2044 */
phylink_expects_phy(struct phylink * pl)2045 bool phylink_expects_phy(struct phylink *pl)
2046 {
2047 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2048 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2049 phy_interface_mode_is_8023z(pl->link_config.interface)))
2050 return false;
2051 return true;
2052 }
2053 EXPORT_SYMBOL_GPL(phylink_expects_phy);
2054
phylink_phy_change(struct phy_device * phydev,bool up)2055 static void phylink_phy_change(struct phy_device *phydev, bool up)
2056 {
2057 struct phylink *pl = phydev->phylink;
2058 bool tx_pause, rx_pause;
2059
2060 phy_get_pause(phydev, &tx_pause, &rx_pause);
2061
2062 mutex_lock(&pl->state_mutex);
2063 pl->phy_state.speed = phydev->speed;
2064 pl->phy_state.duplex = phydev->duplex;
2065 pl->phy_state.rate_matching = phydev->rate_matching;
2066 pl->phy_state.pause = MLO_PAUSE_NONE;
2067 if (tx_pause)
2068 pl->phy_state.pause |= MLO_PAUSE_TX;
2069 if (rx_pause)
2070 pl->phy_state.pause |= MLO_PAUSE_RX;
2071 pl->phy_state.interface = phydev->interface;
2072 pl->phy_state.link = up;
2073 if (!up)
2074 pl->link_failed = true;
2075
2076 /* Get the LPI state from phylib */
2077 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi;
2078 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer;
2079 mutex_unlock(&pl->state_mutex);
2080
2081 phylink_run_resolve(pl);
2082
2083 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n",
2084 up ? "up" : "down",
2085 phy_modes(phydev->interface),
2086 phy_speed_to_str(phydev->speed),
2087 phy_duplex_to_str(phydev->duplex),
2088 phy_rate_matching_to_str(phydev->rate_matching),
2089 phylink_pause_to_str(pl->phy_state.pause),
2090 phydev->enable_tx_lpi ? "" : "no");
2091 }
2092
phylink_validate_phy(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state)2093 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
2094 unsigned long *supported,
2095 struct phylink_link_state *state)
2096 {
2097 DECLARE_PHY_INTERFACE_MASK(interfaces);
2098
2099 /* If the PHY provides a bitmap of the interfaces it will be using
2100 * depending on the negotiated media speeds, use this to validate
2101 * which ethtool link modes can be used.
2102 */
2103 if (!phy_interface_empty(phy->possible_interfaces)) {
2104 /* We only care about the union of the PHY's interfaces and
2105 * those which the host supports.
2106 */
2107 phy_interface_and(interfaces, phy->possible_interfaces,
2108 pl->config->supported_interfaces);
2109
2110 if (phy_interface_empty(interfaces)) {
2111 phylink_err(pl, "PHY has no common interfaces\n");
2112 return -EINVAL;
2113 }
2114
2115 if (phy_on_sfp(phy)) {
2116 /* If the PHY is on a SFP, limit the interfaces to
2117 * those that can be used with a SFP module.
2118 */
2119 phy_interface_and(interfaces, interfaces,
2120 phylink_sfp_interfaces);
2121
2122 if (phy_interface_empty(interfaces)) {
2123 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
2124 return -EINVAL;
2125 }
2126 }
2127
2128 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
2129 phydev_name(phy),
2130 (int)PHY_INTERFACE_MODE_MAX,
2131 phy->possible_interfaces,
2132 (int)PHY_INTERFACE_MODE_MAX, interfaces);
2133
2134 return phylink_validate_mask(pl, phy, supported, state,
2135 interfaces);
2136 }
2137
2138 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
2139 phydev_name(phy));
2140
2141 /* Check whether we would use rate matching for the proposed interface
2142 * mode.
2143 */
2144 state->rate_matching = phy_get_rate_matching(phy, state->interface);
2145
2146 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
2147 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
2148 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
2149 * their Serdes is either unnecessary or not reasonable.
2150 *
2151 * For these which switch interface modes, we really need to know which
2152 * interface modes the PHY supports to properly work out which ethtool
2153 * linkmodes can be supported. For now, as a work-around, we validate
2154 * against all interface modes, which may lead to more ethtool link
2155 * modes being advertised than are actually supported.
2156 */
2157 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
2158 state->interface != PHY_INTERFACE_MODE_RXAUI &&
2159 state->interface != PHY_INTERFACE_MODE_XAUI &&
2160 state->interface != PHY_INTERFACE_MODE_USXGMII)
2161 state->interface = PHY_INTERFACE_MODE_NA;
2162
2163 return phylink_validate(pl, supported, state);
2164 }
2165
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)2166 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
2167 phy_interface_t interface)
2168 {
2169 struct phylink_link_state config;
2170 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
2171 char *irq_str;
2172 int ret;
2173
2174 /*
2175 * This is the new way of dealing with flow control for PHYs,
2176 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2177 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
2178 * using our validate call to the MAC, we rely upon the MAC
2179 * clearing the bits from both supported and advertising fields.
2180 */
2181 phy_support_asym_pause(phy);
2182
2183 memset(&config, 0, sizeof(config));
2184 linkmode_copy(supported, phy->supported);
2185 linkmode_copy(config.advertising, phy->advertising);
2186 config.interface = interface;
2187
2188 ret = phylink_validate_phy(pl, phy, supported, &config);
2189 if (ret) {
2190 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
2191 phy_modes(config.interface),
2192 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
2193 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
2194 ERR_PTR(ret));
2195 return ret;
2196 }
2197
2198 phy->phylink = pl;
2199 phy->phy_link_change = phylink_phy_change;
2200
2201 irq_str = phy_attached_info_irq(phy);
2202 phylink_info(pl,
2203 "PHY [%s] driver [%s] (irq=%s)\n",
2204 dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
2205 kfree(irq_str);
2206
2207 mutex_lock(&phy->lock);
2208 mutex_lock(&pl->state_mutex);
2209 pl->phydev = phy;
2210 pl->phy_state.interface = interface;
2211 pl->phy_state.pause = MLO_PAUSE_NONE;
2212 pl->phy_state.speed = SPEED_UNKNOWN;
2213 pl->phy_state.duplex = DUPLEX_UNKNOWN;
2214 pl->phy_state.rate_matching = RATE_MATCH_NONE;
2215 linkmode_copy(pl->supported, supported);
2216 linkmode_copy(pl->link_config.advertising, config.advertising);
2217
2218 /* Restrict the phy advertisement according to the MAC support. */
2219 linkmode_copy(phy->advertising, config.advertising);
2220
2221 /* If the MAC supports phylink managed EEE, restrict the EEE
2222 * advertisement according to the MAC's LPI capabilities.
2223 */
2224 if (pl->mac_supports_eee) {
2225 /* If EEE is enabled, then we need to call phy_support_eee()
2226 * to ensure that the advertising mask is appropriately set.
2227 * This also enables EEE at the PHY.
2228 */
2229 if (pl->eee_cfg.eee_enabled)
2230 phy_support_eee(phy);
2231
2232 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled;
2233 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer;
2234
2235 /* Convert the MAC's LPI capabilities to linkmodes */
2236 linkmode_zero(pl->supported_lpi);
2237 phylink_caps_to_linkmodes(pl->supported_lpi,
2238 pl->config->lpi_capabilities);
2239
2240 /* Restrict the PHYs EEE support/advertisement to the modes
2241 * that the MAC supports.
2242 */
2243 linkmode_and(phy->advertising_eee, phy->advertising_eee,
2244 pl->supported_lpi);
2245 } else if (pl->mac_supports_eee_ops) {
2246 /* MAC supports phylink EEE, but wants EEE always disabled. */
2247 phy_disable_eee(phy);
2248 }
2249
2250 mutex_unlock(&pl->state_mutex);
2251 mutex_unlock(&phy->lock);
2252
2253 phylink_dbg(pl,
2254 "phy: %s setting supported %*pb advertising %*pb\n",
2255 phy_modes(interface),
2256 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
2257 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
2258
2259 if (phy_interrupt_is_valid(phy))
2260 phy_request_interrupt(phy);
2261
2262 if (pl->config->mac_managed_pm)
2263 phy->mac_managed_pm = true;
2264
2265 /* Allow the MAC to stop its clock if the PHY has the capability */
2266 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0;
2267
2268 if (pl->mac_supports_eee_ops) {
2269 /* Explicitly configure whether the PHY is allowed to stop it's
2270 * receive clock.
2271 */
2272 ret = phy_eee_rx_clock_stop(phy,
2273 pl->config->eee_rx_clk_stop_enable);
2274 if (ret == -EOPNOTSUPP)
2275 ret = 0;
2276 }
2277
2278 return ret;
2279 }
2280
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)2281 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
2282 phy_interface_t interface)
2283 {
2284 u32 flags = 0;
2285
2286 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
2287 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2288 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
2289 return -EINVAL;
2290
2291 if (pl->phydev)
2292 return -EBUSY;
2293
2294 if (pl->config->mac_requires_rxc)
2295 flags |= PHY_F_RXC_ALWAYS_ON;
2296
2297 return phy_attach_direct(pl->netdev, phy, flags, interface);
2298 }
2299
2300 /**
2301 * phylink_connect_phy() - connect a PHY to the phylink instance
2302 * @pl: a pointer to a &struct phylink returned from phylink_create()
2303 * @phy: a pointer to a &struct phy_device.
2304 *
2305 * Connect @phy to the phylink instance specified by @pl by calling
2306 * phy_attach_direct(). Configure the @phy according to the MAC driver's
2307 * capabilities, start the PHYLIB state machine and enable any interrupts
2308 * that the PHY supports.
2309 *
2310 * This updates the phylink's ethtool supported and advertising link mode
2311 * masks.
2312 *
2313 * Returns 0 on success or a negative errno.
2314 */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)2315 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
2316 {
2317 int ret;
2318
2319 /* Use PHY device/driver interface */
2320 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2321 pl->link_interface = phy->interface;
2322 pl->link_config.interface = pl->link_interface;
2323 }
2324
2325 ret = phylink_attach_phy(pl, phy, pl->link_interface);
2326 if (ret < 0)
2327 return ret;
2328
2329 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2330 if (ret)
2331 phy_detach(phy);
2332
2333 return ret;
2334 }
2335 EXPORT_SYMBOL_GPL(phylink_connect_phy);
2336
2337 /**
2338 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2339 * @pl: a pointer to a &struct phylink returned from phylink_create()
2340 * @dn: a pointer to a &struct device_node.
2341 * @flags: PHY-specific flags to communicate to the PHY device driver
2342 *
2343 * Connect the phy specified in the device node @dn to the phylink instance
2344 * specified by @pl. Actions specified in phylink_connect_phy() will be
2345 * performed.
2346 *
2347 * Returns 0 on success or a negative errno.
2348 */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)2349 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2350 u32 flags)
2351 {
2352 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2353 }
2354 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2355
2356 /**
2357 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2358 * @pl: a pointer to a &struct phylink returned from phylink_create()
2359 * @fwnode: a pointer to a &struct fwnode_handle.
2360 * @flags: PHY-specific flags to communicate to the PHY device driver
2361 *
2362 * Connect the phy specified @fwnode to the phylink instance specified
2363 * by @pl.
2364 *
2365 * Returns 0 on success or a negative errno.
2366 */
phylink_fwnode_phy_connect(struct phylink * pl,const struct fwnode_handle * fwnode,u32 flags)2367 int phylink_fwnode_phy_connect(struct phylink *pl,
2368 const struct fwnode_handle *fwnode,
2369 u32 flags)
2370 {
2371 struct fwnode_handle *phy_fwnode;
2372 struct phy_device *phy_dev;
2373 int ret;
2374
2375 /* Fixed links and 802.3z are handled without needing a PHY */
2376 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2377 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2378 phy_interface_mode_is_8023z(pl->link_interface)))
2379 return 0;
2380
2381 phy_fwnode = fwnode_get_phy_node(fwnode);
2382 if (IS_ERR(phy_fwnode)) {
2383 if (pl->cfg_link_an_mode == MLO_AN_PHY)
2384 return -ENODEV;
2385 return 0;
2386 }
2387
2388 phy_dev = fwnode_phy_find_device(phy_fwnode);
2389 /* We're done with the phy_node handle */
2390 fwnode_handle_put(phy_fwnode);
2391 if (!phy_dev)
2392 return -ENODEV;
2393
2394 /* Use PHY device/driver interface */
2395 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2396 pl->link_interface = phy_dev->interface;
2397 pl->link_config.interface = pl->link_interface;
2398 }
2399
2400 if (pl->config->mac_requires_rxc)
2401 flags |= PHY_F_RXC_ALWAYS_ON;
2402
2403 ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2404 pl->link_interface);
2405 phy_device_free(phy_dev);
2406 if (ret)
2407 return ret;
2408
2409 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2410 if (ret)
2411 phy_detach(phy_dev);
2412
2413 return ret;
2414 }
2415 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2416
2417 /**
2418 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2419 * instance.
2420 * @pl: a pointer to a &struct phylink returned from phylink_create()
2421 *
2422 * Disconnect any current PHY from the phylink instance described by @pl.
2423 */
phylink_disconnect_phy(struct phylink * pl)2424 void phylink_disconnect_phy(struct phylink *pl)
2425 {
2426 struct phy_device *phy;
2427
2428 ASSERT_RTNL();
2429
2430 phy = pl->phydev;
2431 if (phy) {
2432 mutex_lock(&phy->lock);
2433 mutex_lock(&pl->state_mutex);
2434 pl->phydev = NULL;
2435 pl->phy_enable_tx_lpi = false;
2436 pl->mac_tx_clk_stop = false;
2437 mutex_unlock(&pl->state_mutex);
2438 mutex_unlock(&phy->lock);
2439 flush_work(&pl->resolve);
2440
2441 phy_disconnect(phy);
2442 }
2443 }
2444 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2445
phylink_link_changed(struct phylink * pl,bool up,const char * what)2446 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2447 {
2448 if (!up)
2449 pl->link_failed = true;
2450 phylink_run_resolve(pl);
2451 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2452 }
2453
2454 /**
2455 * phylink_mac_change() - notify phylink of a change in MAC state
2456 * @pl: a pointer to a &struct phylink returned from phylink_create()
2457 * @up: indicates whether the link is currently up.
2458 *
2459 * The MAC driver should call this driver when the state of its link
2460 * changes (eg, link failure, new negotiation results, etc.)
2461 */
phylink_mac_change(struct phylink * pl,bool up)2462 void phylink_mac_change(struct phylink *pl, bool up)
2463 {
2464 phylink_link_changed(pl, up, "mac");
2465 }
2466 EXPORT_SYMBOL_GPL(phylink_mac_change);
2467
2468 /**
2469 * phylink_pcs_change() - notify phylink of a change to PCS link state
2470 * @pcs: pointer to &struct phylink_pcs
2471 * @up: indicates whether the link is currently up.
2472 *
2473 * The PCS driver should call this when the state of its link changes
2474 * (e.g. link failure, new negotiation results, etc.) Note: it should
2475 * not determine "up" by reading the BMSR. If in doubt about the link
2476 * state at interrupt time, then pass true if pcs_get_state() returns
2477 * the latched link-down state, otherwise pass false.
2478 */
phylink_pcs_change(struct phylink_pcs * pcs,bool up)2479 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2480 {
2481 struct phylink *pl = pcs->phylink;
2482
2483 if (pl)
2484 phylink_link_changed(pl, up, "pcs");
2485 }
2486 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2487
phylink_link_handler(int irq,void * data)2488 static irqreturn_t phylink_link_handler(int irq, void *data)
2489 {
2490 struct phylink *pl = data;
2491
2492 phylink_run_resolve(pl);
2493
2494 return IRQ_HANDLED;
2495 }
2496
2497 /**
2498 * phylink_start() - start a phylink instance
2499 * @pl: a pointer to a &struct phylink returned from phylink_create()
2500 *
2501 * Start the phylink instance specified by @pl, configuring the MAC for the
2502 * desired link mode(s) and negotiation style. This should be called from the
2503 * network device driver's &struct net_device_ops ndo_open() method.
2504 */
phylink_start(struct phylink * pl)2505 void phylink_start(struct phylink *pl)
2506 {
2507 bool poll = false;
2508
2509 ASSERT_RTNL();
2510
2511 phylink_info(pl, "configuring for %s/%s link mode\n",
2512 phylink_an_mode_str(pl->req_link_an_mode),
2513 phy_modes(pl->link_config.interface));
2514
2515 /* Always set the carrier off */
2516 if (pl->netdev)
2517 netif_carrier_off(pl->netdev);
2518
2519 pl->pcs_state = PCS_STATE_STARTING;
2520
2521 /* Apply the link configuration to the MAC when starting. This allows
2522 * a fixed-link to start with the correct parameters, and also
2523 * ensures that we set the appropriate advertisement for Serdes links.
2524 *
2525 * Restart autonegotiation if using 802.3z to ensure that the link
2526 * parameters are properly negotiated. This is necessary for DSA
2527 * switches using 802.3z negotiation to ensure they see our modes.
2528 */
2529 phylink_mac_initial_config(pl, true);
2530
2531 pl->pcs_state = PCS_STATE_STARTED;
2532
2533 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2534
2535 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2536 int irq = gpiod_to_irq(pl->link_gpio);
2537
2538 if (irq > 0) {
2539 if (!request_irq(irq, phylink_link_handler,
2540 IRQF_TRIGGER_RISING |
2541 IRQF_TRIGGER_FALLING,
2542 "netdev link", pl))
2543 pl->link_irq = irq;
2544 else
2545 irq = 0;
2546 }
2547 if (irq <= 0)
2548 poll = true;
2549 }
2550
2551 if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2552 poll |= pl->config->poll_fixed_state;
2553
2554 if (poll)
2555 mod_timer(&pl->link_poll, jiffies + HZ);
2556 if (pl->phydev)
2557 phy_start(pl->phydev);
2558 if (pl->sfp_bus)
2559 sfp_upstream_start(pl->sfp_bus);
2560 }
2561 EXPORT_SYMBOL_GPL(phylink_start);
2562
2563 /**
2564 * phylink_stop() - stop a phylink instance
2565 * @pl: a pointer to a &struct phylink returned from phylink_create()
2566 *
2567 * Stop the phylink instance specified by @pl. This should be called from the
2568 * network device driver's &struct net_device_ops ndo_stop() method. The
2569 * network device's carrier state should not be changed prior to calling this
2570 * function.
2571 *
2572 * This will synchronously bring down the link if the link is not already
2573 * down (in other words, it will trigger a mac_link_down() method call.)
2574 */
phylink_stop(struct phylink * pl)2575 void phylink_stop(struct phylink *pl)
2576 {
2577 ASSERT_RTNL();
2578
2579 if (pl->sfp_bus)
2580 sfp_upstream_stop(pl->sfp_bus);
2581 if (pl->phydev)
2582 phy_stop(pl->phydev);
2583 del_timer_sync(&pl->link_poll);
2584 if (pl->link_irq) {
2585 free_irq(pl->link_irq, pl);
2586 pl->link_irq = 0;
2587 }
2588
2589 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2590
2591 pl->pcs_state = PCS_STATE_DOWN;
2592
2593 phylink_pcs_disable(pl->pcs);
2594 }
2595 EXPORT_SYMBOL_GPL(phylink_stop);
2596
2597 /**
2598 * phylink_suspend() - handle a network device suspend event
2599 * @pl: a pointer to a &struct phylink returned from phylink_create()
2600 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2601 *
2602 * Handle a network device suspend event. There are several cases:
2603 *
2604 * - If Wake-on-Lan is not active, we can bring down the link between
2605 * the MAC and PHY by calling phylink_stop().
2606 * - If Wake-on-Lan is active, and being handled only by the PHY, we
2607 * can also bring down the link between the MAC and PHY.
2608 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2609 * still needs to receive packets, so we can not bring the link down.
2610 */
phylink_suspend(struct phylink * pl,bool mac_wol)2611 void phylink_suspend(struct phylink *pl, bool mac_wol)
2612 {
2613 ASSERT_RTNL();
2614
2615 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2616 /* Wake-on-Lan enabled, MAC handling */
2617 mutex_lock(&pl->state_mutex);
2618
2619 /* Stop the resolver bringing the link up */
2620 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2621
2622 /* Disable the carrier, to prevent transmit timeouts,
2623 * but one would hope all packets have been sent. This
2624 * also means phylink_resolve() will do nothing.
2625 */
2626 if (pl->netdev)
2627 netif_carrier_off(pl->netdev);
2628 else
2629 pl->old_link_state = false;
2630
2631 /* We do not call mac_link_down() here as we want the
2632 * link to remain up to receive the WoL packets.
2633 */
2634 mutex_unlock(&pl->state_mutex);
2635 } else {
2636 phylink_stop(pl);
2637 }
2638 }
2639 EXPORT_SYMBOL_GPL(phylink_suspend);
2640
2641 /**
2642 * phylink_resume() - handle a network device resume event
2643 * @pl: a pointer to a &struct phylink returned from phylink_create()
2644 *
2645 * Undo the effects of phylink_suspend(), returning the link to an
2646 * operational state.
2647 */
phylink_resume(struct phylink * pl)2648 void phylink_resume(struct phylink *pl)
2649 {
2650 ASSERT_RTNL();
2651
2652 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2653 /* Wake-on-Lan enabled, MAC handling */
2654
2655 /* Call mac_link_down() so we keep the overall state balanced.
2656 * Do this under the state_mutex lock for consistency. This
2657 * will cause a "Link Down" message to be printed during
2658 * resume, which is harmless - the true link state will be
2659 * printed when we run a resolve.
2660 */
2661 mutex_lock(&pl->state_mutex);
2662 phylink_link_down(pl);
2663 mutex_unlock(&pl->state_mutex);
2664
2665 /* Re-apply the link parameters so that all the settings get
2666 * restored to the MAC.
2667 */
2668 phylink_mac_initial_config(pl, true);
2669
2670 /* Re-enable and re-resolve the link parameters */
2671 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2672 } else {
2673 phylink_start(pl);
2674 }
2675 }
2676 EXPORT_SYMBOL_GPL(phylink_resume);
2677
2678 /**
2679 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2680 * @pl: a pointer to a &struct phylink returned from phylink_create()
2681 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2682 *
2683 * Read the wake on lan parameters from the PHY attached to the phylink
2684 * instance specified by @pl. If no PHY is currently attached, report no
2685 * support for wake on lan.
2686 */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2687 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2688 {
2689 ASSERT_RTNL();
2690
2691 wol->supported = 0;
2692 wol->wolopts = 0;
2693
2694 if (pl->phydev)
2695 phy_ethtool_get_wol(pl->phydev, wol);
2696 }
2697 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2698
2699 /**
2700 * phylink_ethtool_set_wol() - set wake on lan parameters
2701 * @pl: a pointer to a &struct phylink returned from phylink_create()
2702 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2703 *
2704 * Set the wake on lan parameters for the PHY attached to the phylink
2705 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2706 * error.
2707 *
2708 * Returns zero on success or negative errno code.
2709 */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2710 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2711 {
2712 int ret = -EOPNOTSUPP;
2713
2714 ASSERT_RTNL();
2715
2716 if (pl->phydev)
2717 ret = phy_ethtool_set_wol(pl->phydev, wol);
2718
2719 return ret;
2720 }
2721 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2722
phylink_sfp_select_interface(struct phylink * pl,const unsigned long * link_modes)2723 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,
2724 const unsigned long *link_modes)
2725 {
2726 phy_interface_t interface;
2727
2728 interface = sfp_select_interface(pl->sfp_bus, link_modes);
2729 if (interface == PHY_INTERFACE_MODE_NA) {
2730 phylink_err(pl,
2731 "selection of interface failed, advertisement %*pb\n",
2732 __ETHTOOL_LINK_MODE_MASK_NBITS,
2733 link_modes);
2734 return interface;
2735 }
2736
2737 if (!test_bit(interface, pl->config->supported_interfaces)) {
2738 phylink_err(pl,
2739 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n",
2740 phy_modes(interface), interface,
2741 (int)PHY_INTERFACE_MODE_MAX,
2742 pl->config->supported_interfaces);
2743 return PHY_INTERFACE_MODE_NA;
2744 }
2745
2746 return interface;
2747 }
2748
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2749 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2750 {
2751 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2752
2753 linkmode_zero(mask);
2754 phylink_set_port_modes(mask);
2755
2756 linkmode_and(dst, dst, mask);
2757 linkmode_or(dst, dst, b);
2758 }
2759
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2760 static void phylink_get_ksettings(const struct phylink_link_state *state,
2761 struct ethtool_link_ksettings *kset)
2762 {
2763 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2764 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2765 if (kset->base.rate_matching == RATE_MATCH_NONE) {
2766 kset->base.speed = state->speed;
2767 kset->base.duplex = state->duplex;
2768 }
2769 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2770 state->advertising) ?
2771 AUTONEG_ENABLE : AUTONEG_DISABLE;
2772 }
2773
2774 /**
2775 * phylink_ethtool_ksettings_get() - get the current link settings
2776 * @pl: a pointer to a &struct phylink returned from phylink_create()
2777 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2778 *
2779 * Read the current link settings for the phylink instance specified by @pl.
2780 * This will be the link settings read from the MAC, PHY or fixed link
2781 * settings depending on the current negotiation mode.
2782 */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2783 int phylink_ethtool_ksettings_get(struct phylink *pl,
2784 struct ethtool_link_ksettings *kset)
2785 {
2786 struct phylink_link_state link_state;
2787
2788 ASSERT_RTNL();
2789
2790 if (pl->phydev)
2791 phy_ethtool_ksettings_get(pl->phydev, kset);
2792 else
2793 kset->base.port = pl->link_port;
2794
2795 linkmode_copy(kset->link_modes.supported, pl->supported);
2796
2797 switch (pl->act_link_an_mode) {
2798 case MLO_AN_FIXED:
2799 /* We are using fixed settings. Report these as the
2800 * current link settings - and note that these also
2801 * represent the supported speeds/duplex/pause modes.
2802 */
2803 phylink_get_fixed_state(pl, &link_state);
2804 phylink_get_ksettings(&link_state, kset);
2805 break;
2806
2807 case MLO_AN_INBAND:
2808 /* If there is a phy attached, then use the reported
2809 * settings from the phy with no modification.
2810 */
2811 if (pl->phydev)
2812 break;
2813
2814 phylink_mac_pcs_get_state(pl, &link_state);
2815
2816 /* The MAC is reporting the link results from its own PCS
2817 * layer via in-band status. Report these as the current
2818 * link settings.
2819 */
2820 phylink_get_ksettings(&link_state, kset);
2821 break;
2822 }
2823
2824 return 0;
2825 }
2826 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2827
phylink_validate_pcs_inband_autoneg(struct phylink * pl,phy_interface_t interface,unsigned long * adv)2828 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
2829 phy_interface_t interface,
2830 unsigned long *adv)
2831 {
2832 unsigned int inband = phylink_inband_caps(pl, interface);
2833 unsigned int mask;
2834
2835 /* If the PCS doesn't implement inband support, be permissive. */
2836 if (!inband)
2837 return true;
2838
2839 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
2840 mask = LINK_INBAND_ENABLE;
2841 else
2842 mask = LINK_INBAND_DISABLE;
2843
2844 /* Check whether the PCS implements the required mode */
2845 return !!(inband & mask);
2846 }
2847
2848 /**
2849 * phylink_ethtool_ksettings_set() - set the link settings
2850 * @pl: a pointer to a &struct phylink returned from phylink_create()
2851 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2852 */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2853 int phylink_ethtool_ksettings_set(struct phylink *pl,
2854 const struct ethtool_link_ksettings *kset)
2855 {
2856 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2857 struct phylink_link_state config;
2858 const struct phy_setting *s;
2859
2860 ASSERT_RTNL();
2861
2862 if (pl->phydev) {
2863 struct ethtool_link_ksettings phy_kset = *kset;
2864
2865 linkmode_and(phy_kset.link_modes.advertising,
2866 phy_kset.link_modes.advertising,
2867 pl->supported);
2868
2869 /* We can rely on phylib for this update; we also do not need
2870 * to update the pl->link_config settings:
2871 * - the configuration returned via ksettings_get() will come
2872 * from phylib whenever a PHY is present.
2873 * - link_config.interface will be updated by the PHY calling
2874 * back via phylink_phy_change() and a subsequent resolve.
2875 * - initial link configuration for PHY mode comes from the
2876 * last phy state updated via phylink_phy_change().
2877 * - other configuration changes (e.g. pause modes) are
2878 * performed directly via phylib.
2879 * - if in in-band mode with a PHY, the link configuration
2880 * is passed on the link from the PHY, and all of
2881 * link_config.{speed,duplex,an_enabled,pause} are not used.
2882 * - the only possible use would be link_config.advertising
2883 * pause modes when in 1000base-X mode with a PHY, but in
2884 * the presence of a PHY, this should not be changed as that
2885 * should be determined from the media side advertisement.
2886 */
2887 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2888 }
2889
2890 config = pl->link_config;
2891 /* Mask out unsupported advertisements */
2892 linkmode_and(config.advertising, kset->link_modes.advertising,
2893 pl->supported);
2894
2895 /* FIXME: should we reject autoneg if phy/mac does not support it? */
2896 switch (kset->base.autoneg) {
2897 case AUTONEG_DISABLE:
2898 /* Autonegotiation disabled, select a suitable speed and
2899 * duplex.
2900 */
2901 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2902 pl->supported, false);
2903 if (!s)
2904 return -EINVAL;
2905
2906 /* If we have a fixed link, refuse to change link parameters.
2907 * If the link parameters match, accept them but do nothing.
2908 */
2909 if (pl->req_link_an_mode == MLO_AN_FIXED) {
2910 if (s->speed != pl->link_config.speed ||
2911 s->duplex != pl->link_config.duplex)
2912 return -EINVAL;
2913 return 0;
2914 }
2915
2916 config.speed = s->speed;
2917 config.duplex = s->duplex;
2918 break;
2919
2920 case AUTONEG_ENABLE:
2921 /* If we have a fixed link, allow autonegotiation (since that
2922 * is our default case) but do not allow the advertisement to
2923 * be changed. If the advertisement matches, simply return.
2924 */
2925 if (pl->req_link_an_mode == MLO_AN_FIXED) {
2926 if (!linkmode_equal(config.advertising,
2927 pl->link_config.advertising))
2928 return -EINVAL;
2929 return 0;
2930 }
2931
2932 config.speed = SPEED_UNKNOWN;
2933 config.duplex = DUPLEX_UNKNOWN;
2934 break;
2935
2936 default:
2937 return -EINVAL;
2938 }
2939
2940 /* We have ruled out the case with a PHY attached, and the
2941 * fixed-link cases. All that is left are in-band links.
2942 */
2943 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2944 kset->base.autoneg == AUTONEG_ENABLE);
2945
2946 /* If this link is with an SFP, ensure that changes to advertised modes
2947 * also cause the associated interface to be selected such that the
2948 * link can be configured correctly.
2949 */
2950 if (pl->sfp_bus) {
2951 config.interface = phylink_sfp_select_interface(pl,
2952 config.advertising);
2953 if (config.interface == PHY_INTERFACE_MODE_NA)
2954 return -EINVAL;
2955
2956 /* Revalidate with the selected interface */
2957 linkmode_copy(support, pl->supported);
2958 if (phylink_validate(pl, support, &config)) {
2959 phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2960 phylink_an_mode_str(pl->req_link_an_mode),
2961 phy_modes(config.interface),
2962 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2963 return -EINVAL;
2964 }
2965 } else {
2966 /* Validate without changing the current supported mask. */
2967 linkmode_copy(support, pl->supported);
2968 if (phylink_validate(pl, support, &config))
2969 return -EINVAL;
2970 }
2971
2972 /* If autonegotiation is enabled, we must have an advertisement */
2973 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2974 config.advertising) &&
2975 phylink_is_empty_linkmode(config.advertising))
2976 return -EINVAL;
2977
2978 /* Validate the autonegotiation state. We don't have a PHY in this
2979 * situation, so the PCS is the media-facing entity.
2980 */
2981 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,
2982 config.advertising))
2983 return -EINVAL;
2984
2985 mutex_lock(&pl->state_mutex);
2986 pl->link_config.speed = config.speed;
2987 pl->link_config.duplex = config.duplex;
2988
2989 if (pl->link_config.interface != config.interface) {
2990 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2991 /* We need to force the link down, then change the interface */
2992 if (pl->old_link_state) {
2993 phylink_link_down(pl);
2994 pl->old_link_state = false;
2995 }
2996 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2997 &pl->phylink_disable_state))
2998 phylink_major_config(pl, false, &config);
2999 pl->link_config.interface = config.interface;
3000 linkmode_copy(pl->link_config.advertising, config.advertising);
3001 } else if (!linkmode_equal(pl->link_config.advertising,
3002 config.advertising)) {
3003 linkmode_copy(pl->link_config.advertising, config.advertising);
3004 phylink_change_inband_advert(pl);
3005 }
3006 mutex_unlock(&pl->state_mutex);
3007
3008 return 0;
3009 }
3010 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
3011
3012 /**
3013 * phylink_ethtool_nway_reset() - restart negotiation
3014 * @pl: a pointer to a &struct phylink returned from phylink_create()
3015 *
3016 * Restart negotiation for the phylink instance specified by @pl. This will
3017 * cause any attached phy to restart negotiation with the link partner, and
3018 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
3019 * negotiation.
3020 *
3021 * Returns zero on success, or negative error code.
3022 */
phylink_ethtool_nway_reset(struct phylink * pl)3023 int phylink_ethtool_nway_reset(struct phylink *pl)
3024 {
3025 int ret = 0;
3026
3027 ASSERT_RTNL();
3028
3029 if (pl->phydev)
3030 ret = phy_restart_aneg(pl->phydev);
3031 phylink_pcs_an_restart(pl);
3032
3033 return ret;
3034 }
3035 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
3036
3037 /**
3038 * phylink_ethtool_get_pauseparam() - get the current pause parameters
3039 * @pl: a pointer to a &struct phylink returned from phylink_create()
3040 * @pause: a pointer to a &struct ethtool_pauseparam
3041 */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)3042 void phylink_ethtool_get_pauseparam(struct phylink *pl,
3043 struct ethtool_pauseparam *pause)
3044 {
3045 ASSERT_RTNL();
3046
3047 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
3048 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
3049 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
3050 }
3051 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
3052
3053 /**
3054 * phylink_ethtool_set_pauseparam() - set the current pause parameters
3055 * @pl: a pointer to a &struct phylink returned from phylink_create()
3056 * @pause: a pointer to a &struct ethtool_pauseparam
3057 */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)3058 int phylink_ethtool_set_pauseparam(struct phylink *pl,
3059 struct ethtool_pauseparam *pause)
3060 {
3061 struct phylink_link_state *config = &pl->link_config;
3062 bool manual_changed;
3063 int pause_state;
3064
3065 ASSERT_RTNL();
3066
3067 if (pl->req_link_an_mode == MLO_AN_FIXED)
3068 return -EOPNOTSUPP;
3069
3070 if (!phylink_test(pl->supported, Pause) &&
3071 !phylink_test(pl->supported, Asym_Pause))
3072 return -EOPNOTSUPP;
3073
3074 if (!phylink_test(pl->supported, Asym_Pause) &&
3075 pause->rx_pause != pause->tx_pause)
3076 return -EINVAL;
3077
3078 pause_state = 0;
3079 if (pause->autoneg)
3080 pause_state |= MLO_PAUSE_AN;
3081 if (pause->rx_pause)
3082 pause_state |= MLO_PAUSE_RX;
3083 if (pause->tx_pause)
3084 pause_state |= MLO_PAUSE_TX;
3085
3086 mutex_lock(&pl->state_mutex);
3087 /*
3088 * See the comments for linkmode_set_pause(), wrt the deficiencies
3089 * with the current implementation. A solution to this issue would
3090 * be:
3091 * ethtool Local device
3092 * rx tx Pause AsymDir
3093 * 0 0 0 0
3094 * 1 0 1 1
3095 * 0 1 0 1
3096 * 1 1 1 1
3097 * and then use the ethtool rx/tx enablement status to mask the
3098 * rx/tx pause resolution.
3099 */
3100 linkmode_set_pause(config->advertising, pause->tx_pause,
3101 pause->rx_pause);
3102
3103 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
3104 (!(pause_state & MLO_PAUSE_AN) &&
3105 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
3106
3107 config->pause = pause_state;
3108
3109 /* Update our in-band advertisement, triggering a renegotiation if
3110 * the advertisement changed.
3111 */
3112 if (!pl->phydev)
3113 phylink_change_inband_advert(pl);
3114
3115 mutex_unlock(&pl->state_mutex);
3116
3117 /* If we have a PHY, a change of the pause frame advertisement will
3118 * cause phylib to renegotiate (if AN is enabled) which will in turn
3119 * call our phylink_phy_change() and trigger a resolve. Note that
3120 * we can't hold our state mutex while calling phy_set_asym_pause().
3121 */
3122 if (pl->phydev)
3123 phy_set_asym_pause(pl->phydev, pause->rx_pause,
3124 pause->tx_pause);
3125
3126 /* If the manual pause settings changed, make sure we trigger a
3127 * resolve to update their state; we can not guarantee that the
3128 * link will cycle.
3129 */
3130 if (manual_changed) {
3131 pl->link_failed = true;
3132 phylink_run_resolve(pl);
3133 }
3134
3135 return 0;
3136 }
3137 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
3138
3139 /**
3140 * phylink_get_eee_err() - read the energy efficient ethernet error
3141 * counter
3142 * @pl: a pointer to a &struct phylink returned from phylink_create().
3143 *
3144 * Read the Energy Efficient Ethernet error counter from the PHY associated
3145 * with the phylink instance specified by @pl.
3146 *
3147 * Returns positive error counter value, or negative error code.
3148 */
phylink_get_eee_err(struct phylink * pl)3149 int phylink_get_eee_err(struct phylink *pl)
3150 {
3151 int ret = 0;
3152
3153 ASSERT_RTNL();
3154
3155 if (pl->phydev)
3156 ret = phy_get_eee_err(pl->phydev);
3157
3158 return ret;
3159 }
3160 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
3161
3162 /**
3163 * phylink_init_eee() - init and check the EEE features
3164 * @pl: a pointer to a &struct phylink returned from phylink_create()
3165 * @clk_stop_enable: allow PHY to stop receive clock
3166 *
3167 * Must be called either with RTNL held or within mac_link_up()
3168 */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)3169 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
3170 {
3171 int ret = -EOPNOTSUPP;
3172
3173 if (pl->phydev)
3174 ret = phy_init_eee(pl->phydev, clk_stop_enable);
3175
3176 return ret;
3177 }
3178 EXPORT_SYMBOL_GPL(phylink_init_eee);
3179
3180 /**
3181 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
3182 * @pl: a pointer to a &struct phylink returned from phylink_create()
3183 * @eee: a pointer to a &struct ethtool_keee for the read parameters
3184 */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_keee * eee)3185 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
3186 {
3187 int ret = -EOPNOTSUPP;
3188
3189 ASSERT_RTNL();
3190
3191 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee)
3192 return ret;
3193
3194 if (pl->phydev) {
3195 ret = phy_ethtool_get_eee(pl->phydev, eee);
3196 /* Restrict supported linkmode mask */
3197 if (ret == 0 && pl->mac_supports_eee_ops)
3198 linkmode_and(eee->supported, eee->supported,
3199 pl->supported_lpi);
3200 }
3201
3202 return ret;
3203 }
3204 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
3205
3206 /**
3207 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
3208 * @pl: a pointer to a &struct phylink returned from phylink_create()
3209 * @eee: a pointer to a &struct ethtool_keee for the desired parameters
3210 */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_keee * eee)3211 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
3212 {
3213 bool mac_eee = pl->mac_supports_eee;
3214 int ret = -EOPNOTSUPP;
3215
3216 ASSERT_RTNL();
3217
3218 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n",
3219 mac_eee ? "supports" : "does not support",
3220 eee->eee_enabled ? ", enabled" : "",
3221 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised,
3222 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer);
3223
3224 if (pl->mac_supports_eee_ops && !mac_eee)
3225 return ret;
3226
3227 if (pl->phydev) {
3228 /* Restrict advertisement mask */
3229 if (pl->mac_supports_eee_ops)
3230 linkmode_and(eee->advertised, eee->advertised,
3231 pl->supported_lpi);
3232 ret = phy_ethtool_set_eee(pl->phydev, eee);
3233 if (ret == 0)
3234 eee_to_eeecfg(&pl->eee_cfg, eee);
3235 }
3236
3237 return ret;
3238 }
3239 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
3240
3241 /* This emulates MII registers for a fixed-mode phy operating as per the
3242 * passed in state. "aneg" defines if we report negotiation is possible.
3243 *
3244 * FIXME: should deal with negotiation state too.
3245 */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)3246 static int phylink_mii_emul_read(unsigned int reg,
3247 struct phylink_link_state *state)
3248 {
3249 struct fixed_phy_status fs;
3250 unsigned long *lpa = state->lp_advertising;
3251 int val;
3252
3253 fs.link = state->link;
3254 fs.speed = state->speed;
3255 fs.duplex = state->duplex;
3256 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
3257 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
3258
3259 val = swphy_read_reg(reg, &fs);
3260 if (reg == MII_BMSR) {
3261 if (!state->an_complete)
3262 val &= ~BMSR_ANEGCOMPLETE;
3263 }
3264 return val;
3265 }
3266
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)3267 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
3268 unsigned int reg)
3269 {
3270 struct phy_device *phydev = pl->phydev;
3271 int prtad, devad;
3272
3273 if (mdio_phy_id_is_c45(phy_id)) {
3274 prtad = mdio_phy_id_prtad(phy_id);
3275 devad = mdio_phy_id_devad(phy_id);
3276 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3277 reg);
3278 }
3279
3280 if (phydev->is_c45) {
3281 switch (reg) {
3282 case MII_BMCR:
3283 case MII_BMSR:
3284 case MII_PHYSID1:
3285 case MII_PHYSID2:
3286 devad = __ffs(phydev->c45_ids.mmds_present);
3287 break;
3288 case MII_ADVERTISE:
3289 case MII_LPA:
3290 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3291 return -EINVAL;
3292 devad = MDIO_MMD_AN;
3293 if (reg == MII_ADVERTISE)
3294 reg = MDIO_AN_ADVERTISE;
3295 else
3296 reg = MDIO_AN_LPA;
3297 break;
3298 default:
3299 return -EINVAL;
3300 }
3301 prtad = phy_id;
3302 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3303 reg);
3304 }
3305
3306 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
3307 }
3308
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3309 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
3310 unsigned int reg, unsigned int val)
3311 {
3312 struct phy_device *phydev = pl->phydev;
3313 int prtad, devad;
3314
3315 if (mdio_phy_id_is_c45(phy_id)) {
3316 prtad = mdio_phy_id_prtad(phy_id);
3317 devad = mdio_phy_id_devad(phy_id);
3318 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
3319 reg, val);
3320 }
3321
3322 if (phydev->is_c45) {
3323 switch (reg) {
3324 case MII_BMCR:
3325 case MII_BMSR:
3326 case MII_PHYSID1:
3327 case MII_PHYSID2:
3328 devad = __ffs(phydev->c45_ids.mmds_present);
3329 break;
3330 case MII_ADVERTISE:
3331 case MII_LPA:
3332 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3333 return -EINVAL;
3334 devad = MDIO_MMD_AN;
3335 if (reg == MII_ADVERTISE)
3336 reg = MDIO_AN_ADVERTISE;
3337 else
3338 reg = MDIO_AN_LPA;
3339 break;
3340 default:
3341 return -EINVAL;
3342 }
3343 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
3344 reg, val);
3345 }
3346
3347 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
3348 }
3349
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)3350 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
3351 unsigned int reg)
3352 {
3353 struct phylink_link_state state;
3354 int val = 0xffff;
3355
3356 switch (pl->act_link_an_mode) {
3357 case MLO_AN_FIXED:
3358 if (phy_id == 0) {
3359 phylink_get_fixed_state(pl, &state);
3360 val = phylink_mii_emul_read(reg, &state);
3361 }
3362 break;
3363
3364 case MLO_AN_PHY:
3365 return -EOPNOTSUPP;
3366
3367 case MLO_AN_INBAND:
3368 if (phy_id == 0) {
3369 phylink_mac_pcs_get_state(pl, &state);
3370 val = phylink_mii_emul_read(reg, &state);
3371 }
3372 break;
3373 }
3374
3375 return val & 0xffff;
3376 }
3377
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3378 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3379 unsigned int reg, unsigned int val)
3380 {
3381 switch (pl->act_link_an_mode) {
3382 case MLO_AN_FIXED:
3383 break;
3384
3385 case MLO_AN_PHY:
3386 return -EOPNOTSUPP;
3387
3388 case MLO_AN_INBAND:
3389 break;
3390 }
3391
3392 return 0;
3393 }
3394
3395 /**
3396 * phylink_mii_ioctl() - generic mii ioctl interface
3397 * @pl: a pointer to a &struct phylink returned from phylink_create()
3398 * @ifr: a pointer to a &struct ifreq for socket ioctls
3399 * @cmd: ioctl cmd to execute
3400 *
3401 * Perform the specified MII ioctl on the PHY attached to the phylink instance
3402 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3403 *
3404 * Returns: zero on success or negative error code.
3405 *
3406 * %SIOCGMIIPHY:
3407 * read register from the current PHY.
3408 * %SIOCGMIIREG:
3409 * read register from the specified PHY.
3410 * %SIOCSMIIREG:
3411 * set a register on the specified PHY.
3412 */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)3413 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3414 {
3415 struct mii_ioctl_data *mii = if_mii(ifr);
3416 int ret;
3417
3418 ASSERT_RTNL();
3419
3420 if (pl->phydev) {
3421 /* PHYs only exist for MLO_AN_PHY and SGMII */
3422 switch (cmd) {
3423 case SIOCGMIIPHY:
3424 mii->phy_id = pl->phydev->mdio.addr;
3425 fallthrough;
3426
3427 case SIOCGMIIREG:
3428 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3429 if (ret >= 0) {
3430 mii->val_out = ret;
3431 ret = 0;
3432 }
3433 break;
3434
3435 case SIOCSMIIREG:
3436 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3437 mii->val_in);
3438 break;
3439
3440 default:
3441 ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3442 break;
3443 }
3444 } else {
3445 switch (cmd) {
3446 case SIOCGMIIPHY:
3447 mii->phy_id = 0;
3448 fallthrough;
3449
3450 case SIOCGMIIREG:
3451 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3452 if (ret >= 0) {
3453 mii->val_out = ret;
3454 ret = 0;
3455 }
3456 break;
3457
3458 case SIOCSMIIREG:
3459 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3460 mii->val_in);
3461 break;
3462
3463 default:
3464 ret = -EOPNOTSUPP;
3465 break;
3466 }
3467 }
3468
3469 return ret;
3470 }
3471 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3472
3473 /**
3474 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3475 * link partners
3476 * @pl: a pointer to a &struct phylink returned from phylink_create()
3477 * @sync: perform action synchronously
3478 *
3479 * If we have a PHY that is not part of a SFP module, then set the speed
3480 * as described in the phy_speed_down() function. Please see this function
3481 * for a description of the @sync parameter.
3482 *
3483 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3484 */
phylink_speed_down(struct phylink * pl,bool sync)3485 int phylink_speed_down(struct phylink *pl, bool sync)
3486 {
3487 int ret = 0;
3488
3489 ASSERT_RTNL();
3490
3491 if (!pl->sfp_bus && pl->phydev)
3492 ret = phy_speed_down(pl->phydev, sync);
3493
3494 return ret;
3495 }
3496 EXPORT_SYMBOL_GPL(phylink_speed_down);
3497
3498 /**
3499 * phylink_speed_up() - restore the advertised speeds prior to the call to
3500 * phylink_speed_down()
3501 * @pl: a pointer to a &struct phylink returned from phylink_create()
3502 *
3503 * If we have a PHY that is not part of a SFP module, then restore the
3504 * PHY speeds as per phy_speed_up().
3505 *
3506 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3507 */
phylink_speed_up(struct phylink * pl)3508 int phylink_speed_up(struct phylink *pl)
3509 {
3510 int ret = 0;
3511
3512 ASSERT_RTNL();
3513
3514 if (!pl->sfp_bus && pl->phydev)
3515 ret = phy_speed_up(pl->phydev);
3516
3517 return ret;
3518 }
3519 EXPORT_SYMBOL_GPL(phylink_speed_up);
3520
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)3521 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3522 {
3523 struct phylink *pl = upstream;
3524
3525 pl->netdev->sfp_bus = bus;
3526 }
3527
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)3528 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3529 {
3530 struct phylink *pl = upstream;
3531
3532 pl->netdev->sfp_bus = NULL;
3533 }
3534
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)3535 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3536 const unsigned long *intf)
3537 {
3538 phy_interface_t interface;
3539 size_t i;
3540
3541 interface = PHY_INTERFACE_MODE_NA;
3542 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3543 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3544 interface = phylink_sfp_interface_preference[i];
3545 break;
3546 }
3547
3548 return interface;
3549 }
3550
phylink_sfp_set_config(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,bool changed)3551 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported,
3552 struct phylink_link_state *state,
3553 bool changed)
3554 {
3555 u8 mode = MLO_AN_INBAND;
3556
3557 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3558 phylink_an_mode_str(mode), phy_modes(state->interface),
3559 __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3560
3561 if (!linkmode_equal(pl->supported, supported)) {
3562 linkmode_copy(pl->supported, supported);
3563 changed = true;
3564 }
3565
3566 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3567 linkmode_copy(pl->link_config.advertising, state->advertising);
3568 changed = true;
3569 }
3570
3571 if (pl->req_link_an_mode != mode ||
3572 pl->link_config.interface != state->interface) {
3573 pl->req_link_an_mode = mode;
3574 pl->link_config.interface = state->interface;
3575
3576 changed = true;
3577
3578 phylink_info(pl, "switched to %s/%s link mode\n",
3579 phylink_an_mode_str(mode),
3580 phy_modes(state->interface));
3581 }
3582
3583 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3584 &pl->phylink_disable_state))
3585 phylink_mac_initial_config(pl, false);
3586 }
3587
phylink_sfp_config_phy(struct phylink * pl,struct phy_device * phy)3588 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)
3589 {
3590 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3591 struct phylink_link_state config;
3592 int ret;
3593
3594 linkmode_copy(support, phy->supported);
3595
3596 memset(&config, 0, sizeof(config));
3597 linkmode_copy(config.advertising, phy->advertising);
3598 config.interface = PHY_INTERFACE_MODE_NA;
3599 config.speed = SPEED_UNKNOWN;
3600 config.duplex = DUPLEX_UNKNOWN;
3601 config.pause = MLO_PAUSE_AN;
3602
3603 /* Ignore errors if we're expecting a PHY to attach later */
3604 ret = phylink_validate(pl, support, &config);
3605 if (ret) {
3606 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3607 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3608 ERR_PTR(ret));
3609 return ret;
3610 }
3611
3612 config.interface = phylink_sfp_select_interface(pl, config.advertising);
3613 if (config.interface == PHY_INTERFACE_MODE_NA)
3614 return -EINVAL;
3615
3616 /* Attach the PHY so that the PHY is present when we do the major
3617 * configuration step.
3618 */
3619 ret = phylink_attach_phy(pl, phy, config.interface);
3620 if (ret < 0)
3621 return ret;
3622
3623 /* This will validate the configuration for us. */
3624 ret = phylink_bringup_phy(pl, phy, config.interface);
3625 if (ret < 0) {
3626 phy_detach(phy);
3627 return ret;
3628 }
3629
3630 pl->link_port = pl->sfp_port;
3631
3632 phylink_sfp_set_config(pl, support, &config, true);
3633
3634 return 0;
3635 }
3636
phylink_sfp_config_optical(struct phylink * pl)3637 static int phylink_sfp_config_optical(struct phylink *pl)
3638 {
3639 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3640 DECLARE_PHY_INTERFACE_MASK(interfaces);
3641 struct phylink_link_state config;
3642 phy_interface_t interface;
3643 int ret;
3644
3645 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3646 (int)PHY_INTERFACE_MODE_MAX,
3647 pl->config->supported_interfaces,
3648 (int)PHY_INTERFACE_MODE_MAX,
3649 pl->sfp_interfaces);
3650
3651 /* Find the union of the supported interfaces by the PCS/MAC and
3652 * the SFP module.
3653 */
3654 phy_interface_and(interfaces, pl->config->supported_interfaces,
3655 pl->sfp_interfaces);
3656 if (phy_interface_empty(interfaces)) {
3657 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3658 return -EINVAL;
3659 }
3660
3661 memset(&config, 0, sizeof(config));
3662 linkmode_copy(support, pl->sfp_support);
3663 linkmode_copy(config.advertising, pl->sfp_support);
3664 config.speed = SPEED_UNKNOWN;
3665 config.duplex = DUPLEX_UNKNOWN;
3666 config.pause = MLO_PAUSE_AN;
3667
3668 /* For all the interfaces that are supported, reduce the sfp_support
3669 * mask to only those link modes that can be supported.
3670 */
3671 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3672 interfaces);
3673 if (ret) {
3674 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3675 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3676 return ret;
3677 }
3678
3679 interface = phylink_choose_sfp_interface(pl, interfaces);
3680 if (interface == PHY_INTERFACE_MODE_NA) {
3681 phylink_err(pl, "failed to select SFP interface\n");
3682 return -EINVAL;
3683 }
3684
3685 phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3686 phy_modes(interface));
3687
3688 if (!phylink_validate_pcs_inband_autoneg(pl, interface,
3689 config.advertising)) {
3690 phylink_err(pl, "autoneg setting not compatible with PCS");
3691 return -EINVAL;
3692 }
3693
3694 config.interface = interface;
3695
3696 /* Ignore errors if we're expecting a PHY to attach later */
3697 ret = phylink_validate(pl, support, &config);
3698 if (ret) {
3699 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3700 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3701 ERR_PTR(ret));
3702 return ret;
3703 }
3704
3705 pl->link_port = pl->sfp_port;
3706
3707 phylink_sfp_set_config(pl, pl->sfp_support, &config, false);
3708
3709 return 0;
3710 }
3711
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3712 static int phylink_sfp_module_insert(void *upstream,
3713 const struct sfp_eeprom_id *id)
3714 {
3715 struct phylink *pl = upstream;
3716
3717 ASSERT_RTNL();
3718
3719 linkmode_zero(pl->sfp_support);
3720 phy_interface_zero(pl->sfp_interfaces);
3721 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3722 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3723
3724 /* If this module may have a PHY connecting later, defer until later */
3725 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3726 if (pl->sfp_may_have_phy)
3727 return 0;
3728
3729 return phylink_sfp_config_optical(pl);
3730 }
3731
phylink_sfp_module_start(void * upstream)3732 static int phylink_sfp_module_start(void *upstream)
3733 {
3734 struct phylink *pl = upstream;
3735
3736 /* If this SFP module has a PHY, start the PHY now. */
3737 if (pl->phydev) {
3738 phy_start(pl->phydev);
3739 return 0;
3740 }
3741
3742 /* If the module may have a PHY but we didn't detect one we
3743 * need to configure the MAC here.
3744 */
3745 if (!pl->sfp_may_have_phy)
3746 return 0;
3747
3748 return phylink_sfp_config_optical(pl);
3749 }
3750
phylink_sfp_module_stop(void * upstream)3751 static void phylink_sfp_module_stop(void *upstream)
3752 {
3753 struct phylink *pl = upstream;
3754
3755 /* If this SFP module has a PHY, stop it. */
3756 if (pl->phydev)
3757 phy_stop(pl->phydev);
3758 }
3759
phylink_sfp_link_down(void * upstream)3760 static void phylink_sfp_link_down(void *upstream)
3761 {
3762 struct phylink *pl = upstream;
3763
3764 ASSERT_RTNL();
3765
3766 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3767 }
3768
phylink_sfp_link_up(void * upstream)3769 static void phylink_sfp_link_up(void *upstream)
3770 {
3771 struct phylink *pl = upstream;
3772
3773 ASSERT_RTNL();
3774
3775 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3776 }
3777
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3778 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3779 {
3780 struct phylink *pl = upstream;
3781
3782 if (!phy->drv) {
3783 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n",
3784 phydev_name(phy), (unsigned long)phy->phy_id);
3785 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n");
3786 return -EINVAL;
3787 }
3788
3789 /*
3790 * This is the new way of dealing with flow control for PHYs,
3791 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3792 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3793 * using our validate call to the MAC, we rely upon the MAC
3794 * clearing the bits from both supported and advertising fields.
3795 */
3796 phy_support_asym_pause(phy);
3797
3798 /* Set the PHY's host supported interfaces */
3799 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3800 pl->config->supported_interfaces);
3801
3802 /* Do the initial configuration */
3803 return phylink_sfp_config_phy(pl, phy);
3804 }
3805
phylink_sfp_disconnect_phy(void * upstream,struct phy_device * phydev)3806 static void phylink_sfp_disconnect_phy(void *upstream,
3807 struct phy_device *phydev)
3808 {
3809 phylink_disconnect_phy(upstream);
3810 }
3811
3812 static const struct sfp_upstream_ops sfp_phylink_ops = {
3813 .attach = phylink_sfp_attach,
3814 .detach = phylink_sfp_detach,
3815 .module_insert = phylink_sfp_module_insert,
3816 .module_start = phylink_sfp_module_start,
3817 .module_stop = phylink_sfp_module_stop,
3818 .link_up = phylink_sfp_link_up,
3819 .link_down = phylink_sfp_link_down,
3820 .connect_phy = phylink_sfp_connect_phy,
3821 .disconnect_phy = phylink_sfp_disconnect_phy,
3822 };
3823
3824 /* Helpers for MAC drivers */
3825
3826 static struct {
3827 int bit;
3828 int speed;
3829 } phylink_c73_priority_resolution[] = {
3830 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3831 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3832 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3833 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3834 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3835 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3836 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3837 /* 5GBASE-KR not supported */
3838 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3839 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3840 };
3841
phylink_resolve_c73(struct phylink_link_state * state)3842 void phylink_resolve_c73(struct phylink_link_state *state)
3843 {
3844 int i;
3845
3846 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3847 int bit = phylink_c73_priority_resolution[i].bit;
3848 if (linkmode_test_bit(bit, state->advertising) &&
3849 linkmode_test_bit(bit, state->lp_advertising))
3850 break;
3851 }
3852
3853 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3854 state->speed = phylink_c73_priority_resolution[i].speed;
3855 state->duplex = DUPLEX_FULL;
3856 } else {
3857 /* negotiation failure */
3858 state->link = false;
3859 }
3860
3861 phylink_resolve_an_pause(state);
3862 }
3863 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3864
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3865 static void phylink_decode_c37_word(struct phylink_link_state *state,
3866 uint16_t config_reg, int speed)
3867 {
3868 int fd_bit;
3869
3870 if (speed == SPEED_2500)
3871 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3872 else
3873 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3874
3875 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3876
3877 if (linkmode_test_bit(fd_bit, state->advertising) &&
3878 linkmode_test_bit(fd_bit, state->lp_advertising)) {
3879 state->speed = speed;
3880 state->duplex = DUPLEX_FULL;
3881 } else {
3882 /* negotiation failure */
3883 state->link = false;
3884 }
3885
3886 phylink_resolve_an_pause(state);
3887 }
3888
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3889 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3890 uint16_t config_reg)
3891 {
3892 if (!(config_reg & LPA_SGMII_LINK)) {
3893 state->link = false;
3894 return;
3895 }
3896
3897 switch (config_reg & LPA_SGMII_SPD_MASK) {
3898 case LPA_SGMII_10:
3899 state->speed = SPEED_10;
3900 break;
3901 case LPA_SGMII_100:
3902 state->speed = SPEED_100;
3903 break;
3904 case LPA_SGMII_1000:
3905 state->speed = SPEED_1000;
3906 break;
3907 default:
3908 state->link = false;
3909 return;
3910 }
3911 if (config_reg & LPA_SGMII_FULL_DUPLEX)
3912 state->duplex = DUPLEX_FULL;
3913 else
3914 state->duplex = DUPLEX_HALF;
3915 }
3916
3917 /**
3918 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3919 * @state: a pointer to a struct phylink_link_state.
3920 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3921 *
3922 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3923 * code word. Decode the USXGMII code word and populate the corresponding fields
3924 * (speed, duplex) into the phylink_link_state structure.
3925 */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3926 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3927 uint16_t lpa)
3928 {
3929 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3930 case MDIO_USXGMII_10:
3931 state->speed = SPEED_10;
3932 break;
3933 case MDIO_USXGMII_100:
3934 state->speed = SPEED_100;
3935 break;
3936 case MDIO_USXGMII_1000:
3937 state->speed = SPEED_1000;
3938 break;
3939 case MDIO_USXGMII_2500:
3940 state->speed = SPEED_2500;
3941 break;
3942 case MDIO_USXGMII_5000:
3943 state->speed = SPEED_5000;
3944 break;
3945 case MDIO_USXGMII_10G:
3946 state->speed = SPEED_10000;
3947 break;
3948 default:
3949 state->link = false;
3950 return;
3951 }
3952
3953 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3954 state->duplex = DUPLEX_FULL;
3955 else
3956 state->duplex = DUPLEX_HALF;
3957 }
3958 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3959
3960 /**
3961 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3962 * @state: a pointer to a struct phylink_link_state.
3963 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3964 *
3965 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3966 * code word. Decode the USGMII code word and populate the corresponding fields
3967 * (speed, duplex) into the phylink_link_state structure. The structure for this
3968 * word is the same as the USXGMII word, except it only supports speeds up to
3969 * 1Gbps.
3970 */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)3971 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3972 uint16_t lpa)
3973 {
3974 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3975 case MDIO_USXGMII_10:
3976 state->speed = SPEED_10;
3977 break;
3978 case MDIO_USXGMII_100:
3979 state->speed = SPEED_100;
3980 break;
3981 case MDIO_USXGMII_1000:
3982 state->speed = SPEED_1000;
3983 break;
3984 default:
3985 state->link = false;
3986 return;
3987 }
3988
3989 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3990 state->duplex = DUPLEX_FULL;
3991 else
3992 state->duplex = DUPLEX_HALF;
3993 }
3994
3995 /**
3996 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3997 * @state: a pointer to a &struct phylink_link_state.
3998 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
3999 * @bmsr: The value of the %MII_BMSR register
4000 * @lpa: The value of the %MII_LPA register
4001 *
4002 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4003 * clause 37 negotiation and/or SGMII control.
4004 *
4005 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
4006 * the phylink @state structure. This is suitable to be used for implementing
4007 * the pcs_get_state() member of the struct phylink_pcs_ops structure if
4008 * accessing @bmsr and @lpa cannot be done with MDIO directly.
4009 */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,unsigned int neg_mode,u16 bmsr,u16 lpa)4010 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
4011 unsigned int neg_mode, u16 bmsr, u16 lpa)
4012 {
4013 state->link = !!(bmsr & BMSR_LSTATUS);
4014 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
4015
4016 /* If the link is down, the advertisement data is undefined. */
4017 if (!state->link)
4018 return;
4019
4020 switch (state->interface) {
4021 case PHY_INTERFACE_MODE_1000BASEX:
4022 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4023 phylink_decode_c37_word(state, lpa, SPEED_1000);
4024 } else {
4025 state->speed = SPEED_1000;
4026 state->duplex = DUPLEX_FULL;
4027 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4028 }
4029 break;
4030
4031 case PHY_INTERFACE_MODE_2500BASEX:
4032 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4033 phylink_decode_c37_word(state, lpa, SPEED_2500);
4034 } else {
4035 state->speed = SPEED_2500;
4036 state->duplex = DUPLEX_FULL;
4037 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4038 }
4039 break;
4040
4041 case PHY_INTERFACE_MODE_SGMII:
4042 case PHY_INTERFACE_MODE_QSGMII:
4043 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4044 phylink_decode_sgmii_word(state, lpa);
4045 break;
4046
4047 case PHY_INTERFACE_MODE_QUSGMII:
4048 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4049 phylink_decode_usgmii_word(state, lpa);
4050 break;
4051
4052 default:
4053 state->link = false;
4054 break;
4055 }
4056 }
4057 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
4058
4059 /**
4060 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
4061 * @pcs: a pointer to a &struct mdio_device.
4062 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
4063 * @state: a pointer to a &struct phylink_link_state.
4064 *
4065 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4066 * clause 37 negotiation and/or SGMII control.
4067 *
4068 * Read the MAC PCS state from the MII device configured in @config and
4069 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
4070 * the phylink @state structure. This is suitable to be directly plugged
4071 * into the pcs_get_state() member of the struct phylink_pcs_ops
4072 * structure.
4073 */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,unsigned int neg_mode,struct phylink_link_state * state)4074 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
4075 unsigned int neg_mode,
4076 struct phylink_link_state *state)
4077 {
4078 int bmsr, lpa;
4079
4080 bmsr = mdiodev_read(pcs, MII_BMSR);
4081 lpa = mdiodev_read(pcs, MII_LPA);
4082 if (bmsr < 0 || lpa < 0) {
4083 state->link = false;
4084 return;
4085 }
4086
4087 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa);
4088 }
4089 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
4090
4091 /**
4092 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
4093 * advertisement
4094 * @interface: the PHY interface mode being configured
4095 * @advertising: the ethtool advertisement mask
4096 *
4097 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4098 * clause 37 negotiation and/or SGMII control.
4099 *
4100 * Encode the clause 37 PCS advertisement as specified by @interface and
4101 * @advertising.
4102 *
4103 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
4104 */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)4105 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
4106 const unsigned long *advertising)
4107 {
4108 u16 adv;
4109
4110 switch (interface) {
4111 case PHY_INTERFACE_MODE_1000BASEX:
4112 case PHY_INTERFACE_MODE_2500BASEX:
4113 adv = ADVERTISE_1000XFULL;
4114 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
4115 advertising))
4116 adv |= ADVERTISE_1000XPAUSE;
4117 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
4118 advertising))
4119 adv |= ADVERTISE_1000XPSE_ASYM;
4120 return adv;
4121 case PHY_INTERFACE_MODE_SGMII:
4122 case PHY_INTERFACE_MODE_QSGMII:
4123 return 0x0001;
4124 default:
4125 /* Nothing to do for other modes */
4126 return -EINVAL;
4127 }
4128 }
4129 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
4130
4131 /**
4132 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
4133 * @pcs: a pointer to a &struct mdio_device.
4134 * @interface: the PHY interface mode being configured
4135 * @advertising: the ethtool advertisement mask
4136 * @neg_mode: PCS negotiation mode
4137 *
4138 * Configure a Clause 22 PCS PHY with the appropriate negotiation
4139 * parameters for the @mode, @interface and @advertising parameters.
4140 * Returns negative error number on failure, zero if the advertisement
4141 * has not changed, or positive if there is a change.
4142 */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising,unsigned int neg_mode)4143 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
4144 phy_interface_t interface,
4145 const unsigned long *advertising,
4146 unsigned int neg_mode)
4147 {
4148 bool changed = 0;
4149 u16 bmcr;
4150 int ret, adv;
4151
4152 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
4153 if (adv >= 0) {
4154 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
4155 MII_ADVERTISE, 0xffff, adv);
4156 if (ret < 0)
4157 return ret;
4158 changed = ret;
4159 }
4160
4161 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4162 bmcr = BMCR_ANENABLE;
4163 else
4164 bmcr = 0;
4165
4166 /* Configure the inband state. Ensure ISOLATE bit is disabled */
4167 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
4168 if (ret < 0)
4169 return ret;
4170
4171 return changed;
4172 }
4173 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
4174
4175 /**
4176 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
4177 * @pcs: a pointer to a &struct mdio_device.
4178 *
4179 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4180 * clause 37 negotiation.
4181 *
4182 * Restart the clause 37 negotiation with the link partner. This is
4183 * suitable to be directly plugged into the pcs_get_state() member
4184 * of the struct phylink_pcs_ops structure.
4185 */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)4186 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
4187 {
4188 int val = mdiodev_read(pcs, MII_BMCR);
4189
4190 if (val >= 0) {
4191 val |= BMCR_ANRESTART;
4192
4193 mdiodev_write(pcs, MII_BMCR, val);
4194 }
4195 }
4196 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
4197
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)4198 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
4199 struct phylink_link_state *state)
4200 {
4201 struct mii_bus *bus = pcs->bus;
4202 int addr = pcs->addr;
4203 int stat;
4204
4205 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
4206 if (stat < 0) {
4207 state->link = false;
4208 return;
4209 }
4210
4211 state->link = !!(stat & MDIO_STAT1_LSTATUS);
4212 if (!state->link)
4213 return;
4214
4215 switch (state->interface) {
4216 case PHY_INTERFACE_MODE_10GBASER:
4217 state->speed = SPEED_10000;
4218 state->duplex = DUPLEX_FULL;
4219 break;
4220
4221 default:
4222 break;
4223 }
4224 }
4225 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
4226
phylink_init(void)4227 static int __init phylink_init(void)
4228 {
4229 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
4230 __set_bit(phylink_sfp_interface_preference[i],
4231 phylink_sfp_interfaces);
4232
4233 return 0;
4234 }
4235
4236 module_init(phylink_init);
4237
4238 MODULE_LICENSE("GPL v2");
4239 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
4240