xref: /titanic_41/usr/src/uts/sun4/io/px/px_pec.h (revision e6b21d58662dc0b7b176616916c2aa3c6bcc2622)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
24  */
25 
26 #ifndef	_SYS_PX_PEC_H
27 #define	_SYS_PX_PEC_H
28 
29 #include <sys/types.h>
30 #include <sys/ontrap.h>
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 /*
37  * The following structure represents the pci-express configuration
38  * header for a fire PEC.
39  */
40 typedef struct px_config_header {
41 	volatile uint16_t ch_vendor_id;
42 	volatile uint16_t ch_device_id;
43 	volatile uint16_t ch_command_reg;
44 	volatile uint16_t ch_status_reg;
45 	volatile uint8_t ch_revision_id_reg;
46 	volatile uint8_t ch_programming_if_code_reg;
47 	volatile uint8_t ch_sub_class_reg;
48 	volatile uint8_t ch_base_class_reg;
49 	volatile uint8_t ch_cache_line_size_reg;
50 	volatile uint8_t ch_latency_timer_reg;
51 	volatile uint8_t ch_header_type_reg;
52 } px_config_header_t;
53 
54 /*
55  * Bit fields of ch_status_reg for cmn_err's %b
56  */
57 #define	PX_STATUS_BITS "\020\
58 \11signaled-parity-error\
59 \14signaled-target-abort\
60 \15received-target-abort\
61 \16received-master-abort\
62 \17signaled-system-error\
63 \20detected-parity-error"
64 
65 /*
66  * pec block soft state structure:
67  *
68  * Each px node has its own private pec block structure.
69  */
70 typedef struct px_pec {
71 	px_t		*pec_px_p;	/* link back to px soft state */
72 
73 	/*
74 	 * Memory address range on this PBM used to determine DMA on this pec
75 	 */
76 	px_iopfn_t		pec_base32_pfn;
77 	px_iopfn_t		pec_last32_pfn;
78 	px_iopfn_t		pec_base64_pfn;
79 	px_iopfn_t		pec_last64_pfn;
80 
81 	/*
82 	 * support for ddi_poke:
83 	 */
84 	on_trap_data_t	*pec_ontrap_data;
85 	int		pec_safeacc_type;
86 	kmutex_t	pec_pokefault_mutex;
87 
88 	/*
89 	 * support for cautious
90 	 */
91 	ddi_acc_handle_t pec_acc_hdl;
92 
93 #define	PBM_NAMESTR_BUFLEN 	64
94 	/* driver name & instance */
95 	char		pec_nameinst_str[PBM_NAMESTR_BUFLEN];
96 
97 	/* nodename & node_addr */
98 	char		*pec_nameaddr_str;
99 
100 	/* MSIQ used for correctable/fatal/non fatala PCIe messages */
101 	msiqid_t	pec_corr_msg_msiq_id;
102 	msiqid_t	pec_non_fatal_msg_msiq_id;
103 	msiqid_t	pec_fatal_msg_msiq_id;
104 } px_pec_t;
105 
106 /*
107  * forward declarations (object creation and destruction):
108  */
109 
110 extern int px_pec_attach(px_t *px_p);
111 extern void px_pec_detach(px_t *px_p);
112 extern int  px_pec_msg_add_intr(px_t *px_p);
113 extern void px_pec_msg_rem_intr(px_t *px_p);
114 
115 #ifdef	__cplusplus
116 }
117 #endif
118 
119 #endif	/* _SYS_PX_PEC_H */
120